Liquid crystal display panel

Abstract

The embodiment of the present application discloses a liquid crystal display panel, comprising a substrate, a pixel driving circuit, a sub-pixel and a data line group. The sub-pixel comprises a pixel electrode, the pixel electrode comprises a main pixel electrode and a secondary pixel electrode, the main pixel electrode comprises a first stem part, the secondary pixel electrode comprises a second stem part, and the first stem part and the second stem part are parallel and extend along a first direction. Each data line group comprises a first data line and a second data line which are parallel and extend along the first direction, and the first data line and the second data line are electrically connected to different pixel driving circuits respectively. The first data line at least partially overlaps with the first stem part, and the second data line at least partially overlaps with the second stem part. On the one hand, the space where the stem part is located can be fully utilized, and the aperture ratio of the sub-pixel is increased; on the other hand, a DBS electrode can not be arranged above the first data line and the second data line, and the process is reduced.

Description

Technical Field

[0001] This application relates to the field of displays, specifically to a liquid crystal display panel. Background Technology

[0002] With the continuous development of LCD displays, wide viewing angle, low power consumption, and high charging rate have become important performance indicators for measuring product advancement. In high-resolution LCD displays, the common electrodes and data lines on the thin-film transistor array substrate are opaque, resulting in a relatively low pixel aperture ratio and making it very difficult to improve transmittance. Summary of the Invention

[0003] This application provides a liquid crystal display panel to solve the technical problems of low pixel aperture ratio and poor transmittance in liquid crystal displays.

[0004] This application provides a liquid crystal display panel, including:

[0005] The array comprises multiple sub-pixels, each sub-pixel including a pixel electrode, the pixel electrode including a main pixel electrode and a secondary pixel electrode, the main pixel electrode including a first main stem, the secondary pixel electrode including a second main stem, the first main stem and the second main stem extending along a first direction, and the central axes of the first main stem and the second main stem extending along the first direction being parallel or coincident.

[0006] Multiple pixel driving circuits distributed in an array are electrically connected to each of the multiple sub-pixels in a one-to-one correspondence; and

[0007] Multiple data line groups, each of the data line groups includes a first data line and a second data line that are parallel to each other and extend along the first direction, and the first data line and the second data line are respectively electrically connected to different pixel driving circuits.

[0008] Wherein, the orthographic projection of the first data line on the substrate of the liquid crystal display panel overlaps at least with the orthographic projection of the first main stem on the substrate, and the orthographic projection of the second data line on the substrate overlaps at least with the orthographic projection of the second main stem on the substrate.

[0009] Optionally, in some embodiments of this application, the width of the first data line is smaller than the width of the first main stem, and the width of the second data line is smaller than the width of the second main stem.

[0010] Optionally, in some embodiments of this application, the liquid crystal display panel further includes a plurality of shared electrode groups disposed on the same layer as the data line group. Each shared electrode group includes a first shared electrode and a second shared electrode that are parallel to each other and extend along the first direction. The first shared electrode and the first data line are electrically connected to the same pixel driving circuit, and the second shared electrode and the second data line are electrically connected to the same pixel driving circuit.

[0011] Wherein, the first shared electrode and the second shared electrode are respectively located on two opposite sides of the first main stem and the second main stem of the corresponding pixel electrode;

[0012] The orthographic projections of the first shared electrode and the second shared electrode on the substrate overlap at least with the orthographic projections of the edge portion of the pixel electrode on the substrate.

[0013] Optionally, in some embodiments of this application, the shared electrode group is reused as a first common electrode.

[0014] Optionally, in some embodiments of this application, the main pixel electrode further includes:

[0015] The third main stem extends along a second direction intersecting the first direction, and the first and third main stems divide the main pixel electrode into multiple domains.

[0016] Multiple first branch electrodes, located within different domains, and extending in different directions from the first main stem and the third main stem; and

[0017] The first frame portion is sequentially connected to the tail ends of the plurality of first branch electrodes;

[0018] The sub-pixel electrode includes:

[0019] The fourth main stem extends along the second direction, and the second main stem and the fourth main stem divide the sub-pixel electrode into multiple domains.

[0020] Multiple second branch electrodes, located within different domains, and extending in different directions from the second main stem and the fourth main stem; and

[0021] The second frame portion is sequentially connected to the tail ends of the plurality of second branch electrodes;

[0022] Wherein, the orthographic projection of the first shared electrode on the substrate partially overlaps with the orthographic projections of the first frame portion and the second frame portion on the substrate;

[0023] The orthographic projection of the second shared electrode on the substrate partially overlaps with the orthographic projections of the first and second frame portions on the substrate.

[0024] Optionally, in some embodiments of this application, the width of the first shared electrode is smaller than the width of the first border portion and the width of the second border portion, and the width of the second shared electrode is smaller than the width of the first border portion and the width of the second border portion.

[0025] Optionally, in some embodiments of this application, the overlap area between the first data line and the pixel electrode is equal to the overlap area between the second data line and the pixel electrode.

[0026] Optionally, in some embodiments of this application, the first main stem includes a first sub-main stem and a second sub-main stem that are parallel to each other and extend along the first direction. The first sub-main stem and the second sub-main stem are located on two opposite sides of the third main stem and are connected to the third main stem.

[0027] The second main branch includes a third sub-main branch and a fourth sub-main branch that are parallel to each other and extend along a first direction. The third sub-main branch and the fourth sub-main branch are respectively located on two opposite sides of the fourth main branch and connected to the fourth main branch.

[0028] Wherein, the orthographic projection of the first data line on the substrate overlaps with the orthographic projections of the first sub-main branch and the third sub-main branch on the substrate, and the orthographic projection of the second data line on the substrate overlaps with the orthographic projections of the second sub-main branch and the fourth sub-main branch on the substrate.

[0029] Optionally, in some embodiments of this application, the first main stem includes a first sub-main stem and a second sub-main stem that both extend along the first direction. The first sub-main stem and the second sub-main stem are respectively located on two opposite sides of the third main stem and connected to the third main stem. The central axis of the first sub-main stem extending along the first direction coincides with the central axis of the second sub-main stem extending along the first direction.

[0030] The second main branch includes a third sub-main branch and a fourth sub-main branch, both extending along the first direction. The third sub-main branch and the fourth sub-main branch are located on opposite sides of the fourth main branch and connected to the fourth main branch. The central axis of the third sub-main branch extending along the first direction coincides with the central axis of the fourth sub-main branch extending along the first direction.

[0031] Wherein, the orthographic projection of the first data line on the substrate overlaps with the orthographic projections of the first sub-main branch and the second sub-main branch on the substrate, and the orthographic projection of the second data line on the substrate overlaps with the orthographic projections of the third sub-main branch and the fourth sub-main branch on the substrate.

[0032] Optionally, in some embodiments of this application, the central axes of the first main stem and the second main stem extending along the first direction coincide;

[0033] The first main branch includes a first sub-main branch and a second sub-main branch, which are located on two opposite sides of the third main branch and connected to the third main branch.

[0034] The second main branch includes a third sub-main branch and a fourth sub-main branch, which are located on two opposite sides of the fourth main branch and connected to the fourth main branch;

[0035] The third main branch includes a fifth sub-main branch and a sixth sub-main branch located on two opposite sides of the first main branch, and the central axis of the fifth sub-main branch and the sixth sub-main branch extending along the second direction is parallel.

[0036] The fourth main stem includes a seventh sub-main stem and an eighth sub-main stem located on opposite sides of the second main stem, and the central axis of the seventh sub-main stem and the eighth sub-main stem extending along the second direction is parallel.

[0037] The fifth and seventh sub-main branches are located on the same side of the first main branch, and the sixth and eighth sub-main branches are located on the other side of the first main branch.

[0038] The first data line includes a plurality of first corner portions and a plurality of first extension portions extending along the first direction, wherein the first corner portions connect two adjacent first extension portions.

[0039] The second data line includes a plurality of second corner portions and a plurality of second extension portions extending along the first direction, wherein the second corner portions connect two adjacent second extension portions;

[0040] The orthographic projections of the plurality of first corner portions on the substrate overlap with the orthographic projections of the fifth sub-main body and the seventh sub-main body on the substrate, and the orthographic projections of the plurality of second corner portions on the substrate overlap with the orthographic projections of the sixth sub-main body and the eighth sub-main body on the substrate;

[0041] The orthographic projections of the plurality of first extensions on the substrate overlap with the orthographic projections of the first sub-main branch and the fourth sub-main branch on the substrate, and the orthographic projections of the plurality of second extensions on the substrate overlap with the orthographic projections of the second sub-main branch and the third sub-main branch on the substrate. Optionally, in some embodiments of this application, the first shared electrode includes a first shared main branch extending along the first direction and a first shared branch extending along the second direction, the orthographic projection of the first shared main branch on the substrate overlaps with the orthographic projections of the first border portion and the second border portion on the substrate, and the orthographic projection of the first shared branch on the substrate overlaps with the orthographic projections of the third main branch and the fourth main branch on the substrate;

[0042] The second shared electrode includes a second shared main stem extending along the first direction and a second shared branch extending along the second direction. The orthographic projection of the second shared main stem on the substrate overlaps with the orthographic projections of the first frame portion and the second frame portion on the substrate. The orthographic projection of the second shared branch on the substrate overlaps with the orthographic projections of the third main stem and the fourth main stem on the substrate.

[0043] Optionally, in some embodiments of this application, the width of the first shared branch is smaller than the width of the third main branch and the width of the fourth main branch, and the width of the second shared branch is smaller than the width of the third main branch and the width of the fourth main branch.

[0044] Optionally, in some embodiments of this application, the first direction is taken as the column direction and the second direction as the row direction. The first data line is electrically connected to a plurality of sub-pixels in the same column, and the second data line is electrically connected to the remaining sub-pixels in the column. The voltage polarity of the first data line is opposite to that of the second data line.

[0045] Optionally, in some embodiments of this application, the plurality of sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel of different colors, and the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged alternately along the second direction.

[0046] In this context, the two first data lines corresponding to every two sub-pixels of the same color and adjacent to each other in the same row are electrically connected to the same flip-chip film.

[0047] The two second data lines corresponding to every two adjacent sub-pixels of the same color in the same row are electrically connected to another flip-chip film.

[0048] The liquid crystal display panel provided in this application embodiment includes a substrate, a pixel driving circuit, sub-pixels, and data line groups. Each sub-pixel includes a pixel electrode, which in turn includes a main pixel electrode and a secondary pixel electrode. The main pixel electrode includes a first main electrode, and the secondary pixel electrode includes a second main electrode. The first and second main electrodes are parallel or overlap and extend along a first direction. Each data line group includes a first data line and a second data line that are parallel to each other and extend along the first direction. The first and second data lines are electrically connected to different pixel driving circuits. The orthographic projection of the first data line onto the substrate of the liquid crystal display panel at least overlaps with the orthographic projection of the first main electrode onto the substrate, and the orthographic projection of the second data line onto the substrate at least overlaps with the orthographic projection of the second main electrode onto the substrate. On the one hand, the space occupied by the main electrodes can be fully utilized, and the aperture ratio of the sub-pixels can be increased. On the other hand, a DBS electrode does not need to be disposed above the first and second data lines, reducing the manufacturing process. Attached Figure Description

[0049] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0050] Figure 1 A schematic diagram of the structure of a sub-pixel area of ​​a liquid crystal display panel provided in an embodiment of this application;

[0051] Figure 2 A schematic diagram of the pixel driving circuit provided in an embodiment of this application;

[0052] Figure 3 This is a schematic diagram of a first distribution of the data cable group and the shared electrode group provided in an embodiment of this application;

[0053] Figure 4 This is a schematic diagram of a first structure of a pixel electrode provided in an embodiment of this application;

[0054] Figure 5 This is a schematic diagram of a second structure of a pixel electrode provided in an embodiment of this application;

[0055] Figure 6 for Figure 5 A schematic diagram showing the distribution of pixel electrodes, data line groups, and shared electrode groups in the image;

[0056] Figure 7 A second schematic diagram of the data cable group and shared electrode group provided in the embodiments of this application.

[0057] Figure 8A schematic diagram of the sub-pixel distribution provided in an embodiment of this application;

[0058] Figure 9 This is a schematic diagram of the structure of the pixel electrode data line group and the shared electrode group provided in the embodiments of this application. Detailed Implementation

[0059] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In addition, it should be understood that the specific embodiments described herein are only for illustration and explanation of this application and are not intended to limit this application. In this application, unless otherwise stated, directional terms such as "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, specifically the drawing directions in the accompanying drawings; while "inner" and "outer" refer to the outline of the device.

[0060] In traditional liquid crystal display (LCD) panels, the data lines and first common electrode of the array substrate are typically positioned within the gap between adjacent pixel electrodes. A black matrix (BM) is required on one side of the color filter substrate for light blocking. When the array substrate and color filter substrate are misaligned, the position of the BM shifts, leading to light leakage and color shift. To address this issue, related technologies employ a design that reduces the number of black matrices on the data lines (Data BM less, DBS). This involves placing a DBS electrode on the same layer as the pixel electrode above the data lines of the array substrate, maintaining a voltage difference between the DBS electrode and the second common electrode of the color filter substrate. This prevents the liquid crystal between the DBS electrode and the color filter substrate from rotating, resulting in a black state and effectively replacing the black matrix for light blocking. To prevent short circuits between the DBS electrode and the pixel electrode, the DBS electrodes are typically spaced a certain distance apart. However, this design involving data lines, the first common electrode, and the DBS electrode reduces the pixel aperture ratio, increasing the difficulty of improving the transmittance of the LCD panel.

[0061] For the above-mentioned defects, please refer to Figure 1 and Figure 8 , Figure 1 This is a schematic diagram of the structure of a sub-pixel area of ​​a liquid crystal display panel provided in an embodiment of this application. Figure 8This is a schematic diagram of the sub-pixel distribution provided in an embodiment of this application. This application provides a liquid crystal display panel 100, which includes a substrate 10, a plurality of pixel driving circuits 30, a plurality of sub-pixels 20, and a plurality of data line groups 40 disposed on the substrate 10. The plurality of pixel driving circuits 30 are electrically connected to the plurality of sub-pixels 20 in a one-to-one correspondence, and the pixel driving circuits 30 are used to drive the sub-pixels 20 to emit light.

[0062] Each sub-pixel 20 includes a pixel electrode 50, which includes a main pixel electrode 51 and a secondary pixel electrode 52. The main pixel electrode 50 includes a first main stem 511, and the secondary pixel electrode 52 includes a second main stem 521. The first main stem 511 and the second main stem 521 are parallel to each other and extend along a first direction X. Each data line group 40 includes a first data line 41 and a second data line 42 that are parallel to each other and extend along the first direction X. The first data line 41 and the second data line 42 are electrically connected to different pixel driving circuits 30. The orthographic projection of the first data line 41 on the substrate 10 of the liquid crystal display panel 100 overlaps at least with the orthographic projection of the first main stem 511 on the substrate 10, and the orthographic projection of the second data line 42 on the substrate 10 overlaps at least with the orthographic projection of the second main stem 521 on the substrate 10.

[0063] Since the main stem of the pixel electrode 50 is basically opaque, the embodiments of this application move the first data line 41 and the second data line 42 inside the pixel electrode 50, and make the first data line 41 overlap with the first main stem 511 of the main pixel electrode 51, and the second data line 42 overlap with the second main stem 521 of the sub-pixel electrode 52. On the one hand, the space where the main stem is located can be fully utilized and the aperture ratio of the sub-pixel 20 can be increased. On the other hand, the DBS electrode does not need to be set above the first data line 41 and the second data line 42, reducing the process steps.

[0064] The pixel driving circuit 30 can be a 3T (3 transistors) architecture, and the gate, source and drain of the pixel driving circuit 30 can be formed using different metal layers of the liquid crystal display panel 100.

[0065] Specifically, in the embodiments of this application, the liquid crystal display panel 100 includes a first metal layer disposed on a substrate 10 and a second metal layer (not shown in the figure) disposed on the first metal layer. The pixel electrode 50 is disposed on the second metal layer. It is understood that an insulating layer is disposed between adjacent metal layers or conductive layers for insulation.

[0066] The first metal layer can be used to form multiple scan lines 70 and the gates of various thin-film transistors. The second metal layer can be used to form multiple data lines (such as the first data line 41 and the second data line 42), the source and drain of various thin-film transistors, etc. The second metal layer can also be used to form a first common electrode, which forms a storage capacitor with the pixel electrode 50.

[0067] Furthermore, such as Figure 1 As shown, the liquid crystal display panel 100 also includes a plurality of shared electrode groups 60 disposed on the same layer as the data line group 40. Each shared electrode group 60 includes a first shared electrode 61 and a second shared electrode 62 that are parallel to each other and extend along the first direction X. The first shared electrode 61 and the first data line 41 are electrically connected to the same pixel driving circuit 30, and the second shared electrode 62 and the second data line 42 are electrically connected to the same pixel driving circuit 30.

[0068] The first shared electrode 61 and the second shared electrode 62 are located on opposite sides of the first main stem 511 and the second main stem 521 of the corresponding pixel electrode 50, respectively. The orthographic projections of the first shared electrode 61 and the second shared electrode 62 on the substrate 10 at least overlap with the orthographic projection of the edge portion 503 of the pixel electrode 50 on the substrate 10.

[0069] In this embodiment, by placing the first shared electrode 61 and the second shared electrode 62 at the edge of the pixel electrode 50 and making the first shared electrode 61 and the second shared electrode 62 overlap with the pixel electrode 50, the storage capacitance can be increased.

[0070] In some embodiments, the shared electrode group 60 can be reused as a first common electrode, which can remove the original first common electrode located in the first metal layer and simplify the process.

[0071] like Figure 2 As shown, the pixel driving circuit 30 includes a first transistor T1, a second transistor T2, and a third transistor T3. The gates of the first transistor T1, the second transistor T2, and the third transistor T3 are electrically connected to the corresponding scan lines 70. The sources of the first transistor T1 and the second transistor T2 are electrically connected to the corresponding data lines DL (such as the first data line 41 or the second data line 42). The drain of the first transistor T1 is electrically connected to the main pixel electrode 51. The drain of the second transistor T2 is electrically connected to the secondary pixel electrode 52. The drain of the third transistor T3 is electrically connected to the drain of the second transistor T2. The source of the third transistor T3 is electrically connected to the corresponding shared electrode SHL (such as the first shared electrode 61 or the second shared electrode 62).

[0072] The main pixel electrode 51 and the shared electrode group 60 form a first storage capacitor Cst1, and the main pixel electrode 51 and the second common electrode CFcom of the color filter substrate form a first liquid crystal capacitor Clc1. The sub-pixel electrode 52 and the shared electrode SHL form a second storage capacitor Cst2, and the sub-pixel electrode 52 and the second common electrode CFcom of the color filter substrate form a second liquid crystal capacitor Clc2.

[0073] The voltage signal input to the shared electrode SHL depends on the voltage division requirement of the third transistor T3. However, it should be noted that the voltage signal input to the shared electrode is a constant voltage to maintain a stable voltage signal. In this way, the shared electrode can both perform the function of voltage division and be reused as the first common electrode to form a storage capacitor with the pixel electrode 50.

[0074] Please see Figure 3 and Figure 4 In some embodiments, the width of the first data line 41 is smaller than the width of the first main stem 511, and the width of the second data line 42 is smaller than the width of the second main stem 521. This allows the first main stem 511 to cover the portion of the first data line 41 that passes through the pixel electrode 50, and the second main stem 521 to cover the portion of the second data line 42 that passes through the pixel electrode 50, thus achieving a good effect of shielding the first data line 41 and the second data line 42.

[0075] Please see Figure 4 In some embodiments, the main pixel electrode 51 further includes a third main stem 512, a plurality of first branch electrodes 513, and a first border portion 514. The third main stem 512 extends along a second direction Y intersecting the first direction X. The first main stem 511 and the third main stem 512 divide the main pixel electrode 51 into a plurality of domains, and the plurality of first branch electrodes 513 are located in different domains and extend from the first main stem 511 and the third main stem 512 in different directions. The first border portion 514 is sequentially connected to the tail ends of the plurality of first branch electrodes 513.

[0076] The sub-pixel electrode 52 includes a fourth main stem 522, a plurality of second branch electrodes 523, and a second border portion 524. The fourth main stem 522 extends along the second direction Y, and the second main stem 521 and the fourth main stem 522 divide the sub-pixel electrode 52 into a plurality of domains. The plurality of second branch electrodes 523 are located in different domains and extend from the second main stem 521 and the fourth main stem 522 in different directions. The second border portion 524 is sequentially connected to the tail ends of the plurality of second branch electrodes 523.

[0077] In some embodiments, the orthographic projection of the first shared electrode 61 on the substrate 10 partially overlaps with the orthographic projections of the first border portion 514 and the second border portion 524 on the substrate 10. Similarly, the orthographic projection of the second shared electrode 62 on the substrate 10 partially overlaps with the orthographic projections of the first border portion 514 and the second border portion 524 on the substrate 10. This allows for overlap between the first shared electrode 61 and the second shared electrode 62 and the pixel electrode 50, which increases both the storage capacitance and the aperture ratio of the sub-pixel 20.

[0078] In some embodiments, the first data line 41, the second data line 42, the first shared electrode 61, and the second shared electrode 62 are all arranged in the space where the pixel electrode 50 is located, and the DBS electrode and the first common electrode are removed, so that data lines, common electrodes, and DBS electrodes are no longer needed in the gap between adjacent pixel electrodes 50, which allows the pixel electrode 50 to expand outward and maximizes the aperture ratio of the sub-pixel 20.

[0079] like Figure 3 and Figure 4 As shown, the width of the first shared electrode 61 is smaller than the width of the first border portion 514 and the width of the second border portion 524, and the width of the second shared electrode 62 is smaller than the width of the first border portion 514 and the width of the second border portion 524. This allows the first border to cover the portion of the first shared electrode 61 that passes through the pixel electrode 50, and the second border to cover the portion of the second shared electrode 62 that passes through the pixel electrode 50.

[0080] Please see Figure 4 The first main stem 511 includes a first sub-main stem 5111 and a second sub-main stem 5112 that are parallel to each other and extend along a first direction X. The first sub-main stem 5111 and the second sub-main stem 5112 are located on two opposite sides of the third main stem 512 and are connected to the third main stem 512.

[0081] The second main stem 521 includes a third sub-main stem 5211 and a fourth sub-main stem 5212 that are parallel to each other and extend along the first direction X. The third sub-main stem 5211 and the fourth sub-main stem 5212 are located on two opposite sides of the fourth main stem 522 and are connected to the fourth main stem 522.

[0082] In embodiments of this application, the overlap area between the first data line 41 and the pixel electrode 50 is equal to the overlap area between the second data line 42 and the pixel electrode 50. This design ensures that the capacitance formed between the first data line 41 and the pixel electrode 50 is close to or the same as the capacitance formed between the second data line 42 and the pixel electrode 50, thus avoiding crosstalk.

[0083] In some embodiments, the central axis extending along the first direction X of the first sub-main branch 5111 is parallel to the central axis extending along the first direction X of the second sub-main branch 5112. The central axis extending along the first direction X of the third sub-main branch 5211 is parallel to the central axis extending along the first direction X of the fourth sub-main branch 5212. The central axis extending along the first direction X of the first sub-main branch 5111 coincides with the central axis extending along the first direction X of the third sub-main branch 5211. The central axis extending along the first direction X of the second sub-main branch 5112 coincides with the central axis extending along the first direction X of the fourth sub-main branch 5212.

[0084] exist Figure 4 In the illustrated embodiment, the orthographic projection of the first data line 41 on the substrate 10 overlaps with the orthographic projections of the first sub-main trunk 5111 and the third sub-main trunk 5211 on the substrate 10. The orthographic projection of the second data line 42 on the substrate 10 overlaps with the orthographic projections of the second sub-main trunk 5112 and the fourth sub-main trunk 5212 on the substrate 10.

[0085] In this embodiment, the area of ​​the main pixel electrode 51 may be different from the area of ​​the secondary pixel electrode 52.

[0086] In this embodiment, the length of the first sub-trunk extending along the first direction X and the length of the second sub-trunk extending along the first direction X are equal, so that the overlap area between the first data line 41 and the first sub-trunk is the same as the overlap area between the second data line 42 and the second sub-trunk.

[0087] Unless otherwise specified, the width of the main trunk, branches and other structures involved in the embodiments of this application should be considered uniform in all places. Although there may be slight width errors in the manufacturing process, such width errors are negligible in terms of the overall width.

[0088] The main pixel electrode 51 includes a first domain A1, a second domain A2, a third domain A3, and a fourth domain A4 distributed clockwise. The branch electrodes within the first domain A1 and the third domain A3 are centrally symmetrically distributed, as are the branch electrodes within the second domain A2 and the fourth domain A4. This design ensures that when the first data line 41 and the second data line 42 pass through the main pixel electrode 51, the overlap area between the first data line 41 and the main pixel electrode 51 is equal to the overlap area between the second data line 42 and the sub-pixel electrode 52.

[0089] Similarly, the sub-pixel electrode 52 is designed the same as the main pixel electrode 51. That is, the length of the third sub-trunk extending along the first direction X is equal to the length of the fourth sub-trunk extending along the first direction X. The sub-pixel electrode 52 includes a fifth domain A5, a sixth domain A6, a seventh domain A7, and an eighth domain A8 distributed clockwise, wherein the branch electrodes in the fifth domain A5 and the seventh domain A7 are centrally symmetrically distributed, and the branch electrodes in the sixth domain A6 and the eighth domain A8 are centrally symmetrically distributed. This makes the overlap area between the first data line 41 and the main pixel electrode 51 equal to the overlap area between the second data line 42 and the sub-pixel electrode 52.

[0090] like Figure 5 As shown, in some embodiments, the central axis extending along the first direction X of the first sub-main branch 5111 coincides with the central axis extending along the first direction X of the second sub-main branch 5112. The central axis extending along the first direction X of the third sub-main branch 5211 coincides with the central axis extending along the first direction X of the fourth sub-main branch 5212. The central axis extending along the first direction X of the first sub-main branch 5111 and the central axis extending along the first direction X of the third sub-main branch 5211 are parallel to each other.

[0091] exist Figure 5 In the illustrated embodiment, the orthographic projection of the first data line 41 on the substrate 10 overlaps with the orthographic projections of the first sub-main trunk 5111 and the second sub-main trunk 5112 on the substrate 10. The orthographic projection of the second data line 42 on the substrate 10 overlaps with the orthographic projections of the third sub-main trunk 5211 and the fourth sub-main trunk 5212 on the substrate 10.

[0092] In this embodiment, the length of the first main stem 511 extending along the first direction X is the same as the length of the second main stem 512 extending along the second direction Y, so that the overlap area between the first data line 41 and the first main stem 511 is equal to the overlap area between the second data line 42 and the second main stem 512.

[0093] Since the first data line 41 also passes through the fifth domain A5 and the eighth domain A8, and the second data line 42 also passes through the second domain A2 and the third domain A3, the pattern formed by the plurality of second branch electrodes 523 in the fifth domain A5 and the eighth domain A8 can be a mirror image of the pattern formed by the plurality of first branch electrodes 513 in the second domain A2 and the third domain A3, so that the overlap area between the branch electrodes of the first data line 41 and the main pixel electrode 51 is equal to the overlap area between the branch electrodes of the second data line 42 and the sub-pixel electrode 52.

[0094] In some embodiments, please refer to Figure 9 The central axes of the first main stem 511 and the second main stem 521 extending along the first direction X coincide. That is, the central axes of the first sub-main stem 5111, the second sub-main stem 5112, the third sub-main stem 5211, and the fourth sub-main stem 5212 all coincide.

[0095] like Figure 9 As shown, in some embodiments, the third main stem 512 includes a fifth sub-main stem 5121 and a sixth sub-main stem 5122 located on two opposite sides of the first main stem 511. The central axis of the fifth sub-main stem 5121 and the sixth sub-main stem 5122 extending along the second direction Y is parallel, that is, the fifth sub-main stem 5121 and the sixth sub-main stem 5122 are staggered and parallel.

[0096] The fourth main stem 522 includes a seventh sub-main stem 5221 and an eighth sub-main stem 5222 located on opposite sides of the second main stem 521. The seventh sub-main stem 5221 and the eighth sub-main stem 5222 are parallel to each other along the central axis extending in the second direction Y, that is, the seventh sub-main stem 5221 and the eighth sub-main stem 5222 are staggered and parallel.

[0097] The fifth sub-main branch 5121 and the seventh sub-main branch 5221 are located on the same side of the first main branch 511, and the sixth sub-main branch 5122 and the eighth sub-main branch 5222 are located on the other side of the first main branch 511.

[0098] The first data line 41 includes a plurality of first corner portions 411 and a plurality of first extension portions 412 extending along the first direction X. The first corner portions 411 connect two adjacent first extension portions 412. In some embodiments, the first corner portions 411 may extend along the second direction Y. It is understood that the extension length of the first corner portions 411 in the second direction Y is much smaller than the extension length of the first extension portions 412 in the first direction X. Therefore, the presence of the first corner portions 411 has a negligible impact on the overall extension direction and extension length of the first data line 41, that is, the first data line 41 still extends along the first direction X.

[0099] The second data line 42 includes a plurality of second corner portions 421 and a plurality of second extension portions 422 extending along the first direction X. The second corner portions 421 connect two adjacent second extension portions 422. In some embodiments, the second corner portions 421 may extend along the second direction Y. It is understood that the extension length of the second corner portions 421 in the second direction Y is much smaller than the extension length of the second extension portions 422 in the first direction X. Therefore, the presence of the second corner portions 421 has a negligible impact on the overall extension direction and extension length of the second data line 42, that is, the second data line 42 as a whole still extends along the first direction X.

[0100] like Figure 9 As shown, the orthographic projections of the plurality of first corner portions 411 on the substrate overlap with the orthographic projections of the fifth sub-main stem 5121 and the seventh sub-main stem 5221 on the substrate, and the orthographic projections of the plurality of second corner portions 421 on the substrate overlap with the orthographic projections of the sixth sub-main stem 5122 and the eighth sub-main stem 5222 on the substrate. Therefore, the first corner portions 411 and the second corner portions 422 can both be blocked by the lateral main stems (third main stem 512 and fourth main stem 522) of the pixel electrode 50, and will not occupy the opening area, thereby increasing the aperture ratio of the sub-pixel 20.

[0101] Please continue reading. Figure 9 The orthographic projections of the plurality of first extensions 412 on the substrate overlap with the orthographic projections of the first sub-main stem 5111 and the fourth sub-main stem 5212 on the substrate, and the orthographic projections of the plurality of second extensions 422 on the substrate overlap with the orthographic projections of the second sub-main stem 5112 and the third sub-main stem 5211 on the substrate. Therefore, the portions of the plurality of first extensions 412 and the plurality of second extensions 422 that pass through the region where the pixel electrode is located can be blocked by the first main stem 511 and the second main stem 521, which can increase the aperture ratio of the sub-pixel 20.

[0102] Please see Figure 7 In some embodiments of this application, the first shared electrode 61 includes a first shared main stem 611 extending along the first direction X and a first shared branch 612 extending along the second direction Y. The orthographic projection of the first shared main stem 611 on the substrate 10 overlaps with the orthographic projections of the first border portion 514 and the second border portion 524 on the substrate 10. The orthographic projection of the first shared branch 612 on the substrate 10 overlaps with the orthographic projections of the third main stem 512 and the fourth main stem 522 on the substrate 10.

[0103] The second shared electrode 62 includes a second shared main stem 621 extending along the first direction X and a second shared branch 621 extending along the second direction Y. The orthographic projection of the second shared main stem 621 on the substrate 10 overlaps with the orthographic projections of the first frame portion 514 and the second frame portion 524 on the substrate 10. The orthographic projection of the second shared branch 621 on the substrate 10 overlaps with the orthographic projections of the third main stem 512 and the fourth main stem 522 on the substrate 10.

[0104] The design of the first and second shared branches described above can further increase the overlap area between the shared electrode group 60 and the pixel electrode 50, thereby further increasing the storage capacitance.

[0105] In some implementations, the width of the first shared branch 612 is smaller than the width of the third main branch 512 and the width of the fourth main branch 522, and the width of the second shared branch 621 is smaller than the width of the third main branch 512 and the width of the fourth main branch 522, so that the third main branch 512 of the pixel electrode 50 can cover the first shared branch 612 and the fourth main branch 522 can cover the second shared branch 621, thus avoiding any impact on the display.

[0106] With the first direction X as the column direction and the second direction Y as the row direction, sub-pixels 20 in the same column can be driven by two data lines, namely, by a first data line 41 and a second data line 42. Specifically, the first data line 41 electrically connects to several sub-pixels 20 in the same column, and the second data line 42 electrically connects to the remaining sub-pixels 20 in that column. The voltage polarity of the first data line 41 is opposite to that of the second data line 42, used to balance the voltage coupling caused by positive and negative frame driving.

[0107] In this embodiment, the plurality of sub-pixels 20 include a first sub-pixel 21, a second sub-pixel 22, and a third sub-pixel 23, each with a different color. The first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 are arranged alternately along the second direction Y. Sub-pixels 20 in the same column have the same color.

[0108] In this configuration, the two first data lines 41 corresponding to every two adjacent sub-pixels 20 of the same color in the same row are electrically connected to the same chip-on-film (COF) film (not shown in the figure). For example, the first data line 41 electrically connected to the first sub-pixel 20 (first sub-pixel 21) arranged from left to right in the first row and the first data line 41 electrically connected to the third sub-pixel 20 (first sub-pixel 21) arranged from left to right in the first row are connected to the same COF film.

[0109] In the same row, the two second data lines 42 corresponding to every two adjacent sub-pixels 20 of the same color are electrically connected to another flip-chip film. For example, the first data line 41 electrically connected to the first sub-pixel 20 (first sub-pixel 21) arranged from left to right in the third row and the first data line 41 electrically connected to the third sub-pixel 20 (first sub-pixel 21) arranged from left to right in the third row are connected to the same flip-chip film. This solves the problem of the increased number of flip-chip films caused by introducing two data lines for each sub-pixel 20.

[0110] The driving timing of sub-pixels 20 in every two rows is the same, that is, the potential timing of the two scan lines 70 connected to sub-pixels 20 in every two rows is the same, and they are either at a high potential or at a low potential at the same time, so that sub-pixels 20 in every two rows can be driven at the same time, thereby reducing driving costs.

[0111] Correspondingly, a data line connects the sub-pixels 20 of every two adjacent rows. For example, the first data line 41 connects the sub-pixels 20 corresponding to the first and second rows, the second data line 42 connects the sub-pixels 20 corresponding to the third and fourth rows, the first data line 41 connects the sub-pixels 20 corresponding to the fifth and sixth rows (not shown in the figure), and so on.

[0112] like Figure 8 As shown, in this embodiment, the polarities of sub-pixels 20 in adjacent columns are opposite. In other embodiments, the polarities of sub-pixels 20 in adjacent columns may be the same. No limitation is imposed here.

[0113] In summary, this application provides a liquid crystal display panel 100, including a substrate 10, a pixel driving circuit 30, sub-pixels 20, and a data line group 40. Each sub-pixel 20 includes a pixel electrode 50, which includes a main pixel electrode 51 and a secondary pixel electrode 52. The secondary pixel electrode 52 includes a second main electrode 521. The first main electrode 511 and the second main electrode 521 are parallel to each other and extend along a first direction X. Each data line group 40 includes a first data line 41 and a second data line 42 that are parallel to each other and extend along the first direction X. The first data line 41 and the second data line 42 are electrically connected to different pixel driving circuits 30. The orthographic projection of the first data line 41 on the substrate 10 of the liquid crystal display panel 100 overlaps at least partially with the orthographic projection of the first main electrode 511 on the substrate 10, and the orthographic projection of the second data line 42 on the substrate 10 overlaps at least partially with the orthographic projection of the second main electrode 521 on the substrate 10. On the one hand, the space where the main body is located can be fully utilized, and the aperture ratio of the sub-pixel 20 can be increased. On the other hand, DBS electrodes do not need to be set above the first data line 41 and the second data line 42, reducing the process steps.

[0114] The above provides a detailed description of a liquid crystal display panel provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A liquid crystal display panel, characterized in that, include: The array comprises multiple sub-pixels, each sub-pixel including a pixel electrode, the pixel electrode including a main pixel electrode and a secondary pixel electrode, the main pixel electrode including a first main stem, the secondary pixel electrode including a second main stem, the first main stem and the second main stem extending along a first direction, and the central axes of the first main stem and the second main stem extending along the first direction being parallel or coincident to each other. Multiple pixel driving circuits distributed in an array are electrically connected to each of the multiple sub-pixels in a one-to-one correspondence. as well as Multiple data line groups, each of the data line groups includes a first data line and a second data line that are parallel to each other and extend along the first direction, and the first data line and the second data line are respectively electrically connected to different pixel driving circuits. Multiple shared electrode groups are arranged in the same layer as the data line group. Each shared electrode group includes a first shared electrode and a second shared electrode that are parallel to each other and extend along the first direction. The first shared electrode and the first data line are electrically connected to the same pixel driving circuit. The second shared electrode and the second data line are electrically connected to the same pixel driving circuit. Wherein, the orthographic projection of the first data line on the substrate of the liquid crystal display panel overlaps at least with the orthographic projection of the first main body on the substrate, the orthographic projection of the second data line on the substrate overlaps at least with the orthographic projection of the second main body on the substrate, and the orthographic projections of the first shared electrode and the second shared electrode on the substrate overlap at least with the orthographic projection of the edge portion of the pixel electrode on the substrate.

2. The liquid crystal display panel according to claim 1, characterized in that, The width of the first data line is smaller than the width of the first main stem, and the width of the second data line is smaller than the width of the second main stem.

3. The liquid crystal display panel according to claim 1, characterized in that, The first shared electrode and the second shared electrode are respectively located on opposite sides of the first main stem and the second main stem of the corresponding pixel electrode.

4. The liquid crystal display panel according to claim 3, characterized in that, The shared electrode group is reused as a first common electrode, and a storage capacitor is formed between the shared electrode group and the pixel electrode.

5. The liquid crystal display panel according to claim 3, characterized in that, The main pixel electrode also includes: The third main stem extends along a second direction intersecting the first direction, and the first and third main stems divide the main pixel electrode into multiple domains. Multiple first branch electrodes, located within different domains, and extending in different directions from the first main stem and the third main stem; and The first frame portion is sequentially connected to the tail ends of the plurality of first branch electrodes; The sub-pixel electrode includes: The fourth main stem extends along the second direction, and the second main stem and the fourth main stem divide the sub-pixel electrode into multiple domains. Multiple second branch electrodes, located within different domains, and extending in different directions from the second main stem and the fourth main stem; and The second frame portion is sequentially connected to the tail ends of the plurality of second branch electrodes; Wherein, the orthographic projection of the first shared electrode on the substrate partially overlaps with the orthographic projections of the first frame portion and the second frame portion on the substrate; The orthographic projection of the second shared electrode on the substrate partially overlaps with the orthographic projections of the first and second frame portions on the substrate.

6. The liquid crystal display panel according to claim 5, characterized in that, The width of the first shared electrode is smaller than the width of the first border portion and the width of the second border portion, and the width of the second shared electrode is smaller than the width of the first border portion and the width of the second border portion.

7. The liquid crystal display panel according to claim 5, characterized in that, The overlap area between the first data line and the pixel electrode is equal to the overlap area between the second data line and the pixel electrode.

8. The liquid crystal display panel according to claim 7, characterized in that, The first main stem includes a first sub-main stem and a second sub-main stem that are parallel to each other and extend along the first direction. The first sub-main stem and the second sub-main stem are located on two opposite sides of the third main stem and are connected to the third main stem. The second main branch includes a third sub-main branch and a fourth sub-main branch that are parallel to each other and extend along a first direction. The third sub-main branch and the fourth sub-main branch are respectively located on two opposite sides of the fourth main branch and connected to the fourth main branch. Wherein, the orthographic projection of the first data line on the substrate overlaps with the orthographic projections of the first sub-main branch and the third sub-main branch on the substrate, and the orthographic projection of the second data line on the substrate overlaps with the orthographic projections of the second sub-main branch and the fourth sub-main branch on the substrate.

9. The liquid crystal display panel according to claim 7, characterized in that, The first main stem includes a first sub-main stem and a second sub-main stem, both extending along the first direction. The first sub-main stem and the second sub-main stem are located on opposite sides of the third main stem and connected to the third main stem. The central axis of the first sub-main stem extending along the first direction coincides with the central axis of the second sub-main stem extending along the first direction. The second main branch includes a third sub-main branch and a fourth sub-main branch, both extending along the first direction. The third sub-main branch and the fourth sub-main branch are located on opposite sides of the fourth main branch and connected to the fourth main branch. The central axis of the third sub-main branch extending along the first direction coincides with the central axis of the fourth sub-main branch extending along the first direction. Wherein, the orthographic projection of the first data line on the substrate overlaps with the orthographic projections of the first sub-main branch and the second sub-main branch on the substrate, and the orthographic projection of the second data line on the substrate overlaps with the orthographic projections of the third sub-main branch and the fourth sub-main branch on the substrate.

10. The liquid crystal display panel according to claim 7, characterized in that, The central axes of the first main stem and the second main stem, extending along the first direction, coincide; The first main branch includes a first sub-main branch and a second sub-main branch, which are located on two opposite sides of the third main branch and connected to the third main branch. The second main branch includes a third sub-main branch and a fourth sub-main branch, which are located on two opposite sides of the fourth main branch and connected to the fourth main branch; The third main branch includes a fifth sub-main branch and a sixth sub-main branch located on two opposite sides of the first main branch, and the central axis of the fifth sub-main branch and the sixth sub-main branch extending along the second direction is parallel. The fourth main stem includes a seventh sub-main stem and an eighth sub-main stem located on opposite sides of the second main stem, and the central axis of the seventh sub-main stem and the eighth sub-main stem extending along the second direction is parallel. The fifth and seventh sub-main branches are located on the same side of the first main branch, and the sixth and eighth sub-main branches are located on the other side of the first main branch. The first data line includes a plurality of first corner portions and a plurality of first extension portions extending along the first direction, wherein the first corner portions connect two adjacent first extension portions. The second data line includes a plurality of second corner portions and a plurality of second extension portions extending along the first direction, wherein the second corner portions connect two adjacent second extension portions; The orthographic projections of the plurality of first corner portions on the substrate overlap with the orthographic projections of the fifth sub-main body and the seventh sub-main body on the substrate, and the orthographic projections of the plurality of second corner portions on the substrate overlap with the orthographic projections of the sixth sub-main body and the eighth sub-main body on the substrate; The orthographic projections of the plurality of first extensions on the substrate overlap with the orthographic projections of the first sub-main body and the fourth sub-main body on the substrate, and the orthographic projections of the plurality of second extensions on the substrate overlap with the orthographic projections of the second sub-main body and the third sub-main body on the substrate.

11. The liquid crystal display panel according to claim 5, characterized in that, The first shared electrode includes a first shared main stem extending along the first direction and a first shared branch extending along the second direction. The orthographic projection of the first shared main stem on the substrate overlaps with the orthographic projections of the first frame portion and the second frame portion on the substrate. The orthographic projection of the first shared branch on the substrate overlaps with the orthographic projections of the third main stem and the fourth main stem on the substrate. The second shared electrode includes a second shared main stem extending along the first direction and a second shared branch extending along the second direction. The orthographic projection of the second shared main stem on the substrate overlaps with the orthographic projections of the first frame portion and the second frame portion on the substrate. The orthographic projection of the second shared branch on the substrate overlaps with the orthographic projections of the third main stem and the fourth main stem on the substrate.

12. The liquid crystal display panel according to claim 11, characterized in that, The width of the first shared branch is smaller than the width of the third main branch and the width of the fourth main branch, and the width of the second shared branch is smaller than the width of the third main branch and the width of the fourth main branch.

13. The liquid crystal display panel according to claim 5, characterized in that, With the first direction as the column direction and the second direction as the row direction, the first data line is electrically connected to several sub-pixels in the same column, and the second data line is electrically connected to the remaining sub-pixels in the column. The voltage polarity of the first data line is opposite to that of the second data line.

14. The liquid crystal display panel according to claim 13, characterized in that, The plurality of sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel of different colors, wherein the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged alternately along the second direction; In this context, the two first data lines corresponding to every two sub-pixels of the same color and adjacent to each other in the same row are electrically connected to the same flip-chip film. The two second data lines corresponding to every two adjacent sub-pixels of the same color in the same row are electrically connected to another flip-chip film.

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