Application acceleration method, device and related equipment
By deploying operators to different hardware chips and converting variable accuracy in high-precision floating-point data, the computational efficiency problem caused by high-precision floating-point data is solved, and the storage space and computing efficiency are improved.
Patent Information
- Application Number
- CN202210932620.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-04
- Publication Date
- 2025-08-15
- Estimated Expiration
- 2042-08-04
AI Technical Summary
The use of high-precision floating-point data in current high-performance computing applications leads to inefficient computing efficiency. How to accelerate the application.
By deploying different operators in the application to different hardware chips, and converting high-precision variables into low-precision variables according to the optimization degree and variable types of the hardware chips, deploying them in units of operators, and accelerating with the advantages of different hardware chips.
It reduces the storage space usage and the amount of data during the calculation process, improves the computing efficiency, especially when training artificial intelligence models in distributed manner, reduces the traffic volume and improves the overall performance of computing devices.
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Figure CN117555544B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to an application acceleration method, device, and related equipment. Background Art
[0002] Currently, data used in high-performance computing (HPC) applications and engineering simulations is typically in high-precision floating-point (FP) formats, such as FP128 and FP64. However, using high-precision floating-point data for all variables is an over-engineered implementation. This approach generates large amounts of data and computation during calculations, which in turn affects computational efficiency. Therefore, accelerating these applications is a technical challenge that needs to be addressed. Summary of the Invention
[0003] The present application provides an application acceleration method, apparatus, and related equipment, which can deploy different operators in an application to different hardware chips to accelerate the application.
[0004] In a first aspect, the present application provides an application acceleration method, comprising: a computing device obtains a first code corresponding to an application, the first code including one or more different types of variables; and deploys each operator in the first code to different hardware chips according to the types of each operator in the first code and the variables included in the operator.
[0005] It should be understood that the first code may be the source code of an application, or may be obtained by converting higher-precision variables in the source code of the application into lower-precision variables. Specifically, when the first code includes different types of variables, the different types of variables have different precisions. For example, if the first code includes FP64 and FP32 type variables, the data corresponding to the FP64 type variable has higher precision than the data corresponding to the FP32 type variable.
[0006] The computing device stores operators and variable types suitable for calculations on different hardware chips. When deploying applications, it can deploy applications to different hardware chips in units of operators based on the operators or variable types suitable for calculations on different hardware chips, thereby accelerating the application.
[0007] In one possible implementation, the first code is obtained by converting a second code, where the second code includes high-precision variables of the first type. The computing device obtains the second code corresponding to the application and converts some or all of the first-type variables in the second code to the second type, thereby obtaining the first code. The precision of the data corresponding to the first-type variables is greater than the precision of the data corresponding to the second-type variables; for example, the first-type variables are of FP64 type, and the second-type variables are of FP32 type. The second code can be the source code of the application, or it can be obtained by converting high-precision variables in the source code of the application to low-precision variables.
[0008] It should be understood that the terms "high precision" and "low precision" in this application are relative terms and do not refer to a specific data type or types of variables. For example, FP128 data is high-precision data relative to FP64 data, while FP64 data is low-precision data relative to FP128 data. FP64 data is high-precision data relative to FP32 data, while FP32 data is low-precision data relative to FP64 data.
[0009] Converting high-precision variables in an application's source code to low-precision variables can reduce the storage space occupied by the application during execution, while also reducing the amount of data generated during execution and improving execution efficiency. For example, when training an AI model using a distributed approach, reducing the precision of variables can reduce the amount of data generated during training, thereby reducing the amount of communication between different computing devices during distributed training and improving computational efficiency.
[0010] In one possible implementation, the above-mentioned conversion of some or all of the variables of the first type in the second code into the second type includes: the computing device divides the variables of the first type in the second code into n sets, each set including multiple variables, where n is a positive integer; traversing the above-mentioned n sets, determining that the variables in the i-th set of the n sets can be converted from the first type to the second type, and converting the variables belonging to the i-th set in the second code from the first type to the second type.
[0011] It should be understood that the computing device can determine whether all variables in a set can be converted from the first type to the second type at a time; the i-th set mentioned above is any one of the n sets, that is, the computing device will separately determine whether the variables in each of the n sets can be converted to the second type. When n is 1, all variables of the first type in the second code are first converted to the second type, and then determine whether all variables of the first type in the second code can be converted to the second type.
[0012] Compared with traversing each variable in the code in turn to determine whether each variable can be converted from higher precision to lower precision, by dividing the variables of the first type into one or more sets, and determining each time whether all variables in a set can be converted from high precision to low precision, the variables in the code that can be converted to lower precision can be determined in a shorter time, and then the variables that can be converted to lower precision can be converted to lower precision, thereby reducing the complexity of code conversion and improving conversion efficiency.
[0013] In one possible implementation, determining that variables in the i-th set of n sets can be converted from the first type to the second type includes: executing a second code on a computing device and determining a baseline execution result after executing the second code; converting the variables in the i-th set to the second type, while maintaining the variables in the other n-1 sets as the first type, obtaining a first intermediate code corresponding to the i-th set, and executing the first intermediate code to obtain a first execution result; and determining that the variables in the i-th set can be converted from the first type to the second type when a first execution result of the first intermediate code and a baseline execution result meet a preset condition, such as an error between the first execution result and the baseline execution result is less than or equal to a preset value. Where i is a positive integer less than or equal to n.
[0014] The variable type of the variables in a set is converted from a first type with higher precision to a second type with lower precision, while the variable types of the variables in other sets remain unchanged, the above-mentioned first code is obtained, and then the first code is executed. The execution result of the first code is compared with the execution result of the second code. If the two execution results meet the preset conditions, for example, the residual of the two execution results is less than or equal to the preset value, it means that the conversion of the variables in the set in the second code from higher precision to lower precision has little effect on the execution result of the code, and the variables in the set can be converted from higher precision to lower precision.
[0015] In one possible implementation, if a first execution result of a first intermediate code and a benchmark execution result do not satisfy a preset condition, i.e., all variables in the i-th set cannot be converted from the first type to the second type, the computing device further divides the variables in the i-th set into m subsets, each subset including multiple variables in the i-th set, where m is a positive integer greater than 1; then, the variables in the j-th subset are converted to the second type, a second intermediate code corresponding to the j-th subset is obtained, and the second intermediate code is executed to obtain a second execution result; and if the second execution result of the second intermediate code and the benchmark execution result satisfy the preset condition, the computing device determines that the variables in the j-th subset can be converted from the first type to the second type, where j is a positive integer less than or equal to m.
[0016] When the execution results of the first code and the execution results of the second code do not meet the preset conditions, it means that converting all the variables in the set in the second code from the higher-precision first type to the lower-precision second type will have a greater impact on the execution results of the application. At this time, the variables in the set are divided into multiple subsets to determine whether the variables in each subset can be converted from higher precision to lower precision, that is, to determine whether some variables in the set can be converted from higher precision to lower precision.
[0017] In one possible implementation, the variables in the j-th subset in the above-mentioned second intermediate code are of the second type, the variables in the other m-1 subsets of the m subsets except the j-th subset are of the first type, and the variables in the target set in the other n-1 sets of the above-mentioned n sets except the i-th set are converted into variables of the second type, and the target set refers to the set to which the determined variables that can be converted into the second type belong.
[0018] In one possible implementation, the variables in the j-th subset in the second intermediate code are of the second type, the variables in the other m-1 subsets among the m subsets except the j-th subset are of the first type, and the variables in the other n-1 sets among the n sets except the i-th set are of the first type.
[0019] If not all variables in the i-th set can be converted from the first type to the second type, the variables in the i-th set are divided into multiple subsets, and after the variables in the j-th subset are converted to the second type, the variables in other subsets remain as the first type, and the variables in the n-1 sets other than the i-th set can all remain as the first type, or the variables that can be converted to the second type in the other n-1 sets can be converted to the second type.
[0020] In one possible implementation, deploying each operator in the first code to a different hardware chip according to the type of each operator in the first code and the variable included in the operator includes:
[0021] Based on each operator in the first code, the type of variables included in each operator, and the mapping relationship, determine the hardware chip used to execute each operator, and deploy each operator in the first code to different hardware chips; wherein the above mapping relationship includes the optimization degree of different hardware chips for different operators, and the optimization degree indicates the efficiency of the hardware chip in processing the corresponding operator.
[0022] The computing device stores operators and / or variable types suitable for calculations on different hardware chips. When deploying an application, the application can be deployed to different hardware chips based on the operators or variable types suitable for calculations on different hardware chips, taking operators as units, thereby accelerating the application. At the same time, since some or all of the higher-precision variables in the application's source code are converted to lower-precision variables, it can reduce memory usage and the amount of data generated during the calculation process, thereby reducing the amount of calculation and improving calculation efficiency.
[0023] In second aspect, the present application provides an application acceleration device, including: a communication module for obtaining a first code corresponding to an application, the first code including one or more different types of variables; a deployment module for deploying each operator in the first code to different hardware chips according to the types of each operator in the first code and the variables included in the operator.
[0024] In one possible implementation, the first code is obtained by converting a second code, where the second code includes high-precision variables of the first type. The application acceleration device further includes a conversion module for obtaining the second code corresponding to the application and converting some or all of the first-type variables in the second code to the second type to obtain the first code. The precision of the data corresponding to the first-type variables is greater than the precision of the data corresponding to the second-type variables. For example, the first-type variables are of FP64 type, and the second-type variables are of FP32 type. The second code can be the source code of the application, or it can be obtained by converting high-precision variables in the source code of the application to low-precision variables.
[0025] In one possible implementation, the above-mentioned conversion module is specifically used to: divide the variables of the first type in the second code into n sets, each set includes multiple variables, where n is a positive integer; determine that the variables in the i-th set in the n sets can be converted from the first type to the second type, and convert the variables belonging to the i-th set in the second code from the first type to the second type.
[0026] In one possible implementation, the conversion module is specifically configured to: execute the second code and determine a baseline execution result after executing the second code; convert the variables in the i-th set to the second type, while maintaining the variables in the other n-1 sets in the first type, obtain a first intermediate code corresponding to the i-th set, and execute the first intermediate code to obtain a first execution result; and determine that the variables in the i-th set can be converted from the first type to the second type when a first execution result of the first intermediate code and a baseline execution result meet a preset condition, such as an error between the first execution result and the baseline execution result is less than or equal to a preset value. Where i is a positive integer less than or equal to n.
[0027] In one possible implementation, the conversion module is further configured to: when a first execution result of the first intermediate code and a benchmark execution result do not satisfy a preset condition, that is, when all variables in the i-th set cannot be converted from the first type to the second type, the computing device further divides the variables in the i-th set into m subsets, each subset including multiple variables in the i-th set, where m is a positive integer greater than 1; then convert the variables in the j-th subset to the second type, obtain a second intermediate code corresponding to the j-th subset, and execute the second intermediate code to obtain a second execution result; and when the second execution result of the second intermediate code and the benchmark execution result satisfy the preset condition, determine that the variables in the j-th subset can be converted from the first type to the second type, where j is a positive integer less than or equal to m.
[0028] In one possible implementation, the variables in the j-th subset in the above-mentioned second intermediate code are of the second type, the variables in the other m-1 subsets of the m subsets except the j-th subset are of the first type, and the variables in the target set in the other n-1 sets of the above-mentioned n sets except the i-th set are converted into variables of the second type, and the target set refers to the set to which the determined variables that can be converted into the second type belong.
[0029] In one possible implementation, the variables in the j-th subset in the second intermediate code are of the second type, the variables in the other m-1 subsets among the m subsets except the j-th subset are of the first type, and the variables in the other n-1 sets among the n sets except the i-th set are of the first type.
[0030] In one possible implementation, the deployment module is specifically used to: determine the hardware chip used to execute each operator based on each operator in the first code, the type of variables included in each operator, and the mapping relationship, and deploy each operator in the first code to different hardware chips; wherein the mapping relationship includes the optimization degree of different hardware chips for different operators, and the optimization degree indicates the efficiency of the hardware chip in processing the corresponding operator.
[0031] In a third aspect, the present application provides a computing device comprising a processor and a memory, wherein the memory is used to store instructions and the processor is used to execute the instructions. When the processor executes the instructions, it executes the application acceleration method as in the first aspect or any possible implementation of the first aspect.
[0032] In a fourth aspect, the present application provides a computer program product, which, when running on a server, enables the server to execute the application acceleration method in the first aspect or any possible implementation of the first aspect.
[0033] In a fifth aspect, the present application provides a computer-readable storage medium, which stores instructions. When the instructions are executed on a server, the server executes the application acceleration method in the first aspect or any possible implementation of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0035] Figure 1 This is a flowchart of an application acceleration method provided in an embodiment of the present application;
[0036] Figure 2 This is a schematic diagram of operator deployment provided in an embodiment of the present application;
[0037] Figure 3 This is a schematic diagram of determining whether a variable can be converted, provided in an embodiment of the present application;
[0038] Figure 4 is a schematic diagram of an application acceleration device provided in an embodiment of the present application;
[0039] Figure 5 is a schematic diagram of a computing device provided in an embodiment of the present application;
[0040] Figure 6 This is a schematic diagram of an application acceleration system provided in an embodiment of the present application. DETAILED DESCRIPTION
[0041] The technical solution in this application will be described below with reference to the accompanying drawings.
[0042] High Performance Computing (HPC) refers to the use of effective algorithms to quickly complete data-intensive, compute-intensive, and input / output (I / O)-intensive calculations in fields such as scientific research, engineering design, finance, industry, and social management.
[0043] The data used in current HPC applications and engineering simulations is typically high-precision floating-point data types, such as FP128 and FP64. However, using high-precision floating-point data for all data is an over-engineered approach. High-precision floating-point data also occupies a large amount of storage space, leading to memory waste during application execution and high computational complexity, which affects computational efficiency. Therefore, accelerating applications is a technical challenge that needs to be addressed.
[0044] As CPU performance increases fail to keep pace with the growing computing demands of applications, processors are shifting towards specialized, compute-intensive hardware to significantly improve the performance and efficiency of typical applications, such as accelerating artificial intelligence (AI) model training. These include graphics processing units (GPUs), embedded neural network processing units (NPUs), tensor processing units (TPUs), data processing units (DPUs), accelerated processing units (APUs), floating-point processing units (FPUs), application-specific integrated circuits (ASICs), programmable logic devices (PLDs), and field-programmable gate arrays (FPGAs). Because some applications require less precise data, these compute-intensive hardware chips typically outperform general-purpose CPUs in processing lower-precision data (such as FP32 and FP16). This means that different hardware chips are suited for processing different data types.
[0045] In the embodiment of the present application, data types include FP128, FP64, FP32 and FP16. The data type can indicate the precision of the data. For example, the precision of FP128 data is the precision of the floating-point number represented by 128 bits, and the precision of FP128 data is higher than that of FP64 data. It should be noted that high precision and low precision in the embodiment of the present application are relative concepts, and high precision and low precision do not refer to data of a specific one or more data types. For example, FP128 data is high-precision data relative to FP64 data, and FP64 data is low-precision data relative to FP128 data; FP64 data is high-precision data relative to FP32 data, and FP32 data is low-precision data relative to FP64 data; FP32 data is high-precision data relative to FP16 data, and FP16 data is low-precision data relative to FP32 data.
[0046] It should be understood that the variable type corresponding to the variable is the same as the data type, and the variable type also includes FP128, FP64, FP32 or FP16, etc. The variable type indicates the data type assigned to the variable when it is declared or defined. When the application code is not executed, the variable is not assigned a value, but the variable type of the variable has been declared or defined. The variable type of the variable corresponds one-to-one to the data type of the data. For example, for a variable with a variable type of FP128, the data type of the data when assigned is FP128 data. For a variable with a variable type of FP32, the data type of the data when assigned is FP32 data. That is, when the code is not running, the variable type is used instead of the data type of the data corresponding to the variable. The precision of a variable refers to the precision of the data corresponding to the variable type, so the variable type can also indicate the precision of the data corresponding to the variable. For example, if the variable type is FP64, it means that the precision of the data assigned to the variable is the precision of FP64 data.
[0047] An embodiment of the present application provides an application acceleration method that can accelerate applications using different hardware chips. The computing device first obtains the first code corresponding to the application that needs to be accelerated, and the first code includes one or more variables of different variable types. For example, the first code includes variables of the first type, or the first code includes variables of the first type and the second type; wherein the precision of the data corresponding to the variables of the first type is higher than the precision of the data corresponding to the variables of the second type, such as the variables of the first type are FP64, and the variables of the second type are FP32. The computing device then determines the hardware chip used to execute each operator based on the operators in the first code and the types of variables in each operator, deploys different operators in the first code to different hardware chips, and has different hardware chips jointly execute the application to achieve acceleration of the application.
[0048] In one possible implementation, the first code may be obtained by converting the second code. The second code may be the source code of the application, or the second code may be obtained by converting the source code of the application. The method for converting the source code to obtain the second code may refer to the method for converting the second code to the first code described later, and will not be described in detail here. When the first code is obtained by converting the second code, the computing device first obtains the second code corresponding to the application to be accelerated, determines which variables in the second code can be converted from high precision to low precision, and then converts the variables that can be converted from high precision to low precision into low precision to obtain the first code. The second code includes variables of one or more precisions; for example, the second code only includes variables of the first type, the computing device determines the variables that can be converted from the first type to the second type in the second code, and then converts the variables that can be converted from the second type determined in the second code into the second type to obtain the first code; or the second code includes variables of the first type and the second type, the computing device determines the variables that can be converted from the first type to the second type in the second code, and then converts the variables that can be converted from the second type determined in the second code into the second type to obtain the first code.
[0049] The above method first determines which variables in the source code of the application can be converted from high-precision types to low-precision types. Among them, after some or all of the variables in the application are converted from high precision to low precision, the execution result after executing the application and the execution result before the variable type is converted must meet the preset conditions to prevent the final calculation result caused by the variable type conversion from having too large an error or even divergence. Then, all variables that can be converted to low precision in the source code are converted to low precision. Finally, based on the operator and the type of variables included in each operator, the hardware chip used to execute each operator is determined, thereby achieving the purpose of executing the application through different hardware chips and accelerating the application.
[0050] The following, combined with the accompanying drawings, details a method for accelerating an application when there are variables in the code corresponding to the application that can be converted from high precision to low precision. Figure 1 As shown, Figure 1 This is a flowchart of an application acceleration method provided in an embodiment of the present application, which includes S101 to S104.
[0051] S101: A computing device obtains a second code corresponding to an application, and executes the second code to obtain a benchmark execution result.
[0052] The computing device executes the second code of the application and obtains a benchmark execution result of executing the second code. The second code of the application includes one or more types of variables. For example, the variable types in the second code are all of the first type, or the variable types in the second code include the first type and the second type; or the variable types in the second code include the first type, the second type, and the third type. Among them, the precision of the data corresponding to the variables of the first type is greater than the precision of the data corresponding to the variables of the second type, and the precision of the data corresponding to the variables of the second type is greater than the precision of the data corresponding to the variables of the third precision; the storage space occupied by the data corresponding to a variable of the first type is greater than the storage space occupied by the data corresponding to a variable of the second type, and the storage space occupied by the data corresponding to a variable of the second type is greater than the storage space occupied by the data corresponding to a variable of the third type. For example, the first type can be FP128, the second type is FP64, and the third type is FP32; or the first type can be FP64, the second type is FP32, and the third type is FP16. The embodiments of the present application do not impose specific restrictions.
[0053] It should be understood that the second code may be the source code corresponding to the application, or may be a code converted from the source code corresponding to the application, for example, a code obtained by converting some or all high-precision variables in the source code into low-precision variables.
[0054] S102: The computing device divides the variables of the first type in the second code into n sets, and determines the variables in each set that can be converted from the first type to the second type.
[0055] The computing device obtains variables of the first type in the second code, first divides the variables of the first type into n sets, each set including multiple variables of the first type, and the variables in each set are different; where n is a positive integer. The computing device then determines whether the variables in each set can be converted from the first type to the second type. The method for the computing device to determine whether the variables in each set can be converted from the first type to the second type includes the following steps S1021 to S1024.
[0056] S1021. Convert the variables of the first type in the i-th set into the second type to obtain a first intermediate code, and execute the first intermediate code to obtain a first execution result of the first intermediate code.
[0057] The computing device obtains variables of the first type in the second code and divides the variables of the first type into n sets, each set including multiple variables of the first type; where n is a positive integer. The variables in the i-th set in the second code are then converted from the first type to the second type, while the types of the variables in the other n-1 sets in the second code remain unchanged. A first intermediate code corresponding to the i-th set is obtained, and the computing device executes the first intermediate code corresponding to the i-th set to obtain a first execution result of the first intermediate code corresponding to the i-th set. Where i is a positive integer less than or equal to n.
[0058] It should be noted that the i-th set is any one of the n sets. That is, the computing device performs the above operations on each of the n sets. After performing the above operations on each set, the computing device can obtain the first intermediate code corresponding to each set and obtain the first execution result of the first intermediate code corresponding to each set. The computing device can perform the above operations on each of the n sets in parallel, obtaining the first execution result of the first intermediate code corresponding to each set.
[0059] Exemplarily, after the computing device divides the variables of the first type in the second code into three sets, the computing device converts the variables in the first set of the second code from the first type to the second type, while maintaining the variable types of the variables in the other two sets in the second code unchanged, obtains the first intermediate code corresponding to the first set, and executes the first intermediate code corresponding to the first set to obtain a first execution result of the first intermediate code corresponding to the first set. Simultaneously, the computing device converts the variables in the second set of the second code from the first type to the second type, while maintaining the variable types of the variables in the other two sets in the second code unchanged, obtains the first intermediate code corresponding to the second set, and executes the first intermediate code corresponding to the second set to obtain a first execution result of the first intermediate code corresponding to the second set. Furthermore, the computing device converts the variables in the third set of the second code from the first type to the second type, while maintaining the variable types of the variables in the other two sets in the second code unchanged, obtains the first intermediate code corresponding to the third set, and executes the first intermediate code corresponding to the third set to obtain a first execution result of the first intermediate code corresponding to the third set.
[0060] In one possible implementation, when dividing the variables of the first type into n sets, the multiple variables of the first type may be divided into n sets according to a preset rule. For example, the variables of the first type may be divided into n sets evenly by number; or the number of variables included in the n sets may be in geometric proportion or arithmetic progression.
[0061] In one possible implementation, when the variables of the first type are divided into n sets, the variables in each set have a coupling relationship, that is, for variables in the same set, whether one variable can be converted from high precision to low precision will affect whether one or more other variables in the same set can be converted from high precision to low precision; if not all variables in a set can be converted from high precision to low precision, then after the variables in the set are divided into multiple subsets, not all variables in at least one of the multiple subsets can be converted from high precision to low precision.
[0062] S1022. The computing device determines whether the first execution result and the benchmark execution result of the first intermediate code corresponding to the i-th set meet the preset conditions. When the first execution result and the benchmark execution result do not meet the preset conditions, execute S1023; when the first execution result and the benchmark execution result meet the preset conditions, execute S1024.
[0063] After obtaining the first execution result of the first intermediate code corresponding to the i-th set, the computing device needs to determine whether the first type of variables in the i-th set can be converted to the second type based on the first execution result of the first intermediate code and the above-mentioned benchmark execution result. The computing device determines the error between the first execution result and the benchmark execution result. When the error is greater than a first threshold, the computing device confirms that the first execution result of the first intermediate code corresponding to the i-th set and the benchmark execution result do not meet the preset conditions, indicating that converting the variables in the i-th set to the second type has a significant impact on the execution results of the application. The computing device confirms that the variables in the i-th set cannot be converted to the second type, and the computing device executes S1023. When the error is less than or equal to the first threshold, it is determined that the first execution result and the benchmark execution result meet the preset conditions. The computing device confirms that all variables in the i-th set can be converted to variables of the second type, and the computing device executes S1024. For example, the computing device calculates the residual between the first execution result and the benchmark execution result. When the residual is less than or equal to a first threshold, the computing device confirms that the first execution result and the benchmark execution result meet the preset conditions. When the residual is greater than the threshold, the computing device confirms that the first execution result and the benchmark execution result do not meet the preset conditions.
[0064] In an embodiment of the present application, for any of the n sets described above, the computing device determines whether the variables in each set can be converted from the first type to the second type by performing the operations described in S1021 and S1022 above. If the computing device determines through the operations described in S1021 and S1022 above that the variables in a set cannot be converted from the first type to the second type, the computing device performs the operations described in S1023 on the variables in the set; if the computing device determines through the operations described in S1021 and S1022 above that the variables in a set can be converted from the first type to the second type, the computing device performs the operations described in S1024 on the variables in the set.
[0065] It should be noted that the computing device can first convert all variables of the first type in the second code into the second type to obtain an intermediate code, and execute the intermediate code to obtain a corresponding execution result. Only when the execution result corresponding to the intermediate code and the benchmark execution result do not meet the preset conditions, the operation described in the above S102 is executed.
[0066] S1023. Divide the variables in the i-th set into m subsets, convert the variables of the first type in the j-th subset into the second type, obtain a second intermediate code, and execute the second intermediate code to obtain a second execution result of the second intermediate code.
[0067] When the first execution result of the first intermediate code corresponding to the i-th set does not meet the preset conditions with the benchmark execution result, it indicates that all variables in the i-th set cannot be converted from the first type to the second type. At this time, the variables in the i-th set are divided into m subsets, each subset including different variables in the i-th set, where m is a positive integer greater than 1. Then, the variables in the second code belonging to the j-th subset are converted from the first type to the second type, and the variables in the second code belonging to the other m-1 subsets remain as the first type. For variables in other sets other than the i-th set, such as variables in the k-th set, if it is determined in the above S1022 that the variables in the k-th set can be converted to the second type, then when determining whether the variables in the j-th subset can be converted to the second type, the variables in the second code belonging to the k-th set can be converted to the second type, or the variables in the second code belonging to the k-th set can be maintained as the first type. This embodiment of the present application does not impose specific restrictions. If it is determined in S1022 that the variables in the kth set cannot be converted to the second type, then when determining whether the variables in the jth subset can be converted to the second type, the variables in the kth set in the second code are maintained as the first type. After converting the variables in the second code according to the above method, a second intermediate code corresponding to the jth subset is obtained, and the second intermediate code corresponding to the jth subset is executed to obtain a second execution result of the second intermediate code corresponding to the jth subset.
[0068] If the computing device determines that the second execution result of the second intermediate code corresponding to the j-th subset and the benchmark execution result meet the preset condition, the computing device determines that the variables in the j-th subset can be converted to the second type. If the computing device determines that the second execution result of the second intermediate code corresponding to the j-th subset and the benchmark execution result do not meet the preset condition, the computing device determines that the variables in the j-th subset cannot be converted to the second type.
[0069] It should be understood that the j-th subset is any one of the m subsets, that is, the computing device performs the above operations on each of the m subsets divided from the i-th set. After performing the above operations on each subset, the second intermediate code corresponding to each subset is obtained, and the second execution result of executing the second intermediate code corresponding to each subset is obtained. The computing device can also perform the above operations on each of the m subsets in parallel, obtain the second execution result of the second intermediate code corresponding to each subset, and then determine whether the variables in each subset can be converted to the second type.
[0070] In the embodiment of the present application, if the computing device determines that the second execution result of the second intermediate code corresponding to the j-th subset and the benchmark execution result do not meet the above-mentioned preset conditions, the computing device determines that the variables in the j-th subset cannot be converted to the second type, and the computing device performs the following steps:
[0071] (1) Divide the variables in the jth subset into m subsets, each of which includes different variables in the jth subset;
[0072] (2) For any one of the m subsets divided from the j-th subset, perform the same operation as that performed on the j-th subset in S1023 above on the subset, that is, use the subset as the j-th subset above, and confirm whether the variables in the subset can be converted from the first type to the second type according to the method in S1023 above. If the computing device determines that the variables in the subset cannot be converted from the first type to the second type, use the subset as the j-th subset above, and after the computing device determines whether the variables in each subset divided from the j-th subset can be converted to the second type, perform steps (1) and (2) above again.
[0073] It should be understood that after the computing device confirms that the variables in a subset cannot be converted from the first type to the second type, the subset is used as the j-th subset, and the above steps (1) and (2) are performed until the number of variables in the last subset is less than or equal to the preset number, at which point the computing device stops determining which variables in the above i-th set can be converted from the first type to the second type. The specific numerical value of the above preset number is not specifically limited in the embodiment of the present application. For example, the preset number is 10. When the number of variables in a subset is 18, and the computing device determines that the variables in the subset cannot be converted from the first type to the second type, the variables in the subset are divided into two subsets, each of which includes 9 variables. When the computing device determines that 9 variables in a subset cannot be converted to the second type, the computing device no longer divides these 9 variables into multiple subsets.
[0074] S1024. Convert the variables in the i-th set in the second code to the second type.
[0075] When the first execution result of the first intermediate code corresponding to the i-th set and the benchmark execution result meet the preset conditions, the computing device confirms that all variables in the i-th set can be converted into variables of the second type. Then, when the computing device deploys the code corresponding to the application, it converts the variables belonging to the i-th set in the code of the application into the second type before deploying it.
[0076] The above describes how to determine which variables in the i-th set of n sets can be converted from the first type to the second type, using the i-th set among n sets as an example. It should be understood that the computing device will apply the above method to each of the n sets, determining the variables in each set that can be converted from the first type to the second type, thereby determining the variables in the second code that can be converted from the first type to the second type.
[0077] S103: The computing device converts the variables that can be converted into the second type in the determined second code into the second type to obtain the first code.
[0078] The computing device determines, according to the above method, variables in the second code that can be converted from the first type to the second type, and after obtaining the first target variable, converts the variable type of the first target variable in the second code from the first type to the second type, thereby obtaining the first code. The first target variable is a variable in the second code that the computing device determines can be converted from the first type to the second type. It should be understood that some or all of the variables of the first type in the second set can be converted from the first type to the second type.
[0079] S104: The computing device deploys the first code to different hardware chips respectively.
[0080] In the embodiment of the present application, computing resources include CPU, GPU, NPU, TPU, DPU, APU, FPU, ASIC, PLD or FPGA, etc. Different hardware chips are suitable for calculating different operators and data types. For example, the CPU is good at logical judgment, and the general purpose GPU (GPGPU) in the GPU generally supports the calculation of high-precision data, but the NPU dedicated to deep learning generally only supports the calculation of low-precision data. For example, the input data of the general matrix multiplication (GEMM) operator is high-precision data, such as FP128 or FP64 data, and the calculation of the operator can be completed faster through GPGPU; when the input data of the operator is low-precision data, such as FP32 or FP16, the calculation of the operator can be completed faster through NPU. For convenience of description, in the embodiment of the present application, if the variable types of the variables included in two operators are different but the operator names are the same, the two operators are regarded as different operators. That is, operators with the same operator name but different data types of input data are regarded as different operators. For example, the above-mentioned GEMM operator is one operator when the input data is FP64 data; the GEMM operator is another operator when the input data is FP32 data.
[0081] The computing device stores operators suitable for calculations on different hardware chips. After obtaining the first code, the computing device can deploy different operators on suitable hardware chips based on the operators suitable for calculations on different hardware chips when deploying the application, so as to achieve computational acceleration. For example, the computing device stores the optimization degree of different hardware chips for different operators. The optimization degree indicates the processing speed of the hardware chip for the corresponding operator. The higher the optimization degree of a hardware chip for an operator, the faster the hardware chip processes the operator. Figure 2 As shown, for an operator X, the computing resources include four hardware chips: A, B, C, and D. Hardware chip A and hardware chip B are both suitable for computing operator X. If hardware chip A's optimization for operator X is greater than that of hardware chip B, operator X is assigned to hardware chip A for computation. For example, consider a triangular matrix solver. The computing resources suitable for computing this operator include the GPU and NPU. Because the variables in this operator are FP64, which is considered high-precision, the GPU's optimization for this operator is greater than that of the NPU, so the operator is assigned to the GPU for computation.
[0082] After obtaining the first code, the computing device replaces the second code with the first code for deployment. Since the number of variables of the first type in the first code is reduced relative to the second code, the application occupies less memory during the execution of the first code, which can reduce the amount of calculation and the amount of data in the calculation process, and can also reduce the amount of data transmitted.
[0083] In another possible implementation, after determining variables in the second code that can be converted from the first type to the second type and obtaining the first code, the computing device then determines which variables in the first code can be converted from the second type to the third type according to the above method. The data corresponding to the variables of the third type has lower precision than the data corresponding to the variables of the second type. In this case, the variables of the second type in the first code are equivalent to the variables of the first type in the second code. For the variables of the second type in the first code, the computing device then determines variables in the first code that can be converted from the second type to the third type according to the above method, obtaining a second target variable. The variable type of the second target variable in the first code is then converted from the second type to the third type, obtaining the third code. The variables of the second type in the first code include the original variables of the second type in the second code and the variables of the second type converted from the variables of the first type. The computing device then deploys different operators in the third code onto appropriate hardware chips based on the variable types of the operators and variables within each operator to achieve computational acceleration.
[0084] The following is a detailed description of S101 to S104 using a specific example. Figure 3 As shown, Figure 3 This is a schematic diagram of determining whether a variable can be converted, provided by an embodiment of the present application. The second code includes 100 variables A1 to A100, and the variable type of each variable is FP64. The computing device needs to first determine whether all 100 FP64 type variables can be converted to FP32. The computing device first converts the 100 FP64 variables in the second code into FP32, and then runs the converted second code to obtain the execution result. If the execution result and the benchmark execution result do not meet the above preset conditions, the 100 variables A1 to A100 are divided into multiple sets. Figure 3 As shown, A1 to A100 are divided into two sets, the first set includes variables A1 to A60, and the second set includes variables A61 to A100.
[0085] When determining whether variables in the first set can be converted to FP32 type, the computing device first converts variables A1-A60 in the second code that belong to the first set to FP32, maintains variables A61-A100 in the second set as FP64, obtains the first intermediate code corresponding to the first set, executes the first intermediate code corresponding to the first set, and obtains a first execution result of the first intermediate code corresponding to the first set. Similarly, when determining whether variables in the second set can be converted to FP32, the computing device converts variables A61-A100 in the second code that belong to the second set to FP32, maintains variables A1-A60 in the first set as FP64, obtains the first intermediate code corresponding to the second set, executes the first intermediate code corresponding to the second set, and obtains a first execution result of the first intermediate code corresponding to the second set. The computing device can perform the above operations in parallel to determine whether the variables in the first and second sets can be converted to FP32, respectively.
[0086] Then, the computing device determines whether the first execution result and the benchmark execution result of the first intermediate code corresponding to the first set meet a preset condition. If so, the computing device determines that the variables in the first set can be converted to FP32; if not, the computing device determines that the variables in the first set cannot be converted to FP32. Simultaneously, the computing device determines whether the first execution result and the benchmark execution result of the first intermediate code corresponding to the second set meet a preset condition. If so, the computing device determines that the variables in the second set can be converted to FP32; if not, the computing device determines that the variables in the second set cannot be converted to FP32.
[0087] like Figure 3As shown in , if the computing device determines that the variables in the first set cannot be converted to FP32, but the variables in the second set can be converted to FP32, the computing device further divides the variables A1-A60 in the first set into multiple subsets, for example, into three subsets, where the first subset includes variables A1-A20, the second subset includes variables A21-A40, and the third subset includes variables A41-A60.
[0088] The computing device determines whether the variables in the first subset, the second subset, and the third subset can be converted to FP32 type. First, the computing device converts variables A1 to A20 belonging to the first subset in the second code to FP32, and the variables A21 to A60 in the second and third subsets remain in FP64. The variables included in the second set remain in FP64 and can also be converted to FP32, thereby obtaining a second intermediate code corresponding to the first subset; the computing device executes the second intermediate code corresponding to the first subset and obtains a second execution result of the second intermediate code corresponding to the first subset. Similarly, the computing device converts variables A21-A40 in the second code, which belong to the second subset, to FP32, while maintaining variables in the first and third subsets as FP64. Variables in the second set remain FP64 and can also be converted to FP32, thereby obtaining a second intermediate code corresponding to the second subset. The computing device executes the second intermediate code corresponding to the second subset, obtaining a second execution result of the second intermediate code corresponding to the second subset. Furthermore, the computing device converts variables A41-A60 in the second code, which belong to the third subset, to FP32, while maintaining variables in the first and second subsets as FP64. Variables in the second set remain FP64 and can also be converted to FP32, thereby obtaining a second intermediate code corresponding to the third subset. The computing device executes the second intermediate code corresponding to the third subset, obtaining a second execution result of the second intermediate code corresponding to the third subset. The computing device can perform the above operations in parallel, respectively determining whether the variables in the first, second, and third subsets can be converted to FP32.
[0089] The computing device then determines whether the second execution result and the benchmark execution result of the second intermediate code corresponding to the first subset meet preset conditions. If so, the computing device determines that the variables in the first subset can be converted to FP32; if not, the computing device determines that the variables in the first subset cannot be converted to FP32. Similarly, the computing device determines whether the second execution result and the benchmark execution result of the second intermediate code corresponding to the second subset meet preset conditions. If so, the computing device determines that the variables in the second subset can be converted to FP32; if not, the computing device determines that the variables in the second subset cannot be converted to FP32. The computing device then determines whether the second execution result and the benchmark execution result of the second intermediate code corresponding to the third subset meet preset conditions. If so, the computing device determines that the variables in the third subset can be converted to FP32; if not, the computing device determines that the variables in the third subset cannot be converted to FP32.
[0090] If the computing device determines that the variables in the third subset cannot be converted to FP32, the variables in the first and second subsets can be converted to FP32. The computing device further divides the variables in the first subset into multiple subsets, each of which includes multiple variables in the first subset. The computing device then determines whether the variables in each of the multiple subsets divided from the first subset can be converted from the first type to the second type.
[0091] Each time the computing device determines that all variables in a subset cannot be converted from the first type to the second type, it divides the variables in the subset into multiple subsets again, and then determines whether the variables in each of the multiple newly divided subsets can be converted to the second type, until the number of variables in each of the multiple subsets divided from the subset is less than or equal to the preset number, at which point the computing device stops determining which variables in the second code can be converted from the first type to the second type. For example, the preset number is 10, and the second subset includes A21 to A40, and the number of variables in this subset is 20. After the computing device determines that the variables in this subset cannot be converted from the first type to the second type, it divides the variables in this subset into three subsets, with the number of variables in each subset being 6, 6, and 7, respectively. When the computing device determines that the variables in a subset cannot be converted to the second type, the computing device no longer divides the variables in this subset into multiple subsets.
[0092] For the above method embodiments, for simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described. For example, the above S101 and S102 can be executed in parallel, S101 can be executed first and then S102, or S102 can be executed first and then S101. In addition, those skilled in the art should also be aware that the embodiments described in this specification are all preferred embodiments, and the actions involved are not necessarily required by the present invention.
[0093] Other reasonable step combinations that can be thought of by those skilled in the art based on the above description also fall within the scope of protection of this application. Secondly, those skilled in the art should also be familiar with that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the present invention.
[0094] Combination of the above Figures 1 to 3 The application acceleration method provided by this application is introduced in detail in the following. The relevant devices and computing equipment provided by this application are introduced in conjunction with the accompanying drawings.
[0095] like Figure 4 As shown, Figure 4 It is a schematic diagram of an application acceleration device provided in an embodiment of the present application, and the application acceleration device 100 includes an acquisition module 110 and a deployment module 120. The acquisition module 110 is used to obtain a first code corresponding to an application that needs to be accelerated, and the first code includes one or more variables of different variable types, for example, including variables of the first type, or including variables of the first type and the second type, wherein the precision of the data corresponding to the variables of the first type is higher than the precision of the data corresponding to the variables of the second type, for example, the variables of the first type are FP64, and the variables of the second type are FP32. The deployment module 120 is used to deploy different operators in the first code to different hardware chips, wherein different hardware chips are suitable for calculating different operators or data of different data types. The deployment module 120 deploys different operators in the first code to different hardware chips according to the above-mentioned operators and the variable types of the variables in each operator to achieve acceleration of the application.
[0096] In one possible implementation, the first code may be obtained by converting the second code, the second code may be the source code of the application, or the second code may be obtained by converting the source code of the application. The application acceleration device 100 further includes a conversion module 130, which is used to determine which variables in the second code corresponding to the application can be converted from high precision to low precision, obtain target variables, and then convert the determined variables that can be converted from high precision to low precision into low precision to obtain the first code. The second code includes variables of one or more variable types. For example, the second code only includes variables of the first type. The conversion module 130 determines which variables in the second code can be converted from high-precision variables of the first type to low-precision variables of the second type, and then converts the variables determined in the second code that can be converted to the second type into the second type to obtain the first code; or the second code includes variables of the first and second types. The conversion module 130 is used to convert some or all of the variables of the first type in the second code into variables of the second type to obtain the first code.
[0097] The method by which the conversion module 130 determines which variables in the second code can be converted from the first type to the second type can refer to the operation of the computing device determining which variables in the second code can be converted from the first type to the second type in the above method embodiments S101 to S104, which will not be repeated here. When the second code is the code obtained after the source code of the application is converted, the second code can be obtained by converting some variables in the source code from high precision to low precision through the above method. In the embodiment of the present application, the above-mentioned acquisition module 110, deployment module 120 and conversion module 130 can be modules located in the same computing device, or they can be modules located in different computing devices. When located in different computing devices, the above-mentioned modules can partially run on the same computing device, for example, the above-mentioned acquisition module 110 and the above-mentioned deployment module 120 are located in one computing device, and the conversion module 130 is located in another computing device. When located on different devices, the conversion module 130 determines that the first target variable in the second code can be converted from the first type to the second type, and converts the first target variable in the second code from the first type to the second type to obtain the first code, and then sends the first code to the deployment module 120. The deployment module 120 deploys each operator on a different hardware chip according to each operator in the first code and the variable type of the variable in each operator.
[0098] In one possible implementation, the application acceleration device is abstracted as a cloud service on the cloud service platform by the cloud service provider. After the user applies for or purchases the cloud service on the cloud service platform, the cloud service platform uses the application acceleration device to provide the user with cloud service of application acceleration. The terminal device used by the user can upload the source code of the application to be accelerated to the cloud service platform through the application program interface (API) or the web interface provided by the cloud service platform. The cloud service platform accelerates the application through the above-mentioned modules included in the application acceleration device 100.
[0099] The acquisition module 110 , deployment module 120 and conversion module 130 can all be implemented by software. The implementation of each module is described below. Taking the conversion module 130 as an example, the implementation of other modules can refer to the implementation of the conversion module 130 .
[0100] The conversion module 130 may include code running on a computing instance, wherein the computing instance may be one of devices such as a physical host, a virtual machine, or a container. The conversion module 130 may include one or more computing instances. For example, when the conversion module divides the second code into n sets and determines in parallel whether the variables in each set can be converted to the second type, different computing instances are used to determine whether the variables in different sets can be converted to the second type, and one computing instance is used to determine whether the variables in some of the n sets can be converted to the second type.
[0101] It should be noted that when the computing instances are virtual machines or containers, the virtual machines or containers corresponding to the various modules may be located on the same physical device or on different physical devices. When the computing instances are located on a cloud service platform, the computing instances corresponding to the various modules may be located in the same region or distributed across different regions.
[0102] The present application also provides an application acceleration system, which may include one or more computing devices. When the system includes a computing device, the structural diagram of the system can be seen in Figure 5 When the system includes multiple computing devices, the structural diagram of the system can be found in Figure 6 .
[0103] See also Figure 5 , Figure 5 is a schematic diagram of a computing device 500 provided in an embodiment of the present application. The computing device 500 includes: one or more processors 510, a communication interface 520, and a memory 530. The processor 510, the communication interface 520, and the memory 530 are interconnected via a bus 540.
[0104] The specific implementation of the various operations performed by the processor 510 can refer to the specific operations in the above method embodiments. For example, the processor 510 is used to perform the above Figure 1 The operations of S101 to S104 are not described in detail here.
[0105] The processor 510 can have various specific implementation forms. For example, the processor 510 can be a CPU, GPU, NPU, or TPU. The processor 510 can also be a single-core processor or a multi-core processor. The processor 510 can be a combination of a CPU and a hardware chip. The above-mentioned hardware chip can be an ASIC, a PLD, or a combination thereof. The above-mentioned PLD can be a complex programmable logic device (CPLD), an FPGA, a generic array logic (GAL), or any combination thereof. The processor 510 can also be implemented solely using a logic device with built-in processing logic, such as an FPGA or a digital signal processor (DSP).
[0106] The communication interface 520 may be a wired interface or a wireless interface for communicating with other modules or devices. The wired interface may be an Ethernet interface, a local interconnect network (LIN), etc., and the wireless interface may be a cellular network interface or a wireless local area network interface. In the embodiment of the present application, the communication interface 520 may be used to obtain user-uploaded application code that requires acceleration, etc.
[0107] Memory 530 may be a non-volatile memory, such as read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Memory 530 may also be a volatile memory, which may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).
[0108] The memory 530 can also be used to store program codes and data, so that the processor 510 can call the program codes stored in the memory 530 to execute the operation steps of the above method embodiment to realize application acceleration. Figure 5 Show more or fewer components, or configure components differently.
[0109] The bus 540 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus. The bus 540 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 Only one thick line is used in the diagram, but this does not mean that there is only one bus or one type of bus.
[0110] Optionally, the computing device 500 may further include an input / output interface 550 , to which an input / output device is connected for receiving input information, outputting operation results, and the like.
[0111] Specifically, the specific implementation of various operations performed by the computing device 500 may refer to the specific operations performed by S101 to S104 in the above method embodiment, and will not be repeated here.
[0112] Since the various modules in the application acceleration device 100 provided by the present application can be distributedly deployed on multiple computing devices in the same environment or in different environments, the present application also provides a Figure 6 The system shown includes multiple computing devices 600, each of which includes one or more processors 610, a communication interface 620, and a memory 630. The processors 610, the communication interface 620, and the memory 630 are interconnected via a bus 640. The bus 640 may include a path for transmitting information between the various components of the computing device 600 (e.g., the processor 610, the communication interface 620, and the memory 630). The specific form of the processor 610 may refer to the description of the processor 510 in the computing device 500, the specific form of the communication interface 620 may refer to the description of the communication interface 520 in the computing device 500, and the specific form of the memory 630 may refer to the description of the memory 530 in the computing device 500, and will not be repeated here.
[0113] Optionally, the computing device 600 may further include an input / output interface 650 , to which an input / output device is connected for receiving input information and outputting operation results.
[0114] A communication path is established between each of the above-mentioned computing devices 600 through a communication network. Any one or more of the acquisition module 110, deployment module 120 or conversion module 130 are run on each computing device 600. For example, the acquisition module 110 and the deployment module 120 are run in the first computing device, and the conversion module 130 is run in the second computing device and the third computing device. Since the conversion module 130 needs to run the code corresponding to the application multiple times to determine which variables in the code can be converted from high precision to low precision, and needs to determine in parallel whether the variables in each set of multiple sets can be converted from high precision to low precision, more computing resources are required, and the conversion module 130 can be deployed in multiple computing devices. After the conversion module 130 obtains the code of the application that needs to be accelerated from the acquisition module 110, it executes the method described in S101 to S104 above. Among them, any computing device 600 can be a computer in a cloud data center (for example, a server), a computer in an edge data center, or a terminal computing device.
[0115] An embodiment of the present application also provides a computer-readable storage medium, which stores instructions. When the computer-readable storage medium is executed on a processor, the method steps in the above method embodiment can be implemented. The specific implementation of the processor of the computer-readable storage medium in executing the above method steps can refer to the specific operations of the above method embodiment, which will not be repeated here.
[0116] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0117] The above embodiments can be implemented in whole or in part through software, hardware, firmware, or any other combination. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded or executed on a computer, the processes or functions described in accordance with the embodiments of the present invention are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains a collection of one or more available media. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium, or a semiconductor medium. The semiconductor medium can be a solid state drive (SSD).
[0118] The steps in the method of the embodiment of the present application can be adjusted in order, combined or deleted according to actual needs; the modules in the device of the embodiment of the present application can be divided, combined or deleted according to actual needs.
[0119] The above is a detailed introduction to the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of the present application. At the same time, for those skilled in the art, according to the idea of the present application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.
Claims
1. An application acceleration method, characterized in that: include: Obtaining a second code corresponding to the application, converting some or all of the variables of the first type in the second code into the second type to obtain the first code; wherein the precision of the variables of the first type is greater than the precision of the variables of the second type; Each operator in the first code is deployed to a different hardware chip according to each operator in the first code and a variable type of a variable included in the operator.
2. The method according to claim 1, characterized in that Converting part or all of the variables of the first type in the second code into the second type includes: Divide the variables of the first type in the second code into n sets, each set including a plurality of variables, where n is a positive integer; The n sets are traversed to determine whether variables in an i-th set among the n sets can be converted from the first type to the second type, and the variables in the second code that belong to the i-th set are converted from the first type to the second type.
3. The method according to claim 2, characterized in that Determining that variables in the i-th set among the n sets can be converted from the first type to the second type includes: determining a baseline execution result after executing the second code; Converting the variables in the i-th set to a second type to obtain a first intermediate code corresponding to the i-th set, and executing the first intermediate code to obtain a first execution result, where i is a positive integer less than or equal to n; When the first execution result of the first intermediate code and the benchmark execution result meet a preset condition, it is determined that the variables in the i-th set can be converted from the first type to the second type.
4. The method according to claim 3, characterized in that The method further comprises: When the first execution result of the first intermediate code and the benchmark execution result do not meet a preset condition, dividing the variables in the i-th set into m subsets, each subset including multiple variables in the i-th set, where m is a positive integer greater than 1; Convert the variables in the j-th subset to a second type, obtain a second intermediate code corresponding to the j-th subset, and execute the second intermediate code to obtain a second execution result, where j is a positive integer less than or equal to m; When the second execution result of the second intermediate code and the benchmark execution result meet a preset condition, it is determined that the variables in the j-th subset can be converted from the first type to the second type.
5. The method according to claim 4, characterized in that The variables in the j-th subset in the second intermediate code are of the second type, the variables in the other m-1 subsets of the m subsets except the j-th subset are of the first type, and the variables in the target set in the other n-1 sets of the n sets except the i-th set are converted into variables of the second type, and the target set refers to the set to which the determined variables that can be converted into the second type belong.
6. The method according to claim 4, characterized in that The variables in the j-th subset in the second intermediate code are of the second type, the variables in the other m-1 subsets of the m subsets except the j-th subset are of the first type, and the variables in the other n-1 sets of the n sets except the i-th set are of the first type.
7. The method according to any one of claims 1 to 6, characterized in that Deploying each operator in the first code to a different hardware chip according to the types of each operator in the first code and the variables included in the operator includes: Based on each operator in the first code, the type of variables included in each operator, and the mapping relationship, determine the hardware chip used to execute each operator, and deploy each operator in the first code to different hardware chips; wherein the mapping relationship includes the optimization degree of different hardware chips for different operators, and the optimization degree indicates the efficiency of the hardware chip in processing the corresponding operator.
8. An application acceleration device, characterized in that: include: A communication module, configured to obtain a second code corresponding to the application; a conversion module, configured to convert some or all of the variables of the first type in the second code into the second type to obtain the first code; wherein the precision of the data corresponding to the variables of the first type is greater than the precision of the data corresponding to the variables of the second type; A deployment module is used to deploy each operator in the first code to different hardware chips according to the types of each operator in the first code and the variables included in the operator.
9. The device according to claim 8, characterized in that The conversion module is specifically used for: Divide the variables of the first type in the second code into n sets, each set including a plurality of variables, where n is a positive integer; The n sets are traversed to determine whether variables in an i-th set among the n sets can be converted from the first type to the second type, and the variables in the second code that belong to the i-th set are converted from the first type to the second type.
10. The device according to claim 9, characterized in that The conversion module is specifically used for: determining a baseline execution result after executing the second code; Converting the variables in the i-th set to a second type to obtain a first intermediate code corresponding to the i-th set, and executing the first intermediate code to obtain a first execution result, where i is a positive integer less than or equal to n; When the first execution result of the first intermediate code and the benchmark execution result meet a preset condition, it is determined that the variables in the i-th set can be converted from the first type to the second type.
11. The device according to claim 10, characterized in that The conversion module is further configured to: When the first execution result of the first intermediate code and the benchmark execution result do not meet a preset condition, dividing the variables in the i-th set into m subsets, each subset including multiple variables in the i-th set, where m is a positive integer greater than 1; Convert the variables in the j-th subset to a second type, obtain a second intermediate code corresponding to the j-th subset, and execute the second intermediate code to obtain a second execution result, where j is a positive integer less than or equal to m; When the second execution result of the second intermediate code and the benchmark execution result meet a preset condition, it is determined that the variables in the j-th subset can be converted from the first type to the second type.
12. The device according to claim 11, characterized in that The variables in the j-th subset in the second intermediate code are of the second type, the variables in the other m-1 subsets of the m subsets except the j-th subset are of the first type, and the variables in the target set in the other n-1 sets of the n sets except the i-th set are converted into variables of the second type, and the target set refers to the set to which the determined variables that can be converted into the second type belong.
13. The device according to claim 11, characterized in that The variables in the j-th subset in the second intermediate code are of the second type, the variables in the other m-1 subsets of the m subsets except the j-th subset are of the first type, and the variables in the other n-1 sets of the n sets except the i-th set are of the first type.
14. The device according to any one of claims 8 to 13, characterized in that The deployment module is specifically used to: Based on each operator in the first code, the type of variables included in each operator, and the mapping relationship, determine the hardware chip used to execute each operator, and deploy each operator in the first code to different hardware chips; wherein the mapping relationship includes the optimization degree of different hardware chips for different operators, and the optimization degree indicates the efficiency of the hardware chip in processing the corresponding operator.
15. A computing device, characterized in that The method comprises a processor and a memory, wherein the memory is used to store instructions, and the processor is used to execute the instructions. When the processor executes the instructions, the method according to any one of claims 1 to 7 is performed.
16. A computer program product, characterized in that The computer program product comprises computer instructions, and when executed by a computing device, the computing device performs the method according to any one of claims 1 to 7.
Citation Information
Patent Citations
Hardware adaptation device and method based on deep learning
CN114186678A