Liquid crystal display panel

Abstract

An embodiment of the present invention provides a liquid crystal display panel, which includes a cell substrate, an array substrate, and a liquid crystal layer arranged between the cell substrate and the array substrate, wherein the array substrate includes a thin-film transistor device layer and a common electrode patterned on the array substrate. The liquid crystal display panel also includes a low-reflection metal layer, which is arranged on a side of the gate away from the substrate, and the low-reflection metal layer is arranged corresponding to the common electrode in at least a first direction or a second direction. In the embodiment of the present application, by providing a low-reflection metal layer on one side of the common electrode, the low-reflection metal layer can, on the one hand, act as a black matrix layer, and on the other hand, can optimize the shape of the electrode opening and increase the response speed of the liquid crystal in the opening area, thereby improving the display effect of the liquid crystal display panel.

Description

Technical Field

[0001] The present invention relates to the technical field of manufacturing liquid crystal display panels, and in particular to a liquid crystal display panel. Background Art

[0002] With the continuous development and improvement of display technology, people have put forward higher requirements on the display quality and effects of liquid crystal display panels to enhance the user experience.

[0003] The higher the resolution of the display panel, the better the display effect when displaying the image. The higher the resolution of the display panel, the higher the pixel arrangement density of the corresponding pixel. In order to obtain a high-resolution display panel, when preparing it based on a substrate of the same size, it is necessary to reduce the pixel size and the corresponding opening size in the display panel to increase the pixel arrangement density and achieve a high-performance panel. However, in the prior art, when preparing a smaller pixel opening, the smaller opening size will lead to a large error between the size of the actual processed product and the design size. The difference between different openings is large, which in turn causes the response speed of the liquid crystal in different opening areas to be different when the liquid crystal display panel emits light and displays, resulting in inconsistent display effects in different areas, thereby reducing the display effect of the liquid crystal display panel.

[0004] In summary, the uniformity of pixel openings in high-resolution liquid crystal display panels manufactured in the prior art is not ideal, which leads to poor display effects of the liquid crystal display panels. Summary of the Invention

[0005] An embodiment of the present invention provides a liquid crystal display panel to effectively improve the problem of poor uniformity of pixel openings in high-resolution liquid crystal display panels prepared in the prior art, resulting in unsatisfactory display effects of the liquid crystal display panel.

[0006] To solve the above technical problems, a first aspect of an embodiment of the present invention provides a liquid crystal display panel, comprising:

[0007] An array substrate and a cell substrate that are arranged opposite to each other, and a liquid crystal layer arranged between the array substrate and the cell substrate;

[0008] The array substrate comprises: a substrate, a thin film transistor device layer, and a common electrode arranged on a side of the thin film transistor device layer close to the cell substrate, the thin film transistor device layer comprising a gate, an active layer, and a source / drain, and the common electrode is patterned in a first direction of the array substrate;

[0009] In which, the liquid crystal display panel also includes a low-reflective metal layer, which is arranged on the side of the thin film transistor device layer away from the substrate, and the low-reflective metal layer is at least correspondingly arranged in the second direction, and intersects with the common electrode to form multiple electrode openings, and there is an angle between the first direction and the second direction.

[0010] According to an embodiment of the present invention, in the first direction, the low-reflection metal layer is disposed corresponding to the common electrode, and the electrode opening corresponds to the color resist layer of the liquid crystal display panel.

[0011] According to an embodiment of the present invention, the shape of the electrode opening is set to be any one of a rectangle and a quadrilateral.

[0012] According to one embodiment of the present invention, in the second direction, the low-reflection metal layer includes a first extension portion and a second extension portion arranged in different directions, the first extension portion and the second extension portion are alternately connected in sequence, and the corner where the first extension portion and the second extension portion are connected is set to a right angle or an arc.

[0013] According to an embodiment of the present invention, the first end of the first extension portion corresponds to the first common electrode, the second end of the first extension portion corresponds to the second common electrode, and the first common electrode is adjacent to the second common electrode;

[0014] Wherein, a first angle is formed between the first extension portion of the low-reflective metal layer and the first common electrode.

[0015] According to an embodiment of the present invention, the projection of the second extension portion on the substrate is located within the projection area of ​​the common electrode on the substrate.

[0016] According to an embodiment of the present invention, the cell substrate includes: a substrate and a color filter layer provided on a side of the substrate close to the array substrate, the color filter layer including a black matrix layer and a color resist layer provided between adjacent black matrix layers;

[0017] The array substrate further includes: a planarization layer and a pixel electrode, wherein the planarization layer is disposed on the thin film transistor device layer, and the pixel electrode is disposed on the planarization layer and electrically connected to the drain electrode;

[0018] The liquid crystal display panel further includes a first insulating layer, the first insulating layer is disposed on the planarization layer and the pixel electrode, and the common electrode is disposed on one side of the first insulating layer;

[0019] The low-reflection metal layer is arranged on a side of the first insulating layer close to or away from the substrate.

[0020] According to an embodiment of the present invention, the low-reflective metal layer is disposed on the common electrode and electrically connected to the common electrode, and the low-reflective metal layer is disposed corresponding to the gate of the thin film transistor.

[0021] According to an embodiment of the present invention, the cell-aligning substrate includes a substrate;

[0022] The array substrate further includes: a second insulating layer, a color resist layer, a planarization layer, a pixel electrode, and a dielectric layer, wherein the second insulating layer is disposed on the thin film transistor device layer, the color resist layer is disposed on the second insulating layer, the pixel electrode is disposed on the planarization layer, and the dielectric layer is disposed on the planarization layer;

[0023] The common electrode is arranged on a side of the dielectric layer away from the planarization layer, and the low-reflection metal layer is arranged on a side of the dielectric layer away from the planarization layer.

[0024] According to an embodiment of the present invention, the array substrate further includes a first insulating layer, and the first insulating layer is disposed on a side of the dielectric layer away from the planarization layer;

[0025] The common electrode is arranged on the first insulating layer, and the low-reflective metal layer is arranged on a side of the first insulating layer close to or away from the thin film transistor device layer.

[0026] Beneficial effects of the embodiments of the present invention: Compared with the prior art, the embodiments of the present invention provide a liquid crystal display panel, which includes a pair of box substrates, an array substrate, and a liquid crystal layer arranged between the pair of box substrates and the array substrate, and the array substrate includes a thin film transistor device layer and a common electrode patterned on the array substrate. The liquid crystal display panel also includes a low-reflection metal layer, which is arranged on the side of the gate away from the substrate, and the low-reflection metal layer is arranged corresponding to the common electrode in at least the first direction or the second direction. In the embodiment of the present application, by arranging a low-reflection metal layer on one side of the common electrode, the low-reflection metal layer can, on the one hand, act as a black matrix layer, and on the other hand, can optimize the shape of the electrode opening and improve the effect of the liquid crystal in the opening area, thereby improving the display effect of the liquid crystal display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1A schematic diagram of an electrode arrangement in a display panel provided in the prior art;

[0029] Figure 2 A schematic plan view of the electrode arrangement of the display panel provided in an embodiment of the present application;

[0030] Figure 3 A schematic plan view of a second display panel provided in an embodiment of the present application;

[0031] Figure 4 This is a schematic structural diagram of a low-reflective metal layer provided in an embodiment of the present application;

[0032] Figure 5 This is a schematic structural diagram of another low-reflection metal layer provided in an embodiment of the present application;

[0033] Figure 6 Schematic diagram of the effect of the low-reflection metal layer on liquid crystal provided in an embodiment of the present application;

[0034] Figure 7 This is a schematic diagram of a third arrangement of the low-reflective metal layer provided in an embodiment of the present application;

[0035] Figure 8 Schematic diagram of a cross-sectional film layer of the first display panel corresponding to the low-reflection metal layer in the AA' direction in the embodiment of the present application;

[0036] Figure 9 Schematic diagram of a cross-sectional film layer of the first display panel corresponding to the low-reflection metal layer in the BB' direction in the embodiment of the present application;

[0037] Figure 10 A schematic diagram of a cross-sectional film layer of a second display panel corresponding to the low-reflection metal layer provided in an embodiment of the present application in the AA' direction;

[0038] Figure 11 A schematic diagram of a cross-sectional film layer of a second display panel corresponding to the low-reflection metal layer provided in an embodiment of the present application in the BB' direction;

[0039] Figure 12 This is a schematic plan view of a third display panel provided in an embodiment of the present application;

[0040] Figure 13 Schematic diagram of a cross-sectional film layer of the third display panel provided in the embodiment of the present application along the AA' direction;

[0041] Figure 14 Schematic diagram of the cross-sectional film layer of the third display panel provided in the embodiment of the present application in the BB' direction

[0042] Figure 15Schematic diagram of a cross-sectional film layer of the fourth display panel provided in the embodiment of the present application along the AA' direction;

[0043] Figure 16 Schematic diagram of the cross-sectional film layer of the fourth display panel provided in the embodiment of the present application in the BB' direction

[0044] Figure 17 A schematic diagram of a cross-sectional film layer of a fifth display panel provided in an embodiment of the present application along the AA' direction;

[0045] Figure 18 Schematic diagram of the cross-sectional film layer of the fifth display panel provided in the embodiment of the present application in the BB' direction

[0046] Figure 19 Schematic diagram of a cross-sectional film layer of the sixth display panel provided in the embodiment of the present application along the AA' direction;

[0047] Figure 20 Schematic diagram of the cross-sectional film layer of the sixth display panel provided in the embodiment of the present application in the BB' direction

[0048] Figure 21 Schematic diagram of a cross-sectional film layer of the seventh display panel provided in the embodiment of the present application along the AA' direction;

[0049] Figure 22 Schematic diagram of the cross-sectional film layer of the seventh display panel provided in the embodiment of the present application in the BB' direction

[0050] Figure 23 Schematic diagram of a cross-sectional film layer of an eighth display panel provided in an embodiment of the present application along the AA' direction;

[0051] Figure 24 Schematic diagram of a cross-sectional film layer of the eighth display panel provided in the embodiment of the present application along the BB' direction. DETAILED DESCRIPTION

[0052] In the following detailed description, only certain embodiments of the present invention are shown and described simply by way of illustration. As those skilled in the art will appreciate, the embodiments described herein may be modified in various ways without departing from the spirit or scope of the present invention.

[0053] In the drawings, the thickness of layers, films, panels, regions, etc. may be exaggerated for clarity, better understanding, and ease of description. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present.

[0054] In addition, unless explicitly described to the contrary, the word "comprise" and its variations such as "comprising" or "containing" will be understood to imply the inclusion of the elements discussed but not necessarily the exclusion of other elements. Further, in the specification, the word "on..." refers to placement above or below an object part, and does not necessarily mean placement on the upper side of the object part based on the direction of gravity.

[0055] It will be understood that although the terms "first", "second", etc. may be used herein to describe various components, these components should not be limited by these terms. These components are only used to distinguish one component from another.

[0056] As used herein, the singular forms "a," "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0057] It will also be understood that the terms “comprises” and / or “comprising” used herein specify the presence of stated features or components, but do not preclude the presence or addition of one or more other features or components.

[0058] It will be understood that when a layer, region or component is referred to as being “formed on” another layer, region or component, it can be directly or indirectly formed on the other layer, region or component. For example, intervening layers, regions or components may be present.

[0059] In the following examples, the x-axis, y-axis, and z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other or can represent different directions that are not perpendicular to each other.

[0060] like Figure 1 As shown, Figure 1The present invention provides a schematic diagram of an electrode arrangement within a display panel according to the prior art. The display panel includes a common electrode 101. When the common electrode 101 is provided, it is typically configured as a mesh structure, such as being patterned in a first direction X and a second direction Y. In the following embodiments, the first direction X and the second direction Y intersect and form a certain angle. For example, the first direction X is horizontal, the second direction Y is vertical, and the first direction X and the second direction Y are at a right angle. Furthermore, the common electrode 101 is provided on a side of the array substrate adjacent to the display panel. In this way, the common electrodes intersect and form a plurality of electrode openings 20. When power is applied to the common electrode 101, the common electrode 101 generates an electric field in the region corresponding to the electrode openings 20, thereby driving the liquid crystal of the display panel to deflect. However, in the prior art, when the common electrode is used to drive the liquid crystal to deflect, the response speed of the liquid crystal is not ideal, especially in the corner regions corresponding to the electrode openings 20, where the response speed is slow, resulting in unevenness (mura) in the display panel and unsatisfactory display effects.

[0061] In an embodiment of the present application, a display panel is provided to effectively improve the problem of uneven display and unsatisfactory display effect of display panels prepared by the prior art.

[0062] like Figure 2 As shown, Figure 2 FIG1 is a plan view of the electrode arrangement of the display panel provided in the embodiment of the present application, wherein the display panel includes a common electrode 101 and a low-reflection metal layer 102 .

[0063] In the embodiment of the present application, the common electrode 101 is patterned in the first direction X, for example, the common electrode 101 is arranged at equal intervals in the first direction X. Correspondingly, the low-reflective metal layer 102 is at least arranged in the second direction Y. Optionally, the low-reflective metal layer 102 is patterned in the second direction Y, and the low-reflective metal layer 102 intersects with the common electrode 101 to define a plurality of electrode openings 20.

[0064] In the embodiment of the present application, when the low-reflection metal layer 102 is provided, the low-reflection metal layer 102 may be provided only in the second direction Y. At the same time, the low-reflection metal layer may also be provided in both the first direction X and the second direction Y. Figure 1 The planar arrangement diagram in FIG is a schematic diagram of the projection arrangement of the display panel in the vertical direction. Therefore, in this application, the low-reflective metal layer 102 can be provided on the array substrate, the color filter substrate, or both the color filter substrate and the array substrate. The following embodiments describe different situations respectively.

[0065] Furthermore, in the second direction Y, the low-reflection metal layer 102 can be arranged at equal intervals. When the low-reflection metal layer 102 is arranged in the first direction X, the low-reflection metal layer 102 is arranged corresponding to the common electrode 101, and the orthographic projection of the low-reflection metal layer 102 on the common electrode is located within the common electrode 101. That is, the width of the low-reflection metal layer 102 is less than or equal to the width of the common electrode 101.

[0066] See Figure 2 The low-reflective metal layer 102 has the same opening area as the multiple electrode openings 20 formed by the common electrode 101. Optionally, the width of the electrode opening 20 can be set to 1.5um to 2.5um, such as 1.8um or 2.2um. At this time, the angle between the first direction X and the second direction Y is a right angle. In the embodiment of the present application, the reflectivity of the low-reflective metal layer is set to less than 3%. In this way, the low-reflective metal layer 102 can also serve as a black matrix layer, thereby eliminating the black matrix layer of the display panel. This can not only control the deflection of the liquid crystal, but also simplify the panel structure. This further improves its performance.

[0067] Furthermore, the electrode opening 20 in the present application is composed of a low-reflection metal layer 102 and a common electrode 101. Therefore, the voltage on the common electrode 101 and the low-reflection metal 102 can be changed to further improve the deflection effect of the liquid crystal in the electrode opening 20 area, thereby improving the response speed and improving the problem of uneven display.

[0068] In an embodiment of the present application, when setting the electrode opening 20, the shape of the electrode opening includes any one of a rectangle, a quadrilateral, and a polygon. In an embodiment of the present application, the quadrilateral can be set to a parallelogram, and the number of sides of the polygon can be set according to different products. Correspondingly, the shape of the low-reflection metal layer can be set to be straight, a broken line, a sawtooth or other graphic structures.

[0069] like Figure 3 As shown, Figure 3 This is a schematic plan view of the second display panel provided in the embodiment of the present application. Figure 2 The arrangement structure in Figure 3 The electrode opening 20 formed by the low-reflective metal layer 102 and the common electrode 101 is configured as a parallelogram opening.

[0070] Specifically, when the low-reflective metal layer 102 is provided, a first angle α is formed between the side of the low-reflective metal layer 102 and the common electrode 101. Specifically, such as the adjacent first common electrode 1011 and the second common electrode 1012, wherein, within the electrode opening 20 formed by the low-reflective metal layer 102, the first common electrode 1011 and the second common electrode 1012, the low-reflective metal layer 102 forms a first angle α with the first common electrode, and the corresponding low-reflective metal layer 102 and the second common electrode 1012 also form another angle. When the first common electrode and the second common electrode are arranged in parallel, the sum of the first angle α and the other angle corresponding to the low-reflective metal layer is 180°. Therefore, in the following embodiments, only the first angle α is used as an example for explanation. In the embodiment of the present application, the first angle α is set to 135° to 180°. Optionally, the first angle α is set to 145°, 155°, 170°, or as required.

[0071] like Figure 4-Figure 5 As shown, Figure 4 Schematic diagram of the structure of the low-reflective metal layer provided in the embodiment of the present application, Figure 5 This is a schematic diagram of the structure of another low-reflection metal layer provided in an embodiment of the present application. Figure 3 In the structure of the embodiment of the present application, in the second direction Y, the low-reflection metal layer 102 is arranged in an array, and the reflective metal 102 has different extensions in the first direction X.

[0072] Specifically, the low-reflective metal layer 102 includes a first extension portion 1021 and a second extension portion 1022. The first extension portion 1021 and the second extension portion 1022 are alternately arranged to form the low-reflective metal layer 102. In the embodiment of the present application, the low-reflective metal layer 102 is configured as a zigzag structure, and the corresponding electrode opening 20 is configured as a quadrilateral shape.

[0073] The first extension portion 1021 is tilted relative to the first direction X, and the second extension portion 1022 is tilted relative to the second direction Y. The first extension portion 1021 and the second extension portion 1022 extend in different directions, and the corner where the first extension portion 1021 and the second extension portion 1022 connect is a right angle or an arc angle. Figure 4 In the example, the corner 1023 is set to a right angle, see Figure 5 In the embodiment, the corner 1023 is set to be arc-shaped. Specifically, the curvature of the arc-shaped corner 1023 can be set according to needs.

[0074] See Figure 3In the structure, when the low-reflection metal layer 102 is provided, the projection of the second extension portion 1022 of the low-reflection metal layer 102 on the substrate is at least partially located within the projection area of ​​the common electrode on the substrate, such as the projection of the second extension portion in the present application is completely located within the projection area of ​​the common electrode. And corresponding to the first extension portion 1021, the projection of the first extension portion 1021 simultaneously overlaps with the projection portions of the two adjacent common electrodes. That is, one end of the first extension portion corresponds to the first common electrode and is provided in the area above or below the first common electrode 1011. At the same time, the other end of the first extension portion 1021 corresponds to the second common electrode 1012 and is provided in the area above or below the second common electrode 1012. In this way, it is ensured that the first extension portion 1021 can intersect with both adjacent common electrodes, thereby forming the electrode opening 20 in the present application.

[0075] like Figure 6 As shown, Figure 6 Schematic diagram of the effect of the low-reflective metal layer on liquid crystal provided in an embodiment of the present application. Within the region corresponding to the quadrilateral electrode opening 20, the electric field direction formed by the common electrode is different on different sides. For example, on the left and right sides of the quadrilateral electrode opening 20, the liquid crystal electric field direction is a2, while on the upper and lower sides, the liquid crystal electric field direction is a1. When the common electrode is energized, the liquid crystal alignment direction is LL. After alignment is completed, the liquid crystal in the areas near the left and right sides deflects at an angle of α3 relative to the alignment direction, while the liquid crystal 333 in the upper and lower side attachment areas deflects at an angle of α2 relative to the alignment direction. That is, when the external electric field force is removed, the recovery angles of the liquid crystal 333 on different sides are also α2 and α3.

[0076] In the embodiment of the present application, since the electrode opening 20 is a quadrilateral opening, the low-reflective metal layer corresponding to the upper and lower sides of the electrode opening 20 forms a first angle with the common electrode. The first angle can effectively reduce the angle value of the deflection angle α2, thereby increasing the rate of liquid crystal recovery, thereby reducing the display problem of uneven display in different areas during display, and effectively improving the display effect of the panel.

[0077] like Figure 7 As shown, Figure 7 This is a schematic diagram of the third arrangement of the low-reflection metal layer provided in the embodiment of the present application. Figure 4 、 5 In the structure of the present application, in the embodiment, the low-reflection metal layer 102 is arranged in the first direction X and the second direction Y at the same time. Figure 2 、 Figure 3The structure is the same as in, and will not be repeated here. When the low-reflection metal layer 102 is provided in the first direction X, the low-reflection metal layer 102 is provided corresponding to the common electrode 101, and the low-reflection metal layer 102 is provided correspondingly in the projection area of ​​the common electrode 101 on the substrate, and is electrically connected to the low-reflection metal layer 102 in the second direction Y.

[0078] Further, Figure 8 : is a schematic diagram of a cross-sectional film layer of the first display panel corresponding to the low-reflection metal layer in the AA' direction in the embodiment of the present application, Figure 9 The cross-sectional film layer diagram of the first display panel corresponding to the low-reflection metal layer in the embodiment of the present application is shown in the BB' direction, wherein the cross-sectional line AA' is along the first direction X, and the cross-sectional line BB' is along the second direction Y.

[0079] See Figure 8 In combination Figure 2-Figure 3 , in the present application, the display panel includes an array substrate 50, a cell substrate 40, and a liquid crystal layer (not shown). Specifically, the array substrate 50 and the cell substrate 40 are arranged opposite each other, and the liquid crystal layer is arranged between the array substrate and the cell substrate 40. In the first embodiment, the cell substrate 40 is a color filter substrate.

[0080] Specifically, the color filter substrate formed by the pair of cell substrates 40 includes a substrate 401 and a color filter layer disposed on one side of the substrate 401 , and the color filter layer includes a black matrix layer 403 and a color resist layer 402 .

[0081] At the same time, the array substrate 50 is configured as a thin film transistor array substrate, which also includes a thin film transistor device layer. A plurality of thin film transistors 60 are arranged in the thin film transistor device layer. The thin film transistor 60 includes an active layer 601 , a source and drain electrode 602 , and a gate 603 .

[0082] Furthermore, the thin-film transistor device layer 80 of the array substrate 50 includes a substrate 501, a first dielectric layer 502, a second dielectric layer 503, and a thin-film transistor 60 disposed between the layers, which are stacked in sequence. The array substrate also includes a planarization layer 508, a pixel electrode 507, a third dielectric layer 505, and a first insulating layer 506. The aforementioned layers are stacked in sequence, with the gate electrode 603 disposed between the first dielectric layer 502 and the second dielectric layer 503, and the source and drain electrodes 602 disposed between the second dielectric layer 503 and the planarization layer 508. Thus, the planarization layer 508 is disposed on the thin-film transistor device layer, while the pixel electrode 507 is disposed on the planarization layer 508 and electrically connected to the drain electrodes of the thin-film transistors within the thin-film transistor device layer, thereby forming the array substrate provided in the embodiment of the present application.

[0083] In the embodiment of the present application, when the low-reflection metal layer 102 is provided, the low-reflection metal layer 102 is provided on a side of the first insulating layer 506 that is away from or close to the substrate 501 .

[0084] See Figure 7 In the embodiment, the common electrode 101 is provided on the side of the first insulating layer 506 of the array substrate away from the substrate, as shown in FIG. Figure 8 In the embodiment, the low-reflective metal layer 102 is disposed on the side of the first insulating layer 506 close to the substrate 501, and the first insulating layer 506 completely covers the low-reflective metal layer 102. In this case, the common electrode 101 and the low-reflective metal layer 102 are respectively disposed on either side of the first insulating layer 506. Optionally, based on product requirements, the common electrode can be disposed below the first insulating layer 506, and the corresponding low-reflective metal layer 102 can be disposed above the first insulating layer 506. In this case, the low-reflective metal layer 102 and the common electrode 101 are still located on either side of the first insulating layer 506.

[0085] Furthermore, when the low-reflection metal layer 102 is provided, the low-reflection metal layer 102 is provided corresponding to the gate 603 , and the width of the low-reflection metal layer 102 is greater than the width of the gate 603 .

[0086] In the embodiment of the present application, a low-reflective metal layer 102 is provided on the side of the thin-film transistor device layer of the array substrate away from the substrate. Since the low-reflective metal layer 102 has a low reflectivity, on the one hand, the low-reflective metal layer 102 can function as a traditional black matrix layer, and on the other hand, the low-reflective metal layer 102 works together with the common electrode 101 to effectively increase the response speed of the liquid crystal in the electrode opening 20 region, thereby effectively improving the uniformity of the panel display effect.

[0087] Further, such as Figure 10-11 As shown, Figure 10 A schematic diagram of a cross-sectional film layer of a second display panel corresponding to the low-reflection metal layer provided in an embodiment of the present application in the AA' direction; Figure 11 Schematic diagram of a cross-sectional film layer of the second display panel corresponding to the low-reflection metal layer provided in the embodiment of the present application in the BB' direction.

[0088] Combine Figure 8-Figure 9In the embodiment of the present application, when the low-reflection metal layer 102 is provided, the film layer structure of the display panel is not described in detail. The display panel includes a substrate 501, a first dielectric layer 502, a second dielectric layer 503, a planarization layer 508, a pixel electrode 507, and a third dielectric layer 505, which are stacked in sequence. The above film layers are stacked in sequence, and the gate 603 is provided between the first dielectric layer 502 and the second dielectric layer 503, and the source and drain electrodes 602 are provided between the second dielectric layer 503 and the planarization layer 508. In this way, the planarization layer 508 is provided on the thin film transistor device layer. At the same time, the pixel electrode 507 is provided on the planarization layer 508 and is electrically connected to the drain electrode of the thin film transistor in the thin film transistor device layer, thereby forming the array substrate provided in the embodiment of the present application.

[0089] Compared to Figure 8 、 Figure 9 In the display panel structure, the low-reflection metal layer 102 and the common electrode 101 are provided on the same layer. That is, the low-reflection metal layer 102 and the common electrode 101 are both provided on the third dielectric layer 505, and form Figure 2 、 Figure 3 The arrangement structure in which each different dielectric layer can be set as an insulating dielectric layer. And finally form the display panel provided in the embodiment of the present application.

[0090] At this time, by arranging the common electrode 101 and the low-reflection metal layer 102 in the same layer, the film structure is effectively simplified, and the response speed of the liquid crystal in the electrode opening 20 area is increased, thereby improving the consistency of the display effect in different areas.

[0091] like Figure 12 As shown, Figure 12 A schematic plan view of a third display panel provided in an embodiment of the present application, and Figure 13-14 As shown, Figure 13 Schematic diagram of a cross-sectional film layer of the third display panel provided in the embodiment of the present application in the AA' direction, Figure 14 Schematic diagram of a cross-sectional film layer of the third display panel provided in the embodiment of the present application along the BB' direction.

[0092] Combine Figures 8-10 In the structure of the embodiment of the present application, when the display panel is provided with a pair of cell substrates 40, the pair of cell substrates 40 includes a substrate 401 and a color resist layer 402 provided on a side of the substrate 401 close to the array substrate. Figure 8 、 Figure 10In the display panel, the cell substrate does not have a black matrix layer 403. Instead, the low-reflective metal layer 102 provided in the embodiment of the present application is directly provided in the array substrate to replace the black matrix layer in the cell substrate, thereby effectively simplifying the film structure while ensuring uniform display effect.

[0093] See Figure 12-13 In this case, since the display panel does not have a black matrix layer, the low-reflection metal layer 102 is disposed in both the first direction X and the second direction Y. In the first direction X, the low-reflection metal layer 102 is disposed above the data signal lines of the display panel, i.e., above the source and drain electrodes. In the second direction Y, the low-reflection metal layer 102 is disposed above the scanning signal lines, i.e., above the gate electrode 603. This effectively simplifies the film structure.

[0094] See Figure 13-14 In the embodiment, when the structure of the display panel is set, the display panel includes a thin film transistor device layer and a planarization layer 508, a third dielectric layer 505 and a first insulating layer 506 arranged on the thin film transistor device layer.

[0095] The common electrode 101 is disposed on a side of the first insulating layer 506 away from the thin film transistor device layer. Figure 14 In the embodiment, the low-reflective metal layer 102 is disposed on the side of the first insulating layer 506 close to the thin-film transistor device layer, for example, the low-reflective metal layer 102 is disposed between the third dielectric layer 505 and the first insulating layer 506. In this case, the common electrode 101 is disposed above the first insulating layer 506, and the low-reflective metal layer 102 is disposed below the first insulating layer. In this way, the common electrode 101 and the reflective electrode layer are disposed on opposite sides of the same film layer.

[0096] Further, such as Figure 15-16 As shown, Figure 15 Schematic diagram of a cross-sectional film layer of the fourth display panel provided in the embodiment of the present application in the AA' direction, Figure 16 This is a schematic diagram of a cross-sectional film layer of the fourth display panel provided in the embodiment of the present application along the BB' direction, in combination with other schematic diagrams of the display panel.

[0097] Relative to Figure 13-14 In the film structure, in the embodiment of the present application, the display panel omits the first insulating layer 506, and when the low-reflection metal layer 102 and the common electrode 101 are provided, the low-reflection metal layer 102 is provided on the third dielectric layer 505. At the same time, since in this embodiment, the low-reflection metal layer 102 is provided in both the first direction and the second direction, see Figure 15In the first direction X, the low-reflection metal layer 102 is patterned, and the common electrode 101 is disposed on the low-reflection metal layer 102 and completely covers the low-reflection metal layer 102. Thus, while ensuring the display effect of the display panel, the black matrix layer in the display panel is omitted, thereby improving the performance of the panel.

[0098] like Figure 17-18 middle, Figure 17 This is a schematic diagram of a cross-sectional film layer of the fifth display panel provided in an embodiment of the present application along the AA' direction. Figure 18 Schematic diagram of a cross-sectional film layer of the fifth display panel provided in the embodiment of the present application along the BB' direction.

[0099] In combination with the above-mentioned other film layer structures, in the embodiment of the present application, when the display panel is provided, the display panel includes a thin film transistor device layer 80, a second insulating layer 504 provided on the thin film transistor device layer 80, and a third dielectric layer 505 provided on the second insulating layer 504. Figure 17 In the structure, the low-reflection metal layer 102 is provided in both the first direction X and the second direction Y. In the first direction X, the common electrode 101 is provided on the third dielectric layer 505. At the same time, the low-reflection metal layer 102 is provided corresponding to the common electrode 101 and is provided on the common electrode 101. Figure 18 In the structure, the low-reflection metal layer 102 is disposed on the third dielectric layer 505 in the second direction Y. Thus, the low-reflection metal layer 102 extending in the first direction X intersects with the common electrode 101 and defines a plurality of electrode openings. The shapes of the formed electrode openings are configured according to the structure provided in the embodiments of the present application, thereby reducing the liquid crystal deflection angle in the electrode opening region and improving its response speed.

[0100] like Figure 19-20 As shown, Figure 19 Schematic diagram of a cross-sectional film layer of the sixth display panel provided in the embodiment of the present application in the AA' direction, Figure 20 This is a schematic diagram of the cross-section of the film layers of the sixth display panel provided in the embodiment of the present application in the BB' direction. Combined with the other figures above and their corresponding panel structures, in this embodiment, compared with the above display panels, this display panel is set as a COA (Color Filter on Array) display panel.

[0101] At this time, the box substrate 40 of the display panel includes a substrate 401, and when the array substrate 50 is set, it includes a thin film transistor device layer 80 and a second insulating layer 504 arranged on the thin film transistor device layer 80, a color resist layer 402 arranged on the second insulating layer 504, a planarization layer 508 arranged on the color resist layer 402, a pixel electrode 507 arranged on the planarization layer 508, a third dielectric layer 505 arranged on the planarization layer 508 and covering the pixel electrode 507, and a first insulating layer 506 arranged on the third dielectric layer 505.

[0102] In the embodiment of the present application, since the color resist layer 402 is directly disposed on one side of the array substrate, the polarizer layer in the color filter layer corresponding to the cell substrate can be omitted, thereby improving the structure of the panel and eliminating the black matrix layer structure.

[0103] In the embodiment of the present application, when the common electrode and the low-reflection metal layer are provided, both the common electrode and the low-reflection metal layer are provided on a side of the dielectric layer away from the planarization.

[0104] Specifically, when providing the common electrode 101 and the low-reflective metal layer 102 in the embodiment of the present application, the low-reflective metal layer 102 is provided in both the first direction X and the second direction Y, and serves as a shield for the black matrix layer. Furthermore, in the first direction X, the common electrode 101 is provided on the first insulating layer 506. In both the first direction X and the second direction Y, the low-reflective metal layer 102 is provided on the side of the first insulating layer 506 that is close to the thin-film transistor device layer 80. In this case, the common electrode 101 and the low-reflective metal layer 102 are provided on either side of the first insulating layer 506, respectively.

[0105] Furthermore, when the low-reflection metal layer 102 is provided, the low-reflection metal layer 102 is provided corresponding to the gate electrode 603 at the bottom.

[0106] Furthermore, for the COA display panel, the relative position relationship between the low-reflection metal layer and the common electrode can be changed as in a conventional display panel to further improve the panel structure and performance. Figure 21-22 , Figure 21 Schematic diagram of a cross-sectional film layer of the seventh display panel provided in the embodiment of the present application along the AA' direction, Figure 22 Schematic diagram of a cross-sectional film layer of the seventh display panel provided in the embodiment of the present application along the BB' direction.

[0107] relatively Figure 19-20 In the film layer structure, in the present application, the positions of the low-reflection metal layer 102 and the common electrode are changed, and the first insulating layer 506 of the display panel is omitted, so that the common electrode 101 is directly set on the low-reflection metal layer 102.

[0108] Specifically, in the first direction corresponding to the cross-section line AA', the low-reflective metal layer 102 is patterned and disposed on the third dielectric layer 505, while the common electrode 101 is disposed on the third dielectric layer 505 and covers the low-reflective metal layer 102. In the second direction corresponding to the cross-section line BB', the low-reflective metal layer 102 is disposed on the third dielectric layer 505. In this case, the low-reflective metal layer 102 and the common electrode 101 are both disposed on the third dielectric layer, and the low-reflective metal layer 102 is disposed at a corresponding position below the common electrode 101. This further improves the electric field magnitude at the electrode opening region formed by the two metal layers, thereby optimizing the deflection angle of the liquid crystal and improving the consistency of the panel display effect. This forms the display panel provided in the embodiments of the present application.

[0109] Further, such as Figure 23-24 , Figure 23 Schematic diagram of a cross-sectional film layer of the eighth display panel provided in the embodiment of the present application in the AA' direction, Figure 24 Schematic diagram of a cross-sectional film layer of the eighth display panel provided in the embodiment of the present application along the BB' direction.

[0110] In the embodiment of the present application, the relative positions of the low-reflection metal layer 102 and the common electrode 101 are further changed. Figure 23 In the film layer structure, the low-reflective metal layer 102 is directly disposed on the common electrode 101. As shown in the figure, the common electrode 101 is disposed on the third dielectric layer 505. At the same time, the low-reflective metal layer 102 is correspondingly disposed on the common electrode 101 and electrically connected thereto. At the same time, the low-reflective metal layer 102 in the second direction Y is disposed on the third dielectric layer 505, thereby forming the panel structure in the embodiment of the present application. In the embodiment of the present application, by disposing the low-reflective metal layer 102 on the common electrode 101 in the COA panel to replace the black matrix layer, the film layer structure of the panel is simplified, and the performance of the display panel is improved.

[0111] Furthermore, an embodiment of the present application also provides a display device, wherein the display device includes a liquid crystal display panel provided in the present application. By providing a low-reflection metal layer on one side of the array substrate of the display panel, on the one hand, the low-reflection metal layer can replace the traditional black matrix layer, and on the other hand, the electrode opening formed by the low-reflection metal layer and the common electrode, and the liquid crystal deflection angle in the electrode opening area is small, and the response speed is faster, thereby effectively ensuring the consistency of the display effect in different areas. In the embodiment of the present application, the liquid crystal display panel and device can be applied to any product or component with display function or other functions, such as mobile phones, computers, electronic paper, monitors, wearable devices, etc., and its specific type is not specifically limited.

[0112] To sum up, the above is a detailed introduction to a liquid crystal display panel provided by an embodiment of the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the technical solution and core ideas of the present invention; although the present invention is disclosed as above in preferred embodiments, the above preferred embodiments are not used to limit the present invention. Ordinary technicians in this field can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention is based on the scope defined by the claims.

Claims

1. A liquid crystal display panel, characterized in that: include: An array substrate and a cell substrate that are arranged opposite to each other, and a liquid crystal layer arranged between the array substrate and the cell substrate; The array substrate comprises: a substrate, a thin film transistor device layer, and a common electrode arranged on a side of the thin film transistor device layer close to the cell substrate, and the common electrode is patterned in a first direction of the array substrate; A low-reflective metal layer is disposed between the thin-film transistor device layer and the common electrode, and the low-reflective metal layer is disposed at least in a corresponding manner in a second direction and intersects with the common electrode to form a plurality of electrode openings, wherein the low-reflective metal layer includes a first extension portion and a second extension portion, the first extension portion and the second extension portion being alternately connected in sequence, the first extension portion being arranged obliquely relative to the first direction, a first end of the first extension portion corresponding to the first common electrode, a second end of the first extension portion corresponding to the second common electrode, and the first common electrode and the second common electrode being adjacent to each other, wherein a first angle is formed between the first extension portion of the low-reflective metal layer and the first common electrode; the second extension portion is disposed obliquely relative to the second direction, a projection of the second extension portion on the substrate at least partially located within a projection area of ​​the common electrode on the substrate, and a corner where the first extension portion and the second extension portion connect is configured as a right angle or an arc, the first direction is an X direction, the second direction is a Y direction, and an angle is formed between the first direction and the second direction.

2. The liquid crystal display panel according to claim 1, wherein In the first direction, the low-reflection metal layer is arranged corresponding to the common electrode, and the electrode opening corresponds to the color resist layer of the liquid crystal display panel.

3. The liquid crystal display panel according to claim 1, wherein The shape of the electrode opening is set to be any one of a rectangle, a parallelogram, and a polygon.

4. The liquid crystal display panel according to claim 1, wherein The cell substrate includes: a substrate and a color filter layer provided on a side of the substrate close to the array substrate, the color filter layer includes a black matrix layer and a color resist layer provided between adjacent black matrix layers; The array substrate further includes: a planarization layer and a pixel electrode, wherein the planarization layer is disposed on the thin film transistor device layer, and the pixel electrode is disposed on the planarization layer and electrically connected to the drain electrode; The liquid crystal display panel further includes a first insulating layer, the first insulating layer is disposed on the planarization layer and the pixel electrode, and the common electrode is disposed on one side of the first insulating layer; The low-reflection metal layer is arranged on a side of the first insulating layer close to or away from the substrate.

5. The liquid crystal display panel according to claim 1, wherein The cell-matching substrate includes a substrate; The array substrate further includes: a second insulating layer, a color resist layer, a planarization layer, a pixel electrode, and a dielectric layer, wherein the second insulating layer is disposed on the thin film transistor device layer, the color resist layer is disposed on the second insulating layer, the pixel electrode is disposed on the planarization layer, and the dielectric layer is disposed on the planarization layer; The common electrode is arranged on a side of the dielectric layer away from the planarization layer, and the low-reflection metal layer is arranged on a side of the dielectric layer away from the planarization layer.

6. The liquid crystal display panel according to claim 5, wherein: The array substrate further includes a first insulating layer, which is arranged on a side of the dielectric layer away from the planarization layer; The common electrode is arranged on the first insulating layer, and the low-reflective metal layer is arranged on a side of the first insulating layer close to the thin film transistor device layer.

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