On-chip training method of in-memory computing memory artificial neural network

By introducing the probabilistic three-value update rule (PBTL), the problems of gradient instability and high hardware storage requirements in artificial neural network training are solved, achieving efficient and accurate on-chip training and optimizing hardware design.

CN117610636BActive Publication Date: 2026-06-26SEMICON TECH INNOVATION CENT(BEIJING) CORP +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SEMICON TECH INNOVATION CENT(BEIJING) CORP
Filing Date
2023-11-24
Publication Date
2026-06-26

AI Technical Summary

Technical Problem

In existing technologies, the training process of artificial neural networks suffers from problems such as unstable gradient calculation, decreased convergence, and high hardware storage requirements. In particular, the need for high-precision weight update values ​​in on-chip training adds additional hardware pressure.

Method used

We employ a probability-based three-value update rule (PBTL) to transform high-precision weight updates into three-value updates. Combined with the Manhattan rule, we perform weight updates through in-memory computation memory, reducing the number of operations and optimizing the training process.

Benefits of technology

It improves training efficiency and accuracy, reduces hardware overhead, and enables a fast and stable training process, suitable for on-chip stochastic gradient descent and mini-batch gradient descent algorithms.

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Abstract

The application provides an on-chip training method of an in-memory computing memory artificial neural network, and belongs to the field of artificial neural network algorithm optimization.The application follows the Manhattan rule idea, introduces a probability-based ternary update rule, converts high-precision weight update in an ideal classical error back propagation algorithm BP algorithm into ternary weight update, only applies at most one programming pulse to one device in each training batch, reduces the operation times, the training method converges fast and is stable, the recognition accuracy is high after training, the original BP algorithm is slightly changed, and the performance exceeds the Manhattan and threshold-Manhattan rules from the algorithm perspective;The application can efficiently realize on-chip stochastic gradient descent SGD and mini-batch gradient descent MBGD, does not need to store high-precision weight update values, reduces the additional hardware overhead, and optimizes the design of the inference circuit.
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