A packaging method for improving reliability of PoP packaging and a packaging structure thereof
Vertical interconnects are formed by laser drilling and plastic encapsulation thinning, combined with plastic encapsulation layer wrapping, which solves the problems of moisture ingress and thermal expansion coefficient mismatch in PoP packaging, thereby improving packaging reliability and reducing size.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHIPMOS TECHNOLOGIES (SHANGHAI) LTD
- Filing Date
- 2023-12-11
- Publication Date
- 2026-05-29
AI Technical Summary
In existing PoP packaging, the exposed metal balls and substrate are prone to moisture ingress, leading to circuit corrosion and package delamination. The mismatch in thermal expansion coefficients makes the package susceptible to cracking under thermal shock, affecting reliability.
Vertical interconnects are formed by using laser drilling and plastic encapsulation thinning technology. The gap between the upper and lower substrates and the metal balls are wrapped with plastic encapsulation layer. The electrical connection is made by using solder balls or copper core balls. The encapsulation layer is used to wrap the packaging structure to enhance the resistance to thermal shock and corrosion.
It improves the reliability of the packaging, reduces the packaging size, increases the integration, shortens the transmission path, effectively prevents moisture from entering, and enhances the packaging's resistance to corrosion and thermal shock.
Smart Images

Figure CN117650064B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chip packaging technology, specifically to a packaging method and packaging structure for improving the reliability of PoP packaging. Background Technology
[0002] Currently, traditional PoP (Point of Purchase) packaging vertically interconnects the upper and lower package bodies via flip-chip reflow. However, with increasing integration, this has evolved into the introduction of advanced packaging technologies. For example... Figure 7 As shown, this has led to the development of vertical interconnects towards copper pillars. However, after the entire PoP packaging process is completed, the substrate of the upper package is exposed, making it easy for external moisture to enter. The exposed vertical interconnect metal balls also make the upper and lower packages prone to delamination, leading to reliability issues such as circuit corrosion. Furthermore, the different structures of the upper and lower packages make it difficult to match their coefficients of thermal expansion (CTE), making them prone to splitting after thermal shock. Summary of the Invention
[0003] To overcome the shortcomings of the prior art, this invention provides a packaging method and packaging structure that improves the reliability of PoP packaging.
[0004] To achieve the above objectives, a packaging method for improving the reliability of PoP packaging is designed, comprising the following steps:
[0005] S1, The first chip is mounted on the front side of the upper substrate;
[0006] S2, Molding the front side of the upper substrate;
[0007] S3, several first metal balls are implanted on the back side of the upper substrate;
[0008] S4, Divide and dice to form an upper package body, the length and width of the upper package body are smaller than the length and width of the final package body;
[0009] S5, several second metal balls are implanted on the front side of the lower substrate;
[0010] S6, the second chip is mounted on the front side of the lower substrate;
[0011] S7, Molding is performed on the front side of the lower substrate, and the molding thickness is greater than the height of the second metal ball;
[0012] S8, using laser drilling or plastic encapsulation thinning methods to expose the surface of the second metal ball, forming the lower package;
[0013] S9, the upper package is connected to the lower package through a flip-chip reflow process, and the first metal ball and the second metal ball are vertically interconnected to form an electrical connection;
[0014] S10, the lower substrate is grooved using a laser;
[0015] S11, plastic encapsulation, which encapsulates the upper substrate, the gap between the upper and lower substrates, and the groove on the lower substrate;
[0016] S12, several third metal balls are implanted on the back side of the lower substrate;
[0017] S13, dicing, forming the final package.
[0018] In step S4, the length or width of the upper substrate recess is greater than 100 μm.
[0019] In step S7, the difference between the encapsulation thickness and the height of the second metal ball is 50±10um.
[0020] The first and second metal balls are made of tin or copper.
[0021] The upper substrate and the first chip, and the lower substrate and the second chip are electrically connected by wire bonding or FC mounting.
[0022] A packaging structure for improving the reliability of PoP packaging includes an upper substrate and a lower substrate. A first chip is provided on the front side of the upper substrate, and a plurality of first metal balls are provided on the back side of the upper substrate. A second chip and a plurality of second metal balls are provided on the front side of the lower substrate. The second metal balls are vertically interconnected with the first metal balls. A plurality of third metal balls are provided on the back side of the lower substrate. The length and width of the upper substrate are both smaller than those of the lower substrate, and the upper substrate is recessed by more than 50 μm on one side compared to the lower substrate.
[0023] The upper substrate has a first molding layer on its front side, the lower substrate has a second molding layer on its front side, and the package formed by the upper and lower substrates has a third molding layer on its outer side. The third molding layer covers the recessed part of the upper substrate and the gap between the upper and lower substrates.
[0024] The lower substrate has a groove on its front side, and the third molding layer fills the groove.
[0025] The first chip and the upper substrate, and the second chip and the lower substrate, are electrically connected by bonding wires or solder balls.
[0026] Compared with existing technologies, this invention transforms the packaging structure from two-dimensional to three-dimensional, resulting in smaller package size, higher integration, and shorter transmission paths. The molding compound effectively improves the reliability of the packaged chip by addressing the gaps in flip-chip reflow, filling the lower substrate grooves, and encapsulating the upper substrate. Attached Figure Description
[0027] Figure 1 This is a schematic diagram of the substrate of the present invention.
[0028] Figure 2 This is a schematic diagram of the lower substrate of the present invention. Figure 1 .
[0029] Figure 3 This is a schematic diagram of the lower substrate of the present invention. Figure 2 .
[0030] Figure 4 This is a schematic diagram of the packaging structure of the present invention.
[0031] Figure 5 This is a schematic diagram of step S8, laser drilling, of the present invention.
[0032] Figure 6 This is a schematic diagram of step S8, grinding and thinning, of the present invention.
[0033] Figure 7 This is a schematic diagram of an existing pop-up wrapper. Implementation
[0034] The present invention will now be further described with reference to the accompanying drawings.
[0035] like Figures 1 to 6 As shown, this embodiment provides a packaging method to improve the reliability of PoP packaging, including the following steps:
[0036] S1, the first chip 2 is mounted on the front side of the upper substrate 1;
[0037] S2, perform molding on the front side of the upper substrate 1;
[0038] S3, several first metal balls 3 are implanted on the back side of the upper substrate 1;
[0039] S4, Divide and dice to form an upper package body, the length and width of the upper package body are smaller than the length and width of the final package body;
[0040] S5, several second metal balls 6 are implanted on the front side of the lower substrate 5;
[0041] S6, the second chip 7 is mounted on the front side of the lower substrate 5;
[0042] S7, Molding is performed on the front side of the lower substrate 5, and the molding thickness is greater than the height of the second metal ball 6;
[0043] S8. The second metal ball 6 is exposed by laser drilling or plastic encapsulation thinning to form the lower package.
[0044] S9, the upper package is connected to the lower package through a flip-chip reflow process, and the first metal ball 3 and the second metal ball 6 are vertically interconnected to form an electrical connection;
[0045] S10, the lower substrate 5 is grooved by laser;
[0046] S11, plastic encapsulation, which encapsulates the upper substrate 1, the gap between the upper substrate 1 and the lower substrate 5, and the groove on the lower substrate 5;
[0047] S12, several third metal balls 9 are implanted on the back side of the lower substrate 5;
[0048] S13, dicing, forming the final package.
[0049] In step S4, the length or width of the upper substrate 1 is recessed by more than 100um, so that the upper substrate 1 is recessed by more than 50um on one side relative to the length and width of the lower substrate 5. With the cooperation of the third molding layer 10, the side of the upper substrate 1 is completely wrapped to block moisture.
[0050] In step S7, the difference between the encapsulation thickness and the height of the second metal ball 6 is 50±10um.
[0051] In step S11 of this embodiment, the lower substrate 5 is grooved and filled to increase the interfacial bonding force and effectively block moisture.
[0052] The first metal ball 3 and the second metal ball 6 are made of tin or copper.
[0053] like Figures 1 to 3 As shown, electrical connections are formed between the upper substrate 1 and the first chip 2, and between the lower substrate 5 and the second chip 7, through wire bonding or FC mounting. Figure 2 The lower substrate 5 and the second chip 7 are electrically connected by wire bonding. Figure 3 The lower substrate 5 and the second chip 7 are electrically connected by FC mounting.
[0054] like Figure 6 As shown, the packaging structure for improving the reliability of PoP packaging obtained in this embodiment includes an upper substrate 1 and a lower substrate 5. The upper substrate 1 has a first chip 2 on its front side and a plurality of first metal balls 3 on its back side. The lower substrate 5 has a second chip 7 and a plurality of second metal balls 6 on its front side. The second metal balls 6 are vertically interconnected with the first metal balls 3. The lower substrate 5 has a plurality of third metal balls 9 on its back side. The upper substrate 1 is shorter and narrower than the lower substrate 5. The upper substrate 1 is recessed by more than 50 μm on one side compared to the lower substrate 5.
[0055] The upper substrate 1 has a first molding layer 4 on its front side, the lower substrate 5 has a second molding layer 8 on its front side, and the package formed by the upper substrate 1 and the lower substrate 5 has a third molding layer 10 on its outer side. The third molding layer 10 covers the recess of the upper substrate 1 and the gap between the upper substrate 1 and the lower substrate 5.
[0056] The lower substrate 5 has a groove on its front side, and the third molding layer 10 fills the groove.
[0057] The first chip 2 and the upper substrate 1, and the second chip 7 and the lower substrate 5 are electrically connected by bonding wires 11 or solder balls 12.
[0058] The first molding layer 4 and the second molding layer 8 completely encapsulate the packaging structure at the upper substrate 1 and the lower substrate 5, respectively, improving the resistance to thermal shock and enhancing reliability. The third molding layer 10 encapsulates the first and second interconnected metal balls, preventing them from being exposed and enhancing corrosion resistance.
[0059] In this embodiment, the thickness of the upper substrate 1 is generally 150 μm, the thickness of the first chip 2 is generally 150 μm, the first chip is connected to the upper substrate 1 via a DAF film with a thickness of 10 μm, the arc height of the bonding wire 12 is generally 50 μm, and the thickness of the first molding compound 4 is approximately 400 μm. Therefore, the total thickness of the upper package, including the first metal ball, is approximately 700 μm. The thickness of the lower substrate 5 is generally 260 μm, the thickness of the second chip 6 is generally 150 μm, and the thickness of the second molding compound 8 is approximately 250 μm. Therefore, the total thickness of the lower package, including the third metal ball, is approximately 700 μm. Thus, in this embodiment, the overall PoP package thickness is controlled to approximately 1.4 mm.
Claims
1. A packaging method for improving the reliability of PoP packaging, characterized in that: Includes the following steps: S1, the first chip (2) is mounted on the front side of the upper substrate (1). S2, perform plastic sealing on the front side of the upper substrate (1); S3, several first metal balls (3) are implanted on the back side of the upper substrate (1). S4, Divide and dice to form an upper package body, the length and width of the upper package body are smaller than the length and width of the final package body; S5, several second metal balls (6) are implanted on the front side of the lower substrate (5). S6, the second chip (7) is mounted on the front side of the lower substrate (5); S7, Molding is performed on the front side of the lower substrate (5), and the molding thickness is greater than the height of the second metal ball (6); S8, using laser drilling or plastic encapsulation to expose the surface of the second metal ball (6) to form the lower package; S9, the upper package is connected to the lower package through a flip-chip reflow process, and the first metal ball (3) and the second metal ball (6) are vertically interconnected to form an electrical connection; S10, a groove (13) is made on the lower substrate (5) by laser. S11, plastic encapsulation, wrapping the upper substrate (1), the gap between the upper substrate (1) and the lower substrate (5), and the groove (13) on the lower substrate (5). S12, several third metal balls (9) are implanted on the back side of the lower substrate (5). S13, dicing, forming the final package.
2. The packaging method for improving the reliability of PoP packaging according to claim 1, characterized in that: In step S4, the length or width of the upper substrate (1) is greater than 100 μm.
3. The packaging method for improving the reliability of PoP packaging according to claim 1, characterized in that: In step S7, the difference between the encapsulation thickness and the height of the second metal ball (6) is 50±10um.
4. The packaging method for improving the reliability of PoP packaging according to claim 1, characterized in that: The first metal ball (3) and the second metal ball (6) are selected from tin balls or copper core balls.
5. A packaging method for improving the reliability of PoP packaging according to claim 1, characterized in that: The upper substrate (1) and the first chip (2) and the lower substrate (5) and the second chip (7) are electrically connected by wire bonding or FC mounting.
6. The structure of the packaging method for improving the reliability of PoP packaging according to any one of claims 1-5, characterized in that: The upper substrate (1) and the lower substrate (5) are provided. The upper substrate (1) has a first chip (2) on its front side and a number of first metal balls (3) on its back side. The lower substrate (5) has a second chip (7) and a number of second metal balls (6) on its front side. The second metal balls (6) are vertically interconnected with the first metal balls (3). The lower substrate (5) has a number of third metal balls (9) on its back side. The upper substrate (1) is shorter and wider than the lower substrate (5). The upper substrate (1) is recessed by more than 50 μm on one side compared to the lower substrate (5).
7. The structure of the packaging method for improving the reliability of PoP packaging according to claim 6, characterized in that: The upper substrate (1) has a first molding layer (4) on its front side, the lower substrate (5) has a second molding layer (8) on its front side, and the package formed by the upper substrate (1) and the lower substrate (5) has a third molding layer (10) on its outer side. The third molding layer (10) covers the recess of the upper substrate (1) and the gap between the upper substrate (1) and the lower substrate (5).
8. The structure of the packaging method for improving the reliability of PoP packaging according to claim 6, characterized in that: The lower substrate (5) has a groove (13) on its front side, and the third molding layer (10) fills the groove (13).
9. The structure of the packaging method for improving the reliability of PoP packaging according to claim 6, characterized in that: The first chip (2) and the upper substrate (1) and the second chip (7) and the lower substrate (5) are electrically connected by bonding wires (11) or solder balls (12).