Display control circuit, display control method, and electronic device

Abstract

The application discloses a display control circuit, a display control method and an electronic device, and belongs to the technical field of display. The display control circuit comprises a system chip, a discrete graphics chip, a first switch, a second switch, a third switch and a fourth switch. The system chip is connected with the discrete graphics chip. The discrete graphics chip is used for performing first processing on the content transmitted by the system chip. The system chip is used for controlling the connection state of the first switch, the second switch, the third switch and the fourth switch according to the folding state between the first sub-screen and the second sub-screen, so that the first sub-screen or the second sub-screen displays the content output after the first processing of the discrete graphics chip.

Description

Technical Field

[0001] This application belongs to the field of display technology, specifically relating to a display control circuit, a display control method, and an electronic device. Background Technology

[0002] Currently, most System-on-Chips (SoCs) only support two Display Serial Interfaces (DSIs), such as DSI0 and DSI1. Taking a foldable screen as an example, the main and secondary screens each occupy one DSI interface to transmit display data. When the foldable screen is closed, only the secondary screen is displayed, and DSI1 is sufficient for data transmission. When the foldable screen is unfolded, if both screens need to be displayed simultaneously, both DSI0 and DSI1 need to transmit data. If only a single screen is displayed, only the corresponding DSI interface needs to be activated.

[0003] However, the aforementioned display shows data output by the SoC, which can easily lead to poor display quality. Summary of the Invention

[0004] The purpose of this application is to provide a display control circuit, display control method, and electronic device that can solve the problem of poor display effect in existing systems.

[0005] In a first aspect, embodiments of this application provide a display control circuit, including a system-on-a-chip, a discrete graphics chip, a first switch, a second switch, a third switch, and a fourth switch;

[0006] The system-on-a-chip (SoC) is connected to the discrete graphics chip. The first interface of the discrete graphics chip is connected to the fixed terminal of the first switch. The first selection terminal of the first switch is connected to the first sub-screen of the display screen. The second selection terminal of the first switch is connected to the first selection terminal of the second switch. The fixed terminal of the second switch is connected to the second sub-screen of the display screen. The second selection terminal of the second switch is connected to the second interface of the SoC. The third interface of the discrete graphics chip is connected to the fixed terminal of the third switch. The first selection terminal of the third switch is connected to the first sub-screen. The second selection terminal of the third switch is connected to the first selection terminal of the fourth switch. The fixed terminal of the fourth switch is connected to the second sub-screen. The second selection terminal of the fourth switch is connected to the fourth interface of the SoC.

[0007] The discrete graphics chip is used to perform a first processing on the content transmitted by the system-on-a-chip. The system-on-a-chip is used to control the connection state of the first switch, the second switch, the third switch and the fourth switch according to the folding state between the first sub-screen and the second sub-screen, so that the first sub-screen or the second sub-screen displays the content output by the discrete graphics chip after the first processing.

[0008] Secondly, embodiments of this application provide a display control method applied to a system-on-a-chip in the display control circuit provided in the first aspect, the method comprising:

[0009] Based on the folding state between the first sub-screen and the second sub-screen, the connection state of the first switch, the second switch, the third switch, and the fourth switch is controlled so that the first sub-screen or the second sub-screen displays the content output by the discrete graphics chip after the first processing.

[0010] Thirdly, embodiments of this application provide an electronic device including a processor and a memory, the memory storing programs or instructions executable on the processor, the programs or instructions, when executed by the processor, implementing the steps of the method described in the second aspect.

[0011] Fourthly, embodiments of this application provide a readable storage medium on which a program or instructions are stored, which, when executed by a processor, implement the steps of the method described in the second aspect.

[0012] Fifthly, embodiments of this application provide a computer program product stored in a storage medium, which is executed by at least one processor to implement the method described in the second aspect.

[0013] The display control circuit includes a discrete graphics chip that performs initial processing on the content transmitted by the system-on-a-chip. The system-on-a-chip can control the connection status of the first, second, third, and fourth switches based on the folding state between the first and second sub-screens. It can select a sub-screen from the first and second sub-screens to display the content output by the discrete graphics chip after initial processing, based on the connection status of the first, second, third, and fourth switches. The display effect can be improved by displaying the content output by the discrete graphics chip after initial processing on either the first or second sub-screen. Attached Figure Description

[0014] Figure 1 This is one of the structural diagrams of the display control circuit provided in the embodiments of this application;

[0015] Figure 2 This is a second structural diagram of the display control circuit provided in the embodiments of this application;

[0016] Figure 3 This is a display screen state transition diagram provided in an embodiment of this application;

[0017] Figure 4 This is a flowchart of the display control circuit method provided in the embodiments of this application;

[0018] Figure 5 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0019] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0020] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0021] The display control circuit provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0022] like Figure 1 As shown, this application provides a display control circuit 100 according to an embodiment, including a system-on-a-chip 101, a discrete graphics chip 102, a first switch TE SW_1, a second switch TE SW_2, a third switch MIPI SW_1, and a fourth switch MIPI SW_2;

[0023] The system-on-a-chip 101 is connected to the discrete graphics chip 102. The first interface of the discrete graphics chip 102 is connected to the fixed end of the first switch TESW_1. The first selection end of the first switch TESW_1 is connected to the first sub-screen 103 of the display screen. The second selection end of the first switch TESW_1 is connected to the first selection end of the second switch TESW_2. The fixed end of the second switch TESW_2 is connected to the second sub-screen 104 of the display screen. The second selection end of the second switch TESW_2 is connected to the second interface of the system-on-a-chip 101. The third interface of the discrete graphics chip 102 is connected to the fixed end of the third switch mipi SW_1. The first selection end of the third switch mipi SW_1 is connected to the first sub-screen 103. The second selection end of the third switch mipi SW_1 is connected to the first selection end of the fourth switch mipi SW_2. The fixed end of the fourth switch mipi SW_2 is connected to the second sub-screen 104. The second selection end of the fourth switch mipi SW_2 is connected to the fourth interface of the system-on-a-chip 101.

[0024] The discrete graphics chip 102 is used to perform a first processing on the content transmitted by the system-on-a-chip 101. The system-on-a-chip 101 is used to control the connection status of the first switch TE SW_1, the second switch TE SW_2, the third switch mipi SW_1, and the fourth switch mipi SW_2 according to the folding state between the first sub-screen 103 and the second sub-screen 104, so that the first sub-screen 103 or the second sub-screen 104 displays the content output by the discrete graphics chip 102 after the first processing.

[0025] The dedicated display chip (discrete graphics chip 102), as an external dedicated image processing unit, can bring display enhancement effects such as higher frame rate, higher resolution, higher color saturation, and higher contrast. The display screen can be a foldable display screen, which may include a first sub-screen 103 and a second sub-screen 104. The display screen can be in an unfolded state or a folded state; that is, the state between the first sub-screen 103 and the second sub-screen 104 can be either unfolded or folded. In one example, the first processing may include, but is not limited to, frame interpolation, super-resolution, noise reduction, and color enhancement.

[0026] The display control circuit includes a discrete graphics chip 102, which performs first processing on the content transmitted by the system-on-a-chip 101. The system-on-a-chip 101 can control the connection states of the first switch TE SW_1, the second switch TE SW_2, the third switch mipi SW_1, and the fourth switch mipi SW_2 based on the folding state between the first sub-screen 103 and the second sub-screen 104. Depending on the connection state of these switches, the system-on-a-chip 101 can select a sub-screen from the first sub-screen 103 and the second sub-screen 104 to display the content output after the first processing by the discrete graphics chip 102. Displaying the content output after the first processing by the discrete graphics chip 102 on either the first sub-screen 103 or the second sub-screen 104 improves the display effect.

[0027] In one embodiment, the fifth interface of the system-on-a-chip 101 is connected to the sixth interface of the discrete graphics chip 102.

[0028] The system-on-a-chip 101 is used to control the connection status of the first switch TE SW_1, the second switch TE SW_2, the third switch MIPI SW_1, and the fourth switch MIPI SW_2 according to the folding state between the first sub-screen 103 and the second sub-screen 104, including:

[0029] System-on-a-chip 101 is used to control the display screen to be in a first state where only the first sub-screen 103 is displayed when it is unfolded, through the following control methods:

[0030] When the display is currently in dual-screen display mode and the display is currently in unfolded mode, stop the signal transmission between the second selection terminal of the second switch TE SW_2 and the second interface of the system-on-a-chip 101, and stop the signal transmission between the second selection terminal of the fourth switch mipi SW_2 and the fourth interface of the system-on-a-chip 101; or

[0031] When the display screen is currently in a state where only the second sub-screen 104 is displayed and the display screen is currently in an unfolded state, stop the signal transmission between the second selection terminal of the second switch TE SW_2 and the second interface of the system-on-a-chip 101, and stop the signal transmission between the second selection terminal of the fourth switch mipi SW_2 and the fourth interface of the system-on-a-chip 101; or

[0032] When the display screen is currently in a state where only the second sub-screen 104 is displayed and the display screen changes from a folded state to an unfolded state, and when the signal transmission between the fixed end of the third switch mipi SW_1 and the third interface of the discrete graphics chip 102 is stopped, and the signal transmission between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch TE SW_1 is connected to the first selection end of the first switch TE SW_1, the fixed end of the third switch mipi SW_1 is connected to the first selection end of the third switch mipi SW_1, the fixed end of the second switch TE SW_2 is connected to the second selection end of the second switch TE SW_2, and the fixed end of the fourth switch mipi SW_2 is connected to the second selection end of the fourth switch mipi SW_2.

[0033] The first sub-screen 103 is used to display the content output by the discrete graphics chip 102 after the first processing.

[0034] In the process of displaying the first processed output content only through the first sub-screen 103 in the unfolded state, it is first necessary to detect whether the display screen is currently in the unfolded state or the folded state, and to detect the display state of the display screen, such as the state in which only the first sub-screen 103 is displayed, the state in which only the second sub-screen 104 is displayed, and the state in which both the first sub-screen 103 and the second sub-screen 104 are displayed.

[0035] For example, when the display is currently in a dual-screen display state and the display is currently in an unfolded state, by stopping the signal transmission between the second selection terminal of the second switch TE SW_2 and the second interface of the system-on-a-chip 101, and by stopping the signal transmission between the second selection terminal of the fourth switch mipi SW_2 and the fourth interface of the system-on-a-chip 101, only the first sub-screen 103 can display the content output by the discrete graphics chip 102 in the unfolded state. It should be noted that in this example, the states of the first switch TE SW_1, the second switch TE SW_2, the third switch mipi SW_1, and the fourth switch mipi SW_2 are in the default state, that is, the fixed terminal of the first switch TE SW_1 is connected to the first selection terminal of the first switch TE SW_1, the fixed terminal of the third switch mipi SW_1 is connected to the first selection terminal of the third switch mipi SW_1, the fixed terminal of the second switch TE SW_2 is connected to the second selection terminal of the second switch TE SW_2, and the fixed terminal of the fourth switch mipi SW_2 is connected to the second selection terminal of the fourth switch mipi SW_2.

[0036] For example, when the display screen is currently in a state where only the second sub-screen 104 is displayed and the display screen is currently in an unfolded state, by stopping the signal transmission between the second selection terminal of the second switch TE SW_2 and the second interface of the system-on-a-chip 101, and by stopping the signal transmission between the second selection terminal of the fourth switch mipi SW_2 and the fourth interface of the system-on-a-chip 101, it can be achieved that in the unfolded state only the first sub-screen 103 displays the content output by the discrete graphics chip 102. It should be noted that in this example, the states of the first switch TE SW_1, the second switch TE SW_2, the third switch mipi SW_1, and the fourth switch mipi SW_2 are in the aforementioned default states.

[0037] For example, in the process of displaying the first processed output content only through the first sub-screen 103 in the unfolded state, if the display screen is currently in the folded state, it is necessary to switch the display screen from the folded state to the unfolded state. If the display screen is currently in the state where only the second sub-screen 104 is displayed and the display screen is switching from the folded state to the unfolded state, the signal transmission between the fixed end of the third switch MIPI SW_1 and the third interface of the discrete graphics chip 102 can be stopped first, and the signal transmission between the fifth interface and the sixth interface can be stopped. Then, the connection state of the switch can be controlled, or the connection state of the switch can be controlled during the interval between frame data, so as to switch from the state where only the second sub-screen 104 is displayed in the folded state to the state where only the first sub-screen 103 displays the first processed output content of the discrete graphics chip 102 in the unfolded state.

[0038] In this embodiment, different processing methods can be adopted according to the different current states of the display screen to switch the display screen to the first state in which only the first sub-screen 103 is displayed in the unfolded state, thereby improving the flexibility of the display screen state switching.

[0039] In one embodiment, the fifth interface of the system-on-a-chip 101 is connected to the sixth interface of the discrete graphics chip 102.

[0040] System-on-a-chip 101 is used to control the display screen to be in a second state where only the second sub-screen 104 is displayed when the screen is folded, through the following control methods:

[0041] When the display screen is currently in an unfolded state or when the display screen transitions from an unfolded state to a folded state, and the display screen is currently in a dual-screen display state, a state where only the second sub-screen 104 is displayed, or a state where only the first sub-screen 103 is displayed, and when the signal transmission between the fixed terminal of the third switch MIPI SW_1 and the third interface of the discrete graphics chip 102 is stopped, the signal transmission between the fifth interface and the sixth interface is stopped, and the signal transmission between the second selection terminal of the fourth switch MIPI SW_2 and the fourth interface of the system-on-a-chip 101 is stopped, or when there is a data transmission gap, the fixed terminal of the first switch TE SW_1 is connected to the second selection terminal of the first switch TE SW_1, the fixed terminal of the third switch MIPI SW_1 is connected to the second selection terminal of the third switch MIPI SW_1, the fixed terminal of the second switch TE SW_2 is connected to the first selection terminal of the second switch TE SW_2, and the fixed terminal of the fourth switch MIPI SW_2 is connected to the first selection terminal of the fourth switch MIPI SW_2, wherein the second sub-screen 104 is used to display the content output by the discrete graphics chip 102 after the first processing.

[0042] In this embodiment, by controlling the fixed end of the first switch TE SW_1 to be connected to the second select end of the first switch TE SW_1, controlling the fixed end of the third switch mipi SW_1 to be connected to the second select end of the third switch mipi SW_1, controlling the fixed end of the second switch TE SW_2 to be connected to the first select end of the second switch TE SW_2, and controlling the fixed end of the fourth switch mipi SW_2 to be connected to the first select end of the fourth switch mipi SW_2, the state of the display screen can be switched to a second state in which the display screen is in the folded state and only the second sub-screen 104 is displayed, thus improving the flexibility of state switching.

[0043] In one embodiment, the fifth interface of the system-on-a-chip 101 is connected to the sixth interface of the discrete graphics chip 102.

[0044] The system-on-chip 101 is used to control the display screen to be in a third state where only the second sub-screen 104 is displayed when it is in the unfolded state, through the following control methods:

[0045] When the display screen is currently in the unfolded state, and the display screen is currently in a dual-screen display state or a state where only the first sub-screen 103 is displayed, stop the signal transmission between the fixed terminal of the first switch TE SW_1 and the first interface of the discrete graphics chip 102, stop the signal transmission between the fixed terminal of the third switch MIPI SW_1 and the third interface of the discrete graphics chip 102, and stop the signal transmission between the connection between the fifth interface and the sixth interface; or

[0046] When the display screen is currently in a state where only the second sub-screen 104 is displayed and the display screen changes from a folded state to an unfolded state, and when the signal transmission between the fixed end of the third switch MIPI SW_1 and the third interface of the discrete graphics chip 102 is stopped, and the signal transmission between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch TE SW_1 is connected to the first selection end of the first switch TE SW_1, the fixed end of the third switch MIPI SW_1 is connected to the first selection end of the third switch MIPI SW_1, the fixed end of the second switch TE SW_2 is connected to the second selection end of the second switch TE SW_2, and the fixed end of the fourth switch MIPI SW_2 is connected to the second selection end of the fourth switch MIPI SW_2. The discrete graphics chip 102 is used to transmit the content output after the first processing to the system-on-a-chip 101. The system-on-a-chip 101 is used to perform a second processing on the content output by the discrete graphics chip 102, and the second sub-screen 104 is used to display the content output by the system-on-a-chip 101 after the second processing.

[0047] In one example, the second processing may include, but is not limited to, noise reduction.

[0048] In this embodiment, different processing methods can be adopted according to the different current states of the display screen to switch the display screen to a third state in which only the second sub-screen 104 is displayed when the display screen is unfolded, thereby improving the flexibility of the display screen state switching.

[0049] In one embodiment, the fifth interface of the system-on-a-chip 101 is connected to the sixth interface of the discrete graphics chip 102.

[0050] The system-on-chip 101 is used to control the display screen to enter a fourth state of dual-screen display when it is in the unfolded state through the following control methods:

[0051] When the display is currently in dual-screen display mode and the display is currently in unfolded mode, stop the signal transmission between the second selection terminal of the second switch TE SW_2 and the second interface of the system-on-a-chip 101, and stop the signal transmission between the second selection terminal of the fourth switch mipi SW_2 and the fourth interface of the system-on-a-chip 101; or

[0052] When the display screen is currently in a state where only the first sub-screen 103 is displayed and the display screen is currently in an unfolded state, stop the signal transmission between the fixed terminal of the first switch TE SW_1 and the first interface of the discrete graphics chip 102, stop the signal transmission between the fixed terminal of the third switch MIPI SW_1 and the third interface of the discrete graphics chip 102, and stop the signal transmission between the connection between the fifth interface and the sixth interface; or

[0053] When the display screen is currently in a state where only the second sub-screen 104 is displayed and the display screen changes from a folded state to an unfolded state, and when the signal transmission between the fixed terminal of the third switch MIPI SW_1 and the third interface of the discrete graphics chip 102 is stopped, and the signal transmission between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed terminal of the first switch TE SW_1 is connected to the first selection terminal of the first switch TE SW_1, the fixed terminal of the third switch MIPI SW_1 is connected to the first selection terminal of the third switch MIPI SW_1, the fixed terminal of the second switch TE SW_2 is connected to the second selection terminal of the second switch TE SW_2, and the fixed terminal of the fourth switch MIPI SW_2 is connected to the second selection terminal of the fourth switch MIPI SW_2. The first sub-screen 103 is used to display the content output by the discrete graphics chip 102 after the first processing, and the second sub-screen 104 is used to display the content output by the system-on-a-chip 101 through the fourth interface of the system-on-a-chip 101.

[0054] In this embodiment, different processing methods can be adopted according to the different current states of the display screen to switch the display screen to the fourth state of dual-screen display when the display screen is unfolded, thereby improving the flexibility of the display screen state switching.

[0055] The principle of the above-mentioned display control circuit will be explained in detail below with a specific embodiment.

[0056] like Figure 2 As shown, one of the DSI (DSI1) interfaces of the system-on-a-chip (SoC) 101 includes a second interface, a fourth interface, a first input interface, and a first output interface. The first output interface is connected to one of the input interfaces of the DSI Rx1 interface of the discrete graphics chip 102 (link corresponding to...). Figure 2 In MIPI2, Rx represents receive and Tx represents transmit. The first input interface is connected to one output interface of the DSI Rx1 interface of the discrete graphics chip 102 (link corresponding to...). Figure 2 The fourth interface is connected to the second selection terminal of the fourth switch MIPI SW_2 (e.g., MIPI switch selection device) (link corresponds to MIPI1), and the second interface is connected to the second selection terminal of the second switch TE SW_2 (link corresponds to MIPI1). Figure 2(TE1 in the diagram). The fifth interface of another DSI (DSI0) interface of the SoC is connected to the sixth interface of the DSI Rx0 interface of the discrete graphics chip 102 (the link corresponds to MIPI in the diagram). The seventh interface of the DSI0 interface is connected to the eighth interface of the DSI Rx0 interface of the discrete graphics chip 102 (the link corresponds to TE0 between the discrete graphics chip 102 and the SoC in the diagram). When switching to the first state where only the first sub-screen 103 is displayed in the unfolded state, and the display is currently in the state where only the second sub-screen 104 is displayed and the display changes from the folded state to the unfolded state, the signal transmission of the SoC's DSI Rx0 interface is stopped. This can be understood as stopping the signal transmission between the fifth and sixth interfaces and the signal transmission between the seventh and eighth interfaces. The signal transmission of the DSI Tx0 interface of the discrete graphics chip 102 is also stopped. This can be understood as stopping the signal transmission between the fixed terminal of the third switch MIPI SW_1 and the third interface of the discrete graphics chip 102, as well as the signal transmission between the fixed terminal of the first switch TE SW_1 and the first interface of the discrete graphics chip 102. The DSI Tx0 interface of the discrete graphics chip 102 includes a first interface and a third interface. The third interface is connected to the fixed terminal of the third switch MIPI SW_1 (e.g., a MIPI switch selection device), and the first interface is connected to the fixed terminal of the first switch TE SW_1 (link correspondence). Figure 2 In the TE0), the CSI_Tx1 interface of the discrete graphics chip 102 is directly connected to the Camera Serial Interface (CSI) interface of the SoC. The SoC can receive the content output by the discrete graphics chip 102 after the first processing through the CSI interface. The SoC can perform a second processing on the content output by the discrete graphics chip 102 after the first processing. The second processed content can be transmitted to the discrete graphics chip 102 through the fifth and sixth interfaces. The discrete graphics chip 102 transmits the content to the second sub-screen 104 for display through the third interface, the third switch MIPI SW_1 and the fourth switch MIPI SW_2.

[0057] The second selection terminal of MIPI SW_1 is connected to the first selection terminal of MIPI SW_2, and the second selection terminal of MIPI SW_1 is connected to the main screen (first sub-screen 103). The fixed terminal of MIPI SW_2 is connected to the secondary screen (second sub-screen 104), and the first selection terminal of MIPI SW_2 is connected to the second selection terminal of MIPI SW_1, which is also connected to the fourth interface of the SoC's DSI1 interface. MIPI SW_1 can switch paths to selectively output data from the DSI Tx0 of the discrete graphics chip 102 to either the main screen or MIPI SW_2; similarly, MIPI SW_2 can switch paths to select data output to the secondary screen from either MIPI SW_1 or the fourth interface of the SoC's DSI1 interface.

[0058] The input to TE SW_1 comes from either the main screen or TE SW_2, from which the output is selected to be sent to the discrete graphics chip 102. The input to TE SW_2 comes from the secondary screen, from which the output is selected to be sent to TE SW_1 or the SoC. The on / off states of TE SW_1 and MIPI SW_1 are synchronized. Similarly, the on / off states of TE SW_2 and MIPI SW_2 are synchronized to enable data synchronization functionality in conjunction with the MIPI (Mobile Industry Processor Interface) data path.

[0059] Figure 3 This is the state transition diagram for the display screen; when folded, only the secondary screen is supported. Figure 3In the diagram, path 1 indicates a transition from dual-screen display in the unfolded state to displaying only the secondary screen in the unfolded state; path 2 indicates a transition from displaying only the secondary screen in the unfolded state to displaying both screens in the unfolded state; path 3 indicates a transition from dual-screen display in the unfolded state to displaying only the primary screen in the unfolded state; path 4 indicates a transition from displaying only the primary screen in the unfolded state to displaying both screens in the unfolded state; path 5 indicates a transition from displaying only the primary screen in the unfolded state to displaying only the secondary screen in the unfolded state; path 6 indicates a transition from displaying only the secondary screen in the unfolded state to displaying only the primary screen in the unfolded state; path 7 indicates a transition from displaying only the secondary screen in the unfolded state to displaying only the primary screen in the unfolded state. The display transitions from a state where only the main screen is displayed in the unfolded state to a state where only the secondary screen is displayed in the folded state. Path 8 indicates the transition from a state where only the secondary screen is displayed in the folded state to a state where only the main screen is displayed in the unfolded state. Path 9 indicates the transition from a state where only the secondary screen is displayed in the folded state to a state where both screens are displayed in the unfolded state. Path 10 indicates the transition from a state where both screens are displayed in the unfolded state to a state where only the secondary screen is displayed in the folded state. Path 11 indicates the transition from a state where only the secondary screen is displayed in the folded state to a state where only the secondary screen is displayed in the unfolded state. Path 12 indicates the transition from a state where only the secondary screen is displayed in the unfolded state to a state where only the secondary screen is displayed in the folded state.

[0060] The default state of the switches is: the input of TE SW_1 and the output of mipi SW_1 are set to Main LCM (main screen); the output of TESW_2 and the input of mipi SW_2 are set to SoC. In this state, dual-screen simultaneous display mode is supported by default. The switching states for each mode are as follows:

[0061] ① Unfolded state

[0062] The on / off state remains consistent with the dual-screen simultaneous display mode (default);

[0063] ② Folded state

[0064] Switch the state of all switches so that TE SW_1 selects the input from TE SW_2, and mipi SW_1 selects the interface connected to mipiSW_2; at the same time, TE SW_2 selects the interface connected to TE SW_1, and mipi SW_2 selects the interface connected to mipi SW_1.

[0065] That is, the switch state is only associated with the folded state. Figure 3 The path switching processes 1 / 2 / 3 / 4 / 5 / 6 do not involve any switching action, while the path switching processes 7 / 8 / 9 / 10 / 11 / 12 require a switching action.

[0066] 1. Switch to home screen only display (expanded state)

[0067] 1.1 Switching:

[0068] ① Path 3: This does not involve switching; simply stop the transmission of mipi1 and TE1 signals of DSI1.

[0069] ② Path 6: This does not involve switching; simply stop the transmission of mipi1 and TE1 signals of DSI1.

[0070] ③ Path 8: The DSI Tx0 interface of the discrete graphics chip 102 and the DSI0 interface of the SoC first stop data transmission, or during the gap between frame data, the SoC then controls the input of TE SW_1 and the output of mipi SW_1 to select Main LCM; the output of TE SW_2 and the input of mipi SW_2 select SoC;

[0071] 1.2 After the switch corresponding to path 8 is completed, the DSI Tx0 and TE0 of the discrete graphics chip 102 continue to transmit data; at this time, the main screen can display the content processed by the discrete graphics chip 102.

[0072] For entering game / video frame interpolation scenarios:

[0073] 1.3 The SoC notifies the discrete graphics chip 102 to switch to game / video frame interpolation mode, that is, to complete the entry into the "game / video frame interpolation" mode. At this time, the main screen can display the content after frame interpolation, color enhancement and other processing.

[0074] For entering the photo preview scene:

[0075] 1.4 The SoC notifies the discrete graphics chip 102 to switch to the photo preview mode, and the discrete graphics chip 102 starts the photo processing function;

[0076] 1.5 The SoC transmits the data captured by the camera to the discrete graphics chip 102 through the MIPI2 path of DSI1 for frame interpolation, noise reduction and color enhancement processing;

[0077] 1.6 After the discrete graphics card finishes processing, it sends the data back to the SoC's CSI via CSI Tx1. The SoC then performs further processing and sends the data to the discrete graphics chip 102 via the DSI0 interface. The data is then displayed on the main screen, at which point the "Photo Preview" mode is entered.

[0078] For entering a recording scene:

[0079] 1.7 The SoC notifies the discrete graphics chip 102 to switch to recording mode, and the discrete graphics chip 102 enables the recording function;

[0080] 1.8 is the same as 1.5;

[0081] Version 1.9 adds an action to the action of writing the content processed by the SoC into the memory; at this time, the "recording" mode is entered.

[0082] 2. Switch to secondary screen only display (folded state)

[0083] 2.1 Switching:

[0084] ① Path 7 / 10 / 12: The discrete graphics card's DSI Tx0 and the SoC's DSI0 and DSI1's mipi1 interfaces first stop data transmission, or during the interval between frame data, the SoC then controls TE SW_1 to select input from TE SW_2, and controls mipiSW_1 to select the interface connected to mipi SW_2; at the same time, it controls TE SW_2 to select the interface connected to TE SW_1, and controls mipi SW_2 to select the interface connected to mipi SW_1.

[0085] 2.2 After the switch is completed, the DSI Tx0 and TE0 of the discrete graphics chip 102 continue to transmit data; at this time, the secondary screen displays the content processed by the discrete graphics chip 102.

[0086] For preparing to enter a game / video frame interpolation scene:

[0087] 2.3 Same as 1.3; At this time, the secondary screen can display the content processed by the discrete graphics chip 102;

[0088] For those preparing to enter the photo preview scene:

[0089] 2.4 Same as 1.4;

[0090] 2.5 is the same as 1.5;

[0091] 2.6 After the discrete graphics card finishes processing, it sends the data back to the SoC via CSI Tx1. The SoC then performs other effects processing and sends the data to the discrete graphics chip 102 via the DSI0 interface. The data is then displayed on the secondary screen, at which point the "photo preview" mode is entered.

[0092] For entering a recording scene:

[0093] 2.7 Same as 1.7;

[0094] 2.8 is the same as 1.8;

[0095] Version 2.9 adds the action of writing the data processed by the SoC into the memory, which completes the entry into the "recording" mode.

[0096] 3. Switch to secondary screen display only (expanded state)

[0097] 3.1 Switching:

[0098] ① Path 1 / 5: This does not involve switching on or off; simply stop the DSI Tx0 signal transmission of the discrete graphics card and the DSI0 and TE0 signals of the SoC.

[0099] ② Path 11: Same as Path 8 in 1.1;

[0100] 3.2 After the SW switch is completed, the SoC's DSI1 mipi1 and TE1 signals continue to transmit data;

[0101] For game / video frame interpolation scenarios: Not supported;

[0102] For entering the photo preview scene:

[0103] 3.3 Same as 1.4;

[0104] 3.4 Same as 1.5;

[0105] After the discrete graphics chip 102 finishes processing, it sends the data back to the SoC via CSI Tx1. The SoC then performs other effects processing and sends the data to the secondary screen via mipi1 of the DSI1 interface. At this point, the "photo preview" mode is entered.

[0106] For entering a recording scene:

[0107] 3.6 Same as 1.7;

[0108] 3.7 same as 1.8;

[0109] Version 3.8 adds an action to version 3.5 to write the data processed by the SoC into the memory; at this point, the "recording" mode is entered.

[0110] 4. Switch to dual-screen simultaneous display (expanded state)

[0111] 4.1 Switching:

[0112] ① Path 2: This does not involve switching; simply stop the transmission of mipi1 and TE1 signals of DSI1.

[0113] ② Path 4: This does not involve switching on or off; simply stop the DSI Tx0 signal transmission of the discrete graphics card and the DSI0 and TE0 signals of the SoC.

[0114] ③ Path 9: The DSI Tx0 interface of the discrete graphics card and the DSI0 interface of the SoC first stop data transmission, or during the gap between frame data, the SoC then controls TE SW_1 to select the Main LCM TE input, controls mipi SW_1 to select the interface connected to the Main LCM; controls TE SW_2 to select the output Sub LCM (secondary screen, i.e., the second sub-screen 104) TE to the SoC, and controls mipi SW_2 to select mipi1 input;

[0115] 4.2 After the SW switch is completed, the SoC transmits data from mipi1 to the secondary screen through the DSI1 interface, and transmits data to the main screen through the DSI Tx0 of the discrete graphics card via DSI0; at this time, the "dual-screen simultaneous display" mode is entered.

[0116] For game / video frame interpolation scenarios: only the main screen can display the content processed by the discrete graphics chip, while the secondary screen displays the data sent directly by the SoC;

[0117] 4.3 Same as 1.3;

[0118] For entering the photo preview scene:

[0119] 4.4 Same as 1.4;

[0120] 4.5 is the same as 1.5;

[0121] 4.6 After the discrete graphics chip finishes processing, it sends the data back to the SoC via CSI Tx1. The SoC then performs further processing and sends the data to the main and secondary screens via DSI0 and DSI1's mipi1 respectively. At this point, the "Photo Preview Dual-Screen Display" mode is entered, and both the main and secondary screens can preview the content processed by the discrete graphics chip.

[0122] For entering a recording scene:

[0123] 4.7 Same as 1.7;

[0124] 4.8 is the same as 1.8;

[0125] Version 4.9 adds an action to the action of writing the data processed by the SoC into the memory, based on the actions in version 3.6; at this time, the "recording dual-screen simultaneous display" mode is entered.

[0126] 5. Switch from main screen to dual-screen display (switch between unfolded foldable screen states)

[0127] 5.1 The DSI Tx0 interface of the discrete graphics card and the DSI0 interface of the SoC first stop data transmission, or during the interval between frame data, the SoC then controls TE SW_2 to select the output Sub LCM TE to the SoC, and controls mipi SW_2 to select mipi1 input;

[0128] 5.2 Same as 4.2;

[0129] The subsequent scene switching steps are the same as 4.3 to 4.8.

[0130] This application embodiment uses a MIPI signal switch selection device (MIPI Switch) combined with the platform's data interface split function to enable the dual-screen system to use a discrete graphics card and support discrete graphics card functions such as dual-screen simultaneous display, frame interpolation, and noise reduction, ultimately achieving the goal of improving product experience and competitiveness.

[0131] like Figure 4 As shown, this application provides a display control method according to an embodiment, applied to a system-on-a-chip in a display control circuit as described in the above embodiment. The method includes:

[0132] Step 401: Based on the folding state between the first sub-screen and the second sub-screen, control the connection state of the first switch, the second switch, the third switch, and the fourth switch so that the first sub-screen or the second sub-screen displays the content output by the discrete graphics chip after the first processing.

[0133] In one embodiment, the fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip.

[0134] Based on the folding state between the first and second sub-screens, control the connection states of the first, second, third, and fourth switches, including:

[0135] The display screen is controlled in the unfolded state to enter a first state where only the first sub-screen is displayed, using the following control method:

[0136] When the display is currently in dual-screen display mode and the display is currently in unfolded mode, stop the signal transmission between the second selection terminal of the second switch and the second interface of the system-on-a-chip, and stop the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip; or

[0137] When the display screen is currently in a state where only the second sub-screen is displayed and the display screen is currently in an unfolded state, stop the signal transmission between the second selection terminal of the second switch and the second interface of the system-on-a-chip, and stop the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip; or

[0138] When the display screen is currently in a state where only the second sub-screen is displayed and the display screen changes from a folded state to an unfolded state, and when the signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, and the signal transmission between the connection between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch is connected to the first selection end of the first switch, the fixed end of the third switch is connected to the first selection end of the third switch, the fixed end of the second switch is connected to the second selection end of the second switch, and the fixed end of the fourth switch is connected to the second selection end of the fourth switch.

[0139] The first sub-screen is used to display the content output after the discrete graphics chip performs the first processing.

[0140] In one embodiment, the fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip.

[0141] Based on the folding state between the first and second sub-screens, control the connection states of the first, second, third, and fourth switches, including:

[0142] The following control method is used to enable the display screen to be in a second state where only the second sub-screen is displayed when the screen is folded:

[0143] When the display screen is currently in the unfolded state or when the display screen is transitioning from the unfolded state to the folded state, and the display screen is currently in a dual-screen display state, a state where only the second sub-screen is displayed, or a state where only the first sub-screen is displayed, and when the signal transmission between the fixed terminal of the third switch and the third interface of the discrete graphics chip is stopped, the signal transmission between the connection of the fifth interface and the sixth interface is stopped, and the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip is stopped, or when there is a data transmission gap, the fixed terminal of the first switch is connected to the second selection terminal of the first switch, the fixed terminal of the third switch is connected to the second selection terminal of the third switch, the fixed terminal of the second switch is connected to the first selection terminal of the second switch, and the fixed terminal of the fourth switch is connected to the first selection terminal of the fourth switch, wherein the second sub-screen is used to display the content output by the discrete graphics chip after the first processing.

[0144] In one embodiment, the fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip.

[0145] Based on the folding state between the first and second sub-screens, control the connection states of the first, second, third, and fourth switches, including:

[0146] The following control method is used to switch the display screen to a third state where only the second sub-screen is displayed when it is in the unfolded state:

[0147] When the display screen is currently in the unfolded state, and the display screen is currently in a dual-screen display state or a state where only the first sub-screen is displayed, stop the signal transmission between the fixed terminal of the first switch and the first interface of the discrete graphics chip, stop the signal transmission between the fixed terminal of the third switch and the third interface of the discrete graphics chip, and stop the signal transmission between the connection between the fifth interface and the sixth interface; or

[0148] When the display screen is currently in a state where only the second sub-screen is displayed and the display screen changes from a folded state to an unfolded state, and when the signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, and the signal transmission between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch is connected to the first selection end of the first switch, the fixed end of the third switch is connected to the first selection end of the third switch, the fixed end of the second switch is connected to the second selection end of the second switch, and the fixed end of the fourth switch is connected to the second selection end of the fourth switch. The discrete graphics chip is used to transmit the content output after the first processing to the system-on-a-chip (SoC). The SoC is used to perform a second processing on the content output after the first processing by the discrete graphics chip. The second sub-screen is used to display the content output after the second processing by the SoC.

[0149] In one embodiment, the fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip.

[0150] Based on the folding state between the first and second sub-screens, control the connection states of the first, second, third, and fourth switches, including:

[0151] The following control methods are used to enable the display screen to enter the fourth state of dual-screen display when it is in the unfolded state:

[0152] When the display is currently in dual-screen display mode and the display is currently in unfolded mode, stop the signal transmission between the second selection terminal of the second switch and the second interface of the system-on-a-chip, and stop the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip; or

[0153] When the display screen is currently in a state where only the first sub-screen is displayed and the display screen is currently in an unfolded state, stop the signal transmission between the fixed terminal of the first switch and the first interface of the discrete graphics chip, stop the signal transmission between the fixed terminal of the third switch and the third interface of the discrete graphics chip, and stop the signal transmission between the connection between the fifth interface and the sixth interface; or

[0154] When the display screen is currently in a state where only the second sub-screen is displayed and the display screen changes from a folded state to an unfolded state, and when the signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, and the signal transmission between the connection between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch is connected to the first selection end of the first switch, the fixed end of the third switch is connected to the first selection end of the third switch, the fixed end of the second switch is connected to the second selection end of the second switch, and the fixed end of the fourth switch is connected to the second selection end of the fourth switch. The first sub-screen is used to display the content output by the discrete graphics chip after performing the first processing, and the second sub-screen is used to display the content output by the system-on-a-chip through the fourth interface of the system-on-a-chip.

[0155] This application provides an electronic device, including the display control circuit as described in the above embodiment.

[0156] The electronic device can be a terminal or other devices besides a terminal. The electronic device can be a mobile phone, tablet computer, laptop computer, handheld computer, in-vehicle electronic device, mobile internet device (MID), augmented reality (AR) / virtual reality (VR) device, robot, wearable device, ultra-mobile personal computer (UMPC), netbook or personal digital assistant (PDA), etc. It can also be network attached storage (NAS), personal computer (PC), television (TV), ATM or self-service machine, etc. The embodiments of this application do not make specific limitations.

[0157] Optionally, such as Figure 5 As shown, this application embodiment also provides an electronic device 500, including a processor 501 and a memory 502. The memory 502 stores programs or instructions that can run on the processor 501. When the program or instructions are executed by the processor 501, they implement the various steps of the above-described display control method embodiment and can achieve the same technical effect. To avoid repetition, they will not be described again here.

[0158] It should be noted that the electronic devices in the embodiments of this application include the aforementioned mobile electronic devices and non-mobile electronic devices.

[0159] The memory 502 can be used to store software programs and various data. The memory 502 may primarily include a first storage area for storing programs or instructions and a second storage area for storing data. The first storage area may store the operating system, application programs or instructions required for at least one function (such as sound playback, image playback, etc.). Furthermore, the memory 502 may include volatile memory or non-volatile memory, or both. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct memory bus RAM (DRRAM). The memory 109 in the embodiments of this application includes, but is not limited to, these and any other suitable types of memory.

[0160] Processor 501 may include one or more processing units; optionally, including but not limited to applications and an operating system. Processor 501 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operating system, user interface, and applications, and the modem processor mainly handles wireless communication. It is understood that the aforementioned modem processor may also not be integrated into processor 501.

[0161] This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above method embodiments and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0162] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.

[0163] This application embodiment also provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement the various processes of the above method embodiments and achieve the same technical effect. To avoid repetition, it will not be described again here.

[0164] It should be understood that the chip mentioned in the embodiments of this application may also be referred to as a system-on-a-chip, system chip, chip system, or system-on-a-chip, etc.

[0165] This application provides a computer program product, which is stored in a storage medium and executed by at least one processor to implement the various processes of the above method embodiments and achieve the same technical effects. To avoid repetition, it will not be described again here.

[0166] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0167] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0168] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A display control circuit, characterized in that, This includes a system-on-a-chip, a discrete graphics chip, a first switch, a second switch, a third switch, and a fourth switch; The system-on-a-chip (SoC) is connected to the discrete graphics chip. The first interface of the discrete graphics chip is connected to the fixed terminal of the first switch. The first selection terminal of the first switch is connected to the first sub-screen of the display screen. The second selection terminal of the first switch is connected to the first selection terminal of the second switch. The fixed terminal of the second switch is connected to the second sub-screen of the display screen. The second selection terminal of the second switch is connected to the second interface of the SoC. The third interface of the discrete graphics chip is connected to the fixed terminal of the third switch. The first selection terminal of the third switch is connected to the first sub-screen. The second selection terminal of the third switch is connected to the first selection terminal of the fourth switch. The fixed terminal of the fourth switch is connected to the second sub-screen. The second selection terminal of the fourth switch is connected to the fourth interface of the SoC. The discrete graphics chip is used to perform a first processing on the content transmitted by the system-on-a-chip. The system-on-a-chip is used to control the connection state of the first switch, the second switch, the third switch and the fourth switch according to the folding state between the first sub-screen and the second sub-screen, so that the first sub-screen or the second sub-screen displays the content output by the discrete graphics chip after the first processing.

2. The display control circuit according to claim 1, characterized in that, The fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip; The system-on-a-chip is used to control the connection state of the first switch, the second switch, the third switch, and the fourth switch according to the folding state between the first sub-screen and the second sub-screen, including: The system-on-a-chip is used to control the display screen to be in a first state where only the first sub-screen is displayed when the screen is unfolded, through the following control methods: When the display screen is currently in a dual-screen display state and the display screen is currently in an unfolded state, stop the signal transmission between the second selection terminal of the second switch and the second interface of the system-on-a-chip, and stop the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip; or When the display screen is currently in a state where only the second sub-screen is displayed and the display screen is currently in an unfolded state, stop the signal transmission between the second selection terminal of the second switch and the second interface of the system-on-a-chip, and stop the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip; or When the display screen is currently in a state where only the second sub-screen is displayed and the display screen changes from a folded state to an unfolded state, and when the signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, and the signal transmission between the connection between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch is connected to the first selection end of the first switch, the fixed end of the third switch is connected to the first selection end of the third switch, the fixed end of the second switch is connected to the second selection end of the second switch, and the fixed end of the fourth switch is connected to the second selection end of the fourth switch; The first sub-screen is used to display the content output by the discrete graphics chip after performing the first processing.

3. The display control circuit according to claim 1, characterized in that, The fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip; The system-on-a-chip is used to control the display screen to be in a second state where only the second sub-screen is displayed when the screen is folded, through the following control methods: When the display screen is currently in an unfolded state and when the display screen transitions from an unfolded state to a folded state, and the display screen is currently in a dual-screen display state, a state where only the second sub-screen is displayed, or a state where only the first sub-screen is displayed, and when signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, signal transmission between the connection of the fifth interface and the sixth interface is stopped, and signal transmission between the second selection end of the fourth switch and the fourth interface of the system-on-a-chip is stopped, or during data transmission gaps, the fixed end of the first switch is controlled to connect with the second selection end of the first switch, the fixed end of the third switch is controlled to connect with the second selection end of the third switch, the fixed end of the second switch is controlled to connect with the first selection end of the second switch, and the fixed end of the fourth switch is controlled to connect with the first selection end of the fourth switch, wherein the second sub-screen is used to display the content output by the discrete graphics chip after performing the first processing.

4. The display control circuit according to claim 1, characterized in that, The fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip; The system-on-a-chip is used to control the display screen to be in a third state where only the second sub-screen is displayed when the screen is unfolded, through the following control methods: When the display screen is currently in an unfolded state, and the display screen is currently in a dual-screen display state or a state where only the first sub-screen is displayed, stop the signal transmission between the fixed end of the first switch and the first interface of the discrete graphics chip, stop the signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip, and stop the signal transmission between the connection between the fifth interface and the sixth interface; or When the display screen is currently in a state where only the second sub-screen is displayed and the display screen transitions from a folded state to an unfolded state, and when signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, and signal transmission between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch is controlled to connect to the first selection end of the first switch, the fixed end of the third switch is controlled to connect to the first selection end of the third switch, the fixed end of the second switch is controlled to connect to the second selection end of the second switch, and the fixed end of the fourth switch is controlled to connect to the second selection end of the fourth switch. The discrete graphics chip is used to transmit the content output after the first processing to the system-on-a-chip (SoC). The SoC is used to perform a second processing on the content output after the first processing by the discrete graphics chip, and the second sub-screen is used to display the content output after the second processing by the SoC.

5. The display control circuit according to claim 1, characterized in that, The fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip; The system-on-a-chip is used to control the display screen to be in a fourth dual-screen display state when it is unfolded, through the following control methods: When the display screen is currently in a dual-screen display state and the display screen is currently in an unfolded state, stop the signal transmission between the second selection terminal of the second switch and the second interface of the system-on-a-chip, and stop the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip. or When the display screen is currently in a state where only the first sub-screen is displayed and the display screen is currently in an unfolded state, stop the signal transmission between the fixed terminal of the first switch and the first interface of the discrete graphics chip, stop the signal transmission between the fixed terminal of the third switch and the third interface of the discrete graphics chip, and stop the signal transmission between the fifth interface and the sixth interface; or When the display screen is currently in a state where only the second sub-screen is displayed and the display screen transitions from a folded state to an unfolded state, and when signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, and signal transmission between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch is controlled to connect to the first selection end of the first switch, the fixed end of the third switch is controlled to connect to the first selection end of the third switch, the fixed end of the second switch is controlled to connect to the second selection end of the second switch, and the fixed end of the fourth switch is controlled to connect to the second selection end of the fourth switch. The first sub-screen is used to display the content output by the discrete graphics chip after performing the first processing, and the second sub-screen is used to display the content output by the system-on-a-chip through the fourth interface of the system-on-a-chip.

6. A display control method, characterized in that, The method, applied to the system-on-a-chip in the display control circuit as described in any one of claims 1-5, comprises: Based on the folding state between the first sub-screen and the second sub-screen, the connection state of the first switch, the second switch, the third switch, and the fourth switch is controlled so that the first sub-screen or the second sub-screen displays the content output by the discrete graphics chip after the first processing.

7. The method according to claim 6, characterized in that, The fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip; The step of controlling the connection state of the first switch, the second switch, the third switch, and the fourth switch according to the folding state between the first sub-screen and the second sub-screen includes: The display screen is controlled to enter a first state where only the first sub-screen is displayed in the unfolded state by the following control method: When the display screen is currently in a dual-screen display state and the display screen is currently in an unfolded state, stop the signal transmission between the second selection terminal of the second switch and the second interface of the system-on-a-chip, and stop the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip; or When the display screen is currently in a state where only the second sub-screen is displayed and the display screen is currently in an unfolded state, stop the signal transmission between the second selection terminal of the second switch and the second interface of the system-on-a-chip, and stop the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip; or When the display screen is currently in a state where only the second sub-screen is displayed and the display screen changes from a folded state to an unfolded state, and when the signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, and the signal transmission between the connection between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch is connected to the first selection end of the first switch, the fixed end of the third switch is connected to the first selection end of the third switch, the fixed end of the second switch is connected to the second selection end of the second switch, and the fixed end of the fourth switch is connected to the second selection end of the fourth switch; The first sub-screen is used to display the content output by the discrete graphics chip after performing the first processing.

8. The method according to claim 6, characterized in that, The fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip; The step of controlling the connection state of the first switch, the second switch, the third switch, and the fourth switch according to the folding state between the first sub-screen and the second sub-screen includes: The following control method is used to ensure that the display screen is in a second state where only the second sub-screen is displayed when the screen is folded: When the display screen is currently in an unfolded state and when the display screen transitions from an unfolded state to a folded state, and the display screen is currently in a dual-screen display state, a state where only the second sub-screen is displayed, or a state where only the first sub-screen is displayed, and when signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, signal transmission between the connection of the fifth interface and the sixth interface is stopped, and signal transmission between the second selection end of the fourth switch and the fourth interface of the system-on-a-chip is stopped, or during data transmission gaps, the fixed end of the first switch is controlled to connect with the second selection end of the first switch, the fixed end of the third switch is controlled to connect with the second selection end of the third switch, the fixed end of the second switch is controlled to connect with the first selection end of the second switch, and the fixed end of the fourth switch is controlled to connect with the first selection end of the fourth switch, wherein the second sub-screen is used to display the content output by the discrete graphics chip after performing the first processing.

9. The method according to claim 6, characterized in that, The fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip; The step of controlling the connection state of the first switch, the second switch, the third switch, and the fourth switch according to the folding state between the first sub-screen and the second sub-screen includes: The display screen is controlled in the unfolded state to be in a third state where only the second sub-screen is displayed, through the following control method: When the display screen is currently in an unfolded state, and the display screen is currently in a dual-screen display state or a state where only the first sub-screen is displayed, stop the signal transmission between the fixed end of the first switch and the first interface of the discrete graphics chip, stop the signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip, and stop the signal transmission between the connection between the fifth interface and the sixth interface; or When the display screen is currently in a state where only the second sub-screen is displayed and the display screen transitions from a folded state to an unfolded state, and when signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, and signal transmission between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch is controlled to connect to the first selection end of the first switch, the fixed end of the third switch is controlled to connect to the first selection end of the third switch, the fixed end of the second switch is controlled to connect to the second selection end of the second switch, and the fixed end of the fourth switch is controlled to connect to the second selection end of the fourth switch. The discrete graphics chip is used to transmit the content output after the first processing to the system-on-a-chip (SoC). The SoC is used to perform a second processing on the content output after the first processing by the discrete graphics chip, and the second sub-screen is used to display the content output after the second processing by the SoC.

10. The method according to claim 6, characterized in that, The fifth interface of the system-on-a-chip is connected to the sixth interface of the discrete graphics chip; The step of controlling the connection state of the first switch, the second switch, the third switch, and the fourth switch according to the folding state between the first sub-screen and the second sub-screen includes: The display screen is controlled in the unfolded state to be in a fourth state of dual-screen display through the following control methods: When the display screen is currently in a dual-screen display state and the display screen is currently in an unfolded state, stop the signal transmission between the second selection terminal of the second switch and the second interface of the system-on-a-chip, and stop the signal transmission between the second selection terminal of the fourth switch and the fourth interface of the system-on-a-chip; or When the display screen is currently in a state where only the first sub-screen is displayed and the display screen is currently in an unfolded state, stop the signal transmission between the fixed terminal of the first switch and the first interface of the discrete graphics chip, stop the signal transmission between the fixed terminal of the third switch and the third interface of the discrete graphics chip, and stop the signal transmission between the fifth interface and the sixth interface; or When the display screen is currently in a state where only the second sub-screen is displayed and the display screen transitions from a folded state to an unfolded state, and when signal transmission between the fixed end of the third switch and the third interface of the discrete graphics chip is stopped, and signal transmission between the fifth interface and the sixth interface is stopped, or during a data transmission gap, the fixed end of the first switch is controlled to connect to the first selection end of the first switch, the fixed end of the third switch is controlled to connect to the first selection end of the third switch, the fixed end of the second switch is controlled to connect to the second selection end of the second switch, and the fixed end of the fourth switch is controlled to connect to the second selection end of the fourth switch. The first sub-screen is used to display the content output by the discrete graphics chip after performing the first processing, and the second sub-screen is used to display the content output by the system-on-a-chip through the fourth interface of the system-on-a-chip.

11. An electronic device, characterized in that, It includes a processor and a memory, the memory storing a program or instructions that can run on the processor, the program or instructions being executed by the processor to implement the steps of the method as described in any one of claims 6-10.

12. A readable storage medium, characterized in that, The readable storage medium stores a program or instructions that, when executed by a processor, implement the steps of the method as described in any one of claims 6-10.

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