Low temperature drift, high psrr op-amp-less bandgap reference circuit
By combining the op-amp-free structure and the Cascode structure, and by adjusting the resistor ratio and feedback loop, the influence of op-amp offset voltage on the reference voltage is resolved, thus realizing a bandgap reference circuit with low temperature drift, high accuracy, and high PSRR.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ZHEJIANG JUZI INTELLIGENT TECH
- Filing Date
- 2024-01-31
- Publication Date
- 2026-06-05
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Figure CN117891305B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to electronic circuit technology, and more specifically, to an op-amp-free bandgap reference circuit with low temperature drift and high PSRR. Background Technology
[0002] A reference voltage source aims to generate a stable voltage unaffected by process technology, temperature, and power supply voltage, and is widely used in power modules, ADCs, DACs, and other circuits. Bandgap reference voltages utilize the temperature characteristics of transistors, generating a low-temperature-drift reference voltage through the complementarity of positive and negative temperature coefficient voltages. This compensation method often requires operational amplifier clamping, and the offset introduced by the operational amplifier can affect the accuracy of the reference voltage.
[0003] like Figure 1 The diagram shows a bandgap reference voltage circuit in the prior art. This circuit includes an operational amplifier circuit, a PTAT current generation circuit, a current mirror, and a reference output circuit. The virtual short characteristic of the operational amplifier makes the base voltages of transistors Q1 and Q2 equal, and the current through resistor R1 is the PTAT current, the magnitude of which is:
[0004]
[0005] The reference voltage VREF, copied to the output branch of M3 via the current mirror, can be expressed as:
[0006]
[0007] Where k = (W / L)³ / (W / L)¹, the theoretically low temperature drift reference voltage can be obtained by adjusting the resistor ratio. However, the offset voltage VOS introduced at the op-amp input is not negligible. Considering the offset voltage, the reference voltage VREF is:
[0008]
[0009] The offset voltage VOS under typical CMOS technology is about 1mV~10mV, which has a significant impact on the accuracy of the reference voltage VREF. Summary of the Invention
[0010] In view of the shortcomings of the existing technology, the purpose of this invention is to provide a bandgap reference circuit with low temperature drift, high PSRR, and high precision.
[0011] To achieve the above objectives, the present invention provides the following technical solution:
[0012] A low-temperature drift, high PSRR op-amp-free bandgap reference circuit includes MOSFETs M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, M11, M12, M13, M14, and M15; transistors Q1, Q2, and Q3; and resistors R1, R2, and R3.
[0013] The drain of MOSFET M11 is connected to the drain of MOSFET M9, the gate of MOSFET M9, and the gate of MOSFET M10. The gate of MOSFET M11 is connected to the drain of MOSFET M5 and the collector of transistor Q2. The source of MOSFET M11 is connected to the drain of MOSFET M14 and the source of MOSFET M13.
[0014] The source of MOSFET M9 is connected to the sources of MOSFETs M10, M7, M8, M1, and M2.
[0015] The drain of MOSFET M12 is connected to the drain of MOSFET M10, the gate of MOSFET M12, the gate of MOSFET M3, and the gate of MOSFET M6.
[0016] The drain of MOSFET M13 is connected to the source of MOSFET M12, the gate of MOSFET M13, the base of transistor Q3, the base of transistor Q1, and the base of transistor Q2.
[0017] The source of MOSFET M14 is connected to the source of MOSFET M15, one end of resistor R3, and one end of resistor R2. The gate of MOSFET M14 is connected to the gate of MOSFET M15, the drain of MOSFET M15, and the drain of MOSFET M7.
[0018] The emitter of transistor Q3 is connected to the other end of resistor R3. The collector of transistor Q3 is connected to the source of MOSFET M3. The drain of MOSFET M3 is connected to the drain of MOSFET M8, the gate of MOSFET M7, and the gate of MOSFET M8.
[0019] The emitter of transistor Q1 is connected to one end of resistor R1. The collector of transistor Q1 is connected to the source of MOSFET M6. The drain of MOSFET M6 is connected to the drain of MOSFET M4, the gate of MOSFET M1, and the gate of MOSFET M2. The drain of MOSFET M1 is connected to the source of MOSFET M4.
[0020] The emitter of transistor Q2 is connected to the other end of resistor R1 and the other end of resistor R2. The source of MOSFET M5 is connected to the drain of MOSFET M2. The gate of MOSFET M4 is connected to the gate of MOSFET M5.
[0021] Furthermore, the area ratio of transistors Q1, Q2, and Q3 is N:1:1. The PTAT current generated by transistors Q1 and Q2 is I1, and the current generated by transistor Q3 is I3.
[0022] in,
[0023] , ;
[0024] The reference voltage VREF is:
[0025] ,
[0026] Differentiating the above equation with respect to temperature, we get:
[0027]
[0028] The first term on the right side of the equation It has a negative temperature coefficient, the second term It has a negative temperature coefficient, the third term With a positive temperature coefficient, a reference voltage with low temperature drift can be generated by adjusting the resistance ratio.
[0029] By adopting the above technical solution, the beneficial effects of the present invention are as follows:
[0030] 1. The circuit of this invention is a bandgap reference circuit without operational amplifiers, which avoids the influence of operational amplifier offset voltage on the reference voltage and improves the accuracy of the reference voltage.
[0031] 2. By adjusting the resistivity, the temperature coefficient of the reference voltage can be well adjusted, thus achieving a low-temperature drift reference voltage;
[0032] 3. By adding an NMOS layer to form a Cascode structure, the variation of the gate-source voltage of the MOS transistor M10 is reduced, effectively improving the PSRR of the reference voltage. Attached Figure Description
[0033] Figure 1 This is a schematic diagram of the structure of a conventional bandgap reference voltage circuit.
[0034] Figure 2 This is a schematic diagram of the bandgap reference voltage circuit of the present invention. Detailed Implementation
[0035] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0036] In the description of this invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.
[0037] like Figure 2 As shown, the op-amp-less bandgap reference circuit includes MOSFETs M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, M11, M12, M13, M14, and M15, transistors Q1, Q2, and Q3, and resistors R1, R2, and R3.
[0038] The area ratio of transistors Q1, Q2, and Q3 is N:1:1. The PTAT current generated by transistors Q1 and Q2 is I1, and the current of transistor Q3 is I. 3;
[0039] in,
[0040] , ;
[0041] In the formula The difference between the base-emitter voltages of Q1 and Q2. This is the difference between the base-emitter voltages of Q1 and Q3.
[0042] The reference voltage VREF is expressed as:
[0043] ,
[0044] Differentiating the above equation with respect to temperature yields the temperature coefficient:
[0045] ,
[0046] The first term on the right side of the equation It has a negative temperature coefficient, the second term It has a negative temperature coefficient, the third term With a positive temperature coefficient, a reference voltage with low temperature drift can be generated by adjusting the resistance ratio.
[0047] Compared to existing reference circuits, the reference circuit of this invention does not require the operational amplifier to clamp the base potential of the transistor, thus avoiding the influence of offset voltage. The system stability is determined by two sets of feedback loops.
[0048] The positive feedback loop (positive fb) is where the base current of transistor Q3 is amplified to M8 and then mirrored to VREF by the current mirror. The ratio of MOSFETs M3-M8, M14-M15, and M9-M10 is 1:1. At this time, the feedback coefficient is approximately gm3 / 2, where gm3 is the equivalent transconductance of Q3.
[0049] The negative feedback loop (negative fb) consists of the base current of Q2 amplified to the gate of M11, then mirrored to VREF via the current mirror M10. Its feedback coefficient is approximately gm2·gm11·ro. Since the negative feedback is greater than the positive feedback, the system is stable. Here, gm2 is the equivalent transconductance of Q2, gm11 is the transconductance of MOSFET M11, and ro is the equivalent output impedance of the collector of transistor Q2.
[0050] This circuit also has the advantage of high power supply rejection ratio (PSRR): the PSRR of the reference voltage VREF depends on the Vgs-vdd of the MOSFET M10 in this branch. An NMOS (MOSFET M6) is added to the branch where transistor Q1 is located. MOSFET M6 and transistor Q1 form a Cascode structure, which increases the power supply noise at the drain of MOSFET M6, resulting in an increase in the power supply noise at the gate of MOSFET M11. At the same time, MOSFET M9 is connected as a diode, and the power supply noise is concentrated at the gate of MOSFET M10, thereby canceling the power supply noise of the output branch, so that the reference voltage VREF has a very good power supply rejection ratio (PSRR).
[0051] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any ordinary changes and substitutions made by those skilled in the art within the scope of the technical solution of the present invention should be included within the protection scope of the present invention.
Claims
1. A low-temperature drift, high PSRR op-amp-free bandgap reference circuit, characterized in that, Including MOSFETs M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, M11, M12, M13, M14, and M15; transistors Q1, Q2, and Q3; and resistors R1, R2, and R3. The drain of MOSFET M11 is connected to the drain and gate of MOSFET M9 and MOSFET M10. The gate of MOSFET M11 is connected to the drain of MOSFET M5 and the collector of transistor Q2. The source of MOSFET M11 is connected to the drain of MOSFET M14 and the source of MOSFET M13. The source of MOSFET M9 is connected to the sources of MOSFETs M10, M7, M8, M1, and M2. The drain of MOSFET M12 is connected to the drain of MOSFET M10, the gate of MOSFET M12, the gate of MOSFET M3, and the gate of MOSFET M6. The drain of MOSFET M13 is connected to the source of MOSFET M12, the gate of MOSFET M13, the base of transistor Q3, the base of transistor Q1, and the base of transistor Q2. The source of MOSFET M14 is connected to the source of MOSFET M15, one end of resistor R3, and one end of resistor R2. The gate of MOSFET M14 is connected to the gate of MOSFET M15, the drain of MOSFET M15, and the drain of MOSFET M7. The emitter of transistor Q3 is connected to the other end of resistor R3, the collector of transistor Q3 is connected to the source of MOSFET M3, and the drain of MOSFET M3 is connected to the drain of MOSFET M8, the gate of MOSFET M7, and the gate of MOSFET M8. The emitter of transistor Q1 is connected to one end of resistor R1, the collector of transistor Q1 is connected to the source of MOSFET M6, the drain of MOSFET M6 is connected to the drain of MOSFET M4, the gate of MOSFET M1, and the gate of MOSFET M2, and the drain of MOSFET M1 is connected to the source of MOSFET M4. The emitter of transistor Q2 is connected to the other end of resistor R1 and the other end of resistor R2. The source of MOSFET M5 is connected to the drain of MOSFET M2. The gate of MOSFET M4 is connected to the gate of MOSFET M5.
2. The low-temperature drift, high PSRR op-amp-free bandgap reference circuit according to claim 1, characterized in that, The area ratio of transistors Q1, Q2, and Q3 is N:1:
1. The PTAT current generated by transistors Q1 and Q2 is I1, and the current generated by transistor Q3 is I3. in, , ; In the formula, The difference between the base-emitter voltages of Q1 and Q2. This is the difference between the base-emitter voltages of Q1 and Q3; The reference voltage VREF is: , In the formula, VBE3 is the base-emitter voltage of transistor Q3, and VBE1 is the base-emitter voltage of transistor Q1. Differentiating the above formula with respect to temperature yields the temperature coefficient: , The first term on the right side of the equation It has a negative temperature coefficient, the second term It has a negative temperature coefficient, the third term With a positive temperature coefficient, a reference voltage with low temperature drift can be generated by adjusting the resistance ratio.