A semiconductor device terminal structure

Abstract

The present invention provides a semiconductor device terminal structure, belonging to the field of semiconductor device technology. The semiconductor device terminal structure includes a substrate, a drift region located on the substrate, a cathode located on the back side of the substrate, and an anode. The drift region includes a main junction region and a junction termination region. The junction termination region includes a transition region adjacent to the main junction region. At least a portion of the anode is located on the upper surface of the main junction region. The main junction region includes a first doped region. The transition region includes at least one trench having n steps (n ≥ 2). A second doped region is provided in the trench, extending from an opening along the inner wall of each step to the bottom of the trench. The trench is filled with a dielectric layer. The substrate and the drift region have the same doping type. The second doped region has the same doping type as the first doped region and is opposite to the doping type of the substrate. The semiconductor device terminal structure can shift the electric field at the edge of the main junction and deep within the drift region, and reduce the concentrated electric field at the edge of the transition region, thereby improving the breakdown voltage of the device.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to a terminal structure of a semiconductor device. Background Art

[0002] Silicon carbide (SiC), a third-generation wide-bandgap semiconductor material, boasts advantages such as a wide bandgap, high critical breakdown electric field, high electron saturation drift velocity, and high thermal conductivity. Metal-oxide-semiconductor field-effect transistors (SiC MOSFETs) fabricated from silicon carbide exhibit high breakdown voltage, low specific on-resistance, high switching speed, and low switching losses. After years of research and development, device performance is gradually approaching the one-dimensional theoretical limit of SiC unipolar devices. Breaking the shackles of this one-dimensional theoretical limit and further reducing the specific on-resistance and conduction losses of SiC devices presents a significant challenge for SiC power devices. Superjunction technology is a technology that can break through the one-dimensional theoretical limit of unipolar devices, breaking the existing relationship between device specific on-resistance and breakdown voltage, thereby improving the device's conduction performance.

[0003] In the blocking state, the device primarily bears voltage through the depletion region formed by the PN junction under reverse bias. According to Poisson's equation, the peak of the electric field intensity in the depletion region is located near the PN junction. When the peak electric field intensity reaches the critical breakdown electric field intensity of the semiconductor material, the device will break down. In the actual fabrication process, cylindrical and spherical junctions are formed at the edges and corners of the PN junction. Due to the curvature effect, the electric field near the cylindrical and spherical junctions is more concentrated, and the electric field intensity is much greater than the electric field intensity of the parallel plane junction in the middle area. The edges and corners will break down before the parallel plane junction, resulting in the device's breakdown voltage being much lower than the ideal situation.

[0004] In order to alleviate the problem of premature breakdown of the edges and corners of the PN junction due to the curvature effect, resulting in reduced device blocking ability, the industry often forms a junction termination structure around the PN junction (main junction). The introduced junction termination structure can disperse the electric field originally concentrated at the edge of the main junction, thereby reducing the electric field strength at the edge of the main junction and increasing the breakdown voltage of the device.

[0005] like Figure 1 As shown, the commonly used junction terminal structures are field plates ( Figure 1 Middle (a) picture), table ( Figure 1 Middle (b) Figure), terminal extension ( Figure 1 (c)) and field limiting ring ( Figure 1(Figure (d) in the middle). The principle of the field plate (FP) structure is to expand the depletion layer on the junction terminal surface by applying an external voltage on the field plate, thereby alleviating the electric field concentration phenomenon at the edge of the PN junction. The principle of the beveled edge structure is to widen the depletion region width at the PN junction by etching a bevel, thereby reducing the electric field concentration phenomenon. The junction termination extension (JTE) structure expands the depletion region of the P+ main junction through its own depletion, thereby reducing the electric field concentration phenomenon at the main junction. The existence of the field limiting ring (FLR) structure is equivalent to adding a voltage divider to the edge of the main junction of a planar power device. By rationally optimizing the amount, ring width, doping concentration and ring spacing of the FLR, the width of the main junction depletion region can be effectively widened, the electric field concentration phenomenon of the main junction and the ring can be reduced, and thus the breakdown voltage can be increased.

[0006] Although junction termination technology is relatively mature for silicon (Si) materials, for SiC materials, due to the extremely low diffusion coefficient of impurities in SiC materials, the doping of SiC materials is often performed through high-temperature ion implantation to form a shallow PN junction, resulting in a smaller radius of curvature of the PN junction of the SiC power device, making it easier for the electric field to concentrate, and further reducing the blocking capability of the device and the protection capability of the junction termination. Furthermore, for SiC superjunction devices, the P-column structure formed penetrates deep into the drift region of the device, and the electric field is also concentrated deep in the drift region. However, the traditional terminal structure is limited by the structural design and the depth of ion implantation in SiC, and can only alleviate the problem of the electric field near the surface of the drift region, but cannot protect the PN junction deep in the drift region. Therefore, it is necessary to develop a new junction termination structure to alleviate the problem of electric field strength concentration in structures such as PN junctions (main junctions) represented by superjunctions or PN junctions (main junctions) deep in the drift region. Summary of the Invention

[0007] In order to address the problem that the existing junction termination structure is limited by factors such as the SiC thermal diffusion coefficient and the ion implantation depth and cannot effectively protect the super junction, which is the main junction, and the structure where the electric field strength at the edge of the main junction penetrates deep into the drift region, which ultimately leads to a serious reduction in the blocking characteristics of the device, the present invention provides a new semiconductor device junction termination structure.

[0008] Specifically, the present invention adopts the following technical solutions:

[0009] A semiconductor device terminal structure comprises a substrate, a drift region located on the substrate, a cathode located on the side of the substrate away from the drift region, and an anode; the drift region comprises a main junction region and a junction termination region; at least a portion of the anode is located on the side of the main junction region away from the substrate; the junction termination region comprises a transition region, which is adjacent to the main junction region; the main junction region comprises a first doped region; the transition region comprises at least one trench having n steps, where n is an integer ≥ 2; the trench extends from a surface of the drift region away from the substrate toward the substrate; a second doped region is provided in the trench, extending from the opening position of the trench along the inner wall of each step to the bottom of the trench; the trench is filled with a dielectric layer; the substrate and the drift region have the same doping type; the second doped region and the first doped region have the same doping type and are opposite to the doping type of the drift region; the first doped region and the drift region form a main junction in the main junction region.

[0010] In some embodiments, the junction termination region includes a dispersed region, which is located on a side of the transition region away from the main junction region; the dispersed region includes a plurality of floating field limiting rings formed by a plurality of third doping regions, and the third doping regions have the same doping type as the first doping regions.

[0011] In some embodiments, the width of each of the third doping regions is the same in a direction from the main junction region to the junction termination region.

[0012] In some embodiments, the spacing between the third doping regions gradually increases in a direction from the main junction region to the junction termination region.

[0013] In some embodiments, the doping concentration of each of the third doping regions is the same.

[0014] In some embodiments, the junction termination region includes a dispersed region, which is located on a side of the transition region away from the main junction region; the dispersed region includes a junction termination extension structure formed by a fourth doping region, and the fourth doping region is electrically connected to the second doping region or the first doping region, and the doping type of the fourth doping region is the same as the doping type of the first doping region.

[0015] In some embodiments, the junction terminal region includes a dispersed region, which is located on a side of the transition region away from the main junction region; the dispersed region includes a plurality of third doping regions and a fourth doping region, and the fourth doping region is electrically connected to the second doping region or the first doping region. In the direction from the main junction region to the junction terminal region, the fourth doping region and the third doping region are arranged in sequence or the third doping region is distributed in the fourth doping region; the doping types of the third doping region, the fourth doping region and the first doping region are all the same.

[0016] In some embodiments, the doping concentration of at least two of the first doping region, the second doping region, and the third doping region is the same.

[0017] In some embodiments, the doping concentration of the fourth doping region is lower than the doping concentration of the first doping region.

[0018] In some embodiments, the junction termination region includes a dispersion region, which is located on a side of the transition region away from the main junction region; the dielectric layer is an insulating dielectric layer, and in the junction termination region, the insulating dielectric layer extends from a surface of the drift region away from the substrate to the inside of the trench; the anode extends from the main junction region along a surface of the insulating dielectric layer away from the drift region to the dispersion region, and forms a field plate in the dispersion region.

[0019] In some embodiments, the junction termination region includes a dispersion region, which is located on a side of the transition region away from the main junction region; in the direction along the substrate to the drift region, the height of the dispersion region is smaller than the height of the transition region, and the surface of the drift region facing away from the substrate forms a slope at the connection between the transition region and the dispersion region.

[0020] In some embodiments, each step of the trench has a different width in a direction from the main junction region to the junction termination region.

[0021] In some embodiments, each step of the trench has the same height in a direction from the substrate to the drift region.

[0022] In some embodiments, only one sidewall of the groove has a stepped structure. In other embodiments, the two opposite sidewalls of the groove have symmetrical stepped structures. In other embodiments, the two opposite sidewalls of the groove have asymmetrical stepped structures.

[0023] In some embodiments, the trench is not directly connected to the first doped region. In other embodiments, the trench is directly connected to the first doped region.

[0024] In some embodiments, the anode extends from the main junction region to the transition region and directly contacts the second doped region at the location of the trench opening.

[0025] In some embodiments, the second doped region at the bottom of the trench is directly connected to the first doped region.

[0026] In some embodiments, the depth of the second doping region is less than the depth of the first doping region along the direction from the drift region to the substrate. In other embodiments, the depth of the second doping region is the same as the doping depth of the first doping region along the direction from the drift region to the substrate. In other embodiments, the depth of the second doping region is greater than the depth of the first doping region along the direction from the drift region to the substrate.

[0027] In some embodiments, the dielectric layer is a semiconductor layer, and the doping type of the semiconductor layer is the same as the doping type of the first doping region.

[0028] The present invention has the following beneficial effects: the semiconductor device terminal structure of the present invention provides at least one trench with a multi-step structure in the transition region, so that when the device is in a reverse blocking state, on the one hand, the second doped region of the transition region achieves the purpose of laterally expanding the depletion region at the edge of the main junction in the direction from the main junction region to the junction termination region; on the other hand, in the direction from the substrate to the drift region, the stepped second doped region of the transition region (the step on the trench sidewall) guides the depletion region toward the surface of the semiconductor device, so that the electric field concentration position is shifted from the main junction edge deep in the drift region to the edge of the transition region on the device surface; thus, the main junction and the structure deep in the drift region are better protected, thereby facilitating the improvement of the blocking characteristics of the device. Furthermore, the present invention adds a dispersion region at the edge of the transition region and rationally optimizes any one of the parameters, size, doping concentration, and arrangement of the third doped region and / or the fourth doped region in the dispersion region, or a combination thereof, to further effectively widen the depletion region width of the transition region in the direction from the main junction region to the junction termination region, thereby reducing the electric field concentration phenomenon at the edge of the transition region and achieving the purpose of further improving the breakdown voltage of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Schematic diagram of four commonly used junction terminal structures in semiconductor device terminal structures;

[0030] Figure 2 A schematic diagram of a semiconductor device terminal structure provided by an embodiment of the present invention;

[0031] Figure 3 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0032] Figure 4 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0033] Figure 5 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0034] Figure 6 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0035] Figure 7 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0036] Figure 8 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0037] Figure 9 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0038] Figure 10 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0039] Figure 11 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0040] Figure 12 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0041] Figure 13 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0042] Figure 14 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0043] Figure 15 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0044] Figure 16 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0045] Figure 17 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0046] Figure 18 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0047] Figure 19A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0048] Figure 20 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0049] Figure 21 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0050] Figure 22 A schematic diagram of another semiconductor device terminal structure provided by an embodiment of the present invention;

[0051] Figure 23 Schematic diagram of the ideal half-superjunction cell structure and its Silvaco simulation diagram;

[0052] Figure 24 Schematic diagram of a semi-superjunction cell structure without a junction termination structure and its Silvaco simulation diagram;

[0053] Figure 25 for Figure 23 Schematic diagram of the structure obtained by adding 22 field limiting rings to the structure;

[0054] Figure 26 for Figure 25 Silvaco simulation diagram of the semiconductor device terminal structure;

[0055] Figure 27 for Figure 23 Schematic diagram of the terminal structure of the semiconductor device obtained by adding 22 field limiting rings to the structure and adding a JTE structure between the main junction and the field limiting rings;

[0056] Figure 28 for Figure 27 Silvaco simulation diagram of the semiconductor device terminal structure;

[0057] Figure 29 A schematic diagram of a semiconductor device terminal structure provided by the present invention;

[0058] Figure 30 for Figure 29 Silvaco simulation diagram of the semiconductor device terminal structure.

[0059] In the figure: 101, substrate; 102, drift region; 103, cathode; 104, anode; 105, trench; 106, first doping region; 107, second doping region; 108, dielectric layer; 109, third doping region; 110, field plate; 111, slope; 112, fourth doping region; A, main junction region; B, junction termination region; B1, transition region; B2, dispersion region. DETAILED DESCRIPTION

[0060] The following is a clear and complete description of the technical solutions of the present invention in conjunction with the embodiments, so that those skilled in the art can fully understand the present invention. Obviously, the embodiments described are only some preferred embodiments of the present invention, rather than all embodiments. Any equivalent transformations or substitutions made by those skilled in the art to the following embodiments without creative work are within the scope of protection of the present invention.

[0061] Directional terms used in this disclosure, such as "upper," "lower," "inner," "outer," "bottom," and "upper surface," indicate positions or locations based on the positions or locations in the accompanying drawings or the positions or locations in which the product of this disclosure is typically placed during use. These terms are intended solely to facilitate the description and understanding of the product structure of this disclosure. Therefore, these directional terms should not be construed as limiting this disclosure. In this disclosure, unless otherwise expressly specified, expressions such as "upper," "above," "above," and "upper surface" of a first feature relative to a second feature indicate that the first and second features may be in direct contact or indirect contact through an intermediary; that the first feature may be directly above or diagonally above the second feature, or simply indicate that the first feature is at a higher level than the second feature. Expressions such as "lower," "below," "below," and "lower surface" of a first feature relative to a second feature indicate that the first and second features may be in direct contact or indirect contact through an intermediary; that the first feature may be directly below or diagonally below the second feature, or simply indicate that the first feature is at a lower level than the second feature. The ordinal numbers used in the present invention, such as "first", "second", etc., are only used for descriptive purposes to distinguish similar objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.

[0062] In order to better understand the present invention, Figures 2 to 22 , a specific embodiment of the semiconductor device terminal structure of the present invention is described in detail.

[0063] like Figure 21 is a schematic diagram of a semiconductor device terminal structure provided by an embodiment of the present invention. The semiconductor device terminal structure includes a substrate 101, a drift region 102 located on the substrate 101, a cathode 103, and an anode 104. The cathode 103 is located on the side of the substrate 101 facing away from the drift region 102, i.e., the cathode 103 is located on the bottom surface of the substrate 101. The drift region 102 includes a main junction region A and a terminal region B. The terminal region B includes a transition region B1, which is adjacent to the main junction region A. The main junction region A includes a first doped region 106. The transition region B1 includes a trench 105 having a sidewall with n steps on one side, where n is an integer ≥ 2 (e.g., n = 4). The trench 105 extends from a surface of the drift region 102 facing away from the substrate 101 toward the substrate 101, i.e., the trench 105 extends from the upper surface of the drift region 102 toward the interior of the drift region 102. The opening of the trench 105 is located on the upper surface of the drift region 102. A second doped region 107 is provided on the inner wall of the trench 105. The second doped region 107 extends from the opening of the trench 105 along the inner wall of each step to its bottom. A dielectric layer 108 is filled within the trench 105. The anode 104 is located on the side of the main junction region A facing away from the substrate 101, that is, the anode 104 is located on the upper surface of the main junction region A. The doping type of the substrate 101 is the same as that of the drift region 102, and the doping type of the second doped region 107 is the same as that of the first doped region 106. However, the doping type of the first doped region 106 is opposite to that of the substrate 101 (or drift region 102). In other words, when the substrate 101 is n-type doped, the drift region 102 is also n-type doped, while the first doped region 106 and the second doped region 107 are both p-type doped. Therefore, the pn junction formed by the first doped region 106 and the drift region 102 in the main junction region A serves as the main junction. When the substrate 101 is p-doped, the drift region 102 is also p-doped, and the first doped region 106 and the second doped region 107 are both n-doped. Therefore, the pn junction formed by the first doped region 106 and the drift region 102 in the main junction region A is the main junction.

[0064] It is understood that, in the direction from the drift region 102 to the substrate 101, the doping depth of the second doping region 107 may be the same as the doping depth of the first doping region 106, or may be smaller than the doping depth of the first doping region 106 (e.g., Figure 17 As shown), the doping depth may also be greater than that of the first doping region 106.

[0065] Furthermore, if Figure 3 As shown, the junction termination region B of another semiconductor device terminal structure provided by an embodiment of the present invention further includes a dispersed region B2, which is located on a side of the transition region B1 away from the main junction region A. The dispersed region B2 includes a plurality of floating field limiting rings formed by a plurality of third doped regions 109, and the doping type of the third doped regions 109 is the same as that of the first doped regions 106.

[0066] It is understood that in some other embodiments, the number of floating field limiting rings formed by the third doping regions 109 can be adjusted according to actual needs. In the direction along the main junction region A to the junction terminal region B, the width of each third doping region 109 can be the same or different; the spacing between two adjacent third doping regions 109 can be equal or unequal (for example, the spacing between adjacent third doping regions 109 increases along the direction from the main junction region A to the junction terminal region B); the concentration of each third doping region 109 can be the same or different. By adjusting the number of third doping regions, the doping concentration, the doping width along the direction from the main junction region A to the junction terminal region B, and the spacing between two adjacent third doping regions, the depletion region width of the transition region can be effectively widened, the electric field concentration phenomenon at the edge of the transition region can be reduced, and the breakdown voltage of the device can be further improved.

[0067] It is understood that the first doping region 106, the second doping region 107, and the third doping region 109 have the same doping type, but their doping concentrations may be the same, different, or partially the same (for example, Figures 18 to 20 shown).

[0068] Furthermore, if Figure 4 As shown, the anode 104 of another semiconductor device terminal structure provided by an embodiment of the present invention extends from the upper surface of the main junction region A to the upper surface of the transition region B1, directly contacting the second doped region 107 at the opening of the trench 105, so that the second doped region 107 is electrically connected to the first doped region 106. It can be understood that when the second doped region 107 is not connected to any electrode, it is in a floating state.

[0069] Furthermore, if Figure 5 As shown, the junction termination region B of another semiconductor device terminal structure provided by an embodiment of the present invention further includes a dispersion region B2, which is located on a side of the transition region B1 away from the main junction region A. The dielectric layer 108 is an insulating dielectric layer. In the junction termination region B, the dielectric layer 108 extends from the surface of the drift region 102 facing away from the substrate 101 to the interior of the trench 105. The anode 104 extends from the main junction region A along the upper surface of the dielectric layer 108 to the dispersion region B1, forming a field plate 110 in the dispersion region.

[0070] Furthermore, if Figure 6As shown, the junction termination region B of another semiconductor device terminal structure provided by an embodiment of the present invention further includes a dispersion region B2, which is located on the side of the transition region B1 away from the main junction region A. In the direction along the substrate 101 to the drift region 102, the upper surface of the dispersion region B2 is lower than the upper surface of the transition region B1. The surface of the drift region 102 facing away from the substrate 101 forms an inclined surface 111 at the junction of the transition region B1 and the dispersion region B2. An insulating dielectric layer is provided from the upper surface of the transition region B1 along the inclined surface 111 to the upper surface of the dispersion region B2.

[0071] Furthermore, if Figure 7 As shown, the junction terminal region B of another semiconductor device terminal structure provided by an embodiment of the present invention also includes a dispersed region B2, which is located on the side of the transition region B1 away from the main junction region A. The dispersed region B2 includes a junction terminal extension structure formed by a fourth doping region 112. The fourth doping region 112 is in direct contact with the second doping region 107, so that the fourth doping region 112 is electrically connected to the second doping region 107. In other embodiments, the fourth doping region 112 can also be electrically connected to the first doping region 106 in other ways (for example, the fourth doping region 112 is electrically connected to the first doping region 106 through an anode metal). The doping type of the fourth doping region 112 is the same as the doping type of the first doping region 106.

[0072] Furthermore, if Figure 8 As shown, the junction termination region B of another semiconductor device terminal structure provided by an embodiment of the present invention also includes a dispersed region B2, which is located on the side of the transition region B1 away from the main junction region A. The dispersed region B2 includes multiple third doping regions 109 and a fourth doping region 112. The fourth doping region 112 is in direct contact with the second doping region 107, so that the fourth doping region 112 is electrically connected to the second doping region 107. In the direction from the main junction region to the junction termination region, the fourth doping region 112 and the third doping region 109 are arranged in sequence (that is, the multiple third doping regions 109 are arranged in sequence on the side of the fourth doping region 112 away from the second doping region 107) to form a spatially modulated junction termination extension structure. The doping type of the third doping region 109 and the fourth doping region 112 is the same as the doping type of the first doping region 106.

[0073] Furthermore, if Figure 9As shown, the junction termination region B of another semiconductor device terminal structure provided by an embodiment of the present invention further includes a dispersed region B2, which is located on the side of the transition region B1 away from the main junction region A. Dispersed region B2 includes multiple third doping regions 109 and a fourth doping region 112. The fourth doping region 112 is in direct contact with the second doping region 107, such that the fourth doping region 112 is electrically connected to the second doping region 107. The third doping regions 109 are distributed within the fourth doping region 112 in a direction from the main junction region to the junction termination region. The doping type of the third doping regions 109 and the fourth doping region 112 is the same as the doping type of the first doping region 106.

[0074] It should be noted that, in other embodiments, the number, position and depth of the grooves 105, the number, position and shape of the steps of each groove 105, and the material of the dielectric layer filled in the grooves 105 can be adjusted according to actual needs. Figure 10 As shown, the trench 105 is in direct contact with the main junction region A. Figure 11 As shown, the transition region B1 has multiple trenches 105 of the same shape. The steps of each trench 105 are located on the sidewall of the same side, and the number of steps between different trenches 105 is the same. In the direction from the main junction region A to the junction termination region B, the width of each step of each trench 105 is the same. In the direction from the substrate 101 to the drift region 102, the height of each step of each trench 105 is the same. Figure 12 and Figure 13 As shown, the transition region B1 has multiple grooves 105, and the steps of each groove 105 are located on the sidewall of the same side, but the number of steps between different grooves 105 is different. Figure 14 As shown, the transition region B1 has a plurality of trenches 105, the steps of some of the trenches 105 are located on the sidewall close to the main junction region A, and the steps of other trenches 105 are located on the sidewall away from the main junction region A. Figure 15 and Figure 16 As described above, the sidewalls on both sides of the trench 105 are arranged in a step structure. In the direction from the main junction region A to the junction terminal region B, the widths of different steps in the same trench 105 can be the same or different. The trench 105 is in direct contact with the main junction region A. The anode 104 extends from the upper surface of the main junction region A to the upper surface of the transition region B1 and is in direct contact with the second doped region 107 at the opening of the trench 105, so that the second doped region 107 is electrically connected to the first doped region 106. Figure 17 As shown, in the direction from the drift region 102 to the substrate 101, the depth of the trench 105 is less than the doping depth of the first doping region 106, that is, the doping depth of the second doping region 107 is less than the doping depth of the first doping region 106. Figure 21As shown, in some other embodiments, the second doping region 107 at the bottom of the trench 105 can be directly connected to the first doping region 106; for example, the first doping region 106 and the second doping region 107 can be formed by ion implantation, thereby forming a diffusion on a cross section perpendicular to the ion implantation direction to achieve direct connection between the second doping region 107 and the first doping region 106. That is, in the process of preparing the semiconductor terminal structure, the first doping region 106 and the second doping region 107 can be formed separately or together. Similarly, the third doping region 109 and / or the fourth doping region 112 of the dispersed region B2 can be formed separately from the first doping region 106 or together. Figure 22 As shown, in some other embodiments, the dielectric layer 108 filling the trench 105 is a semiconductor layer, and the doping type of the semiconductor layer is the same as the doping type of the first doped region 106. That is, when the first doped region 106 is p-type doped, the dielectric layer 108 is a p-type doped semiconductor layer; when the first doped region 106 is n-type doped, the dielectric layer 108 is an n-type doped semiconductor layer. When the dielectric layer 108 is a semiconductor layer, the semiconductor terminal structure of the present invention can be prepared in a variety of ways, for example, through trench etching-epitaxial filling, multiple epitaxial growth-ion implantation, and other process methods. The terminal structure can be prepared in the same process route as the cell region to reduce costs.

[0075] It should be noted that, when the substrate 101 , the drift region 102 and the dielectric layer 108 in the present invention are semiconductor layers, the semiconductor material used is any one of silicon carbide, silicon, gallium nitride, gallium oxide, aluminum nitride, diamond and indium phosphide.

[0076] The performance of the semiconductor device terminal structure provided by the present invention is verified by Silvaco simulation software. Figure 23 As shown in Figure 2, the breakdown voltage of an ideal half-superjunction cell is 2200V. Figure 24 As shown in Figure 2, when no terminal structure is added to the edge of the semi-superjunction cell, its breakdown voltage is 250V. Figure 25 and Figure 26 As shown in Figure 2, when 22 field limiting ring structures are added to the edge of the semi-superjunction cell, its breakdown voltage is 480V. Figure 27 and Figure 28 As shown in the figure, 22 field limiting ring structures are added to the edge of the semi-superjunction cell, and a JTE structure is added between the main junction region and the field limiting ring. The length of the JTE structure is 20μm, and its breakdown voltage is 700V. Figure 29 and Figure 30 As shown, the terminal structure of the semiconductor device in the present invention adds 22 field limiting ring structures at the edge of the semi-super junction, and adds a 20μm long transition region between the main junction region and the field limiting ring. The transition region includes a trench with 4 steps and its breakdown voltage is 1414V.

[0077] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. It will be apparent to anyone skilled in the art that various modifications and variations of the present invention are possible. Any simple equivalent variations and modifications made in accordance with the scope of protection of the present invention and the contents of the specification are intended to be included within the scope of protection of the present invention.

Claims

1. A semiconductor device terminal structure, characterized in that: The invention comprises a substrate, a drift region located on the substrate, a cathode located on a side of the substrate away from the drift region, and an anode; the drift region comprises a main junction region and a junction termination region; the junction termination region comprises a transition region adjacent to the main junction region and a dispersion region located on a side of the transition region away from the main junction region; the main junction region comprises a first doped region; the transition region comprises at least one trench having n steps, where n is an integer ≥ 2; the trench extends from a surface of the drift region away from the substrate toward the substrate; a second doped region is provided in the trench, extending from the opening position of the trench along the inner wall of each step to the bottom of the trench; the interior of the trench is filled with a dielectric layer; the substrate and the drift region have the same doping type; the second doped region has the same doping type as the first doped region and is opposite to the doping type of the drift region; the first doped region and the drift region form a main junction in the main junction region; the anode extends from the main junction region to the transition region and is in direct contact with the second doped region located at the opening position of the trench; The dispersed region includes a plurality of floating field limiting rings formed by a plurality of third doping regions; or the dispersed region includes a junction terminal extension structure formed by a fourth doping region, and the fourth doping region is electrically connected to the second doping region or the first doping region; or the dispersed region includes a plurality of third doping regions and a fourth doping region, the fourth doping region is electrically connected to the second doping region or the first doping region, and the fourth doping region and the third doping region are arranged in sequence in the direction from the main junction region to the junction terminal region; or the third doping region is distributed in the fourth doping region; The third doping region, the fourth doping region and the first doping region all have the same doping type.

2. The semiconductor device terminal structure according to claim 1, wherein: At least two of the first doping region, the second doping region, and the third doping region have the same doping concentration.

3. The semiconductor device terminal structure according to claim 1, wherein: The width of each of the third doping regions is the same along the direction from the main junction region to the junction terminal region; or / and the spacing between the third doping regions gradually increases along the direction from the main junction region to the junction terminal region; or / and the doping concentration of each of the third doping regions is the same.

4. The semiconductor device terminal structure according to claim 1, wherein: The dielectric layer is an insulating dielectric layer, and in the junction termination region, the insulating dielectric layer extends from a surface of the drift region away from the substrate to the interior of the trench; the anode extends from the main junction region along a surface of the insulating dielectric layer away from the drift region to the dispersion region, and forms a field plate in the dispersion region; or / and In a direction from the substrate to the drift region, the height of the dispersion region is smaller than that of the transition region, and a surface of the drift region facing away from the substrate forms a slope at a connection between the transition region and the dispersion region.

5. The semiconductor device terminal structure according to claim 1, wherein: The width of each step of the trench in the direction from the main junction region to the junction termination region is different; or / and the height of each step of the trench in the direction from the substrate to the drift region is the same.

6. The semiconductor device terminal structure according to claim 1, wherein: The sidewall of only one side of the trench is a step structure; or / and the second doping region at the bottom of the trench is directly connected to the first doping region.

7. The semiconductor device terminal structure according to claim 1, wherein: Along a direction from the drift region to the substrate, a depth of the second doping region is less than a depth of the first doping region.

8. The semiconductor device terminal structure according to claim 1, wherein: The dielectric layer is a semiconductor layer, and the doping type of the semiconductor layer is the same as the doping type of the first doping region.

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