A coupled voltage-dividing longitudinal field plate device and manufacturing method

Abstract

The present invention provides a coupled voltage-dividing longitudinal field plate device and a manufacturing method, comprising: a first conductive type semiconductor substrate, a first conductive type well region, a first conductive type heavily doped semiconductor contact region, a second conductive type well region, a second conductive type heavily doped semiconductor contact region; a field oxide layer, a gate metal; a polysilicon electrode; a capacitive coupling structure is formed by the second layer of metal, and an adjustable internal potential is introduced into the device, thereby proposing a coupled voltage-dividing longitudinal field plate device, which solves the problem that the potential of an ordinary longitudinal field plate is difficult to adjust, optimizes the internal electric field distribution in the drift region of the device, and improves the voltage resistance and operating stability of the device.

Description

Technical Field

[0001] The invention belongs to the field of power semiconductors and mainly proposes a coupled voltage-dividing longitudinal field plate device and a manufacturing method thereof. Background Art

[0002] Lateral double-diffused metal oxide semiconductor (LDMOS) devices have the advantages of fast switching speed and easy integration, and are widely used in power semiconductor integrated circuits. When optimizing the design of the device, the trade-off between the withstand voltage and on-resistance of the LDMOS device is the main factor limiting its performance. To solve this problem, the industry has proposed a semiconductor device with a vertical field plate (VFP). By introducing a vertical field plate in the drift region of the lateral device, the drift region of the device is depleted, so that the device can also have a strong depletion capability under the condition of large drift region doping. However, in conventional vertical field plate devices, the potential of the longitudinal field plate is generally connected to a fixed potential, and the regulating effect on the internal electric field of the device is limited. How to adjust the potential of the longitudinal field plate through the coupling design of the metal-to-metal capacitance is the core problem solved by this patent. Summary of the Invention

[0003] The present invention uses a compatible process to form a capacitive coupling structure through a second layer of metal, introduces an adjustable internal potential inside the device, and proposes a coupled voltage-dividing longitudinal field plate device, which solves the problem that the potential of ordinary longitudinal field plates is difficult to adjust, optimizes the internal electric field distribution in the drift region of the device, and improves the voltage resistance and operating stability of the device.

[0004] In order to achieve the above-mentioned object of the invention, the technical solution of the present invention is as follows:

[0005] A coupled voltage-dividing longitudinal field plate device, comprising:

[0006] The second conductive type well region 21 is located above the first conductive type semiconductor substrate 11, the first conductive type well region 12 is located on the left side of the second conductive type well region 21, and the first conductive type heavily doped semiconductor contact region 13 and the second conductive type heavily doped semiconductor contact region 23 are located in the first conductive type well region 12; the source first layer metal 51 is located on the upper surface of the first conductive type heavily doped semiconductor contact region 13 and the second conductive type heavily doped semiconductor contact region 23; the second conductive type well region 22 is located in the second conductive type well region 21, and the second conductive type well region 22 surrounds the second conductive type heavily doped semiconductor contact region 23, and the drain first layer The metal 54 is located on the upper surface of the second conductive type heavily doped semiconductor contact region 23; the second dielectric oxide layer 32 is located above the first conductive type well region 12, and the left end contacts the second conductive type heavily doped semiconductor contact region 23, and the right end contacts the second conductive type well region 21; the control gate polysilicon electrode 42 covers the upper surface of the second dielectric oxide layer 32; the third dielectric oxide layer 33 is located above the second conductive type well region 21, and the left end contacts the second dielectric oxide layer 32, and the right end contacts the second conductive type heavily doped semiconductor contact region 23; the first dielectric oxide layer 31 and the polysilicon electrode 41 constitute a longitudinal field plate, and the first dielectric The oxide layer 31 surrounds the polysilicon electrode 41, the vertical field plate is located in the second conductive type well region 21, and is connected to the vertical field plate first layer metal 53 through a through hole; the source second layer metal 61 is connected to the source first layer metal 51 through a through hole, the source second layer metal 61 is located above the source first layer metal 51 and extends in the z direction, and extends in the x direction to a portion of the second conductive type well region 21, the drain second layer metal 63 is connected to the drain first layer metal 54 through a through hole, the drain second layer metal 63 is located above the drain first layer metal 54 and extends in the z direction, and extends in the x direction to a portion of the second conductive type well region 21, on the xy plane The longitudinal field plate second layer metal 62 is located inside the area surrounded by the source second layer metal 61 and the drain second layer metal 63. The longitudinal field plate second layer metal 62 is distributed at equal intervals with the source second layer metal 61 and the drain second layer metal 63 in the z-axis direction to form a capacitive coupling structure; wherein, the direction from the source first conductivity type heavily doped semiconductor contact region 13 to the drain second conductivity type heavily doped semiconductor contact region 23 is defined as the x-axis direction, the direction from the source first conductivity type heavily doped semiconductor contact region 13 to the first conductivity type semiconductor substrate 11 is defined as the y-axis direction, and the direction perpendicular to the xy plane and pointing into the plane is defined as the z-axis direction.

[0007] As a preferred embodiment, the longitudinal field plates distributed in the second conductive type well region 21 are discrete or continuous in the z direction.

[0008] As a preferred embodiment, the capacitive coupling structure is a linear interface where the longitudinal field plate second metal layer 62 is parallel to the source second metal layer 61 and the drain second metal layer 63 along the z-axis.

[0009] As a preferred embodiment, the capacitive coupling structure is as follows: the longitudinal field plate second metal layer 62 is provided with an arc structure protruding toward the source second metal layer 61 in the middle of the interface parallel to the source second metal layer 61 in the z-axis direction, and the source second metal layer 61 is provided with an arc structure parallel to the protruding structure at a corresponding position;

[0010] The longitudinal field plate second metal layer 62 has an arc structure protruding toward the drain second metal layer 63 in the middle of the interface parallel to the drain second metal layer 63 in the z-axis direction. The drain second metal layer 63 has an arc structure parallel to the protruding structure at the corresponding position.

[0011] As a preferred embodiment, the capacitive coupling structure is as follows: the longitudinal field plate second metal layer 62 is provided with a plurality of arc structures that continuously protrude toward the source second metal layer 61 in the middle of the interface parallel to the source second metal layer 61 in the z-axis direction, and the source second metal layer 61 is provided with a plurality of arc structures parallel to the continuous protruding structures at corresponding positions;

[0012] The longitudinal field plate second layer metal 62 has a plurality of arc structures continuously protruding toward the drain second layer metal 63 in the middle of the interface parallel to the drain second layer metal 63 in the z-axis direction, and the drain second layer metal 63 has a plurality of arc structures parallel to the continuous protruding structures at the corresponding positions.

[0013] As a preferred embodiment, the capacitive coupling structure is:

[0014] The longitudinal field plate second metal layer 62 has a plurality of arc structures that are continuously concave toward the source second metal layer 61 in the middle of the interface parallel to the source second metal layer 61 in the z-axis direction. The source second metal layer 61 has a plurality of arc structures parallel to the continuous concave structures at corresponding positions.

[0015] The longitudinal field plate second layer metal 62 has a plurality of arc structures continuously concave toward the drain second layer metal 63 in the middle of the interface parallel to the drain second layer metal 63 in the z-axis direction, and the drain second layer metal 63 has a plurality of arc structures parallel to the continuous concave structure at the corresponding position.

[0016] As a preferred embodiment, the capacitive coupling structure is as follows: the longitudinal field plate second metal layer 62 is provided with a wavy structure that is alternately concave and convex toward the source second metal layer 61 in the middle of the interface parallel to the source second metal layer 61 in the z-axis direction, and the source second metal layer 61 is provided with a wavy structure parallel to the concave and convex structure at a corresponding position;

[0017] The longitudinal field plate second layer metal 62 is provided with a plurality of wavy structures that are alternately concave and convex toward the drain second layer metal 63 in the middle of the interface parallel to the drain second layer metal 63 in the z-axis direction, and the drain second layer metal 63 is provided with a wavy structure parallel to the concave and convex structures at the corresponding position.

[0018] As a preferred embodiment, the source second metal layer 61 extends in the x-direction to the end close to the drain second metal layer 63 and continues to extend in the z-axis direction, and the extended portion is a rectangle; the drain second metal layer 63 extends in the x-direction to the end close to the source second metal layer 61 and continues to extend in the z-axis direction, and the extended portion is a rectangle, and the longitudinal field plate second metal layer 62 is enclosed inside by the source second metal layer 61 and the drain second metal layer 63.

[0019] As a preferred embodiment, the source second metal layer 61 extends in the x-direction to the end near the drain second metal layer 63 and continues to extend in the z-axis and x-axis directions, and the extended portion is a right triangle. The drain second metal layer 63 continues to extend in the z-axis and x-axis directions at the end near the source second metal layer 61, and the extended portion is a right triangle. The longitudinal field plate second metal layer 62 is enclosed inside by the source second metal layer 61 and the drain second metal layer 63.

[0020] As a preferred embodiment, the device is one of a single RESURF structure, a double RESURF structure, and a triple RESURF structure; and / or in addition to the LDMOS device, it is also used for a LIGBT device.

[0021] The present invention also provides a method for manufacturing a coupled voltage-dividing longitudinal field plate device, comprising the following steps:

[0022] Step 1: Select a substrate material, which is a silicon-based first-type conductive semiconductor substrate 11;

[0023] Step 2: Ion implantation of first conductivity type impurities and push-in junctions to form a first conductivity type well region 12, and ion implantation of second conductivity type impurities and push-in junctions to form a second conductivity type well region 21;

[0024] Step 3: Ion implantation of second conductivity type impurities and push junction to form a second conductivity type well region 22;

[0025] Step 4: Forming grooves by photolithography and etching;

[0026] Step 5: forming a first dielectric oxide layer 31 in the trench;

[0027] Step 6: deposit polysilicon and etch it to the silicon plane to form a polysilicon electrode 41;

[0028] Step 7: growing and forming a third dielectric oxide layer 33;

[0029] Step 8: growing gate oxide by thermal oxidation, and then forming a second dielectric oxide layer 32 by etching;

[0030] Step 8: depositing polysilicon and etching to form a control gate polysilicon electrode 42;

[0031] Step 9: Implanting to form a first conductivity type heavily doped semiconductor contact region 13 and a second conductivity type heavily doped semiconductor contact region 23;

[0032] Step 10: Deposit silicon oxide and planarize the surface to form a fourth dielectric oxide layer 34, and form contact holes by etching. Then, deposit and etch the first layer of metal to form surface metal and metal electrodes.

[0033] Step 11: deposit silicon oxide and planarize the surface to form a fifth dielectric oxide layer 35, and form contact holes by etching. Then deposit and etch a second layer of metal to form a surface metal coupling structure.

[0034] The beneficial effects of the present invention are as follows: by introducing different forms of coupling structures in the second layer of metal in a conventional longitudinal field plate structure, the invention provides the longitudinal field plate with an adjustable electric potential, thereby solving the problem that the electric potential of the conventional longitudinal field plate is difficult to adjust, optimizing the internal electric field distribution in the drift region of the device, and improving the voltage resistance and operating stability of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 Schematic diagram of the three-dimensional structure of a coupled voltage-dividing longitudinal field plate device according to Example 1;

[0036] Figure 2 A top view of a coupled voltage-dividing longitudinal field plate device structure according to Example 1;

[0037] Figure 3 A top view of a coupled voltage-dividing longitudinal field plate device structure according to Example 2;

[0038] Figure 4 A top view of a coupled voltage-dividing longitudinal field plate device structure according to Example 3;

[0039] Figure 5 A top view of a coupled voltage-dividing longitudinal field plate device structure according to Example 4;

[0040] Figure 6 A top view of a coupled voltage-dividing longitudinal field plate device structure according to Example 5;

[0041] Figure 7 A top view of a coupled voltage-dividing longitudinal field plate device structure according to Example 6;

[0042] Figure 8A top view of a coupled voltage-dividing longitudinal field plate device structure according to Example 7;

[0043] 9(a)-(k) are schematic diagrams of a process flow of a coupled voltage-dividing longitudinal field plate device according to Example 1;

[0044] 11 is a first conductivity type semiconductor substrate, 12 is a first conductivity type well region, 13 is a first conductivity type heavily doped semiconductor contact region; 21 is a second conductivity type well region, 22 is a second conductivity type well region, 23 is a second conductivity type heavily doped semiconductor contact region; 31 is a first dielectric oxide layer, 32 is a second dielectric oxide layer, 33 is a third dielectric oxide layer; 34 is a fourth dielectric oxide layer, 35 is a fifth dielectric oxide layer, 41 is a polysilicon electrode; 42 is a control gate polysilicon electrode, 51 is a first layer of source metal, 52 is a gate metal, 53 is a first layer of vertical field plate metal, 54 is a first layer of drain metal; 61 is a second layer of source metal, 62 is a second layer of vertical field plate metal, 63 is a second layer of drain metal. DETAILED DESCRIPTION

[0045] The following describes the embodiments of the present invention through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present invention from the disclosure herein. The present invention may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different viewpoints and applications without departing from the spirit of the present invention.

[0046] Example 1

[0047] A coupled voltage-dividing longitudinal field plate device as described in Example 1, such as Figure 1 As shown, specifically including:

[0048] The second conductive type well region 21 is located above the first conductive type semiconductor substrate 11, the first conductive type well region 12 is located on the left side of the second conductive type well region 21, and the first conductive type heavily doped semiconductor contact region 13 and the second conductive type heavily doped semiconductor contact region 23 are located in the first conductive type well region 12; the source first layer metal 51 is located on the upper surface of the first conductive type heavily doped semiconductor contact region 13 and the second conductive type heavily doped semiconductor contact region 23; the second conductive type well region 22 is located in the second conductive type well region 21, and the second conductive type well region 22 surrounds the second conductive type heavily doped semiconductor contact region 23, and the drain first layer The metal 54 is located on the upper surface of the second conductive type heavily doped semiconductor contact region 23; the second dielectric oxide layer 32 is located above the first conductive type well region 12, and the left end contacts the second conductive type heavily doped semiconductor contact region 23, and the right end contacts the second conductive type well region 21; the control gate polysilicon electrode 42 covers the upper surface of the second dielectric oxide layer 32; the third dielectric oxide layer 33 is located above the second conductive type well region 21, and the left end contacts the second dielectric oxide layer 32, and the right end contacts the second conductive type heavily doped semiconductor contact region 23; the first dielectric oxide layer 31 and the polysilicon electrode 41 constitute a longitudinal field plate, and the first dielectric The oxide layer 31 surrounds the polysilicon electrode 41, the vertical field plate is located in the second conductive type well region 21, and is connected to the vertical field plate first layer metal 53 through a through hole; the source second layer metal 61 is connected to the source first layer metal 51 through a through hole, the source second layer metal 61 is located above the source first layer metal 51 and extends in the z direction, and extends in the x direction to a portion of the second conductive type well region 21, the drain second layer metal 63 is connected to the drain first layer metal 54 through a through hole, the drain second layer metal 63 is located above the drain first layer metal 54 and extends in the z direction, and extends in the x direction to a portion of the second conductive type well region 21, on the xy plane The longitudinal field plate second layer metal 62 is located inside the area surrounded by the source second layer metal 61 and the drain second layer metal 63. The longitudinal field plate second layer metal 62 is distributed at equal intervals with the source second layer metal 61 and the drain second layer metal 63 in the z-axis direction to form a capacitive coupling structure; wherein, the direction from the source first conductivity type heavily doped semiconductor contact region 13 to the drain second conductivity type heavily doped semiconductor contact region 23 is defined as the x-axis direction, the direction from the source first conductivity type heavily doped semiconductor contact region 13 to the first conductivity type semiconductor substrate 11 is defined as the y-axis direction, and the direction perpendicular to the xy plane and pointing into the plane is defined as the z-axis direction.

[0049] in, Figure 2 This is a top view of a coupled voltage-dividing longitudinal field plate device structure of Example 1. The capacitive coupling structure is a linear interface of the longitudinal field plate second metal layer 62 parallel to the source second metal layer 61 and the drain second metal layer 63 on the z-axis.

[0050] The longitudinal field plates distributed in the second conductive type well region 21 are discrete or continuous in the z direction.

[0051] The device structure is one of single RESURF, double RESURF, and triple RESURF.

[0052] In addition to LDMOS devices, this structure can also be used for LIGBTs.

[0053] Its basic working principle is as follows: In the conventional longitudinal field plate structure, the present invention introduces different forms of coupling structures in the second layer of metal to provide the longitudinal field plate with an adjustable electric potential, thereby solving the problem that the electric potential of the ordinary longitudinal field plate is difficult to adjust, optimizing the internal electric field distribution in the drift region of the device, and improving the voltage resistance and operating stability of the device.

[0054] As shown in FIG9 (a)-(k), it is a schematic diagram of the process flow of Example 1 of the present invention, which specifically includes the following steps:

[0055] Step 1: Select a substrate material, which is a silicon-based first-type conductive semiconductor substrate 11, as shown in FIG9(a);

[0056] Step 2: Ion implantation of first conductivity type impurities and push-through junctions to form a first conductivity type well region 12, and ion implantation of second conductivity type impurities and push-through junctions to form a second conductivity type well region 21, as shown in FIG9(b);

[0057] Step 3: Ion implantation of second conductivity type impurities and push junction to form a second conductivity type well region 22, as shown in FIG9(c);

[0058] Step 4: Forming a groove by photolithography and etching, as shown in FIG9( d );

[0059] Step 5: forming a first dielectric oxide layer 31 in the trench, as shown in FIG9( e );

[0060] Step 6: deposit polysilicon and etch it to the silicon plane to form a polysilicon electrode 41, as shown in FIG9(f);

[0061] Step 7: growing and forming a third dielectric oxide layer 33, as shown in FIG9(g);

[0062] Step 8: growing gate oxide by thermal oxidation, and then forming a second dielectric oxide layer 32 by etching;

[0063] Step 8: depositing polysilicon and etching to form a control gate polysilicon electrode 42, as shown in FIG9(h);

[0064] Step 9: implanting to form a first conductivity type heavily doped semiconductor contact region 13 and a second conductivity type heavily doped semiconductor contact region 23, as shown in FIG9(i);

[0065] Step 10: Deposit silicon oxide and planarize the surface to form a fourth dielectric oxide layer 34, and form contact holes by etching. Then, deposit and etch the first layer of metal to form surface metal and metal electrodes, as shown in FIG9(j).

[0066] Step 11: Deposit silicon oxide and planarize the surface to form a fifth dielectric oxide layer 35, and form contact holes by etching. Then, deposit and etch a second layer of metal to form a surface metal coupling structure, as shown in FIG9(k).

[0067] Example 2

[0068] like Figure 3 FIG. 1 is a schematic diagram of a coupled voltage-dividing longitudinal field plate device according to Example 2. The structure of this example differs from that of Example 1 in that the capacitive coupling structure is:

[0069] The second layer of the longitudinal field plate metal 62 is provided with an arc structure protruding toward the second layer of the source metal 61 in the middle of the interface parallel to the second layer of the source metal 61 in the z-axis direction. The second layer of the source metal 61 is provided with an arc structure parallel to the protruding structure at a corresponding position.

[0070] The longitudinal field plate second metal layer 62 has an arc structure protruding toward the drain second metal layer 63 in the middle of the interface parallel to the drain second metal layer 63 in the z-axis direction. The drain second metal layer 63 has an arc structure parallel to the protruding structure at the corresponding position.

[0071] Its working principle is basically the same as that of Example 1.

[0072] Example 3

[0073] like Figure 4 FIG. 1 is a schematic diagram of a coupled voltage-dividing longitudinal field plate device according to Example 3. The structure of this example differs from that of Example 1 in that the capacitive coupling structure is:

[0074] The longitudinal field plate second metal layer 62 is provided with a plurality of arc structures that continuously protrude toward the source second metal layer 61 in the middle of the interface parallel to the source second metal layer 61 in the z-axis direction. The source second metal layer 61 is provided with a plurality of arc structures parallel to the continuous protruding structures at corresponding positions.

[0075] The longitudinal field plate second layer metal 62 has a plurality of arc structures continuously protruding toward the drain second layer metal 63 in the middle of the interface parallel to the drain second layer metal 63 in the z-axis direction, and the drain second layer metal 63 has a plurality of arc structures parallel to the continuous protruding structures at the corresponding positions.

[0076] Its working principle is basically the same as that of Example 1.

[0077] Example 4

[0078] like Figure 5 FIG. 1 is a schematic diagram of a coupled voltage-dividing longitudinal field plate device according to Example 4. The structure of this example differs from that of Example 1 in that the capacitive coupling structure is:

[0079] The longitudinal field plate second metal layer 62 has a plurality of arc structures that are continuously concave toward the source second metal layer 61 in the middle of the interface parallel to the source second metal layer 61 in the z-axis direction. The source second metal layer 61 has a plurality of arc structures parallel to the continuous concave structures at corresponding positions.

[0080] The longitudinal field plate second layer metal 62 has a plurality of arc structures continuously concave toward the drain second layer metal 63 in the middle of the interface parallel to the drain second layer metal 63 in the z-axis direction, and the drain second layer metal 63 has a plurality of arc structures parallel to the continuous concave structure at the corresponding position.

[0081] Its working principle is basically the same as that of Example 1.

[0082] Example 5

[0083] like Figure 6 FIG. 1 is a schematic diagram of a coupled voltage-dividing longitudinal field plate device according to Example 5. The structure of this example differs from that of Example 1 in that the capacitive coupling structure is:

[0084] The longitudinal field plate second metal layer 62 has a wavy structure that is alternately concave and convex toward the source second metal layer 61 in the middle of the interface parallel to the source second metal layer 61 in the z-axis direction. The source second metal layer 61 has a wavy structure parallel to the concave and convex structures at the corresponding position.

[0085] The longitudinal field plate second layer metal 62 is provided with a plurality of wavy structures that are alternately concave and convex toward the drain second layer metal 63 in the middle of the interface parallel to the drain second layer metal 63 in the z-axis direction, and the drain second layer metal 63 is provided with a wavy structure parallel to the concave and convex structures at the corresponding position.

[0086] Its working principle is basically the same as that of Example 1.

[0087] Example 6

[0088] like Figure 7, which is a schematic diagram of a coupled voltage-dividing longitudinal field plate device of Example 6. The structure of this example differs from that of Example 1 in that the source second metal layer 61 extends in the x-direction to the end close to the drain second metal layer 63 and continues to extend in the z-axis direction, and the extended portion is a rectangle; the drain second metal layer 63 extends in the x-direction to the end close to the source second metal layer 61 and continues to extend in the z-axis direction, and the extended portion is a rectangle. The longitudinal field plate second metal layer 62 is enclosed inside by the source second metal layer 61 and the drain second metal layer 63.

[0089] Its working principle is basically the same as that of Example 1.

[0090] Example 7

[0091] like Figure 8 As shown, this is a schematic diagram of a coupled voltage-dividing longitudinal field plate device of Example 7. The structure of this example differs from that of Example 1 in that the source second metal layer 61 extends in the x-direction to the end near the drain second metal layer 63 and continues to extend in the z-axis and x-axis directions, and the extended portion is a right triangle. The drain second metal layer 63 continues to extend in the z-axis and x-axis directions at the end near the source second metal layer 61, and the extended portion is a right triangle. The longitudinal field plate second metal layer 62 is enclosed inside by the source second metal layer 61 and the drain second metal layer 63.

[0092] Its working principle is basically the same as that of Example 1.

[0093] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed herein are intended to be encompassed by the claims of the present invention.

Claims

1. A coupled voltage-dividing longitudinal field plate device, characterized in that include: A second conductive type well region (21) is located above a first conductive type semiconductor substrate (11), the first conductive type well region (12) is located on the left side of the second conductive type well region (21), and a first conductive type heavily doped semiconductor contact region (13) and a second conductive type heavily doped semiconductor contact region (23) are located in the first conductive type well region (12); The first metal layer (51) of the source is located on the upper surfaces of the first conductive type heavily doped semiconductor contact region (13) and the second conductive type heavily doped semiconductor contact region (23); the second conductive type well region (22) is located in the second conductive type well region (21), and the second conductive type well region (22) surrounds the second conductive type heavily doped semiconductor contact region (23); the first metal layer (54) of the drain is located on the upper surface of the second conductive type heavily doped semiconductor contact region (23); the second dielectric oxide layer (32) is located above the first conductive type well region (12), and the left end is adjacent to the second conductive type heavily doped semiconductor contact region (23). The first dielectric oxide layer (31) and the polysilicon electrode (41) form a longitudinal field plate, and the first dielectric oxide layer (31) surrounds the polysilicon electrode (41). The longitudinal field plate is located in the second conductive type well region (21) and is connected to the first metal layer (23) of the longitudinal field plate through a through hole. 53) is connected; the source second layer metal (61) is connected to the source first layer metal (51) through a through hole, the source second layer metal (61) is located above the source first layer metal (51) and extends in the z direction, and extends in the x direction to above a portion of the second conductive type well region (21), the drain second layer metal (63) is connected to the drain first layer metal (54) through a through hole, the drain second layer metal (63) is located above the drain first layer metal (54) and extends in the z direction, and extends in the x direction to above a portion of the second conductive type well region (21), the longitudinal field plate second layer metal (62) is located on the xy plane between the source second layer metal (6 1) and the drain second metal layer (63), the longitudinal field plate second metal layer (62) is distributed at equal intervals with the source second metal layer (61) and the drain second metal layer (63) in the z-axis direction to form a capacitive coupling structure; wherein the direction from the source first conductive type heavily doped semiconductor contact region (13) to the drain second conductive type heavily doped semiconductor contact region (23) is defined as the x-axis direction, the direction from the source first conductive type heavily doped semiconductor contact region (13) to the first conductive type semiconductor substrate (11) is defined as the y-axis direction, and the direction perpendicular to the xy plane and pointing into the plane is defined as the z-axis direction.

2. The coupled voltage-dividing longitudinal field plate device according to claim 1, characterized in that: The longitudinal field plates distributed in the second conductive type well region (21) are discrete or continuous in the z direction.

3. The coupled voltage-dividing longitudinal field plate device according to claim 1, characterized in that: The capacitive coupling structure is a linear interface in which the second metal layer (62) of the longitudinal field plate is parallel to the second metal layer (61) of the source electrode and the second metal layer (63) of the drain electrode on the z-axis.

4. The coupled voltage-dividing longitudinal field plate device according to claim 1, characterized in that: The capacitive coupling structure is: The longitudinal field plate second layer metal (62) is provided with an arc structure protruding toward the source second layer metal (61) in the middle of an interface parallel to the source second layer metal (61) in the z-axis direction, and the source second layer metal (61) is provided with an arc structure parallel to the protruding structure at a corresponding position; The longitudinal field plate second layer metal (62) is provided with an arc structure protruding toward the drain second layer metal (63) in the middle of an interface parallel to the drain second layer metal (63) in the z-axis direction, and the drain second layer metal (63) is provided with an arc structure parallel to the protruding structure at a corresponding position.

5. The coupled voltage-dividing longitudinal field plate device according to claim 1, characterized in that: The capacitive coupling structure is: The longitudinal field plate second layer metal (62) is provided with a plurality of arc structures that continuously protrude toward the source electrode second layer metal (61) in the middle of an interface parallel to the source electrode second layer metal (61) in the z-axis direction, and the source electrode second layer metal (61) is provided with a plurality of arc structures parallel to the continuous protruding structures at corresponding positions; The longitudinal field plate second layer metal (62) is provided with a plurality of arc structures continuously protruding toward the drain second layer metal (63) in the middle of an interface parallel to the drain second layer metal (63) in the z-axis direction, and the drain second layer metal (63) is provided with a plurality of arc structures parallel to the continuous protruding structures at corresponding positions.

6. The coupled voltage-dividing longitudinal field plate device according to claim 1, characterized in that: The capacitive coupling structure is: The longitudinal field plate second layer metal (62) is provided with a plurality of arc structures continuously concave toward the source electrode second layer metal (61) in the middle of an interface parallel to the source electrode second layer metal (61) in the z-axis direction, and the source electrode second layer metal (61) is provided with a plurality of arc structures parallel to the continuous concave structures at corresponding positions; The longitudinal field plate second layer metal (62) is provided with a plurality of arc structures continuously concave toward the drain second layer metal (63) in the middle of an interface parallel to the drain second layer metal (63) in the z-axis direction, and the drain second layer metal (63) is provided with a plurality of arc structures parallel to the continuous concave structures at corresponding positions.

7. The coupled voltage-dividing longitudinal field plate device according to claim 1, characterized in that: The capacitive coupling structure is: The longitudinal field plate second layer metal (62) is provided with a wave-shaped structure that is alternately concave and convex toward the source electrode second layer metal (61) in the middle of the interface parallel to the source electrode second layer metal (61) in the z-axis direction, and the source electrode second layer metal (61) is provided with a wave-shaped structure parallel to the concave and convex structures at a corresponding position; The longitudinal field plate second layer metal (62) is provided with a plurality of wave-shaped structures alternately concave and convex toward the drain second layer metal (63) in the middle of an interface parallel to the drain second layer metal (63) in the z-axis direction, and the drain second layer metal (63) is provided with a wave-shaped structure parallel to the concave and convex structures at a corresponding position.

8. The coupled voltage-dividing longitudinal field plate device according to claim 1, characterized in that: The source second layer metal (61) extends in the x direction to an end close to the drain second layer metal (63) and continues to extend in the z-axis direction, and the extended portion is rectangular; the drain second layer metal (63) extends in the x direction to an end close to the source second layer metal (61) and continues to extend in the z-axis direction, and the extended portion is rectangular; the longitudinal field plate second layer metal (62) is enclosed inside by the source second layer metal (61) and the drain second layer metal (63).

9. The coupled voltage-dividing longitudinal field plate device according to claim 1, characterized in that: The source second layer metal (61) extends in the x direction to the end close to the drain second layer metal (63) and continues to extend in the z-axis and x-axis directions, and the extended portion is a right triangle. The drain second layer metal (63) continues to extend in the z-axis and x-axis directions at the end close to the source second layer metal (61), and the extended portion is a right triangle. The longitudinal field plate second layer metal (62) is enclosed inside by the source second layer metal (61) and the drain second layer metal (63).

10. The coupled voltage-dividing longitudinal field plate device according to claim 1, characterized in that: The device has a single RESURF structure, a double RESURF structure, or a triple RESURF structure; and / or is used for a LIGBT device in addition to an LDMOS device.

11. A method for manufacturing a coupled voltage-dividing longitudinal field plate device according to any one of claims 1 to 9, characterized in that The steps include: Step 1: Select a substrate material, which is a silicon-based first-type conductive semiconductor substrate (11); Step 2: Ion-implanting first conductive type impurities and pushing the junction to form a first conductive type well region (12), and ion-implanting second conductive type impurities and pushing the junction to form a second conductive type well region (21); Step 3: Ion implantation of second conductivity type impurities and push junction to form a second conductivity type well region (22); Step 4: Forming grooves by photolithography and etching; Step 5: forming a first dielectric oxide layer (31) in the trench; Step 6: depositing polysilicon and etching to the silicon plane to form a polysilicon electrode (41); Step 7: growing and forming a third dielectric oxide layer (33); Step 8: growing gate oxide by thermal oxidation, and then forming a second dielectric oxide layer (32) by etching; Step 8: depositing polysilicon and etching to form a control gate polysilicon electrode (42); Step 9: implanting to form a first conductivity type heavily doped semiconductor contact region (13) and a second conductivity type heavily doped semiconductor contact region (23); Step 10: depositing silicon oxide and flattening the surface to form a fourth dielectric oxide layer (34), and forming contact holes by etching, and then depositing and etching the first layer of metal to form surface metal and metal electrodes; Step 11: deposit silicon oxide and flatten the surface to form a fifth dielectric oxide layer (35), and form contact holes by etching, then deposit and etch a second layer of metal to form a surface metal coupling structure.

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