P-on-n type hgi-cdte in-situ growth embedded planar heterojunction detector and preparation method thereof
By using P-on-n type mercury cadmium telluride in-situ growth of embedded planar heterojunction detectors, the problems of material damage in mesa heterojunction process and thermal damage in planar homojunction process were solved, realizing the fabrication of high-performance infrared detectors and improving response wavelength and yield.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- KUNMING INST OF PHYSICS
- Filing Date
- 2024-04-30
- Publication Date
- 2026-06-09
AI Technical Summary
In existing P-on-n type infrared detectors, the mesa heterojunction process suffers from poor damage to mercury cadmium telluride material, poor passivation layer coverage, and poor interface compactness. In the planar homojunction process, high-temperature annealing causes thermal damage and impurity diffusion, resulting in incompatibility and affecting detector performance.
An embedded planar heterojunction detector is grown in situ using P-on-n type mercury cadmium telluride. By stacking substrate material layers, n-type absorption layers, isolation grid layers, P-type cap regions and passivation layers from bottom to top, combined with liquid phase epitaxy and photolithography, an independent pixel structure is formed, avoiding material damage and interface defects and reducing dark current.
It effectively reduces dark current, improves detector performance, achieves a response wavelength of 14.3 micrometers, increases the yield rate by 10%, and achieves dark current at the Rule07 level at low temperatures.
Smart Images
Figure CN118352424B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to detectors and their fabrication methods, particularly to a P-on-n type in-situ grown embedded planar heterojunction detector of mercury cadmium telluride and its fabrication method, belonging to the field of infrared detector design and manufacturing technology. Background Technology
[0002] Infrared focal plane array detectors are widely used in military, industrial, environmental, and medical fields. Among the many materials used in infrared detectors, mercury cadmium telluride (HCDT) has the advantage of high quantum efficiency. By changing the composition x, its bandgap can meet the infrared detection requirements of three atmospheric windows: 1~3μm, 3~5μm, and 8~14μm, demonstrating significant advantages in basic physical properties. HCDT infrared focal plane array detectors have been developed to the third generation, with the main technical routes including N-on-p and P-on-n types. In current mature infrared detector manufacturing processes, the quantum efficiency of infrared detectors is above 80%, even reaching 100%. From the perspective of optical signal alone, the potential for significantly improving the performance of infrared detectors is limited. In contrast, by reducing dark current, the performance of HCDT infrared detectors can be improved by several orders of magnitude. Among N-on-p and P-on-n structures, P-on-n infrared detectors have a significant advantage in reducing dark current, with a reduction of up to two orders of magnitude. The fabrication routes for P-on-n infrared detectors are divided into two types: planar homojunction (implantation junction formation) and mesa heterojunction (growth junction formation).
[0003] In mesa heterojunction technology, mercury cadmium telluride (HCdT) is in-situ doped with As, resulting in high activation efficiency. An n-type HCdT doped with In is grown on a substrate via liquid-phase epitaxy, followed by the growth of an As-doped p-type HCdT. After annealing and activation, a pn junction is formed. The n-type layer is the absorption layer, typically with a thickness greater than 5 μm, while the p-type layer is thinner, generally less than 2 μm. The p-type layer has a higher Cd content and a wider bandgap than the n-type layer, resulting in greater material stability. This is beneficial for reducing tunneling current and noise, and its low-temperature performance is superior to that of homojunctions. In mesa heterojunction technology, mercury cadmium telluride (HCDT) array detectors need to isolate adjacent pixel pn junctions. Generally, etching / chemical etching processes are used to isolate the p-type layer of each pixel. Since damage to the HCDT material is inevitable during mesa fabrication, a large number of free sidewall surfaces are introduced in the process, and these surfaces are then finely passivated in subsequent processes. In addition, the poor coverage and interface density of the sidewall passivation layer of the mesa heterojunction further increase the difficulty of passivation. At the same time, the uniformity of mesa fabrication is also difficult to control, which leads to leakage.
[0004] In planar homojunction technology, indium (In)-doped n-type mercury cadmium telluride (HCdT) is grown on a substrate via liquid-phase epitaxy. The p-region is prepared using As implantation. After As ion implantation, the HCdT material requires high-temperature annealing to activate it and form a pn junction. The advantage of this method is that it achieves planar passivation and has lower process complexity. However, in planar homojunction technology, arsenic (As) implantation is required to fabricate the pn junction. Structurally, surface bandgap modulation is not possible, the implanted region has a high defect density, As atom activation requires a complex annealing process with low activation rates, and the annealing process introduces impurity diffusion problems.
[0005] In summary, the two manufacturing processes for P-on-n type infrared detectors each have their own advantages and disadvantages and are incompatible. Therefore, it is necessary to improve the existing technologies to further enhance the performance of infrared detectors. Summary of the Invention
[0006] To address the numerous problems in existing mesa P-on-n heterojunction processes based on mercury cadmium telluride (MDT) heteromaterials, such as material damage, poor passivation layer coverage and interface density leading to leakage, and thermal damage and impurity diffusion caused by high-temperature annealing in planar homojunction processes, this invention provides a P-on-n type MDT in-situ grown embedded planar heterojunction detector and its fabrication method.
[0007] This invention is achieved through the following technical solution: a P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector, characterized in that it includes: a substrate material layer, an n-type absorption layer, an n-type isolation grid layer for isolating pixels, an array of P-type cap regions located within the isolation grid of the n-type isolation grid layer, a passivation layer covering the n-type isolation grid layer and the array of p-type cap regions, an electrode contact hole disposed within the array of p-type cap regions and not covered by the passivation layer, and a contact electrode layer disposed in the electrode contact hole.
[0008] Both the n-type absorber layer and the arrayed p-type cap region are made of Hg. 1-x Cd x Te, where the value of x is less than 1.
[0009] The n-type absorption layer is doped with indium (In), and the indium (In) doping concentration is 1 × 10⁻⁶. 14 cm -3 —7×10 15 cm -3 .
[0010] The thickness of the p-type cap layer is 2.0-3.0 μm.
[0011] The array's P-type cap region is doped with arsenic (As), and the arsenic (As) doping concentration is 5 × 10⁻⁶. 16 cm-3 — 5×10 18 cm -3 .
[0012] The method for fabricating a P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector provided by this invention is characterized by comprising the following steps:
[0013] (1) Using Si, GaAs, or cadmium zinc telluride as the substrate material layer, an n-type absorber layer is grown on the substrate material layer by liquid phase epitaxy (LPE). The material of the n-type absorber layer is Hg. 1-x Cd x Te, where x has a value of 0.15-00.4, is used to dope indium (In) during the growth of the n-type absorber layer, forming n-type doping. The In doping concentration is 1×10⁻⁶. 14 cm -3 — 5×10 15 cm -3 ;
[0014] (2) Photolithography is performed on the n-type absorption layer in step (1). After development, the pixel area is exposed. The pixel area is chemically etched to remove a small part of the n-type absorption layer on the surface of the pixel area. Then, it is immersed in the stripping solution to remove the residual photoresist on the surface, so that an n-type isolation grid convex layer and a recessed area are formed on the surface.
[0015] (3) On the surface of the n-type isolation grid convex layer and the recessed region in step (2), an array of P-type Cap regions is prepared by liquid phase epitaxy (LPE). The material of the array of P-type Cap layers is Hg. 1-x Cd x Te, where x is 0.3-0.6, forms a bilayer material structure with similar surfaces, wherein the thickness of the arrayed P-type Cap region is 2.0-3.0 μm, and arsenic (As) is doped during the fabrication of the arrayed P-type Cap region, with an arsenic (As) doping concentration of 5 × 10⁻⁶. 16 cm -3 — 5×10 18 cm -3 This forms a doped array of P-type Cap regions;
[0016] (4) On the surface of the doped array P-type Cap region in step (3), mechanical and chemical polishing is performed to remove the periphery of the doped array P-type Cap region, exposing the lower n-type isolation grid and the array P-type Cap region within it. At the same time, surface planarization is performed to form a planar structure.
[0017] (5) On the planar structure of step (4), thermal evaporation, magnetron sputtering or MBE is performed to prepare a CdTe+ZnS composite passivation layer with a thickness of 3000~8000 angstroms, and the CdTe+ZnS composite passivation layer is annealed.
[0018] (6) Photolithography is performed on the corresponding part of the CdTe+ZnS composite passivation layer surface in step (5). ICP etching and / or chemical etching are used in the photolithography area to remove the CdTe+ZnS composite passivation layer and a small part of the array P-type Cap region in the photolithography area to form the first contact hole for which the contact electrode layer needs to be grown.
[0019] (7) Photolithography is performed on the surface of the CdTe+ZnS composite passivation layer in step (6) and around the first contact hole. After development, the second contact hole and photoresist that need to grow the contact electrode layer are exposed.
[0020] (8) Using ion beam sputtering or thermal evaporation, a metal constituting the contact electrode layer is grown in the first contact hole in step (6) and the second contact hole in step (7). The metal is a three-layer metal of Cr (1000 Å) + Pt (2000 Å) + Au (1000 Å) to obtain the detector blank.
[0021] (9) Immerse the detector blank from step (8) in the stripping solution to remove the photoresist outside the metal in the first contact hole and the second contact hole, as well as the metal on the surface of the photoresist, to obtain an in-situ grown embedded planar heterojunction detector of mercury cadmium telluride.
[0022] The present invention has the following advantages and effects: By adopting the above scheme, the mercury cadmium telluride heterojunction material is isolated into independent pixels using an n-type isolation grid layer, and a pixel structure is formed by growing an array of P-type Cap layers, resulting in a P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector. This effectively avoids damage to the mercury cadmium telluride material. Through the planar passivation process, leakage current is avoided due to poor passivation layer coverage and interface compactness. Compared with the conventional arsenic (As) injected planar p-on-n homojunction detector fabrication method, the heterojunction material structure formed by band modulation and the in-situ growth of pixels reduce interface defects, effectively suppress tunneling current, reduce dark current, and improve detector performance.
[0023] Through experimental comparison, this invention, thanks to the low-defect in-situ pixel growth preparation method and surface band modulation structure, enables the detector of this invention to achieve the Rule07 level of dark current at low temperature. This data is obtained according to the empirical formula of dark current of conventional P-on-n detectors. The detector response wavelength reaches 14.3 micrometers (65K), and the yield rate is improved by 10%. Its technical effect is obvious. Attached Figure Description
[0024] Figure 1 This is a schematic diagram of the structure of the present invention;
[0025] Figure 2 This is a top view of the present invention;
[0026] Figure 3 This is a diagram illustrating the detector formation process in the fabrication method of the present invention. Detailed Implementation
[0027] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0028] Unless otherwise specified in the embodiments, all processes or technologies are conventional.
[0029] The magnetron sputtering process parameters in the embodiment are as follows: sputtering power 250W, vacuum degree 10mTorr.
[0030] The photolithography process parameters in the embodiment are as follows: spin coating process, resist thickness greater than 2 micrometers.
[0031] The chemical etchant used in the examples consists of HBr + 1% Br2.
[0032] The stripping fluid used in the examples is acetone.
[0033] The ion beam sputtering process parameters in the embodiment are as follows: sputtering power 250W.
[0034] The n-type annealing process parameters in the embodiment are as follows: temperature is 250℃, time is 48h, and annealing is carried out in a Hg saturated atmosphere. Example 1
[0035] The P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector provided by the present invention comprises, from bottom to top, a substrate material layer 1, an n-type absorption layer 2, an n-type raised grid 3 and a recessed region 31 for isolating pixels, an array of P-type cap regions 4 located in the recessed region 31, a passivation layer 5 covering the n-type raised grid 3 and the array of P-type cap regions 4, a first contact hole 51 and a second contact hole 52 disposed in the array of P-type cap regions 4 and not covered by the passivation layer 5, and a contact electrode layer 7 disposed in the first contact hole 51 and the second contact hole 52.
[0036] Both the n-type absorber layer 2 and the arrayed p-type cap region 4 are made of Hg. 1-x Cd xTe, where the value of x is less than 1.
[0037] The n-type absorber layer 2 is doped with indium (In), and the indium (In) doping concentration is 3 × 10⁻⁶. 14 cm -3 .
[0038] The thickness of the array p-type cap region 4 is 2.5 micrometers.
[0039] The P-type cap region 4 of the array is doped with arsenic (As), and the arsenic doping concentration is 2 × 10⁻⁶. 17 cm -3 . Example 2
[0040] A method for fabricating a P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector includes the following steps:
[0041] (1): Using cadmium zinc telluride as substrate material layer 1, an n-type absorber layer 2 is grown on substrate material layer 1 by conventional liquid phase epitaxy (LPE) method. The material of n-type absorber layer 2 is Hg. 1-x Cd x Te, where x is 0.25, and indium (In) is doped during growth at a concentration of 5 × 10⁻⁶. 14 cm -3 , forming a doped n-type absorption layer 2;
[0042] (2): Perform conventional photolithography on the doped n-type absorption layer 2 in step (1), expose the pixel area after development, perform conventional chemical etching on the pixel area to remove a small part of the n-type absorption layer 2 on the surface of the photolithographic pixel area, and then immerse it in conventional stripping solution to remove the photoresist on the surface, so that n-type raised mesh 3 and recessed area 31 are formed on the surface.
[0043] (3): On the surface of the n-type raised mesh 3 and the recessed region 31 in step (2), an array of P-type Cap regions 4 is prepared by liquid phase epitaxy (LPE). The material of the array of P-type Cap regions 4 is Hg. 1-x Cd x Te, where x is 0.3, forms a bilayer material structure with similar surfaces, wherein the thickness of the array P-type Cap region 4 is 2.0 μm, and arsenic (As) is doped during the fabrication of the array P-type Cap region 4, with an arsenic (As) doping concentration of 2 × 10⁻⁶. 17 cm -3 This forms a doped array of P-type Cap regions 4;
[0044] (4): On the surface of the doped array P-type Cap region 4 in step (3), mechanical and chemical polishing is performed in accordance with the usual procedure to remove the periphery of the doped array P-type Cap region 4, exposing the lower n-type protruding mesh 3 and the array P-type Cap region 4 within it. At the same time, surface planarization is performed in accordance with the usual procedure to form a planar structure.
[0045] (5): On the planar structure of step (4), magnetron sputtering is performed in accordance with the conventional method to prepare a CdTe+ZnS composite passivation layer 5 with a thickness of 3000 angstroms, and the CdTe+ZnS composite passivation layer 5 is annealed in accordance with the conventional method.
[0046] (6): Perform conventional photolithography on the corresponding part of the CdTe+ZnS composite passivation layer 5 in step (5), and remove the CdTe+ZnS composite passivation layer 5 and a small part of the array P-type Cap region 4 in the photolithography area using conventional ICP etching + chemical etching, to form the first contact hole 51 that needs to grow the contact electrode layer 7.
[0047] (7): Perform conventional photolithography on the surface of the CdTe+ZnS composite passivation layer 5 in step (6) and around the first contact hole 51. After development, the second contact hole 52 and photoresist 6, which are to be grown as contact electrode layer 7, are exposed.
[0048] (8): Using conventional ion beam sputtering process, a metal constituting the contact electrode layer 7 is grown in the first contact hole 51 in step (6) and the second contact hole 52 in step (7). The metal is a three-layer metal of Cr (500 Å) + Pt (2000 Å) + Au (1000 Å) to obtain the detector blank.
[0049] (9): Immerse the detector blank from step (8) in a conventional stripping solution to remove the photoresist 6 outside the metal in the first contact hole 51 and the second contact hole 52, as well as the metal on the surface of the photoresist 6, to obtain the following: Figure 1 , 2 The image shows an in-situ grown embedded planar heterojunction detector using mercury cadmium telluride.
[0050] (10) After coupling the detector from step (9) to the silicon readout circuit using conventional flip-chip interconnect technology, conventional packaging and testing are performed. Example 3
[0051] A method for fabricating a P-on-n type mercury cadmium telluride (HgCd) pixel-level in-situ grown array detector includes the following steps:
[0052] (1): Using Si or GaAs as substrate material layer 1, an n-type absorber layer 2 is grown on substrate material layer 1 by conventional liquid phase epitaxy (LPE). The material of the n-type absorber layer 2 is Hg. 1-x Cd xTe, where x is 0.3, and indium (In) is doped during growth at a concentration of 4 × 10⁻⁶. 14 cm -3 , forming a doped n-type absorption layer 2;
[0053] (2): Perform conventional photolithography on the doped n-type absorption layer 2 in step (1), expose the pixel area after development, perform conventional chemical etching on the pixel area to remove a small part of the n-type absorption layer 2 on the surface of the photolithographic pixel area, and then immerse it in conventional stripping solution to remove the photoresist on the surface, so that an n-type isolation grid protrusion 3 and a recessed area 31 are formed on the surface.
[0054] (3): On the surface of the n-type raised mesh 3 and the recessed region 31 in step (2), an array of P-type Cap regions 4 is prepared by liquid phase epitaxy (LPE). The material of the array of P-type Cap regions 4 is Hg. 1-x Cd x Te, where x is 0.6, forms a bilayer material structure with similar surfaces, wherein the array P-type Cap region 4 has a thickness of 3.0 μm, and arsenic (As) is doped during the fabrication of the array P-type Cap region 4, with an arsenic (As) doping concentration of 2 × 10⁻⁶. 17 cm -3 This forms a doped array of P-type Cap regions 4;
[0055] (4): On the surface of the doped array P-type Cap region 4 in step (3), mechanical and chemical polishing is performed in accordance with the usual procedure to remove the periphery of the doped array P-type Cap region 4, exposing the lower n-type protruding mesh 3 and the array P-type Cap region 4 within it. At the same time, surface planarization is performed in accordance with the usual procedure to form a planar structure.
[0056] (5): On the planar structure of step (4), thermal evaporation is performed in accordance with conventional methods to prepare CdTe+ZnS composite passivation layer 5 with a thickness of 7000 angstroms, and CdTe+ZnS composite passivation layer 5 is annealed in accordance with conventional methods.
[0057] (6): Perform conventional photolithography on the corresponding part of the CdTe+ZnS composite passivation layer 5 in step (5), and remove the CdTe+ZnS composite passivation layer 5 and a small part of the array P-type Cap region 4 in the photolithography area using conventional ICP etching + chemical etching, to form the first contact hole 51 that needs to grow the contact electrode layer 7.
[0058] (7): Perform conventional photolithography on the surface of the CdTe+ZnS composite passivation layer 5 in step (6) and around the first contact hole 51. After development, the second contact hole 52, where the contact electrode layer 7 needs to be grown, is exposed.
[0059] (8): Using conventional ion beam sputtering process, a metal constituting the contact electrode layer 7 is grown in the first contact hole 51 in step (6) and the second contact hole 52 in step (7). The metal is a three-layer metal of Cr (500 Å) + Pt (2000 Å) + Au (1000 Å) to obtain the detector blank.
[0060] (9): Immerse the detector blank from step (8) in a conventional stripping solution to remove the photoresist 6 outside the metal in the first contact hole 51 and the second contact hole 52, as well as the metal on the surface of the photoresist 6, to obtain the following: Figure 1 , 2 The image shows an in-situ grown embedded planar heterojunction detector using mercury cadmium telluride.
[0061] (10) After coupling the detector 100 of step (9) to the silicon readout circuit using conventional flip-chip interconnect process, conventional packaging test is performed. Example 4
[0062] A method for fabricating a P-on-n type mercury cadmium telluride (HgCd) pixel-level in-situ grown array detector includes the following steps:
[0063] (1): Using cadmium zinc telluride as substrate material layer 1, an n-type absorber layer 2 is grown on substrate material layer 1 by conventional liquid phase epitaxy (LPE) method. The material of n-type absorber layer 2 is Hg. 1-x Cd x Te, where x is 0.4, and indium (In) is doped during growth at a concentration of 3 × 10⁻⁴. 14 cm -3 , forming a doped n-type absorption layer 2;
[0064] (2): Perform conventional photolithography on the doped n-type absorption layer 2 in step (1), expose the pixel area after development, perform conventional chemical etching on the pixel area to remove a small part of the n-type absorption layer 2 on the surface of the photolithographic pixel area, and then immerse it in conventional stripping solution to remove the photoresist on the surface, so that n-type raised mesh 3 and recessed area 31 are formed on the surface.
[0065] (3): On the surface of the n-type raised mesh 3 and the recessed region 31 in step (2), an array of P-type Cap regions 4 is prepared by liquid phase epitaxy (LPE). The material of the array of P-type Cap regions 4 is Hg. 1-x Cd x Te, where x is 0.4, forms a bilayer material structure with similar surfaces, wherein the array P-type Cap region 4 has a thickness of 2.5 μm, and arsenic (As) is doped during the fabrication of the array P-type Cap region 4, with an arsenic (As) doping concentration of 2 × 10⁻⁶. 17 cm -3 This forms a doped array of P-type Cap regions 4;
[0066] (4): On the surface of the doped array P-type Cap region 4 in step (3), mechanical and chemical polishing is performed in accordance with the usual procedure to remove the periphery of the doped array P-type Cap region 4, exposing the lower n-type protruding mesh 3 and the array P-type Cap region 4 within it. At the same time, surface planarization is performed in accordance with the usual procedure to form a planar structure.
[0067] (5): On the planar structure of step (4), perform MBE as usual to prepare CdTe+ZnS composite passivation layer 5 with a thickness of 5000 angstroms, and anneal the CdTe+ZnS composite passivation layer 5 as usual.
[0068] (6): Perform conventional photolithography on the corresponding part of the CdTe+ZnS composite passivation layer 5 in step (5), and remove the CdTe+ZnS composite passivation layer 5 and a small part of the array P-type Cap region 4 in the photolithography area using conventional ICP etching + chemical etching, to form the first contact hole 51 that needs to grow the contact electrode layer 7.
[0069] (7): Perform conventional photolithography on the surface of the CdTe+ZnS composite passivation layer 5 in step (6) and around the first contact hole 51. After development, the second contact hole 52, where the contact electrode layer 7 needs to be grown, is exposed.
[0070] (8): Using conventional ion beam sputtering process, a metal constituting the contact electrode layer 7 is grown in the first contact hole 51 in step (6) and the second contact hole 52 in step (7). The metal is a three-layer metal of Cr (500 Å) + Pt (2000 Å) + Au (1000 Å) to obtain the detector blank.
[0071] (9): Immerse the detector blank from step (8) in a conventional stripping solution to remove the photoresist 6 outside the metal in the first contact hole 51 and the second contact hole 52, as well as the metal on the surface of the photoresist 6, to obtain the following: Figure 1 , 2 The image shows an in-situ grown embedded planar heterojunction detector using mercury cadmium telluride.
[0072] (10) After coupling the detector 100 of step (9) to the silicon readout circuit using conventional flip-chip interconnect process, conventional packaging test is performed.
[0073] In the description of this invention, references to terms such as "an embodiment," "example," "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0074] The preferred embodiments of the present invention disclosed above are merely illustrative of the invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention. The invention is limited only by the claims and their full scope and equivalents.
Claims
1. A method for fabricating a P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector, characterized in that... Includes the following steps: (1) Using Si, GaAs, or cadmium zinc telluride as the substrate material layer, an n-type absorber layer is grown on the substrate material layer by liquid phase epitaxy (LPE). The material of the n-type absorber layer is Hg. 1-x Cd x Te, where x has a value of 0.15-0.4, is used to dope indium (In) during the growth of the n-type absorber layer, forming n-type doping. The In doping concentration is 1×10⁻⁶. 14 cm -3 — 5×10 15 cm -3 ; (2) Photolithography is performed on the n-type absorption layer in step (1). After development, the pixel area is exposed. The pixel area is chemically etched to remove a small part of the n-type absorption layer on the surface of the pixel area. Then, it is immersed in the stripping solution to remove the residual photoresist on the surface, so that an n-type isolation grid convex layer and a recessed area are formed on the surface. (3) On the surface of the n-type isolation grid convex layer and the recessed region in step (2), an array of P-type Cap regions is prepared by liquid phase epitaxy (LPE). The material of the array of P-type Cap regions is Hg. 1-x Cd x Te, where x is 0.3-0.6, forms a bilayer material structure with similar surfaces, wherein the thickness of the arrayed P-type Cap region is 2.0-3.0 μm, and arsenic (As) is doped during the fabrication of the arrayed P-type Cap region, with an arsenic (As) doping concentration of 5 × 10⁻⁶. 16 cm -3 — 5×10 18 cm -3 This forms a doped array of P-type Cap regions; (4) On the surface of the doped array P-type Cap region in step (3), mechanical and chemical polishing is performed to remove the periphery of the doped array P-type Cap region, exposing the lower n-type isolation grid and the array P-type Cap region within it. At the same time, surface planarization is performed to form a planar structure. (5) On the planar structure of step (4), thermal evaporation, magnetron sputtering or MBE is performed to prepare a CdTe+ZnS composite passivation layer with a thickness of 3000~8000 angstroms, and the CdTe+ZnS composite passivation layer is annealed. (6) Photolithography is performed on the corresponding part of the CdTe+ZnS composite passivation layer surface in step (5). ICP etching and / or chemical etching are used in the photolithography area to remove the CdTe+ZnS composite passivation layer and a small part of the array P-type Cap region in the photolithography area to form the first contact hole for which the contact electrode layer needs to be grown. (7) Photolithography is performed on the surface of the CdTe+ZnS composite passivation layer in step (6) and around the first contact hole. After development, the second contact hole and photoresist that need to grow the contact electrode layer are exposed. (8) Using ion beam sputtering or thermal evaporation, a metal constituting the contact electrode layer is grown in the first contact hole in step (6) and the second contact hole in step (7). The metal is a three-layer metal of Cr (1000 Å) + Pt (2000 Å) + Au (1000 Å) to obtain the detector blank. (9) Immerse the detector blank from step (8) in the stripping solution to remove the photoresist outside the metal in the first contact hole and the second contact hole, as well as the metal on the surface of the photoresist, to obtain an in-situ grown embedded planar heterojunction detector of mercury cadmium telluride.
2. The P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector obtained by the preparation method according to claim 1, characterized in that... include: The following layers are stacked sequentially from bottom to top: a substrate material layer, an n-type absorption layer, an n-type isolation grid layer for isolating pixels, an array P-type cap region located within the isolation grid of the n-type isolation grid layer, a passivation layer covering the n-type isolation grid layer and the array P-type cap region, an electrode contact hole located within the array P-type cap region but not covered by the passivation layer, and a contact electrode layer located within the electrode contact hole.
3. The P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector according to claim 2, characterized in that... Both the n-type absorber layer and the arrayed p-type cap region are made of Hg. 1-x Cd x Te, where the value of x is less than 1.
4. The P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector according to claim 2, characterized in that... The n-type absorption layer is doped with indium (In), and the indium (In) doping concentration is 1 × 10⁻⁶. 14 cm -3 —7×10 15 cm -3 .
5. The P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector according to claim 2, characterized in that... The thickness of the array P-type cap region is 2.0-3.0 μm.
6. The P-on-n type mercury cadmium telluride in-situ grown embedded planar heterojunction detector according to claim 2, characterized in that... The array's P-type cap region is doped with arsenic (As), and the arsenic (As) doping concentration is 5 × 10⁻⁶. 16 cm -3 — 5×10 18 cm -3 .