A current driving low dropout linear regulator with pull-up and pull-down current capability

Abstract

The application belongs to the technical field of integrated circuits, and provides a current-driven low-dropout linear regulator with pull and fill current capability, which is used to solve the problem of power supply for the gate bias of a gallium nitride power amplifier. The application comprises a transconductance error amplifier, a first differential signal amplification circuit, a second differential signal amplification circuit, a first super source follower, a second super source follower, a first adjusting tube, a second adjusting tube, an output network and a feedback network, wherein the feedback network outputs a feedback voltage V FB‑out , the transconductance error amplifier compares the feedback voltage V FB‑out with a reference voltage V ref to generate a pair of current differential signals, which control the corresponding adjusting tubes after passing through the differential signal amplification circuits and the super source followers, wherein the positive current signal controls the corresponding adjusting tube to be in an open state, and the other adjusting tube is in a closed state; the application creatively proposes current driving, which significantly reduces the power consumption of the low-dropout linear regulator while improving the stability.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of integrated circuits, and relates to a low dropout regulator (LDO), and particularly provides a current-driven low dropout regulator with pull-in and pull-out current capability. BACKGROUND

[0002] A low dropout regulator (LDO) is used to provide a stable direct current voltage for an electronic device, and has the advantages of low power consumption, good stability and low noise, and can be integrated on a radio frequency chip, and thus can provide power supply for a gallium nitride power amplifier gate bias. The gate of the gallium nitride power amplifier will generate a gate leakage current with the change of input power, and the direction of the current changes with the power size. The phenomenon of pull-in and pull-out current at the gate of the gallium nitride power amplifier will affect the stability of the traditional single adjustment tube LDO power supply. In recent years, in order to cope with the pull-in and pull-out current phenomenon during the operation of the low dropout regulator, various double adjustment tube low dropout regulators with pull-in and pull-out current capability have appeared, one of the two adjustment tubes is responsible for pouring in current, and the other is responsible for pulling out current. Such low dropout regulators are mostly applied to the power supply of computer DDR memory chips, and the main driving mode is voltage driving. However, the low dropout regulator with voltage driving may have the problem that the two adjustment tubes are turned on at the same time, so that the power consumption in the working state is relatively high. SUMMARY

[0003] The application aims to solve the problem of power supply for the gallium nitride power amplifier gate bias, and provides a current-driven low dropout regulator with pull-in and pull-out current capability. The application creatively proposes current driving, which significantly reduces the power consumption of the low dropout regulator while improving the stability.

[0004] To achieve the above-mentioned purpose, the application adopts the following technical scheme:

[0005] A current-driven low dropout regulator with pull-in and pull-out current capability comprises a transconductance error amplifier, a first differential signal amplification circuit, a second differential signal amplification circuit, a first super source follower, a second super source follower, a first adjustment tube, a second adjustment tube, an output network and a feedback network. The drain of the first adjustment tube and the drain of the second adjustment tube are connected to each other, and the connection point is used as an output port of the low dropout regulator. The output network is connected between the output port and a power supply, so that the low dropout regulator outputs a voltage V out . The feedback network is connected between the output port and the ground, and outputs a feedback voltage V FB-out to the transconductance error amplifier. The transconductance error amplifier compares the feedback voltage V FB-out with a reference voltage V refThe comparison generates a pair of current differential signals, and the current differential signals are input to the first differential signal amplification circuit and the second differential signal amplification circuit respectively; the output of the first differential signal amplification circuit is transmitted to the gate of the first adjusting tube after passing through the first super source follower, and the output of the second differential signal amplification circuit is transmitted to the gate of the second adjusting tube after passing through the second super source follower; the first differential signal amplification circuit and the second differential signal amplification circuit transmit and amplify the positive current signal in the current differential signal, control the corresponding adjusting tube to be in an open state, and control the other adjusting tube to be in a closed state.

[0006] Further, the transconductance error amplifier comprises: transistors M3-M18;

[0007] The gate of the transistor M3 is externally connected with a fixed voltage V b1 The drain of the transistor M3 is connected with the source of the transistor M4 and the source of the transistor M5.

[0008] The gate of the transistor M4 is externally connected with a reference voltage V ref The drain of the transistor M4 is connected with the gate of the transistor M6, the drain of the transistor M6 and the gate of the transistor M8.

[0009] The gate of the transistor M5 receives a feedback voltage V FBout The drain of the transistor M5 is connected with the gate of the transistor M7, the drain of the transistor M7 and the gate of the transistor M12.

[0010] The drain of the transistor M8 is connected with the drain of the transistor M9, the gate of the transistor M9, the gate of the transistor M10 and the gate of the transistor M11.

[0011] The drain of the transistor M10 is connected with the drain of the transistor M14, the drain of the transistor M16, the gate of the transistor M16, the gate of the transistor M17 and the gate of the transistor M18.

[0012] The drain of the transistor M11 is a first differential signal output end and is connected with the drain of the transistor M17.

[0013] The drain of the transistor M12 is connected with the drain of the transistor M13, the gate of the transistor M13, the gate of the transistor M14 and the gate of the transistor M15.

[0014] The drain of the transistor M15 is a second differential signal output end and is connected with the drain of the transistor M18.

[0015] The source of the transistor M6, the source of the transistor M7, the source of the transistor M8, the source of the transistor M12, the source of the transistor M16, the source of the transistor M17 and the source of the transistor M18 are all connected with the ground.

[0016] The source of the transistor M3, the source of the transistor M9, the source of the transistor M13, the source of the transistor M14, the source of the transistor M10, the source of the transistor M11 and the source of the transistor M15 are all connected with the power supply voltage VEE.

[0017] Further, the first differential signal amplification circuit comprises: a transistor M20, a transistor M27, a transistor M28, a transistor M29, a transistor M30.

[0018] The drain of the transistor M20 is connected with the first differential signal output end of the transconductance error amplifier as the input end of the first differential signal amplification circuit; at the same time, the drain of the transistor M20 is connected with the gate of the transistor M20 and the gate of the transistor M27.

[0019] The drain of the transistor M27 is connected with the drain of the transistor M28, the gate of the transistor M28 and the gate of the transistor M29; the drain of the transistor M29 is connected with the drain of the transistor M30 and the gate of the transistor M30; the source of the transistor M20, the source of the transistor M27 and the source of the transistor M30 are all connected with the ground; the source of the transistor M28 and the source of the transistor M29 are all connected with the power supply voltage VEE.

[0020] The gate of the transistor M30 is connected with the input end of the first super source follower as the output end of the first differential signal amplification circuit.

[0021] Further, the low-dropout linear voltage regulator further comprises: a first static current control circuit; the first static current control circuit comprises: a transistor M33, a transistor M34; the gate of the transistor M33 is connected with a fixed voltage V b2 ; the drain of the transistor M33 is connected between the drain of the transistor M27 and the drain of the transistor M28; the source of the transistor M33 is connected with the power supply voltage VEE; the gate of the transistor M34 is connected with a fixed voltage V b3 ; the drain of the transistor M34 is connected between the drain of the transistor M29 and the drain of the transistor M30; the source of the transistor M34 is connected with the ground.

[0022] Further, the second differential signal amplification circuit comprises: a transistor M19, a transistor M21, a transistor M22, a transistor M23, a transistor M24, a transistor M25, a transistor M26.

[0023] The drain of the transistor M19 is connected with the second differential signal output end of the transconductance error amplifier as the input end of the second differential signal amplification circuit; at the same time, the drain of the transistor M19 is connected with the gate of the transistor M19 and the gate of the transistor M21.

[0024] The drain of the transistor M21 is connected to the drain of the transistor M22, the gate of the transistor M22, and the gate of the transistor M23, the drain of the transistor M23 is connected to the drain of the transistor M24, the gate of the transistor M24, and the gate of the transistor M25, the drain of the transistor M25 is connected to the drain of the transistor M26 and the gate of the transistor M26; the source of the transistor M19, the source of the transistor M21, the source of the transistor M24, and the source of the transistor M25 are all connected to the ground, the source of the transistor M22 and the source of the transistor M23 are both connected to the power supply voltage VEE;

[0025] The gate of the transistor M26 is connected to the input of the second super source follower as the output of the second differential signal amplification circuit.

[0026] Further, the low dropout linear regulator further comprises: a second static current control circuit; the second static current control circuit comprises: a transistor M31 and a transistor M32; the gate of the transistor M31 is connected to a fixed voltage V b2 , the drain of the transistor M31 is connected between the drain of the transistor M21 and the drain of the transistor M22, and the source of the transistor M31 is connected to the power supply voltage VEE; the gate of the transistor M32 is connected to a fixed voltage V b3 , the drain of the transistor M32 is connected between the drain of the transistor M23 and the drain of the transistor M24, and the source of the transistor M32 is connected to the ground.

[0027] Further, the first super source follower comprises: a transistor M35 to a transistor M38, the gate of the transistor M35 is connected to the input of the first super source follower; the source of the transistor M35 is connected to the drain of the transistor M36 and the drain of the transistor M38, and the connection point is connected to the output of the first super source follower; the drain of the transistor M35 is connected to the gate of the transistor M38 and the drain of the transistor M37, the gate of the transistor M36 is connected to a fixed voltage V b4 , the source of the transistor M36 is connected to the ground, the gate of the transistor M37 is connected to a fixed voltage V b5 , and the source of the transistor M37 and the source of the transistor M38 are both connected to the power supply voltage VEE.

[0028] Further, the second super source follower comprises: a transistor M39 to a transistor M42, the gate of the transistor M39 is connected to the input of the second super source follower; the source of the transistor M39 is connected to the drain of the transistor M41 and the drain of the transistor M42, and the connection point is connected to the output of the second super source follower; the drain of the transistor M39 is connected to the gate of the transistor M42 and the drain of the transistor M40, the gate of the transistor M40 is connected to a fixed voltage Vb4 The source of the transistor M40 and the source of the transistor M42 are connected with each other to the ground, and the gate of the transistor M41 is connected with a fixed voltage V b5 The source of the transistor M41 is connected with a power supply voltage VEE.

[0029] Further, the first adjusting tube is a transistor M1, and the second adjusting tube is a transistor M2; the gate of the transistor M1 is connected with the output end of the first super source follower, and the gate of the transistor M2 is connected with the output end of the second super source follower; the drain of the transistor M1 is connected with the drain of the transistor M2, and the connection point is used as the voltage output port of the low-dropout linear regulator; the source of the transistor M1 is connected with the ground, and the source of the transistor M2 is connected with the power supply voltage VEE.

[0030] Further, the feedback network comprises: a resistance R1 and an optional resistance Ri, the resistance R1 and the optional resistance Ri are connected in series, and the connection point is used as the output port of the feedback network, and outputs a feedback voltage V FB-out The other end of the resistance R1 is connected with the ground, and the other end of the optional resistance Ri is connected with the voltage output port.

[0031] Further, the output network comprises: a load capacitor C L One end of the load capacitor C L is connected with the voltage output port, and the other end of the load capacitor C L is connected with the power supply voltage VEE.

[0032] Based on the above technical scheme, the present application has the following advantages:

[0033] 1. The present application can effectively reduce the overall power consumption, and the current driving mode of the two adjusting tubes makes the low-dropout linear regulator have the ability to pull out current and fill in current, which can better match the gate power supply demand of the gallium nitride power amplifier; the differential current generated by the transconductance error amplifier is used as a differential signal in the circuit, and only the forward current can be transmitted and amplified in the transmission process of the current mirror, so that the corresponding adjusting tube is controlled to be in an open state, and the other adjusting tube is closed, that is, the overall power consumption is effectively reduced.

[0034] 2. The present application can effectively reduce the static power consumption, and a static current control circuit is added in the differential signal amplification circuit, so that the unstable current signal flows into the static current control transistor in the transmission path of the current differential signal, and the adjusting tube of the low-dropout linear regulator remains in the off state, thereby improving the static power consumption of the circuit in the idle state.

[0035] 3. This invention can increase circuit stability. By adding super source followers in front of the gates of the two regulating transistors, the secondary point frequency of the circuit is increased, thereby improving loop stability. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the current-driven low-dropout linear regulator with pull-in current capability in this invention.

[0037] Figure 2 This is a circuit diagram of a current-driven low-dropout linear regulator with pull-in current capability in this invention. Detailed Implementation

[0038] To make the objectives, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0039] This embodiment provides a current-driven low-dropout linear regulator with pull-in / sink current capability, used to convert the power supply voltage VEE at the power supply terminal into the output voltage V. out Its structure is as follows: Figure 1 As shown, it includes: a transconductance error amplifier, a first differential signal amplifier circuit, a second differential signal amplifier circuit, a first quiescent current control circuit, a second quiescent current control circuit, a first super source follower, a second super source follower, a first regulating transistor, a second regulating transistor, an output network, and a feedback network; wherein, the drains of the first regulating transistor and the second regulating transistor are connected to each other, and the connection point serves as the output port of the low-dropout linear regulator; the output network is connected between the output port and the power supply, so that the output voltage V of the low-dropout linear regulator is... out The feedback network is connected between the output port and ground, and the output feedback voltage V FB-out To the transconductance error amplifier; the transconductance error amplifier will feed back the voltage V FB-out With reference voltage V ref A pair of differential current signals are generated by comparison and input to a first differential signal amplifier circuit and a second differential signal amplifier circuit, respectively. The output of the first differential signal amplifier circuit is transmitted to the gate of the first regulating transistor after passing through a first super source follower, and the output of the second differential signal amplifier circuit is transmitted to the gate of the second regulating transistor after passing through a second super source follower. The first and second differential signal amplifier circuits are connected to the first and second static current control circuits, respectively. In the first and second differential signal amplifier circuits, the positive current signal in the differential current signal is transmitted and amplified, controlling the corresponding regulating transistor to be in the on state and the other regulating transistor to be in the off state.

[0040] The current drive of the low dropout linear regulator with the ability of pulling and filling current refers to controlling two regulating tubes by the current differential signal output by the transconductance error amplifier, the first regulating tube is responsible for pulling out current, and the second regulating tube is responsible for filling in current, so that the gate leakage current of the gallium nitride power amplifier can be quickly reduced during the working of the gallium nitride power amplifier; and the static current control circuit is combined in the differential signal amplification circuit, the unstable current in the differential signal amplification circuit is extracted by the transistor, and the static power consumption is reduced; a super source follower is added in front of the gate of each of the two regulating tubes, so as to improve the gate impedance of the regulating tube, and then the second pole frequency is increased, and the stability of the circuit is improved; in addition, the low dropout linear regulator can be realized by chip technology, and is used for power supply of the gate bias of the gallium nitride power amplifier.

[0041] More specifically, the circuit diagram of the low dropout linear regulator with the ability of pulling and filling current is as shown in Figure 2 , wherein the current flowing direction from the ground end to the power supply is set as the positive direction of the current signal.

[0042] The transconductance error amplifier comprises transistors M3 to M18.

[0043] The gate of the transistor M3 is externally connected with a fixed voltage V b1 , the drain of the transistor M3 is connected with the source of the transistor M4 and the source of the transistor M5.

[0044] The gate of the transistor M4 is externally connected with a reference voltage V ref , the drain of the transistor M4 is connected with the gate of the transistor M6, the drain of the transistor M6 and the gate of the transistor M8.

[0045] The gate of the transistor M5 receives a feedback voltage V FBout , the drain of the transistor M5 is connected with the gate of the transistor M7, the drain of the transistor M7 and the gate of the transistor M12.

[0046] The drain of the transistor M8 is connected with the drain of the transistor M9, the gate of the transistor M9, the gate of the transistor M10 and the gate of the transistor M11.

[0047] The drain of the transistor M10 is connected with the drain of the transistor M14, the drain of the transistor M16, the gate of the transistor M16, the gate of the transistor M17 and the gate of the transistor M18.

[0048] The drain of the transistor M11 is used as a first differential signal output end and is connected with the drain of the transistor M17.

[0049] The drain of the transistor M12 is connected with the drain of the transistor M13, the gate of the transistor M13, the gate of the transistor M14 and the gate of the transistor M15.

[0050] The drain of the transistor M15 is connected to the drain of the transistor M18 as a second differential signal output terminal;

[0051] The source of the transistor M6, the source of the transistor M7, the source of the transistor M8, the source of the transistor M12, the source of the transistor M16, the source of the transistor M17, and the source of the transistor M18 are all connected to the ground.

[0052] The source of the transistor M3, the source of the transistor M9, the source of the transistor M13, the source of the transistor M14, the source of the transistor M10, the source of the transistor M11, and the source of the transistor M15 are all connected to the power supply voltage VEE.

[0053] The gate of the transistor M3 is connected to a fixed voltage V b1 , which generates a fixed current 2I SS as a current source; when the gate voltage of the transistor M4 is different from the gate voltage of the transistor M5, the drain of the transistor M4 and the drain of the transistor M5 generate a pair of differential signals ΔI with opposite polarities and the same size based on the current common-mode signal I SS ; the transistor M6 and the transistor M8 are a set of current mirrors that copy the drain current of the transistor M4; the transistor M7 and the transistor M12 are a set of current mirrors that copy the drain current of the transistor M5. After the current signal is generated, the differential signal extraction circuit eliminates the current common-mode signal I SS , extracts the current differential signal ΔI, and uses it to control the adjusting tube; the transistor M9 and the transistor M10, the transistor M11 are a set of current mirrors that copy the drain current of the transistor M8; the transistor M13 and the transistor M14, the transistor M15 are a set of current mirrors that copy the drain current of the transistor M12; the drain of the transistor M16 combines the drain current of the transistor M14 and the drain current of the transistor M10, and the differential signals with opposite polarities cancel each other out, leaving the current common-mode signal I SS ; the transistor M16 and the transistor M17, the transistor M18 are a set of current mirrors that copy the drain current of the transistor M16; the drain current of the transistor M11 and the drain current of the transistor M17 are subtracted to obtain the current differential signal ΔI, which is sent to the input terminal of the first differential signal amplification circuit; the drain current of the transistor M15 and the drain current of the transistor M18 are subtracted to obtain the current differential signal ΔI with opposite polarities, which is sent to the input terminal of the second differential signal amplification circuit.

[0054] In the embodiment, the first differential signal amplification circuit and the second differential signal amplification circuit both amplify the current differential signal by using the current mirror, the negative current signal cannot be transmitted and amplified by the current mirror in the differential signal amplification circuit, and the corresponding adjusting tube is in the off state, while the positive current signal is amplified, and the corresponding adjusting tube is in the on state.

[0055] The first differential signal amplification circuit comprises a transistor M20, a transistor M27, a transistor M28, a transistor M29, and a transistor M30.

[0056] The drain of the transistor M20 is connected with the first differential signal output end of the transconductance error amplifier as the input end of the first differential signal amplification circuit, and the drain of the transistor M20 is connected with the gate of the transistor M20 and the gate of the transistor M27.

[0057] The drain of the transistor M27 is connected with the drain of the transistor M28, the gate of the transistor M28, and the gate of the transistor M29, and the drain of the transistor M29 is connected with the drain of the transistor M30 and the gate of the transistor M30; the source of the transistor M20, the source of the transistor M27, and the source of the transistor M30 are all connected with the ground, and the source of the transistor M28 and the source of the transistor M29 are both connected with the power supply voltage VEE.

[0058] The gate of the transistor M30 is connected with the input end of the first super source follower as the output end of the first differential signal amplification circuit.

[0059] The second differential signal amplification circuit comprises a transistor M19, a transistor M21, a transistor M22, a transistor M23, a transistor M24, a transistor M25, and a transistor M26.

[0060] The drain of the transistor M19 is connected with the second differential signal output end of the transconductance error amplifier as the input end of the second differential signal amplification circuit, and the drain of the transistor M19 is connected with the gate of the transistor M19 and the gate of the transistor M21.

[0061] The drain of the transistor M21 is connected with the drain of the transistor M22, the gate of the transistor M22, and the gate of the transistor M23, the drain of the transistor M23 is connected with the drain of the transistor M24, the gate of the transistor M24, and the gate of the transistor M25, and the drain of the transistor M25 is connected with the drain of the transistor M26 and the gate of the transistor M26; the source of the transistor M19, the source of the transistor M21, the source of the transistor M24, and the source of the transistor M25 are all connected with the ground, and the source of the transistor M22 and the source of the transistor M23 are both connected with the power supply voltage VEE.

[0062] The gate of the transistor M26 is connected with the output end of the second differential signal amplification circuit and the input end of the second super source follower.

[0063] In the first differential signal amplification circuit and the second differential signal amplification circuit, the transistor M20 and the transistor M27 are a set of current mirrors to copy and amplify the input current signal after the current signal flows into the first differential signal amplification circuit; the transistor M28 and the transistor M29 are a set of current mirrors to copy and amplify the drain current of the transistor M27; the transistor M30 converts the drain current of the transistor M29 into a gate voltage as the output of the first differential signal amplification circuit; the transistor M19 and the transistor M21 are a set of current mirrors to copy and amplify the input current signal after the current signal flows into the second differential signal amplification circuit; the transistor M22 and the transistor M23 are a set of current mirrors to copy and amplify the drain current of the transistor M21; the transistor M24 and the transistor M25 are a set of current mirrors to copy and amplify the drain current of the transistor M23; the transistor M26 converts the drain current of the transistor M25 into a gate voltage as the output of the second differential signal amplification circuit.

[0064] Further, the first static current control circuit and the second static current control circuit are added in the first differential signal amplification circuit and the second differential signal amplification circuit, when the low-dropout linear regulator is in an idle state, due to the influence of factors such as mismatch, temperature change and voltage fluctuation, there is an unstable current in the circuit, which may cause the start-up of the regulating tube and increase the static power consumption; therefore, the static current control circuit is used to suppress the unstable current.

[0065] The first static current control circuit comprises a transistor M33 and a transistor M34; the gate of the transistor M33 is connected with a fixed voltage V b2 , the drain of the transistor M33 is connected between the drain of the transistor M27 and the drain of the transistor M28, and the source of the transistor M33 is connected with the power supply voltage VEE; the gate of the transistor M34 is connected with a fixed voltage V b3 , the drain of the transistor M34 is connected between the drain of the transistor M29 and the drain of the transistor M30, and the source of the transistor M34 is connected with the ground.

[0066] The second static current control circuit comprises a transistor M31 and a transistor M32; the gate of the transistor M31 is connected with a fixed voltage V b2 , the drain of the transistor M31 is connected between the drain of the transistor M21 and the drain of the transistor M22, and the source of the transistor M31 is connected with the power supply voltage VEE; the gate of the transistor M32 is connected with a fixed voltage V b3The drain of the transistor M32 is connected between the drain of the transistor M23 and the drain of the transistor M24, and the source of the transistor M32 is connected to the ground.

[0067] In the first static current control circuit, the gate of the transistor M33 is connected to a fixed voltage V b2 , the drain of the transistor M33 is connected between the drain of the transistor M27 and the drain of the transistor M28, and is used to divert the unstable current in the first differential signal amplification circuit when the low-dropout linear regulator is in the idle state; the gate of the transistor M34 is connected to a fixed voltage V b3 , the drain of the transistor M34 is connected between the drain of the transistor M29 and the drain of the transistor M30, and is used to divert the unstable current in the first differential signal amplification circuit when the low-dropout linear regulator is in the idle state; and the first adjusting tube M1 is in the closed state when the low-dropout linear regulator is in the idle state by using the first static current control circuit.

[0068] In the second static current control circuit, the gate of the transistor M31 is connected to a fixed voltage V b2 , the drain of the transistor M31 is connected between the drain of the transistor M21 and the drain of the transistor M22, and is used to divert the unstable current in the second differential signal amplification circuit when the low-dropout linear regulator is in the idle state; the gate of the transistor M33 is connected to a fixed voltage V b3 , the drain of the transistor M33 is connected between the drain of the transistor M24 and the drain of the transistor M23, and is used to divert the unstable current in the second differential signal amplification circuit when the low-dropout linear regulator is in the idle state; and the second adjusting tube M2 is in the closed state when the low-dropout linear regulator is in the idle state by using the second static current control circuit.

[0069] The first super source follower and the second super source follower are added in the low-dropout linear regulator in the embodiment, which is used to improve the stability of the circuit, and the output impedance before the gate of the adjusting tube is reduced by the super source follower, so that the secondary point frequency of the circuit is improved.

[0070] The first super source follower comprises: transistors M35-M38, the gate of the transistor M35 is used as the input end of the first super source follower; the source of the transistor M35, the drain of the transistor M36 and the drain of the transistor M38 are connected to each other, and the connection point is used as the output end of the first super source follower; the drain of the transistor M35, the gate of the transistor M38 and the drain of the transistor M37 are connected to each other, the gate of the transistor M36 is connected to a fixed voltage V b4 , the source of the transistor M36 is connected to the ground, the gate of the transistor M37 is connected to a fixed voltage V b5 , and the source of the transistor M37 and the source of the transistor M38 are both connected to a power supply voltage VEE.

[0071] The second super source follower comprises: transistors M39-M42, the gate of the transistor M39 is the input terminal of the second super source follower; the source of the transistor M39, the drain of the transistor M41 and the drain of the transistor M42 are connected to each other, and the connection point is the output terminal of the second super source follower; the drain of the transistor M39, the gate of the transistor M42 and the drain of the transistor M40 are connected to each other, the gate of the transistor M40 is externally connected to a fixed voltage V b4 , the source of the transistor M40 and the source of the transistor M42 are connected to the ground, the gate of the transistor M41 is externally connected to a fixed voltage V b5 , and the source of the transistor M41 is connected to the power supply voltage VEE.

[0072] In the first super source follower, the transistor M35 is connected in a source follower connection between the output terminal of the first differential signal amplification circuit and the gate of the first adjusting tube, the gate of the transistor M35 is connected to the output terminal of the first differential amplification circuit, and the source of the transistor M35 is connected to the gate of the first adjusting tube; the gate of the transistor M36 is externally connected to a fixed voltage V b4 , as the total current source of the first super source follower; the gate of the transistor M37 is externally connected to a fixed voltage V b5 , as the branch current source of the source follower connection; the transistor M38 is connected in negative feedback with the transistor M35, so as to reduce the output impedance of the source follower connection, the gate of the transistor M38 is connected to the drain of the transistor M35, and the drain of the transistor M38 is connected to the source of the transistor M35.

[0073] In the second super source follower, the transistor M39 is connected in a source follower connection between the output terminal of the second differential signal amplification circuit and the gate of the second adjusting tube, the gate of the transistor M39 is connected to the output terminal of the second differential amplification circuit, and the source of the transistor M39 is connected to the gate of the second adjusting tube; the gate of the transistor M40 is externally connected to a fixed voltage V b4 , as the total current source of the second super source follower; the gate of the transistor M41 is externally connected to a fixed voltage V b5 , as the branch current source of the source follower connection; the transistor M42 is connected in negative feedback with the transistor M39, so as to reduce the output impedance of the source follower connection, the gate of the transistor M42 is connected to the drain of the transistor M39, and the drain of the transistor M42 is connected to the source of the transistor M39.

[0074] The first adjusting tube is the transistor M1, and the second adjusting tube is the transistor M2; the gate of the transistor M1 is connected to the output terminal of the first super source follower, and the gate of the transistor M2 is connected to the output terminal of the second super source follower; the drain of the transistor M1 and the drain of the transistor M2 are connected to each other, and the connection point is the voltage output terminal of the low-dropout linear regulator; the source of the transistor M1 is connected to the ground, and the source of the transistor M2 is connected to the power supply voltage VEE.

[0075] The feedback network comprises: a resistor R1 and an optional resistor Ri, the resistor R1 and the optional resistor Ri are connected in series, and a connection point is taken as an output port of the feedback network, outputting a feedback voltage V FB-out ; the other end of the resistor R1 is connected with the ground, and the other end of the optional resistor Ri is connected with the voltage output port.

[0076] The output network comprises: a load capacitor C L , one end of the load capacitor C L is connected with the voltage output port, and the other end of the load capacitor C L is connected with a power supply voltage VEE.

[0077] In the embodiment, the transistors M1, M6, M7, M8, M12, M16, M17, M18, M19, M20, M21, M24, M25, M27, M30, M32, M34, M35, M36, M40, M42 are all P-type metal oxide semiconductor field effect transistors;

[0078] The transistors M2, M3, M4, M5, M9, M10, M11, M13, M14, M15, M22, M23, M26, M28, M29, M31, M33, M37, M38, M39, M41 are all N-type metal oxide semiconductor field effect transistors.

[0079] In the low-dropout linear regulator with pull current capability, an output port is led out between the drain of the first adjusting tube and the drain of the second adjusting tube, a load capacitor C L is connected between the output port and the power supply, and a feedback network is connected between the output port and the ground; the output end of the feedback network is connected with the gate of the transistor M5, the feedback network outputs a feedback voltage V FB-out to the transconductance error amplifier and the reference voltage V ref for comparison; and the output voltage of the low-dropout linear regulator is determined by the feedback network and can be adjusted through the optional resistor Ri. When the low-dropout linear regulator needs to pull out current, the feedback network outputs the feedback voltage V FB-outWhen the low-dropout linear regulator needs to draw current, the feedback network outputs a feedback voltage V FB-out When the low-dropout linear regulator needs to draw current, the feedback network outputs a feedback voltage V

[0080] In summary, the low-dropout linear regulator provided by the application adopts current to drive the first adjusting tube and the second adjusting tube, has the ability to draw current and pour in current, utilizes the first static current control circuit and the second static current control circuit to reduce the static power consumption of the circuit, and utilizes the first super source follower and the second super source follower to improve the stability of the circuit.

[0081] The above is only a specific embodiment of the application, any feature disclosed in the specification can be replaced by other equivalent or similar purpose alternative features unless specifically described, and all features disclosed or all steps in the method or process can be combined in any way except for mutually exclusive features and / or steps.

Claims

1. A current-driven low-dropout linear regulator with pull-up current capability, comprising: The application relates to a low-dropout linear voltage regulator, which comprises a transconductance error amplifier, a first differential signal amplification circuit, a second differential signal amplification circuit, a first super source follower, a second super source follower, a first adjusting tube, a second adjusting tube, an output network and a feedback network; characterized in that the drain electrodes of the first adjusting tube and the second adjusting tube are connected to each other, and the connection point serves as an output port of the low-dropout linear voltage regulator; the output network is connected between the output port and a power supply, so that the low-dropout linear voltage regulator outputs a voltage V out ; the feedback network is connected between the output port and the ground, and outputs a feedback voltage V FB-out to the transconductance error amplifier; the transconductance error amplifier compares the feedback voltage V FB-out with a reference voltage V ref to generate a pair of current differential signals, which are respectively input to the first differential signal amplification circuit and the second differential signal amplification circuit; the output of the first differential signal amplification circuit is transmitted to the gate of the first adjusting tube through the first super source follower, and the output of the second differential signal amplification circuit is transmitted to the gate of the second adjusting tube through the second super source follower; the first differential signal amplification circuit and the second differential signal amplification circuit transmit and amplify the positive current signal in the current differential signal, control the corresponding adjusting tube to be in an open state, and control the other adjusting tube to be in a closed state.

2. The current-driven low-dropout linear voltage regulator with pull-up current capability according to claim 1, wherein, The transconductance error amplifier comprises: transistors M3-M18; The gate of the transistor M3 is externally connected to a fixed voltage V b1 The drain of the transistor M3 is connected to the source of the transistor M4 and the source of the transistor M5. The gate of the transistor M4 is connected to a reference voltage V ref The drain of the transistor M4 is connected to the gate of the transistor M6, the drain of the transistor M6 and the gate of the transistor M8. The gate of the transistor M5 receives a feedback voltage V FBout The drain of the transistor M5 is connected to the gate of the transistor M7, the drain of the transistor M7, and the gate of the transistor M12. The drain of the transistor M8 is connected with the drain of the transistor M9, the gate of the transistor M9, the gate of the transistor M10, and the gate of the transistor M11; The drain of the transistor M10 is connected with the drain of the transistor M14, the drain of the transistor M16, the gate of the transistor M16, the gate of the transistor M17, and the gate of the transistor M18; The drain of the transistor M11 is the first differential signal output end and is connected with the drain of the transistor M17; The drain of the transistor M12 is connected with the drain of the transistor M13, the gate of the transistor M13, the gate of the transistor M14, and the gate of the transistor M15; The drain of the transistor M15 is the second differential signal output end and is connected with the drain of the transistor M18; The source of the transistor M6, the source of the transistor M7, the source of the transistor M8, the source of the transistor M12, the source of the transistor M16, the source of the transistor M17, and the source of the transistor M18 are all connected with the ground; The source of the transistor M3, the source of the transistor M9, the source of the transistor M13, the source of the transistor M14, the source of the transistor M10, the source of the transistor M11, and the source of the transistor M15 are all connected with the power supply voltage VEE.

3. The low-dropout linear voltage regulator with pull-up current capability according to claim 1, wherein, The first differential signal amplification circuit comprises: transistors M20, M27, M28, M29, and M30; The drain of the transistor M20 is the input end of the first differential signal amplification circuit and is connected with the first differential signal output end of the transconductance error amplifier; meanwhile, the drain of the transistor M20 is connected with the gate of the transistor M20 and the gate of the transistor M27; The drain of the transistor M27 is connected with the drain of the transistor M28, the gate of the transistor M28, and the gate of the transistor M29; the drain of the transistor M29 is connected with the drain of the transistor M30 and the gate of the transistor M30; the source of the transistor M20, the source of the transistor M27, and the source of the transistor M30 are all connected with the ground; the source of the transistor M28 and the source of the transistor M29 are all connected with the power supply voltage VEE; The gate of the transistor M30 is the output end of the first differential signal amplification circuit and is connected with the input end of the first super source follower.

4. The current-driven low-dropout linear voltage regulator with pull-up current capability according to claim 3, wherein, The low dropout linear voltage regulator further comprises: a first static current control circuit; the first static current control circuit comprises: a transistor M33, a transistor M34; a gate of the transistor M33 is connected with a fixed voltage V b2 , a drain of the transistor M33 is connected between a drain of the transistor M27 and a drain of the transistor M28, and a source of the transistor M33 is connected with a power supply voltage VEE; a gate of the transistor M34 is connected with a fixed voltage V b3 , a drain of the transistor M34 is connected between a drain of the transistor M29 and a drain of the transistor M30, and a source of the transistor M34 is connected with the ground.

5. The low-dropout linear voltage regulator with pull-up current capability of claim 1, wherein, The second differential signal amplification circuit comprises: transistors M19, M21, M22, M23, M24, M25, and M26; The drain of the transistor M19 is the input end of the second differential signal amplification circuit and is connected with the second differential signal output end of the transconductance error amplifier; meanwhile, the drain of the transistor M19 is connected with the gate of the transistor M19 and the gate of the transistor M21; The drain of the transistor M21 is connected with the drain of the transistor M22, the gate of the transistor M22, the gate of the transistor M23, the drain of the transistor M23 is connected with the drain of the transistor M24, the gate of the transistor M24, the gate of the transistor M25, the drain of the transistor M25 is connected with the drain of the transistor M26, the gate of the transistor M26; the source of the transistor M19, the source of the transistor M21, the source of the transistor M24, the source of the transistor M25 are all connected with the ground, the source of the transistor M22, the source of the transistor M23 are all connected with the power voltage VEE; The gate of the transistor M26 is connected with the input end of the second super source follower as the output end of the second differential signal amplification circuit.

6. The current-driven low-dropout linear voltage regulator with pull-up current capability according to claim 5, wherein, The low dropout linear voltage regulator further comprises: a second static current control circuit; the second static current control circuit comprises: a transistor M31, a transistor M32; a gate of the transistor M31 is connected with a fixed voltage V b2 , a drain of the transistor M31 is connected between a drain of the transistor M21 and a drain of the transistor M22, and a source of the transistor M31 is connected with a power supply voltage VEE; a gate of the transistor M32 is connected with a fixed voltage V b3 , a drain of the transistor M32 is connected between a drain of the transistor M23 and a drain of the transistor M24, and a source of the transistor M32 is connected with the ground.

7. The current-driven low-dropout linear voltage regulator with pull-up current capability of claim 1, wherein, The first super source follower comprises: transistors M35-M38, the gate of the transistor M35 as the input terminal of the first super source follower; the source of the transistor M35 and the drain of the transistor M36 and the drain of the transistor M38 are connected to each other, and the connection point is the output terminal of the first super source follower; the drain of the transistor M35 and the gate of the transistor M38 and the drain of the transistor M37 are connected to each other, the gate of the transistor M36 is externally connected to a fixed voltage V b4 , the source of the transistor M36 and the ground are connected to each other, the gate of the transistor M37 is externally connected to a fixed voltage V b5 , and the source of the transistor M37 and the source of the transistor M38 are connected to each other with a power supply voltage VEE; The second super source follower comprises: transistors M39-M42, the gate of the transistor M39 as the input terminal of the second super source follower; the source of the transistor M39, the drain of the transistor M41 and the drain of the transistor M42 are connected to each other, and the connection point as the output terminal of the second super source follower; the drain of the transistor M39, the gate of the transistor M42 and the drain of the transistor M40 are connected to each other, the gate of the transistor M40 is externally connected to a fixed voltage V b4 , the source of the transistor M40 and the source of the transistor M42 are connected to the ground, the gate of the transistor M41 is externally connected to a fixed voltage V b5 , and the source of the transistor M41 is connected to the power supply voltage VEE.

8. The current-driven low-dropout linear voltage regulator with pull-up current capability of claim 1, wherein, The first adjusting tube is the transistor M1, and the second adjusting tube is the transistor M2; the gate of the transistor M1 is connected with the output end of the first super source follower, and the gate of the transistor M2 is connected with the output end of the second super source follower; the drain of the transistor M1 is connected with the drain of the transistor M2, and the connection point is used as the voltage output port of the low dropout linear regulator; the source of the transistor M1 is connected with the ground, and the source of the transistor M2 is connected with the power voltage VEE.

9. The current-driven low-dropout linear voltage regulator with pull-up current capability of claim 1, wherein, The feedback network comprises: a resistor R1 and an optional resistor Ri, the resistor R1 and the optional resistor Ri are connected in series, and a connection point is an output port of the feedback network, outputting a feedback voltage V FB-out ; the other end of the resistor R1 is connected with the ground, and the other end of the optional resistor Ri is connected with the voltage output port.

10. The current-driven low-dropout linear voltage regulator with pull-up current capability of claim 1, wherein, The output network includes a load capacitor C L , one end of the load capacitor C L is connected to the voltage output port, and the other end of the load capacitor C L is connected to the power voltage VEE.

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