Pixel driving circuit and pixel driving method

Abstract

This application relates to a pixel driving circuit and a pixel driving method. The circuit includes an input module, an output module, and a compensation module. The input unit is connected to a first control signal input terminal, a second control signal input terminal, and a potential compensation point, respectively. The output unit is connected to the potential compensation point, a third control signal input terminal, and a signal output terminal, respectively. The compensation unit is connected to a third control signal input terminal, a fourth control signal input terminal, and the potential compensation point, respectively. This application charges the potential compensation point with a third control voltage during the touch control phase, thereby raising the potential of the potential compensation point and compensating for its potential. This solves the problem of insufficient charging of the next row of pixels during the display period after touch, which causes horizontal lines to appear on the display panel.

Description

Technical Field

[0001] This application relates to the field of display panel technology, and in particular to a pixel driving circuit and a pixel driving method. Background Technology

[0002] To improve the user experience of touch screens, a method of embedding touch panel functions into liquid crystal pixels (IN-CELL) has been proposed in related technologies, thereby realizing the integration of touch panel and liquid crystal pixels.

[0003] Currently, IN-CELL products offer two touch driving modes: long-v (long vertical, inter-frame touch driving) and long-h (long horizontal, intra-frame touch driving). Long-v mode activates the touch sensor once after each display frame ends to detect the touch signal. Long-h mode, on the other hand, inserts touch events in batches into the display time frame, creating a cyclical pattern of "display-touch-display-touch-display" from top to bottom within a single frame.

[0004] For IN-CELL products using GIP (Gate in Panel) design, the addition of an extra touch time period during the display period in long-h mode causes the components in the next-level GIP to maintain their potential for a longer time, making the next-level GIP prone to leakage. This results in insufficient charging of the next row of pixels during the display period after touch, causing horizontal lines to appear on the display panel. Summary of the Invention

[0005] This application provides a pixel driving circuit and a pixel driving method to solve the technical problem of easy leakage of GIP in long-h mode of IN-CELL products using GIP design.

[0006] In a first aspect, this application provides a pixel driving circuit, the circuit including an input unit, an output unit and a compensation unit;

[0007] The input unit is connected to the first control signal input terminal, the second control signal input terminal, and the potential compensation point respectively. The first control signal input terminal is used to input the first control voltage, the second control signal input terminal is used to input the second control voltage, and the input unit is used to output the first control voltage to the output unit under the action of the second control voltage.

[0008] The output unit is connected to the potential compensation point, the third control signal input terminal, and the signal output terminal respectively. The third control signal input terminal is used to input a third control voltage. The output unit is used to output the third control voltage to the signal output terminal under the action of the first control voltage.

[0009] The compensation unit is connected to the third control signal input terminal, the fourth control signal input terminal, and the potential compensation point, respectively. The fourth control signal input terminal is used to input a fourth control voltage. The compensation unit is used to charge the third control voltage into the potential compensation point under the action of the fourth control voltage during the touch control stage, so as to compensate the potential of the potential compensation point.

[0010] Secondly, this application provides a pixel driving method for the circuit described in the first aspect above, the method comprising:

[0011] During the display phase, the third thin-film transistor is turned on and the fourth thin-film transistor is turned off, so that the third control voltage is charged into the first terminal of the second capacitor through the third thin-film transistor, keeping the first terminal of the second capacitor at a high level.

[0012] During the touch control phase, the third thin-film transistor is turned off and the fourth thin-film transistor is turned on, so that the second terminal of the second capacitor is charged with a compensation voltage through the fourth thin-film transistor to the potential compensation point, so that the potential compensation point is kept at a high level; wherein, the compensation voltage is the voltage fed from the first terminal of the second capacitor to the second terminal of the second capacitor based on the capacitive coupling effect.

[0013] Compared with the prior art, the technical solution provided in this application has the following advantages: The technical solution provided in this application provides a compensation unit in the pixel driving circuit. Under the action of the fourth control voltage, the compensation unit charges the third control voltage into the potential compensation point during the touch control stage and pulls up the potential of the potential compensation point during the touch control stage. This allows each level of GIP in the pixel driving circuit to maintain a high potential through the input third control voltage even if leakage occurs during the touch control stage. This solves the problem of insufficient charging of the next row of pixels during the display period after the touch control stage ends, which causes horizontal lines to appear on the display panel. Attached Figure Description

[0014] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0017] Figure 1 This is a schematic diagram of a pixel driving circuit provided in an embodiment of this application.

[0018] Figure 2 This is a circuit connection diagram of a pixel driving circuit provided in an embodiment of this application.

[0019] Figure 3 This is an equivalent circuit diagram of a compensation unit in a pixel driving circuit during the display stage and the touch control stage, provided in an embodiment of this application.

[0020] Figure 4 This is a schematic diagram of another structure of a pixel driving circuit provided in an embodiment of this application.

[0021] Figure 5 This is another circuit connection diagram of a pixel driving circuit provided in an embodiment of this application.

[0022] Figure 6 This is a flowchart illustrating a pixel driving method provided in an embodiment of this application.

[0023] Figure 7 This is a schematic diagram of the potential of the potential compensation point in the display stage and the touch control stage in a pixel driving method provided in an embodiment of this application.

[0024] Figure 8 This is a timing diagram of the control voltage in a pixel driving method provided in an embodiment of this application.

[0025] Figure Descriptions: 1. Input Unit; 2. Output Unit; 3. Compensation Unit; 4. Reset Unit; T1. First Thin-Film Transistor; T2. Second Thin-Film Transistor; T3. Third Thin-Film Transistor; T4. Fourth Thin-Film Transistor; T5. Fifth Thin-Film Transistor; T6. Sixth Thin-Film Transistor; C1. First Capacitor; C2. Second Capacitor; Q. Potential Compensation Point; IN1. First Control Signal Input Terminal; IN2. Second Control Signal Input Terminal; IN3. Third Control Signal Input Terminal; IN4. Fourth Control Signal Input Terminal; IN5. Fifth Control Signal Input Terminal; OUT1. Signal Output Terminal; OUT2. Reset Cable. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0027] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0028] To address the technical problem of GIP leakage in long-h mode of existing IN-CELL products using GIP design, this application provides a pixel driving circuit and pixel driving method that can achieve potential compensation for each level of GIP.

[0029] Figure 1 This is a schematic diagram of a pixel driving circuit provided in an embodiment of this application, referring to... Figure 1 The pixel driving circuit provided in this application includes: an input unit 1, an output unit 2, and a compensation unit 3.

[0030] In the pixel driving circuit provided in this application, the input unit 1 is connected to the first control signal input terminal IN1, the second control signal input terminal IN2 and the potential compensation point Q respectively. The first control signal input terminal IN1 is used to input the first control voltage, the second control signal input terminal IN2 is used to input the second control voltage, and the input unit 1 is used to output the first control voltage to the output unit 2 under the action of the second control voltage.

[0031] Output unit 2 is connected to the potential compensation point Q, the third control signal input terminal IN3 and the signal output terminal OUT1 respectively. The third control signal input terminal IN3 is used to input the third control voltage. Output unit 2 is used to output the third control voltage under the action of the first control voltage and output it to the signal output terminal OUT1.

[0032] The compensation unit 3 is connected to the third control signal input terminal IN3, the fourth control signal input terminal IN4, and the potential compensation point Q, respectively. The fourth control signal input terminal IN4 is used to input the fourth control voltage. The compensation unit 3 is used to charge the third control voltage into the potential compensation point Q under the action of the fourth control voltage during the touch control stage, so as to compensate the potential of the potential compensation point Q.

[0033] Specifically, the pixel driving circuit provides a pixel driving signal to the pixel connected to the output terminal of the pixel driving circuit. The output terminal of the pixel driving circuit is the aforementioned signal output terminal OUT1, and the pixel driving signal is the aforementioned third control voltage.

[0034] For input unit 1, the first input terminal of input unit 1 is used to input a first control voltage to input unit 1. The first control voltage is a high-potential AC signal. The second input terminal of input unit 1 is used to input a second control voltage to input unit 1. The second control voltage is used to control the working state of input unit 1. By controlling the level of the second control voltage, the control of whether input unit 1 outputs the first control voltage to the potential compensation point Q can be realized.

[0035] Reference Figure 2 In a preferred embodiment of this application, the first terminal of the first thin-film transistor T1 is connected to the first control signal input terminal IN1, the second terminal of the first thin-film transistor T1 is connected to the potential compensation point Q, and the control terminal of the first thin-film transistor T1 is connected to the second control signal input terminal IN2.

[0036] Specifically, by controlling the level of the second control voltage, the switching state of the first thin-film transistor T1 can be controlled, thereby enabling the first control voltage to pass through the first thin-film transistor T1, and thus controlling whether the input unit 1 outputs the first control voltage to the potential compensation point Q.

[0037] In one feasible embodiment of this application, the first thin-film transistor T1 is configured as an NPN type thin-film transistor. If the second control voltage is high, the first thin-film transistor T1 is turned on, and the first control voltage can be output to the potential compensation point Q through the first thin-film transistor T1. If the second control voltage is low, the first thin-film transistor T1 is turned off, and the first control voltage cannot be output to the potential compensation point Q through the first thin-film transistor T1.

[0038] For output unit 2, the first input terminal of output unit 2 is used to input the third control voltage to output unit 2, and the second input terminal of output unit 2 is connected to the potential compensation point Q, which is used to input the first control voltage output by input unit 1 to output unit 2, so that output unit 2 is turned on or off under the action of the first control voltage, so as to control whether the third control voltage can be output from the output terminal of output unit 2.

[0039] Continue to refer to Figure 2 In a preferred embodiment of this application, the output unit 2 includes a first capacitor C1 and a second thin-film transistor T2; the first end of the first capacitor C1 is connected to a potential compensation point Q, the second end of the first capacitor C1 is connected to the first end of the second thin-film transistor T2, the second end of the second thin-film transistor T2 is connected to a third control signal input terminal IN3, the control terminal of the second thin-film transistor T2 is connected to the second end of the first capacitor C1 through the potential compensation point Q, and the second end of the first capacitor C1 and the first end of the second thin-film transistor T2 are connected to a signal output terminal OUT1.

[0040] Specifically, by controlling the switching state of the second thin-film transistor T2, the third control voltage can or cannot pass through the second thin-film transistor T2, thereby controlling whether the output unit 2 outputs the third control voltage from the first input terminal of the output unit 2 to the output terminal of the output unit 2.

[0041] Based on the preferred connection method of input unit 1 and output unit 2 described above, both the first thin-film transistor T1 and the second thin-film transistor T2 are configured as NPN type thin-film transistors. In some feasible embodiments, the display stage can be divided into an initialization sub-stage and a display sub-stage. The initialization sub-stage is used to initialize the entire pixel driving circuit, and the display sub-stage is used to enable the pixel driving circuit to output the pixel driving voltage. The specific working methods of input unit 1 and output unit 2 in the display stage are as follows:

[0042] During the initialization sub-stage, the second control voltage is at a high level, the first control voltage is at a high level, and the third control voltage is at a low level. At this time, under the action of the second control voltage, the first thin-film transistor T1 is turned on, so that the first control voltage is output from the output terminal of the input unit 1 to the first input terminal of the output unit 2 through the first thin-film transistor T1 and the potential compensation point Q, respectively, pulling up the level of the first capacitor C1 in the output unit 2 connected to the first terminal of the potential compensation point Q to a high level.

[0043] During the display sub-stage, the second control voltage is controlled to be low, the first control voltage to be high or low, and the third control voltage to be high. At this time, the first terminal of the first capacitor C1 discharges to the second thin-film transistor T2 through the potential compensation point Q, causing the second thin-film transistor T2 to turn on; the third control voltage is output to the output terminal of the output unit 2 through the second thin-film transistor T2, realizing the output of the pixel driving signal (i.e., the third control voltage), causing the pixel connected to the output terminal of the pixel driving circuit (i.e., the signal output terminal OUT1) to emit light.

[0044] For compensation unit 3, the first input terminal of compensation unit 3 is used to input a fourth control voltage to compensation unit 3, and the second input terminal of compensation unit 3 is used to input a third control voltage to compensation unit 3, so that compensation unit 3 charges the potential compensation point Q with the third control voltage under the action of the first control voltage, so that the potential compensation point Q maintains a high potential during the touch control stage.

[0045] Continue to refer to Figure 2 In a preferred embodiment of this application, the compensation unit 3 includes a second capacitor C2, a third thin-film transistor T3, and a fourth thin-film transistor T4; the first terminal of the third thin-film transistor T3 is connected to the third control signal input terminal IN3, the second terminal of the third thin-film transistor T3 is connected to the first terminal of the second capacitor C2, the second terminal of the second capacitor C2 is connected to the first terminal of the fourth thin-film transistor T4, the second terminal of the fourth thin-film transistor T4 is connected to the potential compensation point Q, and the control terminals of the third thin-film transistor T3 and the fourth thin-film transistor T4 are both connected to the fourth control signal input terminal IN4.

[0046] Specifically, both the third thin-film transistor T3 and the fourth thin-film transistor T4 are controlled by the fourth control voltage. Either the third thin-film transistor T3 or the fourth thin-film transistor T4 is turned on when the fourth control voltage is high, and the other thin-film transistor is turned off when the fourth control voltage is high. That is, the conduction characteristics of the third thin-film transistor T3 and the fourth thin-film transistor T4 are completely opposite.

[0047] In one feasible embodiment of this application, the third thin-film transistor T3 is configured as a PNP type thin-film transistor, and the fourth thin-film transistor T4 is configured as an NPN type thin-film transistor. Based on this configuration and the preferred embodiment of the input unit 1, output unit 2, and compensation unit 3 described above, the specific operating mode of the compensation unit 3 when performing potential compensation at the potential compensation point Q is as follows:

[0048] When compensation unit 3 performs potential compensation, the on / off states of the third thin-film transistor T3 and the fourth thin-film transistor T4 are as follows: Figure 3 As shown.

[0049] During the display phase, the fourth control voltage is kept at a low level, and the third control voltage remains at a high level. At this time, the third thin-film transistor T3 is turned on, the fourth thin-film transistor T4 is turned off, and the third control voltage is charged into the second capacitor C2 through the third thin-film transistor T3 and connected to the first terminal of the third thin-film transistor T3. A large amount of charge accumulates on the first terminal of the second capacitor C2.

[0050] During the touch control phase, the fourth control voltage is high. At this time, the third thin-film transistor T3 is turned off and the fourth thin-film transistor T4 is turned on. Under the effect of capacitive coupling, the charge accumulated on the first terminal of the second capacitor C2 is redistributed to the second terminal of the second capacitor C2, which pulls up the potential of the second terminal of the second capacitor C2. The second terminal of the second capacitor C2 continuously charges the potential compensation point Q, thereby compensating the potential of the potential compensation point Q.

[0051] Reference Figure 4 In one feasible embodiment of this application, the pixel driving circuit further includes a reset unit 4. The reset unit 4 is connected to the potential compensation point Q, the compensation unit 3, the fourth control signal input terminal IN4, the fifth control signal input terminal IN5, and the reset cable OUT2. The fifth control signal input terminal IN5 is used to input a fifth control voltage. The reset unit 4 is used to release the residual charge in the potential compensation point Q, the compensation unit 3, and the output unit 2 through the reset cable OUT2 under the action of the fourth control voltage and the fifth control voltage, so as to reset the potential compensation point Q, the compensation unit 3, and the output unit 2.

[0052] In a preferred embodiment of this application, the reset unit 4 includes a fifth thin-film transistor T5 and a sixth thin-film transistor T6;

[0053] The first terminal of the fifth thin-film transistor T5 is connected to the potential compensation point Q and the compensation unit 3 respectively. The control terminal of the fifth thin-film transistor T5 is connected to the fifth control signal input terminal IN5. The second terminal of the fifth thin-film transistor T5 is connected to the reset cable OUT2.

[0054] The first terminal of the sixth thin-film transistor T6 is connected to the output unit 2, the control terminal of the sixth thin-film transistor T6 is connected to the fourth control signal input terminal IN4, and the second terminal of the sixth thin-film transistor T6 is connected to the reset cable OUT2.

[0055] Specifically, the reset unit 4 is used to release the residual charge in the pixel driving circuit after all GIPs have completed their operation, thus restoring the pixel driving circuit to its initial state. Based on the above preferred embodiment, the specific operation mode of the reset unit 4 when resetting the pixel driving circuit is as follows:

[0056] During the reset phase, the voltage on the reset cable OUT2 remains low, the fifth control voltage is high, and the fourth control voltage is low. Under the action of the fifth control voltage, the fifth thin-film transistor T5 turns on, and the residual charge on the first terminal of the first capacitor C1 and the second terminal of the second capacitor C2 is released to the reset cable OUT2 through the fifth thin-film transistor T5. Under the action of the fourth control voltage, the sixth thin-film transistor T6 turns on, and the residual charge on the second terminal of the first capacitor C1 is released to the reset cable OUT2 through the sixth thin-film transistor T6.

[0057] In one feasible embodiment of this application, the first thin-film transistor T1, the second thin-film transistor T2, the fourth thin-film transistor T4, the fifth thin-film transistor T5, and the sixth thin-film transistor T6 are all NPN type thin-film transistors, and the third thin-film transistor T3 is a PNP type thin-film transistor.

[0058] Based on the above embodiments, one of the first and second terminals of the first thin-film transistor T1, the second thin-film transistor T2, the fourth thin-film transistor T4, the fifth thin-film transistor T5, and the sixth thin-film transistor T6 is the source, and the other terminal is the drain. It is only necessary that the first thin-film transistor T1, the second thin-film transistor T2, the fourth thin-film transistor T4, the fifth thin-film transistor T5, and the sixth thin-film transistor T6 can be turned on when the control voltage is high. Similarly, one of the first and second terminals of the third thin-film transistor T3 is the source, and the other terminal is the drain. It is only necessary that the third thin-film transistor T3 can be turned on when the control voltage is low.

[0059] It should be noted that in all the above embodiments, the first to fifth control voltages are input from the first to fifth control signal input terminals IN5. The control voltages of all signal input terminals are derived from the scan signal generator. By configuring and controlling the scan signal generator, the level and timing of the control voltage input to the control terminal of the thin-film transistor can be controlled, thereby realizing the control of the opening and closing of the thin-film transistor.

[0060] Reference Figure 5 In another feasible embodiment of this application, the pixel driving circuit provided in this application can also be as follows: Figure 5 The connection method shown is used for connection. The working principle of the pixel driving circuit in this embodiment is exactly the same as the working principle of the pixel driving current in the above embodiment.

[0061] The technical solution provided by the embodiments of this application includes a compensation unit 3 in the pixel driving circuit. Under the action of the fourth control voltage, the compensation unit 3 charges the third control voltage into the potential compensation point Q during the touch control phase and raises the potential of the potential compensation point Q during the touch control phase. This allows each level of GIP in the pixel driving circuit to maintain a high potential through the input third control voltage even if leakage occurs during the touch control phase. This solves the problem of insufficient charging of the next row of pixels during the display period after the touch control phase ends, which causes horizontal lines to appear on the display panel.

[0062] Reference Figure 6 Based on the above-described pixel driving circuit, this application also provides a pixel driving method for the above-described pixel driving circuit, the method comprising the following steps:

[0063] S1: During the display phase, control the third thin-film transistor T3 to turn on and the fourth thin-film transistor T4 to turn off, so that the third control voltage is charged into the first terminal of the second capacitor C2 through the third thin-film transistor T3, so that the first terminal of the second capacitor C2 is kept at a high level.

[0064] S2: During the touch control phase, the third thin-film transistor T3 is turned off and the fourth thin-film transistor T4 is turned on, so that the second terminal of the second capacitor C2 is charged with a compensation voltage through the fourth thin-film transistor T4 to the potential compensation point Q, so that the potential compensation point Q is kept at a high level; wherein, the compensation voltage is the voltage fed from the first terminal of the second capacitor C2 to the second terminal of the second capacitor C2 based on the capacitive coupling effect.

[0065] In IN-CELL products using GIP design, the touch control phase is inserted into the display phase in long-h mode. Therefore, the operating time of the previous GIP stage is increased due to the insertion of the touch control phase, requiring the potential compensation point Q in the next GIP stage to remain high for an extended period. (Refer to...) Figure 7 In the existing technology, because the potential compensation point Q needs to be maintained at a high level for a long time, the potential of the potential compensation point Q will decrease over time, causing leakage current in the potential compensation point Q, which makes the potential of the potential compensation point Q unable to support the normal display of the pixel driving circuit at this stage.

[0066] In the technical solution provided in this application, during the display stage, the third thin-film transistor T3 in the compensation unit 3 is turned on and the fourth thin-film transistor T4 is turned off. Since the third control voltage is an AC signal that is kept at a high level, the third control voltage charges the first terminal of the second capacitor C2 through the turned-on third thin-film transistor T3, so that the first terminal of the second capacitor C2 is kept at a high potential.

[0067] During the touch control phase, the third thin-film transistor T3 in the compensation unit 3 is turned off, and the fourth thin-film transistor T4 is turned on. A capacitive coupling effect occurs on the second capacitor C2, and the voltage on the first terminal of the second capacitor C2 is fed to the second terminal of the second capacitor C2, generating a compensation voltage on the second terminal of the second capacitor C2. Since the fourth thin-film transistor T4 is in the turned-on state at this time, the compensation voltage on the second terminal of the second capacitor C2 is charged into the potential compensation point Q through the fourth thin-film transistor T4, maintaining the potential compensation point Q at a high potential during the touch control phase.

[0068] Based on the technical solutions provided in the above embodiments, continue to refer to... Figure 7 Because the second capacitor C2 continuously charges the compensation voltage to the potential compensation point Q during the touch control phase, even if the potential of the potential compensation point Q is lost, it can be compensated by the compensation voltage, so that the potential of the potential compensation point Q can be maintained at a high potential for a long time.

[0069] In one feasible embodiment of this application, the third thin-film transistor T3 is a PNP type thin-film transistor, and the fourth thin-film transistor T4 is an NPN type thin-film transistor. The method includes:

[0070] During the display phase, the fourth control voltage is adjusted to a low level to control the third thin-film transistor T3 to turn on and the fourth thin-film transistor T4 to turn off.

[0071] During the touch control phase, the fourth control voltage is adjusted to a high level to control the third thin-film transistor T3 to turn off and the fourth thin-film transistor T4 to turn on.

[0072] In one feasible embodiment of this application, during the reset phase, the fifth control voltage is adjusted to a high level to control the fifth thin-film transistor T5 to turn on, so that the residual charge at the potential compensation point Q is released to the reset cable OUT2 through the fifth thin-film transistor T5; the fourth control voltage is adjusted to a high level to control the sixth thin-film transistor T6 to turn on, so that the residual charge of the output unit 2 and the compensation unit 3 is released to the reset cable OUT2 through the sixth thin-film transistor T6.

[0073] Specifically, Figure 8 For the timing diagrams of each control voltage, refer to... Figure 2 and Figure 8 The implementation principle of the technical solution provided in this application is explained.

[0074] exist Figure 8 In the diagram, V1 is the first control voltage, V2 is the second control voltage, V3-1 to V3-6 are the third control voltages, V4 is the fourth control voltage, V5 is the fifth control voltage, and V6 is the voltage on the reset cable OUT2.

[0075] The pixel driving circuit and pixel driving method provided in this application can be divided into three working stages: a display stage, a touch control stage, and a reset stage. The display stage can be further divided into an initialization sub-stage and a display sub-stage. It should be noted that the display stage and the touch control stage alternate. The reset stage occurs after the pixels driven by the pixel driving circuit have completed display. Within the display stage, the initialization sub-stage occurs first, followed by the display sub-stage. Therefore, the sequence of the working stages is: initialization sub-stage - display sub-stage - touch control stage - initialization sub-stage - display sub-stage - touch control stage - ... - reset stage.

[0076] It should be noted that during the entire operation of the pixel driving circuit, the voltage on the reset cable OUT2 remains at a low level; the third control voltage is a high-level AC signal. Since there is parasitic capacitance in the thin-film transistor, the third control voltage is generally designed with multiple signal inputs. In this application, the third control voltage includes V3-1 to V3-6, and the six third control voltages complete one cycle, cyclically inputting to the pixel driving circuit; during the entire operation of the pixel driving circuit, the voltage on the reset cable OUT2 remains at a high level.

[0077] During the initialization sub-stage, the second control voltage is set to a high level, turning on the first thin-film transistor T1, so that the first control voltage is input to the first terminal of the first capacitor C1.

[0078] During the display sub-stage, the first capacitor C1 charges the second thin-film transistor T2, causing the control terminal of the second thin-film transistor T2 to go high, turning on the second thin-film transistor T2, and the third control voltage is output through the second thin-film transistor T2.

[0079] During the display phase, while performing the above-mentioned display sub-phase, the fourth control voltage is controlled to be high, so that the third thin-film transistor T3 is turned on and the fourth thin-film transistor T4 is turned off, and the third control voltage is charged into the first terminal of the second capacitor C2.

[0080] During the touch control phase, the fourth control voltage is set to a low level, causing the third thin-film transistor T3 to turn off and the fourth thin-film transistor T4 to turn on. The charge on the first terminal of the second capacitor C2 is fed to the second terminal of the second capacitor C2 due to the capacitive coupling effect. The second capacitor C2 charges the potential compensation point Q, maintaining the high potential of the potential compensation point Q.

[0081] During the reset phase, the fifth control voltage is high and the fourth control voltage is low, causing the fifth thin-film transistor T5 and the sixth thin-film transistor T6 to turn on. The residual charge at the first end of the first capacitor C1 is released to the reset cable OUT2 through the fifth thin-film transistor T5, and the residual charge at the second end of the first capacitor C1 is released to the reset cable OUT2 through the sixth thin-film transistor T6.

[0082] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “” used herein may also indicate the inclusion of the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated, unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0083] The above are merely specific embodiments of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A pixel driving circuit, characterized in that, The circuit includes an input unit, an output unit, and a compensation unit; The input unit is connected to the first control signal input terminal, the second control signal input terminal, and the potential compensation point respectively. The first control signal input terminal is used to input the first control voltage, the second control signal input terminal is used to input the second control voltage, and the input unit is used to output the first control voltage to the output unit under the action of the second control voltage. The output unit is connected to the potential compensation point, the third control signal input terminal, and the signal output terminal respectively. The third control signal input terminal is used to input a third control voltage. The output unit is used to output the third control voltage to the signal output terminal under the action of the first control voltage. The compensation unit is connected to the third control signal input terminal, the fourth control signal input terminal and the potential compensation point respectively. The fourth control signal input terminal is used to input the fourth control voltage. The compensation unit is used to charge the third control voltage into the potential compensation point under the action of the fourth control voltage during the touch control stage, so as to compensate the potential of the potential compensation point. The circuit also includes a reset unit; The reset unit is connected to the potential compensation point, the compensation unit, the fourth control signal input terminal, the fifth control signal input terminal, and the reset cable. The fifth control signal input terminal is used to input a fifth control voltage. The reset unit is used to release the residual charge in the potential compensation point, the compensation unit, and the output unit through the reset cable under the action of the fourth control voltage and the fifth control voltage, so as to reset the potential compensation point, the compensation unit, and the output unit.

2. The circuit according to claim 1, characterized in that, The input unit includes a first thin-film transistor; The first terminal of the first thin-film transistor is connected to the first control signal input terminal, the second terminal of the first thin-film transistor is connected to the potential compensation point, and the control terminal of the first thin-film transistor is connected to the second control signal input terminal.

3. The circuit according to claim 1, characterized in that, The output unit includes a first capacitor and a second thin-film transistor; The first end of the first capacitor is connected to the potential compensation point, the second end of the first capacitor is connected to the first end of the second thin film transistor, the second end of the second thin film transistor is connected to the third control signal input terminal, the control terminal of the second thin film transistor is connected to the second end of the first capacitor through the potential compensation point, and the second end of the first capacitor and the first end of the second thin film transistor are connected to the signal output terminal.

4. The circuit according to claim 1, characterized in that, The compensation unit includes a second capacitor, a third thin-film transistor, and a fourth thin-film transistor; The first terminal of the third thin-film transistor is connected to the third control signal input terminal, the second terminal of the third thin-film transistor is connected to the first terminal of the second capacitor, the second terminal of the second capacitor is connected to the first terminal of the fourth thin-film transistor, the second terminal of the fourth thin-film transistor is connected to the potential compensation point, and the control terminals of both the third and fourth thin-film transistors are connected to the fourth control signal input terminal.

5. The circuit according to claim 1, characterized in that, The reset unit includes a fifth thin-film transistor and a sixth thin-film transistor; The first terminal of the fifth thin-film transistor is connected to the potential compensation point and the compensation unit respectively, the control terminal of the fifth thin-film transistor is connected to the fifth control signal input terminal, and the second terminal of the fifth thin-film transistor is connected to the reset cable; The first end of the sixth thin-film transistor is connected to the output unit, the control end of the sixth thin-film transistor is connected to the fourth control signal input end, and the second end of the sixth thin-film transistor is connected to the reset cable.

6. A pixel driving method for the circuit according to any one of claims 1-5, characterized in that, The method includes: During the display phase, the third thin-film transistor is turned on and the fourth thin-film transistor is turned off, so that the third control voltage is charged into the first terminal of the second capacitor through the third thin-film transistor, keeping the first terminal of the second capacitor at a high level. During the touch control phase, the third thin-film transistor is turned off and the fourth thin-film transistor is turned on, so that the second terminal of the second capacitor is charged with a compensation voltage through the fourth thin-film transistor to the potential compensation point, so that the potential compensation point is kept at a high level; wherein, the compensation voltage is the voltage fed from the first terminal of the second capacitor to the second terminal of the second capacitor based on the capacitive coupling effect.

7. The pixel driving method according to claim 6, characterized in that, The third thin-film transistor is a PNP type thin-film transistor, the fourth thin-film transistor is an NPN type thin-film transistor, and the method includes: During the display phase, the fourth control voltage is adjusted to a low level to control the third thin-film transistor to turn on and the fourth thin-film transistor to turn off; During the touch control phase, the fourth control voltage is adjusted to a high level to control the third thin-film transistor to turn off and the fourth thin-film transistor to turn on.

8. The pixel driving method according to claim 6, characterized in that, The method further includes: During the reset phase, the fifth control voltage is adjusted to a high level to control the fifth thin-film transistor to turn on, so that the residual charge at the potential compensation point is released to the reset cable through the fifth thin-film transistor; Adjust the fourth control voltage to a high level to control the sixth thin-film transistor to turn on, so that the residual charge of the output unit and the compensation unit is released to the reset cable through the sixth thin-film transistor.

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