Sparse matrix storage method and vector multiplication method

Abstract

The present application discloses a sparse matrix storage method and a vector multiplication method. The method comprises: obtaining multiple matrix blocks from a sparse matrix according to a predetermined length and width; obtaining multiple storage classes from multiple matrix blocks according to the number of non-zero elements in each matrix block; for the i-th storage class with three or less non-zero elements in multiple storage classes, obtaining the i-th non-zero element array according to the row coordinates and column coordinates of the non-zero elements in the sparse matrix; obtaining the row index array and the first column index array of the i-th storage class according to the column coordinates and row coordinates of the non-zero elements in the sparse matrix; obtaining the quantity index array of the i-th storage class according to the coordinates of the non-zero elements in the i-th non-zero element array; storing the i-th storage class according to the above index array and non-zero element array; for the t-th storage class with three or more non-zero elements in multiple storage classes, using the compressed sparse row CSR format to store the t-th storage class.

Description

Technical Field

[0001] The present application relates to the field of high-performance numerical computing technology, and in particular to a sparse matrix storage method and a vector multiplication method. Background Art

[0002] Sparse Matrix-Vector Multiplication (SpMV) is one of the core components of scientific computing and engineering applications. However, compared with dense matrices, the irregularity of sparse matrix-vector multiplication makes its solution inefficient. Existing sparse matrix storage methods usually need to store more information, such as the row and column numbers corresponding to each non-zero element; and the main performance bottlenecks of the SpMV algorithm in the existing storage method are the following two aspects: on the one hand, the non-zero elements in the sparse matrix are unevenly distributed, resulting in unbalanced computational load; on the other hand, sparse matrix-vector multiplication is a memory-intensive application with low data reuse. Irregular memory access makes data lack of locality, resulting in a high memory access load.

[0003] It is hoped that there will be a new sparse matrix storage method and vector multiplication method to achieve high-speed calculation of sparse matrix-vector multiplication. Summary of the invention

[0004] The present application discloses a sparse matrix storage method and a vector multiplication method.

[0005] In a first aspect, a sparse matrix storage method is provided. The method comprises:

[0006] According to the pre-acquired length and width, a plurality of matrix blocks are obtained from the sparse matrix; according to the number of non-zero elements contained in each matrix block, a plurality of storage classes are obtained from the plurality of matrix blocks;

[0007] For an i-th storage class having three or less non-zero elements among the multiple storage classes, an i-th non-zero element array corresponding to the i-th storage class is obtained according to the non-zero elements in the i-th storage class and the row coordinates and column coordinates of the non-zero elements in the i-th storage class in the sparse matrix; wherein the i-th non-zero element array includes a non-zero element system composed of non-zero elements; for a matrix block corresponding to each non-zero element in the non-zero element system, at the same sparse matrix column coordinate, non-zero elements or zero elements exist simultaneously;

[0008] According to the column coordinates and row coordinates of the non-zero elements in the i-th storage class in the sparse matrix, obtain the row index array and the first column index array of the i-th storage class; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; the first column index array is used to represent the coordinates of the column with non-zero elements in the sparse matrix;

[0009] Obtaining a quantity index array of the i-th storage class according to the coordinates of the non-zero elements of the non-zero element system in the i-th non-zero element array; wherein the quantity index array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array;

[0010] Store the row index array, the first column index array, the quantity index array and the i-th non-zero element array of the i-th storage class;

[0011] For the t-th storage class having three or more non-zero elements among the multiple storage classes, the compressed sparse row CSR format is used to store the t-th storage class.

[0012] In a possible implementation, the quantity index array includes: a class index array;

[0013] The step of obtaining the quantity index array of the i-th storage class according to the coordinates of the non-zero elements of the non-zero element system in the i-th non-zero element array comprises:

[0014] According to the coordinates of the first non-zero element in the non-zero element system in the i-th non-zero element array, a class index array of the i-th storage class is obtained; the class index array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array.

[0015] In a possible implementation, the quantity index array includes: a class information bit array; the class information bit array is used to indicate the coordinates of the non-zero element in the i-th non-zero element array;

[0016] The step of obtaining the quantity index array of the i-th storage class according to the coordinates of the non-zero elements of the non-zero element system in the i-th non-zero element array comprises:

[0017] Use the bit compression method to obtain the class information bit array of the i-th storage class: if the k-th non-zero element in the i-th non-zero element array is the last non-zero element in the non-zero element system, then the value of the bit corresponding to the k-th non-zero element is recorded as 1, otherwise it is recorded as 0.

[0018] In a possible implementation, for a t-th storage class having three or more non-zero elements among the multiple storage classes, using a compressed sparse row CSR format to store the t-th storage class includes:

[0019] For a t-th storage class having three or more non-zero elements among the multiple storage classes, obtaining a t-th non-zero element array corresponding to the t-th storage class according to the non-zero elements in the t-th storage class and the row coordinates and column coordinates of the non-zero elements in the t-th storage class in the sparse matrix;

[0020] Determine the row index array and the second column index array of the t-th storage class according to the column coordinates and row coordinates of the non-zero elements in the t-th storage class in the sparse matrix; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; and the second column index array is used to represent the column coordinates of the non-zero elements in the sparse matrix;

[0021] For the t-th non-zero element array, according to the coordinates of the first non-zero element in the t-th non-zero element array, obtain the block index array of the t-th storage class; wherein the first non-zero element is a first non-zero element among the plurality of non-zero elements in a matrix block having a plurality of non-zero elements; the block index array is used to represent the coordinates of the non-zero elements in the matrix block in the t-th non-zero element array;

[0022] The row index array, the second column index array, the block index array and the tth non-zero element array of the tth storage class are stored.

[0023] In a second aspect, a vector multiplication calculation method performed by a computing device is provided. The method comprises:

[0024] Acquire a sparse matrix stored by a sparse matrix storage method for storing a sparse matrix for vector calculation in a computing device as described in any one of the first aspects;

[0025] performing vector calculations using non-zero elements in the sparse matrix in a storage class stored in the memory having three or fewer non-zero elements; and,

[0026] Vector calculations are performed using non-zero elements in the sparse matrix in a storage class stored in the memory having three or more non-zero elements.

[0027] In a possible implementation, the obtaining a sparse matrix stored by a sparse matrix storage method for storing a sparse matrix for vector calculation in a computing device as described in any one of the first aspects includes:

[0028] Acquire a sparse matrix stored by the sparse matrix storage method for storing a sparse matrix for vector calculation in a computing device as described in the first aspect;

[0029] The performing vector calculation using non-zero elements in the storage class stored in the memory and having three or less non-zero elements in the sparse matrix comprises:

[0030] Divide the thread block used for vector calculation to obtain multiple thread groups;

[0031] For an mth thread group among the multiple thread groups, determining an mth matrix block corresponding to the mth thread group; wherein non-zero elements of each matrix block in the mth matrix block all belong to the same non-zero element system;

[0032] Obtaining the non-zero elements of the m-th matrix partition according to the row index, the first column index, the class index of the non-zero elements in the m-th matrix block, and the non-zero element array corresponding to the storage class where the matrix block in the m-th matrix partition belongs;

[0033] Obtaining, according to the first column index of the non-zero elements in the m-th matrix block, an input vector calculation value corresponding to the m-th matrix block;

[0034] By using a plurality of threads in the mth thread group, the product of the non-zero elements in the mth matrix block and the input vector calculation value corresponding to the mth matrix block is calculated to obtain the mth temporary variable;

[0035] The mth temporary variable is accumulated to the corresponding position of the output vector by using an atomic addition operation.

[0036] In a possible implementation, the obtaining a sparse matrix stored by a sparse matrix storage method for storing a sparse matrix for vector calculation in a computing device as described in any one of the first aspects includes:

[0037] Acquire a sparse matrix stored by the sparse matrix storage method for storing a sparse matrix for vector calculation in a computing device as described in the first aspect;

[0038] The performing vector calculation using non-zero elements in the storage class stored in the memory and having three or less non-zero elements in the sparse matrix comprises:

[0039] For an nth thread in a thread block for vector calculation, determining an nth matrix block of a sparse matrix corresponding to the nth thread according to an index of the nth thread;

[0040] Obtaining the non-zero elements of the n-th matrix block according to the row index, the first column index, the class information bit, the class information auxiliary index, and the non-zero element array corresponding to the storage class where the n-th matrix block is located;

[0041] Obtaining a calculated value of an input vector corresponding to the nth matrix block according to a first column index of non-zero elements in the nth matrix block;

[0042] Calculate, by the nth thread, the product of the non-zero elements in the nth matrix block and the calculated value of the input vector corresponding to the nth matrix block to obtain the nth temporary variable;

[0043] The nth temporary variable is accumulated to the corresponding position of the output vector by using an atomic addition operation.

[0044] In a third aspect, a storage device for a sparse matrix is ​​provided. The device comprises:

[0045] A matrix partitioning unit, configured to obtain a plurality of matrix blocks from the sparse matrix according to the length and width obtained in advance; and obtain a plurality of storage classes from the plurality of matrix blocks according to the number of non-zero elements contained in each matrix block;

[0046] A first storage unit is used to obtain, for an i-th storage class having three or less non-zero elements among the multiple storage classes, an i-th non-zero element array corresponding to the i-th storage class according to the non-zero elements in the i-th storage class and the row coordinates and column coordinates of the non-zero elements in the i-th storage class in the sparse matrix; wherein the i-th non-zero element array contains a non-zero element system composed of non-zero elements; for a matrix block corresponding to each non-zero element in the non-zero element system, non-zero elements or zero elements exist simultaneously at the same sparse matrix column coordinates;

[0047] According to the column coordinates and row coordinates of the non-zero elements in the i-th storage class in the sparse matrix, obtain the row index array and the first column index array of the i-th storage class; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; the first column index array is used to represent the coordinates of the column with non-zero elements in the sparse matrix;

[0048] Obtaining a quantity index array of the i-th storage class according to the coordinates of the non-zero elements of the non-zero element system in the i-th non-zero element array; wherein the quantity index array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array;

[0049] Store the row index array, the first column index array, the quantity index array and the i-th non-zero element array of the i-th storage class;

[0050] The second storage unit is used to store the tth storage class having three or more non-zero elements among the multiple storage classes in a compressed sparse row CSR format.

[0051] In a fourth aspect, a sparse matrix computing device is provided. The device comprises:

[0052] A matrix acquisition unit, used to acquire a sparse matrix stored by a sparse matrix storage method for storing a sparse matrix for vector calculation in a computing device as described in any one of the first aspects;

[0053] A first computing unit, configured to perform vector calculations using non-zero elements in the sparse matrix stored in a storage class having three or fewer non-zero elements in the memory; and

[0054] A second computing unit is used to perform vector calculations using non-zero elements in the sparse matrix in a storage class having three or more non-zero elements stored in the memory.

[0055] In a fifth aspect, an electronic device is provided. The electronic device includes:

[0056] processor; and,

[0057] A memory, in which computer program instructions are stored, and when the computer program instructions are executed by the processor, the processor executes a sparse matrix storage method for storing a sparse matrix for vector calculation in the memory of a computing device as described in any one of the first aspects, or a vector calculation method executed by a computing device as described in any one of the second aspects.

[0058] The technical solution provided by the embodiment of the present application can be obtained by dividing the sparse matrix into multiple matrix blocks; then dividing the matrix blocks into multiple storage classes according to the number of non-zero elements contained in the matrix blocks; for the i-th storage class with less than three non-zero elements, firstly obtain the i-th non-zero element array composed of the non-zero element system corresponding to the i-th storage class according to the row coordinates and column coordinates of the non-zero elements in the i-th storage class in the sparse matrix; then obtain the row index array and the first column index array of the i-th storage class according to the column coordinates and row coordinates of the non-zero elements in the i-th storage class in the sparse matrix; then, obtain the quantity index array of the i-th storage class according to the coordinates of the non-zero elements of the non-zero element system in the i-th non-zero element array; finally store the row index array, the first column index array, the quantity index array and the i-th non-zero element array of the i-th storage class. For the t-th storage class with three or more non-zero elements in multiple storage classes, the compressed sparse row CSR format is used to store the t-th storage class. In this way, the sparse matrix can be divided into multiple storage classes for classified storage; the non-zero elements in the storage class with less than three non-zero elements are divided into a non-zero element system, and the storage class quantity index array obtained through the non-zero element system is added to achieve the reduction of storage information in the row index array and the first column index array, thereby achieving efficient storage and access of the sparse matrix. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0060] Figure 1 A schematic diagram of a sparse matrix and its storage method provided as an example in the embodiments of this specification;

[0061] Figure 2 A flowchart of a sparse matrix storage method provided in an embodiment of this specification;

[0062] Figure 3 for Figure 2 Schematic diagram of the process of step 23;

[0063] Figure 4 for Figure 2 Schematic diagram of the process of step 25;

[0064] Figure 5 A flowchart of a vector multiplication calculation method provided in an embodiment of this specification;

[0065] Figure 6One of the code schematic diagrams for vector multiplication calculation provided as an example in the embodiments of this specification;

[0066] Figure 7 The second code schematic diagram for vector multiplication calculation provided as an example in the embodiment of this specification;

[0067] Figure 8 The third code diagram for vector multiplication calculation provided as an example in the embodiment of this specification;

[0068] Fig. 9 A schematic diagram of the structure of a sparse matrix storage device provided in an embodiment of this specification;

[0069] Fig.10 A schematic diagram of the structure of a vector multiplication calculation device provided in an embodiment of this specification;

[0070] Fig.11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this specification. DETAILED DESCRIPTION

[0071] The solution provided in this specification is described below in conjunction with the accompanying drawings.

[0072] In the description of the embodiments of the present application, words such as "exemplary", "for example" or "for example" are used to indicate examples, illustrations or descriptions, and any embodiment or design described as "exemplary" should not be construed as being preferred or advantageous over other embodiments or designs.

[0073] In the description of the embodiments of the present application, the term "and / or" is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, B exists alone, and A and B exist at the same time. In addition, unless otherwise specified, the term "plurality" means two or more.

[0074] In the description of the embodiments of the present application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. The terms "include", "comprises", "has" and their variations all mean "including but not limited to", unless otherwise specifically emphasized.

[0075] SpMV is one of the core components of scientific computing and engineering applications. In traditional science and engineering, SpMV is widely used in electromagnetics, signal processing, structural mechanics and other fields; SpMV is also widely used in emerging neural network sparsification technology, which is of great significance to reduce the computational intensity of deep learning model training, shorten training time and improve training efficiency. However, compared with dense matrices, the irregularity of sparse matrix-vector multiplication makes its solution inefficient.

[0076] In the 1970s, scholars started to study sparse matrix storage formats and sparse matrix-vector multiplication optimization. Classic sparse matrix storage formats include coordinate storage format (Coordinate, COO), sparse compressed row storage format (Compressed Sparse Row, CSR), ELLPACK storage format (ELL), and diagonal storage format (Diagonal, DIA). Among them, the coordinate storage format COO stores three arrays: row index array, column index array, and non-zero element array. For example, Figure 1 The sparse matrix A shown in is as follows:

[0077]

[0078] The storage method through COO is:

[0079] Row_index=[0 0 0 0 1 2 2 2 2 2 3 3 3 4 4 4 5 5 5 6 6 6 6]

[0080] Col_index=[2 4 5 8 1 5 6 7 8 9 2 4 5 1 8 9 4 5 6 2 4 5 11]

[0081] Value=[1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23].

[0082] Existing sparse matrix storage methods usually need to store more information, such as the row and column numbers corresponding to each non-zero element; and the main performance bottlenecks of the SpMV algorithm of the existing storage method are the following two aspects: on the one hand, the non-zero elements in the sparse matrix are unevenly distributed, resulting in unbalanced computing load; on the other hand, sparse matrix-vector multiplication is a memory-intensive application with low data reuse. Irregular memory access makes data lack locality, resulting in a high memory access load.

[0083] To improve, Figure 2A sparse matrix storage method is provided in an embodiment of this specification, wherein some steps in the method can be executed by a computer program.

[0084] See also Figure 2 As shown, the method may include but is not limited to part or all of the following steps S21-S25.

[0085] Step S21, obtaining a plurality of matrix blocks from the sparse matrix according to the pre-acquired length and width; and obtaining a plurality of storage classes from the plurality of matrix blocks according to the number of non-zero elements contained in each matrix block.

[0086] First, the sparse matrix is ​​divided into a plurality of matrix blocks according to the length and width of the matrix blocks obtained in advance; then, the plurality of matrix blocks are divided into a plurality of storage classes according to the number of non-zero elements in the plurality of matrix blocks, such as the first storage class containing only one non-zero element, the second storage class containing only two non-zero elements, the third storage class containing three or more non-zero elements, and the fourth storage class containing no non-zero elements. Since in the storage and calculation of sparse matrices, matrix blocks containing only zero elements are not operated, the fourth storage class is not described here.

[0087] For example, Figure 1 As shown in the sparse matrix A in , the width of the matrix block can be set to 1 and the length blocklength to 4, and the sparse matrix A can be divided into 24 matrix blocks; Figure 1 There are 17 matrix blocks with non-zero elements in the sparse matrix A shown, and the 17 matrix blocks are divided into 3 storage categories: the first storage category composed of matrix blocks containing only 1 non-zero element, including 7 matrix blocks with green, red, purple and dark blue as shown in the figure; the second storage category composed of matrix blocks containing only 2 non-zero elements, including 5 matrix blocks with cyan and orange as shown in the figure; and the third storage category composed of matrix blocks containing 3 or more non-zero elements, including 2 matrix blocks with gray as shown in the figure.

[0088] It should be noted that the length of the matrix block can be 2n or any other number.

[0089] Step S23, for the i-th storage class with less than three non-zero elements in multiple storage classes, obtain the row index array, the first column index array, the quantity index array and the i-th non-zero element array of the i-th storage class according to the row coordinates and column coordinates of the non-zero elements in the sparse matrix; store the row index array, the first column index array, the quantity index array and the i-th non-zero element array of the i-th storage class.

[0090] like Figure 3As shown, step S23 can be implemented by the following steps S231-S237.

[0091] Step S231, obtaining the i-th non-zero element array corresponding to the i-th storage class according to the non-zero elements in the i-th storage class and the row coordinates and column coordinates of the non-zero elements in the i-th storage class in the sparse matrix; wherein the i-th non-zero element array contains a non-zero element system composed of non-zero elements.

[0092] For the i-th storage class with three or less non-zero elements among multiple storage classes, arrange the non-zero elements contained in the i-th storage class in order according to the horizontal coordinates and column coordinates of the non-zero elements in the sparse matrix to obtain the i-th non-zero element array corresponding to the i-th storage class.

[0093] Continuing with the previous example, Figure 1 In the sparse matrix A shown in FIG. 1 , for the first storage class consisting of matrix blocks containing only one non-zero element, the eight non-zero elements are first sorted according to the column positions in the sparse matrix to obtain four arrays arranged in the order of green, red, purple, and dark blue; then the non-zero elements in each array are sorted according to the row positions in the sparse matrix to obtain the following: Figure 1 The first non-zero element array shown is data = [5, 14, 1, 11, 20, 4, 23].

[0094] For the second storage class consisting of matrix blocks containing only 2 non-zero elements, the 10 non-zero elements are divided into 5 small arrays according to the matrix blocks, and the 5 small arrays are sorted according to the column positions in the sparse matrix to obtain two arrays arranged in the order of cyan and orange; then, the small arrays in each array are arranged according to the row positions in the sparse matrix to obtain the following: Figure 1 The second non-zero element array shown is data = [2, 3, 12, 13, 21, 22, 9, 10, 15, 16].

[0095] The i-th non-zero element array contains a non-zero element system consisting of a single or multiple non-zero elements; the matrix blocks corresponding to the non-zero elements in the same non-zero element system all have non-zero elements or zero elements at the same sparse matrix column coordinates.

[0096] For example Figure 1 As shown, the first non-zero element array contains 4 non-zero element systems, which are marked as green, red, purple, and dark blue; the second non-zero element array contains 2 non-zero element systems, which are marked as cyan and orange.

[0097] Step S233, obtain the row index array and the first column index array of the i-th storage class according to the column coordinates and row coordinates of the non-zero elements in the i-th storage class in the sparse matrix; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; the first column index array is used to represent the coordinates of the columns with non-zero elements in the sparse matrix.

[0098] According to the row coordinates and column coordinates of the non-zero elements in the matrix block in the sparse matrix in the i-th storage class, the row index array of the i-th storage class is determined. The row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix, so that the row coordinates of the non-zero elements in the matrix block in the sparse matrix can be represented.

[0099] For example Figure 1 As shown in the sparse matrix A in , the first storage class has 7 matrix blocks in total, so there should be 7 index numbers in the row index array of the first storage class. According to the order of the column coordinates and row coordinates of the 7 non-zero elements of the 7 matrix blocks in the sparse matrix, for example, the order of the 7 non-zero elements in the first non-zero element array can be obtained to obtain the row index array of the first storage class, which is row = [2, 5, 1, 4, 7, 1, 7].

[0100] There are 5 matrix blocks in the second storage class, so there should be 5 index numbers in the row index array of the second storage class. According to the order of the 10 non-zero elements in the 5 matrix blocks in the second non-zero elements, the row index array of the second storage class is obtained, which is row = [1, 4, 7, 3, 5].

[0101] According to the column coordinates and row coordinates of the non-zero elements in the ith storage class in the sparse matrix, the first column index array of the ith storage class is obtained; wherein the first column index array is used to represent the coordinates of the column with non-zero elements in the sparse matrix.

[0102] For example Figure 1 In the sparse matrix A shown, the 7 non-zero elements in the first storage class are distributed on the 4 columns of the sparse matrix, so the first column index array of the first storage class should have 4 index numbers; according to the column coordinates of these 7 non-zero elements in the sparse matrix, the first column index array of the first storage class is obtained, which is col = [2,3,9,12].

[0103] The 10 non-zero elements in the second storage class are distributed on the 4 columns of the sparse matrix, so the first column index of the second storage class should have 4 index numbers; according to the column coordinates of these 10 non-zero elements in the sparse matrix, the first column index array of the second storage class is obtained, which is col = [5,6,9,10].

[0104] It should be noted that the first column index array can also be understood as being used to represent the column coordinates of the non-zero elements in the i-th non-zero element array in the sparse matrix.

[0105] For example, the first non-zero element array includes 4 non-zero element systems; among the 4 non-zero element systems, the non-zero elements in each non-zero element system have the same sparse matrix column coordinates; then the 4 index numbers in the first column index array in the first storage class are 2, 3, 9, and 12, indicating that the column coordinates of the 4 non-zero element systems in the sparse matrix are 2, 3, 9, and 12.

[0106] For the second storage class, since the matrix blocks in the second storage all have two non-zero elements, the two non-zero elements in each matrix block can be regarded as a small array, so the second non-zero element array includes 5 small arrays; the non-zero elements in the second non-zero element array are all composed of small arrays. Figure 1 As shown, the second non-zero element array includes cyan and orange non-zero element systems, the cyan non-zero element system includes 3 small arrays, and the orange non-zero element system includes 2 small arrays; the column coordinates of each non-zero element system in the sparse matrix are represented by the non-zero elements of the small array in the sparse matrix column coordinates, that is, the column coordinates of each non-zero element system in the sparse matrix are represented by 2 index numbers, for example, the first column index numbers of the cyan non-zero element system are 5 and 6.

[0107] Step S235, obtaining the quantity index array of the i-th storage class according to the coordinates of the non-zero elements of the non-zero element system in the i-th non-zero element array; wherein the quantity index array is used to represent the coordinates of the non-zero elements of the non-zero element system in the i-th non-zero element array.

[0108] After obtaining the quantity index array of the i-th storage class, the column coordinates of the non-zero elements in the i-th non-zero element array in the sparse matrix can be obtained based on the quantity index array of the i-th storage class and the first column index array; in other words, the non-zero elements in the i-th non-zero element array and their respective column coordinates in the sparse matrix can be represented by combining the quantity index array of the i-th storage class and the first column index array.

[0109] In one possible implementation, the quantity index array includes: a class index array; the quantity index array of the i-th storage class can be obtained through step S2351: based on the coordinates of the first non-zero element in the non-zero element system in the i-th non-zero element array, the class index array of the i-th storage class is obtained; the class index array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array.

[0110] Among them, because the class index array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array, the number of class index arrays of the i-th storage class is equal to the number of non-zero element systems in the i-th non-zero element array.

[0111] For example Figure 1 As shown in the figure, the first non-zero element array has 4 non-zero element systems, so the first storage class should have 4 class index numbers. In the first non-zero element array, the coordinates of the first non-zero element of each of the 4 non-zero element systems are 0, 2, 5, and 6, respectively, so the class index array of the first storage class is index = [0, 2, 5, 6].

[0112] At the same time, the first class index array and the first column index array storing the class can represent the column coordinates of the non-zero elements in the first non-zero element array in the sparse matrix.

[0113] The second non-zero element array has two non-zero element systems, so the second storage class should have two class index arrays. In the second non-zero element array, the coordinates of the first non-zero elements of the two non-zero element systems are 0 and 7 respectively, so the class index array of the second storage class is index = [0,7].

[0114] It should be noted that the i-th non-zero element array is arranged according to the column coordinates and row coordinates of the non-zero elements in the sparse matrix, that is, the order of the non-zero element arrangement is also arranged in the matrix block. In the i-th non-zero element array, the i-th non-zero element array can be numbered according to the small array composed of non-zero elements in the matrix block. For example, in the second non-zero element array, there are 5 small arrays; the non-zero element system marked with cyan contains 3 small arrays, and the non-zero element system marked with orange contains 2 small arrays. The first non-zero element of the cyan non-zero element system, the first small array in the second non-zero element array, has a coordinate of 0 in the second non-zero element array; the first non-zero element of the orange non-zero element system, the fourth small array in the second non-zero element array, has a coordinate of 3 in the second non-zero element array; then the class index array of the second storage class can be expressed as index = [0,3].

[0115] Thus, the non-zero elements in the i-th storage class can be stored according to the row index array, the first column index array, the class index array, and the i-th non-zero element array of the i-th storage class. For example, the value and position in the sparse matrix of the target non-zero element 11 marked in red in the first non-zero element array can be stored according to each index.

[0116] First, according to the index numbers 2 and 5 in the class index array of the first storage class, it means that the coordinate of the first non-zero element of the red non-zero element system in the first non-zero element array is 2, which is the third non-zero element in the non-zero element array; the coordinate of the first non-zero element of the purple non-zero element system in the first non-zero element array is 5, which is the sixth non-zero element in the non-zero elements; then the non-zero elements in the red non-zero element system are the 3rd, 4th and 5th non-zero elements in the first non-zero element array, and the values ​​of the non-zero elements are 1, 11 and 20 respectively.

[0117] Subsequently, because the non-zero elements in the red non-zero element system are located in the same column of the sparse matrix, and according to the class index array of the first storage class, the target non-zero element 11 is located in the second non-zero element system in the first non-zero element array, then the first column index number of the target non-zero element 11 should be the second index number 3 in the first column index array, then the target non-zero element 11 should be located in the third column of the sparse matrix.

[0118] Next, according to the coordinate of the target non-zero element 11 in the first non-zero element array is 3, that is, it is the fourth non-zero element in the first non-zero element array, then according to the row index array of the first storage class, the fourth row index number is 4, indicating that the target non-zero element 11 is located in the fourth row of the sparse matrix. Therefore, it can be known that the target element 11 is located in the third column and the fourth row of the sparse matrix, thereby realizing the storage of the target non-zero element 11.

[0119] In a possible implementation, the quantity index array includes: a class information bit array; the class information bit array is used to represent the coordinates of the non-zero element in the i-th non-zero element array.

[0120] The class information bit array can be obtained through step 2353: Use the bit compression method to obtain the class information bit array of the i-th storage class: if the m-th non-zero element in the i-th non-zero element array is the last non-zero element in the non-zero element system, then the value of the bit corresponding to the m-th non-zero element is recorded as 1, otherwise it is recorded as 0.

[0121] For the i-th non-zero element array, a bit compression method can be used to mark the positions of non-zero elements in different non-zero element systems in the i-th non-zero element array.

[0122] For example, for Figure 1 The first non-zero element array in the sparse matrix A shown in the figure has 4 non-zero element systems; the last non-zero elements in the 4 non-zero element systems are non-zero element 14 marked in green, non-zero element 20 marked in red, non-zero element 4 marked in purple, and non-zero element 23 marked in blue; then in the corresponding bit sequence, the bit values ​​corresponding to these 4 non-zero elements are 1, and the other bit values ​​are 0; specifically, in the first non-zero element array, the bit values ​​corresponding to the second, fifth, sixth, and seventh non-zero elements are 1, and the other values ​​are 0. Then the bit sequence corresponding to the first non-zero element array is [01001110, 00000000, 00000000, 00000000], which is represented by unsigned integer data as [0x4E000000]; then the class information bit array of the first storage class is bitmap = [0, 0x4E000000].

[0123] At the same time, as mentioned above, since the number of non-zero elements in the matrix block of the second storage class is 2, these two non-zero elements can be regarded as a small array; then when using the bit compression method to mark the distribution of the non-zero element system, the small array can be used as a unit. For example, for Figure 1 The second non-zero element array in the sparse matrix A shown in the figure has two non-zero element systems; the last small arrays in the two non-zero element systems are the non-zero elements 21 and 22 marked in cyan, and the non-zero elements 15 and 16 marked in orange. In the corresponding bit sequence, the bit values ​​corresponding to these two small arrays are 1, and the bit values ​​of other small arrays are 0; specifically, in the second non-zero element array, the bit values ​​of the third and fifth small arrays are 1, and the other values ​​are 0; the bit sequence corresponding to the second non-zero element array is [00101000, 00000000, 00000000, 00000000], which is represented by unsigned integer data as [0x28000000]; the class information bit array of the first storage class is bitmap = [0, 0x28000000].

[0124] Therefore, the non-zero elements in the i-th storage class can be stored according to the row index array, the first column index array, the class information bit array, and the i-th non-zero element array of the i-th storage class.

[0125] Step S237, storing the row index array, the first column index array, the quantity index array and the i-th non-zero element array of the i-th storage class, thereby realizing the storage of the i-th storage class with less than three non-zero elements.

[0126] Step S25, for the t-th storage class with three or more non-zero elements among multiple storage classes, the compressed sparse row CSR format is used to store the t-th storage class.

[0127] In a possible implementation, Figure 3 As shown, step S25 can be implemented by the following steps S251-S255.

[0128] Step S251, obtain the t-th non-zero element array corresponding to the t-th storage class according to the non-zero elements in the t-th storage class, and the row coordinates and column coordinates of the non-zero elements in the t-th storage class in the sparse matrix; determine the row index array and the second column index array of the t-th storage class according to the row coordinates and column coordinates of the non-zero elements in the t-th storage class in the sparse matrix; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; the second column index array is used to represent the column coordinates of the non-zero elements in the sparse matrix.

[0129] Similar to the method of storing storage classes with three or less non-zero elements in the aforementioned step S23, the method of obtaining the t-th non-zero element array, the row index array of the t-th storage class, and the second column index array is not described in detail here.

[0130] However, it should be noted that although the second column index array and the first column index array can be related to the column position of the non-zero elements in the sparse matrix; but unlike the first column index array, the first column index array is used to represent the coordinates of the columns with non-zero elements in the sparse matrix, and the number of columns with non-zero elements in the sparse matrix can be an integer multiple of the number of first column index numbers in the first column index array; and the second column index number is used to directly represent the column coordinates of the non-zero elements in the sparse matrix, that is, the number of second column index numbers in the second column index array is the same as the number of non-zero elements.

[0131] Step S253, for the t-th non-zero element array, according to the coordinates of the first non-zero element in the t-th non-zero element array, obtain the block index array of the t-th storage class; wherein the first non-zero element is the first non-zero element among multiple non-zero elements in a matrix block having multiple non-zero elements; the block index array is used to represent the coordinates of the non-zero elements in the matrix block in the t-th non-zero element array.

[0132] like Figure 1 In the sparse matrix A shown, the third storage class marked in gray includes 2 matrix blocks, each of which contains 3 non-zero elements. Similar to the small arrays mentioned above, multiple non-zero elements of the same matrix block can be regarded as 1 small array, that is, the third non-zero element array includes 2 small arrays [6,7,8] and [16,17,18]. According to the coordinates of the first non-zero element in the matrix block in the third non-zero element array, the block index array of the third storage class is obtained. Specifically, the first non-zero element in the small array - non-zero element 6 and non-zero element 16 are the first and fourth in the third non-zero element array, then their coordinates in the non-zero element array are 0 and 3, then the block index array of the third storage class is index = [0,3].

[0133] Step S255, storing the row index array, the second column index array, the block index array and the tth non-zero element array of the tth storage class.

[0134] Thus, according to the above steps, the storage of storage classes with more than three non-zero elements is realized; and then the storage of sparse matrices is completed.

[0135] In addition, the embodiments of the present specification also provide a sparse matrix-vector multiplication calculation method for calculating the product of a sparse matrix stored in a memory and other vectors.

[0136] As described above, in an embodiment of the present application, a sparse matrix storage method performed by a computing device is provided, which is a storage format of a coefficient matrix for SpMV calculation in a vector calculation scenario (such as Intel's AVX512 instruction set, ARM's SVE instruction set, SIMT calculation mode on a GPU, etc.). In addition, by using a variety of methods such as machine learning methods, different parameters can be selected for different sparse matrices and different hardware conditions, thereby achieving the optimal performance of SpMV calculation.

[0137] Figure 5 FIG. 4 is a schematic diagram of the overall calculation process of SpMV according to an embodiment of the present application. Figure 5 As shown, firstly, the sparse matrix to be calculated is preprocessed based on the above sparse matrix storage method, and then the SpMV is calculated after the preprocessing is completed.

[0138] Step S41, obtaining a sparse matrix stored by a sparse matrix storage method for storing sparse matrices for vector calculation in a computing device.

[0139] Step S43, performing vector calculations using non-zero elements in a storage class in a sparse matrix that is stored in a memory and has three or fewer non-zero elements.

[0140] In a possible implementation, for the non-zero elements stored by the storage method including step S2351, vector calculation may be performed in the following manner.

[0141] Obtain a sparse matrix stored by a sparse matrix storage method including step S2351; divide the thread blocks used for vector calculation to obtain multiple thread groups; for an m-th thread group among the multiple thread groups, determine an m-th matrix block corresponding to the m-th thread group; wherein the non-zero elements of each matrix block in the m-th matrix block all belong to the same non-zero element system; obtain the non-zero elements of the m-th matrix block according to the row index, the first column index, the class index of the non-zero elements in the m-th matrix block, and the non-zero element array corresponding to the storage class of the matrix block in the m-th matrix block; obtain the input vector calculation value corresponding to the m-th matrix block according to the first column index of the non-zero elements in the m-th matrix block; calculate the product of the non-zero elements in the m-th matrix block and the input vector calculation value corresponding to the m-th matrix block through multiple threads in the m-th thread group to obtain an m-th temporary variable; and accumulate the m-th temporary variable to the corresponding position of the output vector using an atomic add operation.

[0142] For example, if Figure 6 A schematic diagram of a calculation process code of a vector calculation method provided by an embodiment is illustrated.

[0143] Figure 6In the above example, ordernum is the number of non-zero elements in the storage class with less than three non-zero elements in the sparse matrix; col is the first column index; index is the class index; row is the row index; data is the value of the non-zero element; x is the input vector; KERNEL_PART is the number of thread groups in the thread block; BLOCK_DIM is the number of thread warps in the thread block.

[0144] The following details Figure 6 The calculation process of the algorithm shown in FIG. First, the numbers of the m thread groups in the entire thread block are calculated and stored in the variable warporder. This number is not only used as the index of the m-th thread group in the thread block, but also can be used to determine the matrix block corresponding to the m-th thread group according to the number. The non-zero elements of each matrix block in the m-th matrix block belong to the same non-zero element system.

[0145] To avoid wasting resources, it is set that when the number of the mth thread group is less than the number of non-zero elements in the sparse matrix, the following calculation is performed.

[0146] Subsequently, according to the index of the m-th thread group, the input vector, and the corresponding first column index number in each matrix block in the m-th matrix block, the value of the input vector used for calculation of multiple threads in the m-th thread group is obtained from the input vector, and the values ​​of these input vectors are stored in the shared memory vector_buf; and the class index number corresponding to the m-th matrix block is obtained from the class index array of the i-th storage class, and the class index number corresponding to the m-th matrix block is stored in the shared memory ordernum_buf.

[0147] For the nth thread in the mth thread group, the label of the nth thread in the mth thread group is obtained according to the index of the nth thread in the mth thread group and the number of threads in the mth thread group; the label is also used to obtain the nth matrix block in the mth matrix block corresponding to the nth thread.

[0148] According to the number of threads in the mth thread group and the index of the nth thread in the mth thread group, the index of the first non-zero element in the mth matrix block is initialized to i, that is, in the mth matrix block, the index of the first non-zero element of the first matrix block is i, where the first matrix block is processed by the first thread in the mth thread group. Subsequently, all non-zero elements in the mth thread are traversed by looping to obtain the indexes of all non-zero elements.

[0149] Next, in each loop, we ensure that each thread processes only the non-zero elements associated with it by checking whether idx is less than the number of non-zero elements in the current class.

[0150] Then, the nth thread obtains the value of the input vector from the shared memory ordernum_buf according to the index i, and multiplies the value of the non-zero element with the value of the input vector to obtain the nth vector product. At the same time, if the nth matrix block contains two non-zero elements, the product of the two non-zero elements and the input vector is calculated respectively, and then the two products are added to obtain the nth vector product.

[0151] According to the index i, the row index number corresponding to the n-th matrix block is obtained; according to the row index number corresponding to the n-th matrix block, the n-th vector product is stored at the corresponding position of the output vector global memory by using the atomic addition operation; after completing all calculations, all output vectors are output.

[0152] In a possible implementation, for the non-zero elements stored by the storage method including step S2353, vector calculation may be performed in the following manner.

[0153] For the nth thread in the thread block used for vector calculation, determine the nth matrix block of the sparse matrix corresponding to the nth thread according to the index of the nth thread; obtain the non-zero elements of the nth matrix block according to the row index, the first column index, the class information bit, the class information auxiliary index of the non-zero elements in the nth matrix block, and the non-zero element array corresponding to the storage class where the nth matrix block is located; obtain the calculated value of the input vector corresponding to the nth matrix block according to the first column index of the non-zero elements in the nth matrix block; calculate the product of the non-zero elements in the nth matrix block and the calculated value of the input vector corresponding to the nth matrix block through the nth thread to obtain the nth temporary variable; use the atomic addition operation to accumulate the nth temporary variable to the corresponding position of the output vector.

[0154] For example, Figure 7 A code schematic diagram of the calculation process of a vector calculation method provided by an embodiment is shown.

[0155] Figure 7 In the above example, blocknum is the number of matrix blocks with less than three non-zero elements in the sparse matrix; col is the first column index; bitmap is the class information bit index; res_entry is the class information auxiliary array; row is the row index; data is the value of the non-zero element; x is the input vector; KERNEL_PART is the number of thread groups in the thread block; BLOCK_DIM is the number of thread warps in the thread block.

[0156] The following details Figure 7The calculation process of the algorithm shown in FIG. First, according to the parameter settings of the thread grid (Grid) and the thread block (Block) when the kernel function is called, the local index lid and the global index orderid of the nth thread are calculated. Similar to the above, the global index orderid can be used to determine the nth matrix block corresponding to the nth thread, that is, the product of the nth matrix block and the input vector is calculated by the nth thread.

[0157] To ensure that each thread processes the matrix block or input vector corresponding to itself and avoid wasting computing resources, it is set that when the number of the nth thread is less than the number of matrix blocks in the sparse matrix, the subsequent steps are executed.

[0158] Subsequently, the class information bits corresponding to the non-zero elements of the nth matrix block are read from the bitmap array and stored in the bitmap_buf array; subsequently, the number of non-zero elements in the nth matrix block is calculated based on the class information bits corresponding to the non-zero elements of the nth matrix block and stored in the warp_base array.

[0159] Use the first thread in the j-th thread block to obtain the total number of non-zero element systems processed by the first (j-1) threads and the total number of non-zero element systems processed by the first j threads. According to the row index number corresponding to the j-th thread block and the number of non-zero elements in the j-th thread block, obtain the vector value required for the j-th thread block calculation from the input vector and store the vector value in the shared memory vector_buf.

[0160] Subsequently, the identifier of the non-zero element system corresponding to the non-zero element in the j-th thread block is obtained according to the class information bit array and the class auxiliary array storing the class.

[0161] Get the vector value used for the calculation of the nth thread from the shared memory vector_buf, and obtain the non-zero elements of the nth matrix block from the non-zero element array according to the number of the nth matrix block; calculate the product of the non-zero elements in the nth matrix block and the input vector through the nth thread to obtain the nth vector product. At the same time, if the nth matrix block contains two non-zero elements, calculate the product of the two non-zero elements and the input vector respectively, and then add the two products to obtain the nth vector product.

[0162] According to the row index corresponding to the nth matrix block, the nth vector product is stored at the corresponding position of the output vector global memory using an atomic addition operation; after all calculations are completed, the output vector is obtained.

[0163] When performing vector calculations on non-zero elements stored by the storage method including step S2353, in order to avoid a single thread block from reading the bit information array multiple times, in a possible implementation, a class information auxiliary index array may be added to obtain the number of non-zero element systems processed by the current thread. The class information auxiliary index array is used to indicate the total number of non-zero element systems in the matrix block processed by the thread.

[0164] For example, when the jth matrix block is calculated by the jth thread block, the class information auxiliary index array of the jth thread block can be obtained according to the total number of non-zero element systems in the j-1 thread blocks before the jth thread block. Figure 1 In the sparse matrix A, the class information auxiliary array of the first storage class should be res_entry = [0,4]; the class information auxiliary array of the second storage class should be res_entry = [0,2]. Step S45, perform vector calculation using the non-zero elements in the storage class with three or more non-zero elements stored in the memory in the sparse matrix.

[0165] In a possible implementation, for the non-zero elements stored by the storage method including step S253 , vector calculation may be performed in the following manner.

[0166] For example, if Figure 8 The calculation process code diagram of the provided vector calculation method is shown in the following figure.

[0167] Figure 8 In the expression, blocknum is the number of matrix blocks with three or fewer nonzero elements in the sparse matrix; col is the second column index; index is the block index; row is the row index; data is the value of the nonzero elements; and x is the input vector.

[0168] The following details Figure 8 The calculation process of the algorithm shown in FIG. First, according to the parameter settings of the thread grid (Grid) and the thread block (Block) when the kernel function is called, the global index orderid of the jth thread is calculated. The global index orderid can be used by the jth thread to determine the corresponding jth matrix block.

[0169] To avoid wasting resources, it is set that when the number of the j-th thread group is less than the number of matrix blocks in the storage class where the j-th matrix block is located, the following calculation is performed.

[0170] Subsequently, the j-th thread calculates multiple products of multiple non-zero elements in the matrix block and the input vector respectively, and adds the multiple products to obtain the j-th vector product; finally, according to the row index number corresponding to the j-th matrix block, the j-th vector product is stored in the corresponding position of the output vector global memory using the atomic addition operation; after completing all calculations, the output vector is obtained.

[0171] In addition, when performing vector multiplication calculations, a load optimization method can be performed by rearranging the matrix blocks according to the number of non-zero elements in the matrix blocks. For example, first, count the number of non-zero elements in each matrix block. Then, sort the matrix blocks according to the number of non-zero elements obtained by counting, so that the matrix blocks with similar numbers of non-zero elements are arranged together. Next, rearrange the calculation order of the matrix blocks: rearrange the calculation order according to the sorted matrix block order; usually, matrix blocks with similar numbers of non-zero elements are assigned to the same thread bundle or thread group to achieve load balancing. Finally, according to the rearranged calculation order, matrix multiplication and other operations are performed; since the number of non-zero elements in the matrix blocks has been optimized according to load balancing, computing resources can be used more effectively and the overall computing performance can be improved.

[0172] In this way, the vector multiplication calculation of the sparse matrix and the input vector can be implemented.

[0173] Based on the same concept as the above method embodiment, this specification also provides a storage device for a sparse matrix. Fig. 9 As shown, the device may include: a matrix dividing unit 91, a first storage unit 92, and a second storage unit 93.

[0174] The matrix partitioning unit 91 is used to obtain a plurality of matrix blocks from the sparse matrix according to the length and width obtained in advance; and obtain a plurality of storage classes from the plurality of matrix blocks according to the number of non-zero elements contained in each matrix block;

[0175] The first storage unit 92 is used to obtain, for an i-th storage class having three or less non-zero elements among the multiple storage classes, an i-th non-zero element array corresponding to the i-th storage class according to the non-zero elements in the i-th storage class and the row coordinates and column coordinates of the non-zero elements in the i-th storage class in the sparse matrix; wherein the i-th non-zero element array includes a non-zero element system composed of non-zero elements; for a matrix block corresponding to each non-zero element in the non-zero element system, at the same sparse matrix column coordinate, there are both non-zero elements or both zero elements;

[0176] According to the column coordinates and row coordinates of the non-zero elements in the ith storage class in the sparse matrix, obtain the row index array and the first column index array of the ith storage class; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; the first column index array is used to represent the coordinates of the columns with non-zero elements in the sparse matrix;

[0177] According to the coordinates of the non-zero elements of the non-zero element system in the i-th non-zero element array, the quantity index array of the i-th storage class is obtained; wherein the quantity index array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array;

[0178] Store the row index array, the first column index array, the quantity index array, and the i-th non-zero element array of the i-th storage class;

[0179] The second storage unit 93 is used to store the t-th storage class having three or more non-zero elements among the multiple storage classes in a compressed sparse row CSR format.

[0180] Based on the same concept as the above method embodiment, this specification also provides a sparse matrix calculation device. Fig.10 As shown, the device may include: a matrix acquisition unit 101, a first calculation unit 102, and a second calculation unit 103.

[0181] A matrix acquisition unit 101 is used to acquire a sparse matrix stored by a sparse matrix storage method for storing sparse matrices for vector calculation in a computing device through steps S21-S27;

[0182] A first computing unit 102 is configured to perform vector computation using non-zero elements in a storage class having three or less non-zero elements stored in a memory in a sparse matrix; and

[0183] The second computing unit 103 is used to perform vector calculation using non-zero elements in a storage class having three or more non-zero elements stored in the memory in the sparse matrix.

[0184] The present specification also provides an electronic device. Fig.11 As shown, the electronic device includes one or more processors 111 and a memory 112 .

[0185] The processor 111 may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 10 to perform desired functions.

[0186] The memory 112 may include one or more computer program products, and the computer program product may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory (cache), etc. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on a computer-readable storage medium, and the processor 111 may run the program instructions to implement the sparse matrix storage method and vector calculation method for vector calculation of the various embodiments of the present application above and / or other desired functions. Various contents such as non-zero elements and control parameters may also be stored in the computer-readable storage medium.

[0187] In addition to the above-mentioned methods and devices, an embodiment of the present application may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the steps of the sparse matrix storage method and vector calculation method for vector calculation according to various embodiments of the present application described in the above "Exemplary Method" section of this specification.

[0188] The computer program product may be written in one or more hardware description languages ​​used on FPGA platforms to write program codes for performing the operations of the embodiments of the present application, such as Verilog / VHDL, etc. The program code may be executed entirely on the user computing device, partially on the user computing device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0189] In addition, an embodiment of the present application may also be a computer-readable storage medium on which computer program instructions are stored. When the computer program instructions are executed by a processor, the processor executes the steps of the sparse matrix storage method and vector calculation method for vector calculation according to various embodiments of the present application described in the above "Exemplary Method" section of this specification.

[0190] Computer readable storage media can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can include, for example, but is not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0191] The above specific implementation methods further illustrate the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the present invention should be included in the scope of protection of the present invention.

Claims

1. A sparse matrix storage method, characterized in that: The method comprises: According to the pre-acquired length and width, a plurality of matrix blocks are obtained from the sparse matrix; according to the number of non-zero elements contained in each matrix block, a plurality of storage classes are obtained from the plurality of matrix blocks; For an i-th storage class having three or less non-zero elements among the multiple storage classes, an i-th non-zero element array corresponding to the i-th storage class is obtained according to the non-zero elements in the i-th storage class and the row coordinates and column coordinates of the non-zero elements in the i-th storage class in the sparse matrix; wherein the i-th non-zero element array includes a non-zero element system composed of non-zero elements; for a matrix block corresponding to each non-zero element in the non-zero element system, at the same sparse matrix column coordinate, non-zero elements or zero elements exist simultaneously; According to the column coordinates and row coordinates of the non-zero elements in the i-th storage class in the sparse matrix, obtain the row index array and the first column index array of the i-th storage class; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; the first column index array is used to represent the coordinates of the column with non-zero elements in the sparse matrix; According to the coordinates of the first non-zero element in the non-zero element system in the i-th non-zero element array, the class index array of the i-th storage class is obtained; the class index array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array; the class information bit array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array; using the bit compression method, the class information bit array of the i-th storage class is obtained: if the k-th non-zero element in the i-th non-zero element array is the last non-zero element in the non-zero element system, the value of the bit corresponding to the k-th non-zero element is recorded as 1, otherwise it is recorded as 0; Store the row index array, the first column index array, the class index array, the class information bit array and the i-th non-zero element array of the i-th storage class; For a t-th storage class having three or more non-zero elements among the multiple storage classes, obtaining a t-th non-zero element array corresponding to the t-th storage class according to the non-zero elements in the t-th storage class and the row coordinates and column coordinates of the non-zero elements in the t-th storage class in the sparse matrix; Determine the row index array and the second column index array of the t-th storage class according to the column coordinates and row coordinates of the non-zero elements in the t-th storage class in the sparse matrix; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; and the second column index array is used to represent the column coordinates of the non-zero elements in the sparse matrix; For the t-th non-zero element array, according to the coordinates of the first non-zero element in the t-th non-zero element array, obtain the block index array of the t-th storage class; wherein the first non-zero element is a first non-zero element among the plurality of non-zero elements in a matrix block having a plurality of non-zero elements; the block index array is used to represent the coordinates of the non-zero elements in the matrix block in the t-th non-zero element array; The row index array, the second column index array, the block index array and the tth non-zero element array of the tth storage class are stored.

2. A vector multiplication calculation method, characterized in that: include: Obtain a sparse matrix stored by the sparse matrix storage method according to claim 1; Perform vector calculations using non-zero elements in the sparse matrix in a storage class stored in memory having three or fewer non-zero elements; and, Vector calculations are performed using non-zero elements in the sparse matrix in a storage class stored in memory having three or more non-zero elements.

3. The method according to claim 2, wherein: The performing vector calculation using non-zero elements in a storage class stored in a memory and having three or less non-zero elements in the sparse matrix comprises: Divide the thread block used for vector calculation to obtain multiple thread groups; For an mth thread group among the multiple thread groups, determining an mth matrix block corresponding to the mth thread group; wherein non-zero elements of each matrix block in the mth matrix block all belong to the same non-zero element system; Obtaining the non-zero elements of the m-th matrix partition according to the row index, the first column index, the class index of the non-zero elements in the m-th matrix block, and the non-zero element array corresponding to the storage class where the matrix block in the m-th matrix partition belongs; Obtaining, according to the first column index of the non-zero elements in the m-th matrix block, an input vector calculation value corresponding to the m-th matrix block; By using a plurality of threads in the mth thread group, the product of the non-zero elements in the mth matrix block and the input vector calculation value corresponding to the mth matrix block is calculated to obtain the mth temporary variable; The mth temporary variable is accumulated to the corresponding position of the output vector by using an atomic addition operation.

4. The method according to claim 2, wherein: The performing vector calculation using non-zero elements in a storage class stored in a memory and having three or less non-zero elements in the sparse matrix comprises: For an nth thread in a thread block for vector calculation, determining an nth matrix block of a sparse matrix corresponding to the nth thread according to an index of the nth thread; Obtaining the non-zero elements of the n-th matrix block according to the row index, the first column index, the class information bit, the class information auxiliary index, and the non-zero element array corresponding to the storage class where the n-th matrix block is located; Obtaining a calculated value of an input vector corresponding to the nth matrix block according to a first column index of non-zero elements in the nth matrix block; Calculate, by the nth thread, the product of the non-zero elements in the nth matrix block and the calculated value of the input vector corresponding to the nth matrix block to obtain the nth temporary variable; The nth temporary variable is accumulated to the corresponding position of the output vector by using an atomic addition operation.

5. A storage device for a sparse matrix, characterized in that: The device comprises: A matrix partitioning unit, configured to obtain a plurality of matrix blocks from the sparse matrix according to the length and width obtained in advance; and obtain a plurality of storage classes from the plurality of matrix blocks according to the number of non-zero elements contained in each matrix block; A first storage unit is used to obtain, for an i-th storage class having three or less non-zero elements among the multiple storage classes, an i-th non-zero element array corresponding to the i-th storage class according to the non-zero elements in the i-th storage class and the row coordinates and column coordinates of the non-zero elements in the i-th storage class in the sparse matrix; wherein the i-th non-zero element array contains a non-zero element system composed of non-zero elements; for a matrix block corresponding to each non-zero element in the non-zero element system, non-zero elements or zero elements exist simultaneously at the same sparse matrix column coordinates; According to the column coordinates and row coordinates of the non-zero elements in the i-th storage class in the sparse matrix, obtain the row index array and the first column index array of the i-th storage class; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; the first column index array is used to represent the coordinates of the column with non-zero elements in the sparse matrix; According to the coordinates of the first non-zero element in the non-zero element system in the i-th non-zero element array, the class index array of the i-th storage class is obtained; the class index array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array; the class information bit array is used to represent the coordinates of the non-zero element system in the i-th non-zero element array; the class information bit array of the i-th storage class is obtained using a bit compression method: if the k-th non-zero element in the i-th non-zero element array is the last non-zero element in the non-zero element system, the value of the bit corresponding to the k-th non-zero element is recorded as 1, otherwise it is recorded as 0; the row index array, the first column index array, the class index array, the class information bit array and the i-th non-zero element array of the i-th storage class are stored; For a t-th storage class having three or more non-zero elements among the multiple storage classes, obtaining a t-th non-zero element array corresponding to the t-th storage class according to the non-zero elements in the t-th storage class and the row coordinates and column coordinates of the non-zero elements in the t-th storage class in the sparse matrix; Determine the row index array and the second column index array of the t-th storage class according to the column coordinates and row coordinates of the non-zero elements in the t-th storage class in the sparse matrix; wherein the row index array is used to represent the row coordinates of the matrix block with non-zero elements in the sparse matrix; and the second column index array is used to represent the column coordinates of the non-zero elements in the sparse matrix; For the t-th non-zero element array, according to the coordinates of the first non-zero element in the t-th non-zero element array, obtain the block index array of the t-th storage class; wherein the first non-zero element is a first non-zero element among the plurality of non-zero elements in a matrix block having a plurality of non-zero elements; the block index array is used to represent the coordinates of the non-zero elements in the matrix block in the t-th non-zero element array; The row index array, the second column index array, the block index array and the tth non-zero element array of the tth storage class are stored.

6. A sparse matrix computing device, characterized in that: The device comprises: A matrix acquisition unit, used for acquiring the sparse matrix stored by the sparse matrix storage method according to claim 1; A first computing unit, configured to perform vector calculations using non-zero elements in a storage class having three or fewer non-zero elements stored in a memory in the sparse matrix; and The second computing unit is used to perform vector calculations using non-zero elements in the storage class stored in the memory and having three or more non-zero elements in the sparse matrix.

7. An electronic device comprising: processor; as well as, A memory, in which computer program instructions are stored, and when the computer program instructions are executed by the processor, the processor executes the sparse matrix storage method as claimed in claim 1 or the method as claimed in claims 2-4.

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