A method for fast access to a register using a bus address
By dividing the chip system into modules and establishing an address mapping table, and using bus addresses for backdoor access, the problems of long register operation time and cumbersome maintenance are solved, realizing fast and efficient register operation and verification, and improving the verification efficiency of the chip system.
Patent Information
- Application Number
- CN202410427480.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-10
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2044-04-10
AI Technical Summary
In the chip verification process, traditional register operation methods cannot achieve rapid batch operations, resulting in excessively long simulation and running times, and cumbersome subsequent maintenance, making it difficult to meet the requirements of efficient verification.
By dividing the chip system into modules and establishing an address mapping table, including register offset addresses and module base address tables, backdoor access is performed using bus addresses, simplifying register operation paths, reducing the writing of lengthy paths, and improving operational efficiency.
It enables fast register operation, reduces simulation and runtime, simplifies later maintenance, improves chip system verification efficiency, and shortens the R&D cycle.
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Figure CN118503161B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application belongs to the technical field of chip development, and particularly relates to a method for quickly accessing a register using a bus address. BACKGROUND
[0002] With the rapid development of semiconductor technology and design capability, the integration of chips is higher and higher, and the functions that can be implemented by a unit area of the chip are more and more complex, which also leads to a sharp increase in the number of registers in the chip system. In the verification process of the chip, the registers are often frequently operated. How to quickly and accurately operate the registers can not only simplify the verification work and reduce the writing errors of the verification code, but also improve the verification and simulation efficiency and shorten the verification time.
[0003] Traditionally, the registers are operated through the bus in the chip in a front door mode. The operation can be performed only after the chip is started, and the actual running time of the chip and the simulation time of the verification are consumed. The operation cannot be performed on multiple registers at the same time, and cannot meet the rapid batch operation of the registers in the verification environment. The operation on the instances of the registers in a back door mode must provide the instance positions of the registers when the chip is designed. The positions of the registers in different modules are different, and the levels of each register when the chip is designed are also different. This leads to a too long instance path of the registers, which not only leads to a too long simulation and running time when the registers are operated, but also makes the maintenance very cumbersome and time-consuming and laborious when errors are checked. SUMMARY
[0004] In order to solve at least one problem mentioned in the background, the present application proposes a method for quickly accessing a register using a bus address.
[0005] A method for quickly accessing a register using a bus address, comprising the steps of:
[0006] Step S1, dividing a chip system into different modules, establishing an address correspondence table, and writing the information of the divided modules into the address correspondence table, wherein the address correspondence table comprises a register offset address correspondence table and a module base address correspondence table, and the specific execution steps are as follows:
[0007] Firstly, the chip system is divided into different modules, and a register offset address correspondence table is established according to the offset addresses of the registers in the divided modules. Specifically, the register offset address correspondence table contains the offset address of the register in the module, the mask of the offset address of the register in the module, and the instance path of the register in the module.
[0008] Then, a module base address corresponding table is established, and specifically, the module base address corresponding table should include: a module base address, a mask of the module base address, an instance path of the module, and a register offset address corresponding table pointer of the module; further, the established module base address corresponding table is bound with the register offset address corresponding table;
[0009] The specific way of binding is: writing the index of the register offset address corresponding table into the register offset address corresponding table pointer of the module in the module base address corresponding table, and the register offset address corresponding table pointer of the module can index to the register offset address corresponding table corresponding to the register;
[0010] Finally, the base address of the divided module and the module instantiation path are written into the module base address corresponding table, and the offset address of the module register and the instantiation path of the register in the module are written into the module register offset address corresponding table.
[0011] Step S2, defining the operation of the register and passing the bus address of the register as a parameter into the chip system, specifically including the steps of:
[0012] Firstly, the operation of the register is defined as a register write operation method and a register read operation method;
[0013] Then, the bus address of the register is passed as a parameter into the register write address operation and the register read address operation.
[0014] Generally, if the front door method is used to operate the register through the bus in the chip, the operation can be performed only after the chip is started, and the actual running time and the simulation time of verification are consumed, and multiple registers cannot be operated simultaneously, which cannot meet the fast batch operation of the register in the verification environment, and the present application proposes to use the bus address for backdoor access, which greatly reduces the simulation and running time, and realizes the fast operation of the register.
[0015] Step S3, converting the register bus address input in the chip system into the instantiation path in the chip system according to the module base address corresponding table and the register offset address corresponding table, and the specific steps include:
[0016] Firstly, the register bus address input in the chip system is read out;
[0017] Then, the module base address corresponding table is traversed row by row according to the input register bus address, and in the process of traversing each row, the mask of the module base address in the module base address corresponding table is read out, and the read module base address mask and the register bus address are logically ANDed to obtain the register base address;
[0018] Then, the obtained register base address is matched with the module base address in the module base address corresponding table, and whether to execute the next step is determined according to the matching result,
[0019] The specific matching manner is: comparing the fields of the register base address and the module base address, if the fields are completely same, it is determined that the matching is successful, otherwise, it is determined that the matching is unsuccessful.
[0020] The specific matching result includes:
[0021] If the matching is unsuccessful, the iteration is continued to be executed.
[0022] If the matching is successful, the iteration is stopped, and the instance path of the module and the register offset address corresponding table pointer of the module are read out from the module base address corresponding table in which the line is located.
[0023] Further, according to the queried register offset address corresponding table pointer of the module, the register offset address corresponding table of the module is found, the mask of the register offset address in the module is read out from the table, and the mask of the register offset address in the module and the register bus address are logically ANDed to obtain the offset address of the register in the module, and the instance path of the register in the module corresponding to the offset address of the register in the module is read out from the module register offset address corresponding table.
[0024] Finally, the obtained instance path of the register in the module and the offset address of the register in the module are combined to obtain the instance path corresponding to the register bus address in the chip system.
[0025] Traditionally, if the instance of the register is directly operated in a backdoor mode, since the instance path of the register is too long, not only the simulation and running time of the register operation is too long, but also the later maintenance is very cumbersome, and it is time-consuming and laborious to troubleshoot errors. The address corresponding table is used to manage the address and the path, and the long register path does not need to be written multiple times, the backdoor operation of the register and the later maintenance are simplified, the probability of error is reduced, the work efficiency is improved, in addition, the method can realize the fast transplantation of the chip verification environment by modifying the address corresponding table, the efficiency of the chip system verification is effectively improved, and the research and development cycle of the chip is shortened.
[0026] In step S4, the register is operated through the instance path of the register in the chip system.
[0027] Compared with the prior art, the present application has the following beneficial effects:
[0028] The application manages addresses and paths by using the address correspondence table, does not need to write the lengthy register path for many times, simplifies the backdoor operation and the later maintenance of the register, and can reduce the error probability;
[0029] The application uses the bus address to access the backdoor, can quickly operate the register, and greatly reduces the simulation and running time;
[0030] The method designed in the application can realize the fast transplantation of the chip verification environment by modifying the address correspondence table, effectively improves the efficiency of the chip system verification, and shortens the research and development cycle of the chip. BRIEF DESCRIPTION OF DRAWINGS
[0031] Figure 1 is a flowchart of the application;
[0032] Figure 2 is a schematic diagram of the module base address correspondence table in the embodiment of the application. DETAILED DESCRIPTION
[0033] In order to make the purpose and features of the application more obvious and easy to understand, the technical solution is described in detail below by combining the drawings with the embodiments.
[0034] As shown in Figure 1 , a method for quickly accessing a register using a bus address, the specific implementation process is as follows:
[0035] Step S1, the chip system is divided into different modules, an address correspondence table is established, and the information of the divided modules is written into the address correspondence table, wherein the address correspondence table includes a register offset address correspondence table and a module base address correspondence table, and the specific execution steps are as follows:
[0036] Firstly, the chip system is divided into different modules, and a register offset address correspondence table is established according to the offset address of the register in the divided module, specifically, the register offset address correspondence table includes: the offset address of the register in the module, the mask of the offset address of the register in the module, and the instance path of the register in the module.
[0037] Then, a module base address correspondence table is established, as shown in Figure 2 , the module base address correspondence table should include: the module base address, the mask of the module base address, the instance path of the module, and the pointer of the register offset address correspondence table of the module; further, the established module base address correspondence table is bound with the register offset address correspondence table.
[0038] The specific binding manner is: writing the index of the register offset address corresponding table into the register offset address corresponding table pointer of the module in the module base address corresponding table, and the register offset address corresponding table pointer of the module can index to the register offset address corresponding table corresponding to the register.
[0039] Finally, the base address of the divided module and the module instantiation path are written into the module base address corresponding table, and the offset address of the module register and the instantiation path of the register in the module are written into the module register offset address corresponding table.
[0040] Step S2, define the operation of the register and pass the bus address of the register as a parameter into the chip system, specifically including the steps of:
[0041] First, define the operation of the register as a register write operation method and a register read operation method.
[0042] Optionally, the register operation is divided into read operation and write operation, and the operation parameter passed in needs to include the bus address of the register and the storage space of the data.
[0043] Then, pass the bus address of the register as a parameter into the register write address operation and the register read address operation.
[0044] Step S3, according to the module base address corresponding table and the register offset address corresponding table, convert the register bus address input in the chip system into the instantiation path in the chip system, and the specific steps include:
[0045] First, read out the register bus address input in the chip system.
[0046] Then, according to the input register bus address, perform row-by-row traversal on the module base address corresponding table, in the process of traversing each row, read out the mask of the module base address in the module base address corresponding table, and perform logical AND operation on the read module base address mask and the register bus address to obtain the register base address.
[0047] Next, match the obtained register base address with the module base address in the module base address corresponding table, and determine whether to execute the next step according to the matching result.
[0048] The specific matching manner is: comparing the fields of the register base address and the module base address, if the fields are completely the same, it is determined that the matching is successful, otherwise it is determined that the matching is unsuccessful.
[0049] The specific matching result includes:
[0050] If the matching is unsuccessful, continue to execute the traversal.
[0051] If the matching is successful, the traversal is stopped, and the instance path of the module and the register offset address corresponding table pointer of the module are read from the module base address corresponding table in which the line is located. Further, the register offset address corresponding table of the module is found according to the register offset address corresponding table pointer of the module which is queried, the mask of the register offset address in the module is read from the table, and the mask of the register offset address in the module and the register bus address are logically ANDed to obtain the offset address of the register in the module. Then, the instance path of the register in the module corresponding to the offset address of the register in the module is read from the module register offset address corresponding table.
[0052] Finally, the instance path of the register in the module and the offset address of the register in the module are combined to obtain the instance path corresponding to the register bus address in the chip system.
[0053] Step S4: The register is operated through the instance path of the register in the chip system.
[0054] Up to now, according to the method disclosed in the present application, the working process of the present application has been implemented once.
[0055] It should be noted that the above-mentioned embodiment numbers of the present application are only for description, and do not represent the advantages and disadvantages of the embodiments. Moreover, the terms "include", "contain" or any other variant thereof in the present application are intended to cover non-exclusive inclusion, so that the process, device, article or method including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, device, article or method. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, device, article or method including the element.
[0056] Through the above description of the embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment method can be realized by means of software and necessary general hardware platform, of course, it can also be realized by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes a plurality of instructions for making a terminal device (which can be a mobile phone, computer, server, or network device, etc.) execute the method described in each embodiment of the present application.
[0057] The above merely describes the preferred embodiments of the present application, and is not intended to limit the patent scope of the present application, and any equivalent structure or equivalent process conversion, or direct or indirect application in other related technical fields, which are made by using the content of the present application specification and drawings, are also included in the patent protection scope of the present application.
Claims
1. A method for fast access to a register using a bus address, characterized in that, The method comprises the steps of: S1, dividing the chip system into different modules, establishing an address correspondence table, and writing the information of the divided modules into the address correspondence table, wherein the address correspondence table comprises a register offset address correspondence table and a module base address correspondence table; S2, defining the operation of the register and inputting the bus address of the register into the chip system as a parameter; S3, converting the input register bus address in the chip system into an instantiation path in the chip system according to the module base address correspondence table and the register offset address correspondence table; S4, operating the register through the instantiation path of the register in the chip system; S1 comprises the steps of: S101, dividing the chip system into different modules, and establishing a register offset address correspondence table according to the offset address of the register in the divided modules, wherein the register offset address correspondence table comprises the offset address of the register in the module, the mask of the offset address of the register in the module, and the instantiation path of the register in the module; S102, establishing a module base address correspondence table, wherein the module base address correspondence table comprises the module base address, the mask of the module base address, the instantiation path of the module, and the pointer of the register offset address correspondence table of the module; S103, binding the established module base address correspondence table and the register offset address correspondence table; S104, writing the base address of the divided module and the instantiation path of the module into the module base address correspondence table, and writing the offset address of the register of the module and the instantiation path of the register in the module into the module register offset address correspondence table.
2. The method for accessing a register using a bus address according to claim 1, wherein, In S103, the binding of the established module base address correspondence table and the register offset address correspondence table is achieved by writing the index of the register offset address correspondence table into the register offset address correspondence table pointer of the module in the module base address correspondence table, so that the register offset address correspondence table corresponding to the register can be indexed through the register offset address correspondence table pointer of the module.
3. The method for accessing a register using a bus address according to claim 1, wherein, S2 comprises the steps of: S201, defining the operation of the register as a register write operation method and a register read operation method; S202, inputting the bus address of the register into the register write address operation and the register read address operation as a parameter.
4. The method for accessing a register using a bus address according to claim 1, wherein, S3 comprises the steps of: S301, reading out the input register bus address in the chip system; S302, performing line-by-line traversal on the module base address correspondence table according to the input register bus address, reading out the mask of the module base address in the module base address correspondence table in the process of traversing each line, performing logical AND operation on the read module base address mask and the register bus address to obtain a register base address; S303, matching the obtained register base address with the module base address in the module base address correspondence table, and determining whether to execute the next step according to the matching result; S304, combining the obtained instantiation path of the register in the module and the offset address of the register in the module to obtain the corresponding instantiation path of the register bus address in the chip system.
5. The method for accessing a register using a bus address according to claim 4, wherein, The matching of the obtained register base address with the module base address in the module base address corresponding table in step S303 is specifically as follows: the fields of the register base address and the module base address are compared, and if the fields are completely same, it is determined that the matching is successful, otherwise, it is determined that the matching is unsuccessful.
6. The method for accessing a register quickly using a bus address according to claim 4, wherein, The matching of the obtained register base address with the module base address in step S303 is specifically as follows: If the matching is unsuccessful, the iteration is continued; If the matching is successful, the iteration is stopped, and the instance path of the module and the register offset address corresponding table pointer of the module are read from the module base address corresponding table in which the row is located; further, according to the queried register offset address corresponding table pointer of the module, the register offset address corresponding table of the module is found, the mask of the register offset address in the module is read from the table, and the mask of the register offset address in the module and the register bus address are logically ANDed to obtain the offset address of the register in the module; and the instance path of the register in the module corresponding to the offset address of the register in the module is read from the module register offset address corresponding table.
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