Method and device for determining internal parameters of an IGBT based on a gate signal

Abstract

The application provides an IGBT internal parameter determination method and device based on a gate signal, and the method comprises the following steps: obtaining a gate current expression and a Miller capacitance expression according to a pre-established IGBT parasitic parameter model and a capacitor voltage; substituting the gate current expression and the Miller capacitance expression into the IGBT parasitic parameter model to obtain a parasitic parameter expression; selecting three time points in an IGBT off-delay process at random, and obtaining a gate parasitic inductance expression, a gate resistance expression and a gate-emitter capacitance expression by using a preset gate voltage waveform, a gate current waveform and the parasitic parameter expression. By determining the expression corresponding to the IGBT internal parameter, the Miller capacitance, the gate parasitic inductance, the gate resistance and the gate-emitter capacitance are estimated by observing the gate voltage and the gate current of the IGBT device, so that the IGBT internal parameter can be monitored efficiently and accurately.

Description

Technical Field

[0001] This invention relates to the field of IGBT technology, and more particularly to a method and apparatus for determining the internal parameters of an IGBT based on gate signals. Background Technology

[0002] IGBT devices combine the advantages of high switching speed of MOSFET devices and low conduction losses of bipolar devices, and have been widely used in new energy converters, flexible DC transmission equipment, dynamic reactive power compensation equipment, and other applications. However, there is currently a lack of understanding of parameters such as gate impedance, and since the gate impedance is encapsulated inside the IGBT and cannot be measured in practice, it is impossible to accurately and efficiently determine the parameters of the IGBT turn-off delay process. Summary of the Invention

[0003] In view of the problems existing in the prior art, the main objective of the present invention is to provide a method and apparatus for determining the internal parameters of an IGBT based on the gate signal, so as to achieve accurate and efficient determination of the internal parameters of the IGBT.

[0004] To achieve the above objectives, embodiments of the present invention provide a method for determining the internal parameters of an IGBT based on a gate signal, the method comprising:

[0005] Based on the pre-established IGBT parasitic parameter model and capacitor voltage, the expressions for gate current and Miller capacitance are obtained.

[0006] Substituting the gate current expression and the Miller capacitance expression into the IGBT parasitic parameter model, we obtain the parasitic parameter expression.

[0007] By arbitrarily selecting three moments during the IGBT turn-off delay process, and using preset gate voltage waveform, gate current waveform, and parasitic parameter expressions, the expressions for gate parasitic inductance, gate resistance, and gate-emitter capacitance are obtained.

[0008] Optionally, in one embodiment of the present invention, the method further includes:

[0009] Collect gate voltage and gate current monitoring data during the IGBT turn-off delay process;

[0010] Based on the gate voltage monitoring data and gate current monitoring data, the Miller capacitance monitoring value, gate parasitic inductance monitoring value, gate resistance monitoring value, and gate-emitter capacitance monitoring value are obtained by using the Miller capacitance expression, gate parasitic inductance expression, gate resistance expression, and gate-emitter capacitance expression, respectively.

[0011] Optionally, in one embodiment of the present invention, the gate current expression and Miller capacitance expression are obtained based on a pre-established IGBT parasitic parameter model and capacitor voltage, including:

[0012] Based on the pre-established IGBT parasitic parameter model, determine the gate current expression;

[0013] Based on the gate current expression and capacitor voltage, the Miller capacitance expression is determined to represent the time-varying law of the Miller capacitance.

[0014] Optionally, in one embodiment of the present invention, by arbitrarily selecting three moments during the IGBT turn-off delay process, and using preset gate voltage waveform, gate current waveform, and parasitic parameter expressions, the expressions for gate parasitic inductance, gate resistance, and gate-emitter capacitance are obtained, including:

[0015] By arbitrarily selecting three moments during the IGBT turn-off delay process, determine the first and second derivatives of the gate voltage waveform and the first derivative of the gate current waveform at the corresponding moments.

[0016] Substituting the gate voltage waveform and its corresponding first and second derivatives, as well as the gate current waveform and its corresponding first derivative, into the parasitic parameter expressions, we obtain the expressions for gate parasitic inductance, gate resistance, and gate-emitter capacitance.

[0017] This invention also provides an IGBT internal parameter determination device based on gate signal, the device comprising:

[0018] The Miller capacitor module is used to derive the gate current expression and the Miller capacitance expression based on the pre-established IGBT parasitic parameter model and capacitor voltage.

[0019] The parameter expression module is used to substitute the gate current expression and Miller capacitance expression into the IGBT parasitic parameter model to obtain the parasitic parameter expression;

[0020] The parasitic parameter module is used to arbitrarily select the time points in the three IGBT turn-off delay processes, and use the preset gate voltage waveform, gate current waveform and the parasitic parameter expression to obtain the gate parasitic inductance expression, gate resistance expression and gate emitter capacitance expression.

[0021] Optionally, in one embodiment of the present invention, the apparatus further includes:

[0022] The monitoring data module is used to collect gate voltage monitoring data and gate current monitoring data during the IGBT turn-off delay process.

[0023] The parameter monitoring module is used to obtain the Miller capacitance monitoring value, gate parasitic inductance monitoring value, gate resistance monitoring value, and gate emitter capacitance monitoring value based on the gate voltage monitoring data and gate current monitoring data, respectively, using the Miller capacitance expression, gate parasitic inductance expression, gate resistance expression, and gate emitter capacitance expression.

[0024] Optionally, in one embodiment of the present invention, the Miller capacitor module includes:

[0025] The gate current unit is used to determine the gate current expression based on a pre-established IGBT parasitic parameter model;

[0026] The Miller capacitor unit is used to determine the Miller capacitance expression based on the gate current expression and the capacitor voltage, so as to represent the law of Miller capacitance change over time.

[0027] Optionally, in one embodiment of the present invention, the parasitic parameter module includes:

[0028] The waveform derivative unit is used to arbitrarily select three IGBT turn-off delay processes and determine the first and second derivatives of the gate voltage waveform and the first derivative of the gate current waveform at the corresponding time.

[0029] The parasitic parameter unit is used to substitute the gate voltage waveform and its corresponding first and second derivatives, as well as the gate current waveform and its corresponding first derivative, into the parasitic parameter expression to obtain the gate parasitic inductance expression, the gate resistance expression, and the gate-emitter capacitance expression.

[0030] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the above-described method.

[0031] The present invention also provides a computer-readable storage medium storing a computer program that performs the above-described methods by a computer.

[0032] The present invention also provides a computer program product, including a computer program / instructions, which, when executed by a processor, implement the steps of the above-described method.

[0033] This invention achieves efficient and accurate monitoring of IGBT internal parameters by determining the expressions corresponding to the gate signal-based internal parameters and estimating Miller capacitance, gate parasitic inductance, gate resistance, and gate-emitter capacitance by observing the gate voltage and gate current of the IGBT device. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1This is a flowchart illustrating a method for determining the internal parameters of an IGBT based on a gate signal, according to an embodiment of the present invention.

[0036] Figure 2 This is a flowchart of the monitoring parameters in an embodiment of the present invention;

[0037] Figure 3 This is a flowchart illustrating the gate current and Miller capacitance expressions obtained in this embodiment of the invention.

[0038] Figure 4 This is a flowchart illustrating the multiple parameter expressions obtained in an embodiment of the present invention;

[0039] Figure 5 This is a schematic diagram of IGBT parasitic parameters in an embodiment of the present invention;

[0040] Figure 6 This is a schematic diagram of an IGBT internal parameter determination device based on gate signal according to an embodiment of the present invention;

[0041] Figure 7 This is a schematic diagram of the IGBT internal parameter determination device based on gate signal in another embodiment of the present invention;

[0042] Figure 8 This is a schematic diagram of the Miller capacitor module in an embodiment of the present invention;

[0043] Figure 9 This is a schematic diagram of the parasitic parameter module in an embodiment of the present invention;

[0044] Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0045] This invention provides a method and apparatus for determining the internal parameters of an IGBT based on gate signals.

[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] like Figure 1The diagram shows a flowchart of a method for determining IGBT internal parameters based on gate signals according to an embodiment of the present invention. The execution subject of this method includes, but is not limited to, a computer. The present invention estimates Miller capacitance, gate parasitic inductance, gate resistance, and gate-emitter capacitance by observing the gate voltage and gate current of the IGBT device through expressions corresponding to the IGBT internal parameters based on gate signals, thereby achieving efficient and accurate monitoring of IGBT internal parameters. The method shown in the diagram includes:

[0048] Step S1: Based on the pre-established IGBT parasitic parameter model and capacitor voltage, obtain the gate current expression and Miller capacitance expression;

[0049] Step S2: Substitute the gate current expression and Miller capacitance expression into the IGBT parasitic parameter model to obtain the parasitic parameter expression;

[0050] Step S3: Arbitrarily select three moments during the IGBT turn-off delay process, and use the preset gate voltage waveform, gate current waveform and parasitic parameter expression to obtain the gate parasitic inductance expression, gate resistance expression and gate emitter capacitance expression.

[0051] Among them, such as Figure 5 The figure shows the parasitic parameter model of IGBT, where u GE i is the gate voltage. G For the gate current, c GC Miller capacitor, L s,G For gate parasitic inductance, R G C is the gate resistance. GE For the gate-emitter capacitance, u CE collector-emitter voltage (u) chip,CE L is the collector-emitter voltage of the chip. s,CE (for the parasitic inductance of IGBT device packages), U DC The voltage across the capacitor, u GC U is the gate collector capacitance voltage. G,on It is the gate turn-on voltage, a circuit constant, and a fixed value, U. G,off It is the gate turn-off voltage, a circuit constant, and a fixed value.

[0052] As an embodiment of the present invention, such as Figure 3 As shown, based on the pre-established IGBT parasitic parameter model and capacitor voltage, the expressions for the gate current and Miller capacitance are obtained as follows:

[0053] Step S11: Determine the gate current expression based on the pre-established IGBT parasitic parameter model;

[0054] Step S12: Determine the Miller capacitance expression based on the gate current expression and capacitor voltage to represent the time variation law of the Miller capacitance.

[0055] The circuit satisfies the following voltage equation:

[0056]

[0057] Among them, i G The following relationship must be satisfied:

[0058]

[0059] u GC ≈-u CE It can be approximated as changing according to an exponential law:

[0060]

[0061] At t = t1, u CE =U DC The calculation yields τ = t1 / ln2, and equation (3) can be written as:

[0062]

[0063] Substituting equation (4) into equation (2), we obtain the expression for the gate current:

[0064]

[0065] c is obtained through equation (5) GC The law governing its change over time (i.e., the Miller capacitance expression) is as follows:

[0066]

[0067] Substituting equations (5) and (6) into equation (1), we obtain the expression for the parasitic parameter:

[0068]

[0069] As an embodiment of the present invention, such as Figure 4 As shown, by arbitrarily selecting three moments during the IGBT turn-off delay process, and using preset gate voltage waveform, gate current waveform, and parasitic parameter expressions, the expressions for gate parasitic inductance, gate resistance, and gate-emitter capacitance are obtained, including:

[0070] Step S31: Arbitrarily select three moments in the IGBT turn-off delay process, and determine the first and second derivatives of the gate voltage waveform and the first derivative of the gate current waveform at the corresponding moments.

[0071] Step S32: Substitute the gate voltage waveform and its corresponding first and second derivatives, as well as the gate current waveform and its corresponding first derivative, into the parasitic parameter expressions to obtain the gate parasitic inductance expression, the gate resistance expression, and the gate-emitter capacitance expression.

[0072] Specifically, select any three moments t during the turn-off delay process. a t b t c , respectively using u GE and i C Waveform meter

[0073] Calculate u″ at the corresponding time. GE 、u′ GE u GE 、i′ G i G Substituting into equation (7), we obtain the expressions for the gate parasitic inductance, gate resistance, and gate-emitter capacitance:

[0074]

[0075] Therefore, R can be calculated using formula (8). G L s,G and C GE .

[0076] As an embodiment of the present invention, such as Figure 2 As shown, the method also includes:

[0077] Step S4: Collect gate voltage monitoring data and gate current monitoring data during the IGBT turn-off delay process;

[0078] Step S5: Based on the gate voltage monitoring data and gate current monitoring data, the Miller capacitance monitoring value, gate parasitic inductance monitoring value, gate resistance monitoring value, and gate emitter capacitance monitoring value are obtained respectively using the Miller capacitance expression, gate parasitic inductance expression, gate resistance expression, and gate emitter capacitance expression.

[0079] During the IGBT turn-off delay process, gate voltage monitoring data and gate current monitoring data are collected. The gate voltage monitoring data and gate current monitoring data are then substituted into formula (8) for calculation to obtain the Miller capacitance monitoring value, gate parasitic inductance monitoring value, gate resistance monitoring value, and gate emitter capacitance monitoring value.

[0080] Therefore, by observing the gate voltage (u) of the IGBT device GE ), gate current (i G To estimate Miller capacitance (c) GC ), gate parasitic inductance (L) s,G ), gate resistor (R)G ) and gate-emitter capacitance (C GE ).

[0081] Given the current lack of understanding of gate impedance, and the fact that gate impedance is encapsulated inside the IGBT and cannot be practically measured, this invention estimates gate impedance through an external signal. Because of the influence of gate impedance, the externally measured u... GE It's not the chip gate voltage, but the external device voltage. Once the gate impedance is estimated, the gate chip voltage can be externally implemented. GE,chip The estimate.

[0082] This invention achieves efficient and accurate monitoring of IGBT turn-off delay process parameters by determining the expressions corresponding to the parameters of the IGBT turn-off delay process and estimating Miller capacitance, gate parasitic inductance, gate resistance, and gate-emitter capacitance by observing the gate voltage and gate current of the IGBT device.

[0083] like Figure 6 The figure shows a schematic diagram of an IGBT internal parameter determination device based on gate signal according to an embodiment of the present invention. The device shown in the figure includes:

[0084] Miller capacitor module 10 is used to obtain the gate current expression and Miller capacitor expression based on the pre-established IGBT parasitic parameter model and capacitor voltage.

[0085] The parameter expression module 20 is used to substitute the gate current expression and Miller capacitance expression into the IGBT parasitic parameter model to obtain the parasitic parameter expression;

[0086] The parasitic parameter module 30 is used to arbitrarily select the time in the three IGBT turn-off delay processes, and use the preset gate voltage waveform, gate current waveform and parasitic parameter expression to obtain the gate parasitic inductance expression, gate resistance expression and gate emitter capacitance expression.

[0087] As an embodiment of the present invention, such as Figure 7 As shown, the device also includes:

[0088] The monitoring data module 40 is used to collect gate voltage monitoring data and gate current monitoring data during the IGBT turn-off delay process.

[0089] The parameter monitoring module 50 is used to obtain the Miller capacitance monitoring value, gate parasitic inductance monitoring value, gate resistance monitoring value, and gate emitter capacitance monitoring value based on the gate voltage monitoring data and gate current monitoring data, respectively, using the Miller capacitance expression, gate parasitic inductance expression, gate resistance expression, and gate emitter capacitance expression.

[0090] As an embodiment of the present invention, such as Figure 8As shown, the Miller capacitor module 10 includes:

[0091] Gate current unit 11 is used to determine the gate current expression based on a pre-established IGBT parasitic parameter model;

[0092] The Miller capacitor unit 12 is used to determine the Miller capacitance expression based on the gate current expression and the capacitor voltage, so as to represent the law of Miller capacitance change over time.

[0093] As an embodiment of the present invention, such as Figure 9 As shown, the parasitic parameter module 30 includes:

[0094] Waveform derivative unit 31 is used to arbitrarily select the time in the three IGBT turn-off delay processes and determine the first and second derivatives of the gate voltage waveform and the first derivative of the gate current waveform at the corresponding time.

[0095] Parasitic parameter unit 32 is used to substitute the gate voltage waveform and its corresponding first and second derivatives, as well as the gate current waveform and its corresponding first derivative, into the parasitic parameter expression to obtain the gate parasitic inductance expression, the gate resistance expression, and the gate emitter capacitance expression.

[0096] Based on the same concept as the aforementioned method for determining IGBT internal parameters based on gate signals, this invention also provides an apparatus for determining IGBT internal parameters based on gate signals. Since the principle underlying this apparatus for determining IGBT internal parameters based on gate signals is similar to that of the aforementioned method, the implementation of this apparatus can be found in the implementation of the aforementioned method, and will not be repeated here.

[0097] This invention determines the expressions corresponding to the internal parameters of the IGBT based on the gate signal. By observing the gate voltage and gate current of the IGBT device, the Miller capacitance, gate parasitic inductance, gate resistance and gate-emitter capacitance are estimated, thereby achieving efficient and accurate monitoring of the internal parameters of the IGBT.

[0098] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the above-described method.

[0099] The present invention also provides a computer program product, including a computer program / instructions, which, when executed by a processor, implement the steps of the above-described method.

[0100] The present invention also provides a computer-readable storage medium storing a computer program that performs the above-described methods by a computer.

[0101] like Figure 10 As shown, the electronic device 600 may also include: a communication module 110, an input unit 120, an audio processor 130, a display 160, and a power supply 170. It is worth noting that the electronic device 600 does not necessarily need to include these components. Figure 10 All components shown; in addition, the electronic device 600 may also include Figure 10 For components not shown, please refer to existing technologies.

[0102] like Figure 10 As shown, the central processing unit 100, sometimes also referred to as a controller or operating control, may include a microprocessor or other processor device and / or logic device. The central processing unit 100 receives inputs and controls the operation of various components of the electronic device 600.

[0103] The memory 140 may be, for example, one or more of a cache, flash memory, hard drive, removable media, volatile memory, non-volatile memory, or other suitable devices. It may store the aforementioned failure-related information, and also store a program for executing that information. The central processing unit 100 may execute the program stored in the memory 140 to perform information storage or processing, etc.

[0104] Input unit 120 provides input to central processing unit 100. Input unit 120 may be, for example, a keypad or touch input device. Power supply 170 provides power to electronic device 600. Display 160 displays images and text. Display may be, for example, an LCD display, but is not limited thereto.

[0105] The memory 140 can be a solid-state memory, such as a read-only memory (ROM), random access memory (RAM), a SIM card, etc. It can also be a memory that retains information even when power is off, can be selectively erased, and contains more data; examples of this type of memory are sometimes referred to as EPROMs. The memory 140 can also be some other type of device. The memory 140 includes a buffer memory 141 (sometimes referred to as a buffer). The memory 140 may include an application / function storage unit 142 for storing application programs and function programs or processes for executing the operation of the electronic device 600 via the central processing unit 100.

[0106] The memory 140 may also include a data storage unit 143 for storing data, such as contacts, digital data, pictures, sounds, and / or any other data used by the electronic device. The driver storage unit 144 of the memory 140 may include various drivers for the electronic device's communication functions and / or for performing other functions of the electronic device (such as messaging applications, address book applications, etc.).

[0107] The communication module 110 is a transmitter / receiver that transmits and receives signals via the antenna 111. The communication module (transmitter / receiver) 110 is coupled to the central processing unit 100 to provide input signals and receive output signals, which can be the same as in a conventional mobile communication terminal.

[0108] Based on different communication technologies, multiple communication modules 110 can be configured in the same electronic device, such as cellular network modules, Bluetooth modules, and / or wireless LAN modules. The communication module (transmitter / receiver) 110 is also coupled to a speaker 131 and a microphone 132 via an audio processor 130 to provide audio output via the speaker 131 and receive audio input from the microphone 132, thereby enabling typical telecommunications functions. The audio processor 130 may include any suitable buffer, decoder, amplifier, etc. Additionally, the audio processor 130 is coupled to a central processing unit 100, enabling on-device recording via the microphone 132 and on-device playback of stored audio via the speaker 131.

[0109] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0110] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1A device that provides the functions specified in one or more boxes.

[0111] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0112] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0113] Specific embodiments have been used to illustrate the principles and implementation methods of this invention. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this invention. Therefore, the content of this specification should not be construed as a limitation of this invention.

Claims

1. A method for determining the internal parameters of an IGBT based on gate signals, characterized in that, The method includes: Based on the pre-established IGBT parasitic parameter model and capacitor voltage, the expressions for gate current and Miller capacitance are obtained. Substituting the gate current expression and the Miller capacitance expression into the IGBT parasitic parameter model, we obtain the parasitic parameter expression; By arbitrarily selecting three moments during the IGBT turn-off delay process, and using the preset gate voltage waveform, gate current waveform, and parasitic parameter expression, the expressions for gate parasitic inductance, gate resistance, and gate-emitter capacitance are obtained.

2. The method according to claim 1, characterized in that, The method further includes: Collect gate voltage and gate current monitoring data during the IGBT turn-off delay process; Based on the gate voltage monitoring data and the gate current monitoring data, the Miller capacitance monitoring value, gate parasitic inductance monitoring value, gate resistance monitoring value, and gate emitter capacitance monitoring value are obtained by using the Miller capacitance expression, gate parasitic inductance expression, gate resistance expression, and gate emitter capacitance expression, respectively.

3. The method according to claim 1, characterized in that, The process of obtaining the gate current expression and Miller capacitance expression based on the pre-established IGBT parasitic parameter model and capacitor voltage includes: The gate current expression is determined based on the pre-established IGBT parasitic parameter model; Based on the gate current expression and the capacitor voltage, the Miller capacitance expression is determined to represent the time-varying pattern of the Miller capacitance.

4. The method according to claim 1, characterized in that, The process of arbitrarily selecting three IGBT turn-off delay times, and using preset gate voltage waveforms, gate current waveforms, and the parasitic parameter expressions, derives the expressions for gate parasitic inductance, gate resistance, and gate-emitter capacitance, including: By arbitrarily selecting three moments during the IGBT turn-off delay process, determine the first and second derivatives of the gate voltage waveform and the first derivative of the gate current waveform at the corresponding moments. Substituting the gate voltage waveform and its corresponding first and second derivatives, as well as the gate current waveform and its corresponding first derivative, into the parasitic parameter expressions, we obtain the expressions for the gate parasitic inductance, gate resistance, and gate-emitter capacitance.

5. A device for determining the internal parameters of an IGBT based on a gate signal, characterized in that, The device includes: The Miller capacitor module is used to derive the gate current expression and the Miller capacitance expression based on the pre-established IGBT parasitic parameter model and capacitor voltage. The parameter expression module is used to substitute the gate current expression and the Miller capacitance expression into the IGBT parasitic parameter model to obtain the parasitic parameter expression; The parasitic parameter module is used to arbitrarily select the time points in the three IGBT turn-off delay processes, and use the preset gate voltage waveform, gate current waveform and the parasitic parameter expression to obtain the gate parasitic inductance expression, gate resistance expression and gate emitter capacitance expression.

6. The apparatus according to claim 5, characterized in that, The device further includes: The monitoring data module is used to collect gate voltage monitoring data and gate current monitoring data during the IGBT turn-off delay process. The parameter monitoring module is used to obtain the Miller capacitance monitoring value, gate parasitic inductance monitoring value, gate resistance monitoring value, and gate emitter capacitance monitoring value based on the gate voltage monitoring data and the gate current monitoring data, respectively, using the Miller capacitance expression, gate parasitic inductance expression, gate resistance expression, and gate emitter capacitance expression.

7. The apparatus according to claim 5, characterized in that, The Miller capacitor module includes: The gate current unit is used to determine the gate current expression based on a pre-established IGBT parasitic parameter model; A Miller capacitor unit is used to determine the Miller capacitance expression based on the gate current expression and the capacitor voltage, so as to represent the law of Miller capacitance change over time.

8. The apparatus according to claim 5, characterized in that, The parasitic parameter module includes: The waveform derivative unit is used to arbitrarily select three IGBT turn-off delay processes and determine the first and second derivatives of the gate voltage waveform and the first derivative of the gate current waveform at the corresponding time. The parasitic parameter unit is used to substitute the gate voltage waveform and its corresponding first and second derivatives, as well as the gate current waveform and its corresponding first derivative, into the parasitic parameter expression to obtain the gate parasitic inductance expression, the gate resistance expression, and the gate-emitter capacitance expression.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method according to any one of claims 1 to 4.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that enables a computer to execute the method according to any one of claims 1 to 4.

11. A computer program product, comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method according to any one of claims 1 to 4.

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