Display device and driving method thereof

Abstract

The application provides a display device and a driving method thereof. The display device comprises a display panel, a source driver and a plurality of multiplexers. The display panel comprises a plurality of sub-pixels and a plurality of data lines. Each data line is connected with a column of sub-pixels. The plurality of multiplexers are electrically connected with the display panel and the source driver. Each multiplexer is electrically connected with at least two data lines. The at least two data lines connected with each multiplexer are different. The application sets a plurality of multiplexers between the source driver and the display panel. Each multiplexer is electrically connected with at least two data lines. One output terminal on the source driver transmits data signals to at least two data lines. Thus, the number of source drivers is reduced, and the cost of products is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the display field, and particularly relates to a display device and a driving method thereof. BACKGROUND

[0002] The liquid crystal display device has the advantages of low power consumption, small size and small radiation, and is widely applied to various display devices. The liquid crystal display device realizes the compatibility of picture display and user interaction, greatly improves the user experience, and is favored by users.

[0003] The display panel in the liquid crystal display device is usually configured with a plurality of source drivers. Each source driver is connected with a plurality of data lines and transmits data signals to sub-pixels in the display panel through the data lines. The number of source drivers is usually determined according to the size and resolution of the display device. With the increase of the size and resolution of the product, the number of source drivers is increasing, which increases the cost of the product. SUMMARY

[0004] The present application provides a display device and a driving method thereof to solve the problem of too many source drivers in the existing display device.

[0005] To solve the above-mentioned scheme, the technical scheme provided by the present application is as follows:

[0006] The present application provides a display device, which comprises:

[0007] A display panel comprising a plurality of sub-pixels and a plurality of data lines, each data line being connected with a column of sub-pixels;

[0008] A source driver arranged on one side of the display panel; and

[0009] A plurality of multiplexers arranged between the source driver and the display panel, the plurality of multiplexers being electrically connected with the display panel and the source driver;

[0010] Each multiplexer is electrically connected with at least two data lines, and the at least two data lines connected with each multiplexer are different.

[0011] In the display device of the present application, when the display panel is configured at a first refresh rate, in one display frame, the number of sub-pixels in the plurality of sub-pixels receiving data signals transmitted by corresponding data lines is a first value.

[0012] When the display panel is configured at a second refresh rate, in one display frame, the number of sub-pixels in the plurality of sub-pixels receiving data signals transmitted by corresponding data lines is a second value.

[0013] The first refresh rate is greater than the second refresh rate, and the first value is less than the second value.

[0014] In the display device, the second refresh rate is half of the first refresh rate, and the first value is half of the second value.

[0015] In the display device, when the display panel is configured at the first refresh rate, the charging time of the sub-pixel receiving the data signal is equal to the charging time of the sub-pixel receiving the data signal when the display panel is configured at the second refresh rate.

[0016] In the display device, when the display panel is configured at the first refresh rate, the width of the effective level received by the multiplexer is equal to the width of the effective level received by the multiplexer when the display panel is configured at the second refresh rate.

[0017] In the display device, the display device further comprises a timing controller and a multiplexing control circuit, the source driver is connected with the timing controller, and the multiplexing control circuit is connected with the timing controller.

[0018] The timing controller controls the multiplexing control circuit to output a control signal to a plurality of multiplexers, and the timing controller controls the source driver to transmit a data signal to the data line.

[0019] In the display device, each multiplexer comprises a first control transistor and a second control transistor.

[0020] The gate of the first control transistor is connected with a first control signal line, the first electrode of the first control transistor is connected with a first output terminal of the source driver, and the second electrode of the first control transistor is connected with a data line.

[0021] The gate of the second control transistor is connected with a second control signal line, the first electrode of the second control transistor is connected with the first output terminal of the source driver, and the second electrode of the second control transistor is connected with another data line.

[0022] The first control transistor and the second control transistor are both N-type transistors or P-type transistors.

[0023] In the display device, each multiplexer comprises a first control transistor and a second control transistor.

[0024] The gate of the first control transistor is connected with a first control signal line, the first electrode of the first control transistor is connected with a first output terminal of the source driver, and the second electrode of the first control transistor is connected with the data line;

[0025] The gate of the second control transistor is connected with the first control signal line, the first electrode of the second control transistor is connected with the first output terminal of the source driver, and the second electrode of the second control transistor is connected with another data line.

[0026] The first control transistor and the second control transistor are different from each other in type.

[0027] The application further provides a driving method of the display device, which comprises the following steps:

[0028] acquiring a target refresh rate of the display panel in a target display frame;

[0029] When the target refresh rate is greater than a first threshold value, the number of sub-pixels receiving data signals transmitted by the corresponding data lines in the plurality of sub-pixels is a first value.

[0030] When the target refresh rate is less than or equal to the first threshold value, the number of sub-pixels receiving data signals transmitted by the corresponding data lines in the plurality of sub-pixels is a second value.

[0031] The first value is greater than the second value.

[0032] In the driving method of the display device, when the target refresh rate is greater than the first threshold value, the effective level received by the multiplexer has a first width, and the charging time of the sub-pixel receiving the data signal has a first time.

[0033] When the target refresh rate is less than or equal to the first threshold value, the effective level received by the multiplexer has a second width, and the charging time of the sub-pixel receiving the data signal has a second time.

[0034] The first width is equal to the second width, and the first time is equal to the second time.

[0035] Beneficial effects: the present application provides a display device and a driving method thereof; the display device comprises a display panel, a source driver and a plurality of multiplexers, the display panel comprises a plurality of sub-pixels and a plurality of data lines, each data line is connected with a column of sub-pixels, the plurality of multiplexers are electrically connected with the display panel and the source driver, each multiplexer is electrically connected with at least two data lines, and the at least two data lines connected by each multiplexer are different; the present application sets a plurality of multiplexers between the source driver and the display panel, and each multiplexer is electrically connected with at least two data lines, so that one output terminal on the source driver transmits data signals to at least two data lines, thereby reducing the number of source drivers and the cost of products. BRIEF DESCRIPTION OF DRAWINGS

[0036] The technical solutions and other beneficial effects of the present application will be apparent from the following detailed description of specific embodiments of the present application, combined with the accompanying drawings.

[0037] Figure 1 FIG. 1 is a structural diagram of the display device of the present application;

[0038] Figure 2 FIG. 2 is a first connection diagram of the multiplexer and the display panel in the display device of the present application;

[0039] Figure 3 FIG. 3 is a second connection diagram of the multiplexer and the display panel in the display device of the present application;

[0040] Figure 4a FIG. 4 is a timing diagram of the display panel in the display device of the present application under a first refresh rate;

[0041] Figure 4b FIG. 5 is a timing diagram of the display panel in the display device of the present application under a second refresh rate;

[0042] Figure 5a FIG. 6 is a sub-pixel refresh schematic diagram of the display panel of the present application under a first refresh rate;

[0043] Figure 5b FIG. 7 is a sub-pixel refresh schematic diagram of the display panel of the present application under a second refresh rate;

[0044] Figure 6 FIG. 8 is a step diagram of the driving method of the display device of the present application. DETAILED DESCRIPTION

[0045] With reference to the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0046] Please refer to Figure 1 The present application provides a display device 100, which comprises a display panel 110, a source driver 120 and a plurality of multiplexers 130 connected.

[0047] In the embodiment, the display panel 110 comprises a plurality of sub-pixels Pixel, a plurality of data lines Data and a plurality of scan lines Scan, the plurality of data lines Data and the plurality of scan lines Scan are cross arranged, each data line Data is connected with a column of sub-pixels Pixel, and each scan line Scan is connected with a row of sub-pixels Pixel.

[0048] In the embodiment, the source driver 120 is arranged on one side of the display panel 110, and the number of the source driver 120 can be multiple, each source driver 120 has a plurality of output terminals.

[0049] In the embodiment, a plurality of multiplexers 130 are arranged between the source driver 120 and the display panel 110, the plurality of multiplexers 130 are electrically connected with the display panel 110 and the source driver 120, each multiplexer 130 is electrically connected with at least two data lines Data, and the at least two data lines Data connected by each multiplexer 130 are different.

[0050] The present application sets a plurality of multiplexers 130 between the source driver 120 and the display panel 110, and each multiplexer 130 is electrically connected with at least two data lines Data, so that one output terminal on the source driver 120 transmits data signals to at least two data lines Data, thereby reducing the number of the source driver 120 and reducing the cost of the product.

[0051] It should be noted that each multiplexer 130 is electrically connected with at least two data lines Data, and in the following embodiment, each multiplexer 130 is electrically connected with two data lines Data as an example.

[0052] It should be noted that the display device 100 of the present application further comprises a timing controller 140 and a multiplexing control circuit 150, the source driver 120 is connected with the timing controller 140, the multiplexing control circuit 150 is connected with the timing controller 140, the timing controller 140 controls the multiplexing control circuit 150 to output a control signal to the plurality of multiplexers 130 to control the multiplexers 130 to be turned on, and the timing controller 140 controls the source driver 120 to transmit a data signal to the data line Data.

[0053] It should be noted that the display device 100 of the present application further comprises a circuit board 160, the circuit board 160 is connected with the source driver 120 and the timing controller 140 respectively, and the timing controller 140 transmits a data signal to the source driver 120 through the circuit board 160.

[0054] Taking the display panel 110 with a resolution of 1920*1080 as an example, the display panel 110 has 1080*3 data lines Data, if each source driver 120 has 960 output terminals, 6 source drivers 120 are needed to be connected with the data lines Data in the display panel 110; and the present application sets a plurality of multiplexers 130 between the source driver 120 and the display panel 110, one end of each multiplexer 130 is electrically connected with 2 data lines Data, and the other end of each multiplexer 130 is electrically connected with one output terminal of the source driver 120, which is equivalent to that one output terminal transmits a data signal to two data lines Data, so that the number of source drivers 120 can be reduced to 3, thereby reducing the cost of the display device 100.

[0055] Similarly, if each multiplexer 130 is connected with 3 data lines Data, the number of source drivers 120 can be reduced to 2.

[0056] Please refer to Figure 2 Each multiplexer 130 can comprise a first control transistor T1 and a second control transistor T2. The gate of the first control transistor T1 is connected with a first control signal line 131, the first electrode of the first control transistor T1 is connected with a first output terminal 121 of the source driver 120, and the second electrode of the first control transistor T1 is electrically connected with one data line Data; the gate of the second control transistor T2 is connected with a second control signal line 132, the first electrode of the second control transistor T2 is connected with the first output terminal 121 of the source driver 120, and the second electrode of the second control transistor T2 is electrically connected with another data line Data.

[0057] In the embodiment, the first control transistor T1 and the second control transistor T2 are N-type transistors or P-type transistors.

[0058] In Figure 2 In the structure, taking the first control transistor T1 and the second control transistor T2 as N-type transistors as an example, when the multiplexing control circuit 150 transmits a high level to the first control signal line 131 and the multiplexing control circuit 150 transmits a low level to the second control signal line 132, the first control transistor T1 is turned on, the second control transistor T2 is turned off, and the source driver 120 transmits a data signal to the corresponding data line Data through the first electrode and the second electrode of the first control transistor T1, and the data line Data connected with the second control transistor T2 cannot receive a data signal; when the multiplexing control circuit 150 transmits a low level to the first control signal line 131 and the multiplexing control circuit 150 transmits a high level to the second control signal line 132, the first control transistor T1 is turned off, the second control transistor T2 is turned on, and the source driver 120 transmits a data signal to the corresponding data line Data through the first electrode and the second electrode of the second control transistor T2, and the data line Data connected with the first control transistor T1 cannot receive a data signal.

[0059] Please refer to Figure 3 Each of the multiplexers 130 includes a first control transistor T1 and a second control transistor T2; the gate of the first control transistor T1 is connected with the first control signal line 131, the first electrode of the first control transistor T1 is connected with the first output terminal 121 of the source driver 120, and the second electrode of the first control transistor T1 is connected with a data line Data; the gate of the second control transistor T2 is connected with the first control signal line 131, the first electrode of the second control transistor T2 is connected with the first output terminal 121 of the source driver 120, and the second electrode of the second control transistor T2 is connected with another data line Data.

[0060] In the embodiment, the first control transistor T1 and the second control transistor T2 are one of N-type transistors and P-type transistors.

[0061] Next, taking the first control transistor T1 as an N-type transistor and the second control transistor T2 as a P-type transistor as an example for description.

[0062] When the multiplexing control circuit 150 transmits a low level to the first control signal line 131, the first control transistor T1 is cut off, the second control transistor T2 is turned on, and the source driver 120 transmits a data signal to the corresponding data line Data through the first electrode and the second electrode of the second control transistor T2, and the data line Data connected with the first control transistor T1 cannot receive the data signal; when the multiplexing control circuit 150 transmits a high level to the first control signal line 131, the first control transistor T1 is turned on, the second control transistor T2 is cut off, and the source driver 120 transmits a data signal to the corresponding data line Data through the first electrode and the second electrode of the first control transistor T1, and the data line Data connected with the second control transistor T2 cannot receive the data signal.

[0063] Compared with the structure of Figure 2 , the multiplexer 130 in Figure 3 only needs one control signal line, which simplifies the structure of the multiplexer 130.

[0064] It should be noted that Figure 2 and Figure 3 the first electrode and the second electrode can be one of the source and the drain.

[0065] It should be noted that different multiplexers 130 are connected to different first output terminals of the source driver 120.

[0066] In the above embodiment, although the arrangement of the multiplexer 130 can reduce the number of the source driver 120, the display device 100 of the present application will reduce the effective level width of the data signal at high refresh rate and low refresh rate, which further causes the charging time of the sub-pixel Pixel in the display panel 110 to be insufficient, and a technical problem of display abnormality occurs.

[0067] For example, referring to Figure 4a and Figure 4b , the first refresh rate is 120HZ, and the second refresh rate is 60HZ, then the charging time t2 of 120HZ refresh rate in Figure 4a is half of the charging time t1 of 120HZ refresh rate in Figure 4b .

[0068] In the display device 100 of the present application, when the display panel 110 is configured as a first refresh rate, in one display frame, the number of sub-pixels Pixel receiving the data signal transmitted by the corresponding data line Data in the plurality of sub-pixels Pixel is a first value; when the display panel 110 is configured as a second refresh rate, in one display frame, the number of sub-pixels Pixel receiving the data signal transmitted by the corresponding data line Data in the plurality of sub-pixels Pixel is a second value; wherein the first refresh rate is greater than the second refresh rate, and the first value is less than the second value.

[0069] Referring to Figure 5a When the refresh rate of the display panel 110 is configured as a second refresh rate, in the Nth display frame, each sub-pixel Pixel of the display panel 110 displays A; in the N+1th display frame, each sub-pixel Pixel of the display panel 110 displays B; in the N+2th display frame, each sub-pixel Pixel of the display panel 110 displays C; in the N+3th display frame, each sub-pixel Pixel of the display panel 110 displays D; that is, when the display panel 110 is configured as a low refresh rate, all sub-pixels Pixel in the display panel 110 are refreshed once in one display frame.

[0070] Referring to Figure 5b In the Nth display frame, the sub-pixels Pixel in the odd-numbered rows display A, and the sub-pixels Pixel in the even-numbered rows are not displayed; in the N+1th display frame, the sub-pixels Pixel in the even-numbered rows are not refreshed and display A, and the sub-pixels Pixel in the odd-numbered rows are refreshed and display B; in the N+2th display frame, the sub-pixels Pixel in the odd-numbered rows are not refreshed and display B, and the sub-pixels Pixel in the even-numbered rows are refreshed and display C; in the N+3th display frame, the sub-pixels Pixel in the even-numbered rows are not refreshed and display C, and the sub-pixels Pixel in the odd-numbered rows are refreshed and display D; that is, when the display panel 110 is configured as a low refresh rate, one of the sub-pixels Pixel in the odd-numbered rows or the even-numbered rows in the display panel 110 is refreshed once in one display frame, and the sub-pixels Pixel in the odd-numbered rows and the sub-pixels Pixel in the even-numbered rows are alternately refreshed.

[0071] In the display device 100 of this application, the second refresh rate is half of the first refresh rate, and the first value is half of the second value. For example, the first refresh rate can be 120Hz, and the second refresh rate can be 60Hz, or the first refresh rate can be 90Hz, and the second refresh rate can be 45Hz; at the first refresh rate, only half of the sub-pixels are refreshed in each display frame, and at the second refresh rate, all sub-pixels are refreshed in each display frame.

[0072] In the display device 100 of this application, when the display panel 110 is configured at the first refresh rate, the charging time of the sub-pixel receiving the data signal is equal to the charging time of the sub-pixel receiving the data signal when the display panel 110 is configured at the second refresh rate.

[0073] For example, with Figure 2 Taking the structure in the example, when the display panel 110 is configured with the second refresh rate, this application can increase the width of the effective level output by the first control signal line 131. Then, in one display frame, only the first control transistor T1 is turned on, and the second control transistor T2 is turned off. The data line Data connected to the first control transistor T1 receives a data signal, and the corresponding sub-pixel Pixel is refreshed. The data line Data connected to the second control transistor T2 does not receive a data signal, and the corresponding sub-pixel Pixel is not refreshed. Similarly, in the next display frame, the data line Data connected to the first control transistor T1 does not receive a data signal, and the corresponding sub-pixel Pixel is not refreshed. The data line Data connected to the second control transistor T2 receives a data signal, and the corresponding sub-pixel Pixel is refreshed. Alternatively, this application can simultaneously increase the width of the effective level output by both the control signal line and the data line Data.

[0074] That is, by increasing the width of the effective level output of the control signal line, this application refreshes the odd or even columns of sub-pixels in a display frame, so that the width of the effective level received by the multiplexer 130 at the first refresh rate is equal to the width of the effective level received by the multiplexer 130 at the second refresh rate.

[0075] It should be noted that the first refresh rate can also be 120Hz, and the second refresh rate can be 45Hz. At the first refresh rate, only half of the sub-pixels are refreshed in each display frame, while at the second refresh rate, all sub-pixels are refreshed in each display frame. Although the charging time is still different at the two refresh rates, the difference is small and can improve the display abnormality problem of the display panel 110.

[0076] Please see Figure 6The application further provides a driving method of the display device 100, which comprises the following steps:

[0077] S10, obtaining a target refresh rate of the display panel 110 in a target display frame;

[0078] S20, when the target refresh rate is greater than a first threshold value, a number of sub-pixels Pixel receiving data signals transmitted by the corresponding data line Data in the plurality of sub-pixels Pixel is a first value;

[0079] S30, when the target refresh rate is less than or equal to the first threshold value, a number of sub-pixels Pixel receiving data signals transmitted by the corresponding data line Data in the plurality of sub-pixels Pixel is a second value, and the first value is greater than the second value.

[0080] In the embodiment, the first threshold value can be 60HZ.

[0081] Please refer to Figure 1 The timing controller 140 receives a refresh rate of the display panel 110 in a next display frame, and outputs corresponding control signals to the multiplexing control circuit 150 and the source driver 120 according to the size of the refresh rate.

[0082] For example, when the refresh rate is less than or equal to 60HZ, the input of the original driving signal is maintained, the valid level received by the multiplexer 130 has a second width, and the charging time of the sub-pixel Pixel receiving the data signal has a second time; when the refresh rate is greater than 60HZ, the valid level received by the multiplexer 130 has a first width, and the charging time of the sub-pixel Pixel receiving the data signal has a first time.

[0083] In the embodiment, the first width and the second width are equal, and the first time and the second time are equal.

[0084] That is, the application increases the width of the valid level output by the control signal line, so that the sub-pixels Pixel in the odd column or the even column are refreshed in one display frame, so that the width of the valid level received by the multiplexer 130 at the first refresh rate is equal to the width of the valid level received by the multiplexer 130 at the second refresh rate; at the same time, the charging time of the sub-pixel Pixel receiving the data signal is equal under different refresh rates, which improves the display abnormality problem of the display panel 110.

[0085] The application provides a display device and a driving method thereof; the display device comprises a display panel, a source driver and a plurality of multiplexers, the display panel comprises a plurality of sub-pixels and a plurality of data lines, each data line is connected with a column of sub-pixels, the plurality of multiplexers are electrically connected with the display panel and the source driver, each multiplexer is electrically connected with at least two data lines, and the at least two data lines connected with each multiplexer are different; by arranging the plurality of multiplexers between the source driver and the display panel and electrically connecting each multiplexer with at least two data lines, one output terminal on the source driver transmits data signals to at least two data lines, thereby reducing the number of source drivers and the cost of products.

[0086] In the above embodiments, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0087] The principles and implementation manners of the application are described by applying specific examples herein, and the above description of the embodiments is only for helping to understand the technical solutions and core ideas of the application; the ordinary skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced by equivalents; and the modification or replacement does not make the essence of the corresponding technical solution deviate from the scope of the technical solutions of the embodiments of the application.

Claims

1. A display device, characterized by comprising: The display device comprises: a display panel comprising a plurality of sub-pixels and a plurality of data lines, each of the data lines being connected to a column of the sub-pixels; a source driver arranged at one side of the display panel; and a plurality of multiplexers arranged between the source driver and the display panel, the plurality of multiplexers being electrically connected to the display panel and the source driver, each of the multiplexers being electrically connected to at least two of the data lines, and the at least two data lines connected to each of the multiplexers being different; wherein, when the display panel is configured to have a first refresh rate, in one display frame, the number of sub-pixels in the plurality of sub-pixels receiving data signals transmitted by corresponding data lines is a first value; when the display panel is configured to have a second refresh rate, in one display frame, the number of sub-pixels in the plurality of sub-pixels receiving data signals transmitted by corresponding data lines is a second value; the first refresh rate is greater than the second refresh rate, and the first value is less than the second value. The second refresh rate is one half of the first refresh rate, and the first value is one half of the second value.

2. The display device according to claim 1, wherein When the display panel is configured to have the first refresh rate, the charging time of the sub-pixels receiving data signals is equal to the charging time of the sub-pixels receiving data signals when the display panel is configured to have the second refresh rate.

3. The display device according to claim 1, wherein When the display panel is configured to have the first refresh rate, the width of the effective level received by the multiplexers is equal to the width of the effective level received by the multiplexers when the display panel is configured to have the second refresh rate.

4. The display device according to claim 1, wherein The display device further comprises a timing controller and a multiplexing control circuit, the source driver is connected to the timing controller, and the multiplexing control circuit is connected to the timing controller; 5. The display device according to claim 1, wherein wherein, the timing controller controls the multiplexing control circuit to output control signals to the plurality of multiplexers, and the timing controller controls the source driver to transmit data signals to the data lines. Each of the multiplexers comprises a first control transistor and a second control transistor; 6. The display device according to any one of claims 1 to 5, wherein the gate of the first control transistor is connected to a first control signal line, the first electrode of the first control transistor is connected to a first output terminal of the source driver, and the second electrode of the first control transistor is electrically connected to one of the data lines; the gate of the second control transistor is connected to a second control signal line, the first electrode of the second control transistor is connected to the first output terminal of the source driver, and the second electrode of the second control transistor is electrically connected to another of the data lines; wherein, the first control transistor and the second control transistor are both N-type transistors or P-type transistors. Each of the multiplexers comprises a first control transistor and a second control transistor; 7. The display device according to any one of claims 1 to 5, wherein the gate of the first control transistor is connected to a first control signal line, the first electrode of the first control transistor is connected to a first output terminal of the source driver, and the second electrode of the first control transistor is electrically connected to one of the data lines; ​ A gate of the second control transistor is connected with the first control signal line, a first electrode of the second control transistor is connected with the first output terminal of the source driver, and a second electrode of the second control transistor is connected with another data line. The first control transistor and the second control transistor are different from each other in one of N-type transistor and P-type transistor.

8. A driving method of a display device including the display device according to any one of claims 1 to 7, characterized by, The method comprises: acquiring a target refresh rate of the display panel in a target display frame; when the target refresh rate is greater than a first threshold value, a number of sub-pixels in the plurality of sub-pixels receiving data signals transmitted by the corresponding data line is a first value; when the target refresh rate is less than or equal to the first threshold value, a number of sub-pixels in the plurality of sub-pixels receiving data signals transmitted by the corresponding data line is a second value; wherein the first value is less than the second value.

9. The driving method of a display device according to claim 8, wherein when the target refresh rate is greater than a first threshold value, the effective level received by the multiplexer has a first width, and the charging time of the sub-pixel receiving the data signal has a first time; when the target refresh rate is less than or equal to the first threshold value, the effective level received by the multiplexer has a second width, and the charging time of the sub-pixel receiving the data signal has a second time; wherein the first width and the second width are equal, and the first time and the second time are equal.

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