Pixel Circuit and Its Driving Method
By designing a pixel circuit including compensation unit in an OLED display, the substrate bias effect is optimized, the problem of threshold voltage differences between different pixels is solved, and the display uniformity and quality are improved.
Patent Information
- Application Number
- CN202410771520.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-14
- Publication Date
- 2025-06-03
- Estimated Expiration
- 2044-06-14
AI Technical Summary
In OLED displays, due to the different physical structure and electrical characteristics of semiconductor devices, the substrate bias voltage affects the device performance, and thus affects the display uniformity. It is difficult for the prior art to effectively optimize the liner bias effect.
A pixel circuit is designed, including a data writing unit, an energy storage unit, a light emitting unit, a driving unit, a light emitting control transistor and a compensation unit. By adjusting the working time of the compensation unit, compensation of the threshold voltage of the light emitting control transistor is completed, thereby optimizing the substrate bias effect.
By compensating for the difference in transistor threshold voltage characteristics between different pixels, the display quality and uniformity of the panel are improved, and a higher display effect is achieved.
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Figure CN118711527B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technologies, and in particular, to a pixel circuit and a driving method thereof. Background Art
[0002] Organic Light Emitting Diode (OLED) is one of the hotspots in the current research field of flat panel displays. Compared with liquid crystal displays, OLEDs have the advantages of low power consumption, low production cost, self-luminescence, wide viewing angle, and fast response speed. Currently, in the field of flat panel displays such as mobile phones, PDAs, and digital cameras, OLEDs have begun to replace traditional liquid crystal displays (LCDs). Among them, the design of the driving circuit is a key technology for realizing the display function.
[0003] The driving circuit generally includes a scan driving circuit, a light emission control circuit, a data driving circuit, a pixel circuit, etc. Among them, the pixel circuit design is the core technical content of OLED displays and has important research significance.
[0004] With the development of display technologies, people's requirements for display effects are also getting higher and higher. However, due to the different physical structures and electrical characteristics of semiconductor devices among different pixels, in semiconductor devices, especially Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), the substrate bias voltage has a significant impact on device performance. How to optimize the body bias effect is an urgent problem to improve display uniformity. Summary of the Invention
[0005] In order to solve the problems existing in the prior art, the present invention provides a pixel circuit and a driving method thereof.
[0006] The present invention provides a pixel circuit, including: a data writing unit for controlling the input of a data signal; a first energy storage unit, with its first end connected to the output end of the data writing unit, for storing the data signal output by the data writing unit; a second energy storage unit, with its first end connected to a high level VDD and its second end connected to the second end of the first energy storage unit, for storing the data signal together with the first energy storage unit; a light emitting unit for performing light emitting display; a driving unit, with its input end connected to the high level VDD, its control end inputting a control signal, and its output end for providing a light emitting current to the light emitting unit; a light emitting control transistor, with its input end connected to the output end of the driving unit, its control end connected to the first end of the first energy storage unit, and its output end connected to the light emitting unit, for controlling the conduction of the driving unit and the light emitting unit; a compensation unit, with its output end connected to the first end of the first energy storage unit, its input end connected to the output end of the light emitting control transistor, and its control end inputting a compensation control signal.
[0007] Optionally, the pixel circuit further includes: a reset unit connected to the input end of the light emitting unit for resetting the light emitting unit.
[0008] Optionally, the data writing unit includes: a first PMOS transistor, with its source connected to the data signal.
[0009] Optionally, the first energy storage unit includes: a first capacitor, with its first end connected to the output end of the data writing unit.
[0010] Optionally, the second energy storage unit includes: a second capacitor, with its first end connected to the high level VDD and its second end connected to the second end of the first capacitor.
[0011] Optionally, the driving unit includes a second PMOS transistor, with its source connected to the high level VDD and its gate connected to the second ends of the first capacitor and the second capacitor.
[0012] Optionally, the compensation unit includes: a fourth PMOS transistor, with its drain connected to the first end of the first capacitor and its gate connected to the compensation control signal.
[0013] Optionally, the light emitting control transistor is a PMOS transistor, with its source connected to the drain of the second PMOS transistor and its gate connected to the first end of the first capacitor.
[0014] Optionally, the input end of the light emitting unit is connected to the source of the fourth PMOS transistor and the drain of the light emitting control transistor.
[0015] Optionally, the reset unit includes: a third PMOS transistor, with its source connected to the output end of the compensation unit, its gate connected to a reset signal, and its drain grounded.
[0016] Optionally, the pixel circuit further includes: a G-point initialization unit, which is connected to the first end of the first energy storage unit and is used to adjust the G-point voltage.
[0017] Optionally, the G-point initialization unit includes: a sixth PMOS transistor, whose gate is connected to an initialization control signal, source is connected to an initialization signal, and drain is connected to the first end of the first energy storage unit.
[0018] The present invention also provides a driving method for a pixel circuit, which sequentially includes the steps of: initialization; self-discharge; writing information; emitting light, wherein the self-discharge step includes adjusting the working time of a compensation unit to complete the adjustment of the threshold voltage of a light-emitting control transistor.
[0019] Optionally, the driving method of the pixel circuit includes the steps of: starting initialization, turning on a driving unit and a data writing unit; ending initialization, turning off the data writing unit and the driving unit; starting self-discharge, with a duration of t, t = t1 + t2, turning on a compensation unit, turning off the compensation unit after t1 time, turning on a reset unit, and turning off the reset unit after t2 time; writing information, turning on the data writing unit; emitting light, turning off the data writing unit and turning on the driving unit.
[0020] Optionally, when a = b, t1 = 0, t2 = t; when a = b / (1 - b) 2 , b = C2 / (C1 + C2), t1 = t, t2 = 0; where a is a body bias coefficient, C1 is a first capacitance value, and C2 is a second capacitance value.
[0021] Optionally, in the initialization stage, a first PMOS transistor, a second PMOS transistor, and a light-emitting control transistor are all turned on, and a data signal is Vofs to initialize the G point.
[0022] Optionally, when a is between b and b / (1 - b) 2 t1 = t * f[b, b / (1 - b) 2 , and the function f is adjusted according to the panel operation.
[0023] Optionally, the function f is a linear function, a quadratic function, or an exponential function.
[0024] Optionally, within the t1 time period, a fourth PMOS transistor is turned on, the source potential of the light-emitting control transistor decreases, so its gate potential increases. At the same time, due to the body bias effect, the threshold voltage of the light-emitting control transistor increases until the voltage difference between the source and the gate is equal to the threshold voltage of the light-emitting control transistor, and the light-emitting control transistor turns off.
[0025] Optionally, within the time period t1:
[0026] |V TH_EF | = a*(VDD - Vs) + |V TH | = Vs - Vg;
[0027] (VDD - VS)*C2 + [(VDD - Vofs) - (Vs - Vg)]*C1 = (Vg - Vofs)*C1*C2 / (C1 + C2);
[0028] Wherein, V TH_EF is the equivalent threshold voltage of the light-emitting control transistor, V TH is the threshold voltage of the light-emitting control transistor, and Vofs is the initialization voltage;
[0029] Vs1 = {[a - (1 + x) 2 VDD + Vofs + |V TH |} / [1 + a - (1 + x) 2 ;
[0030] Vg1 = (1 + a)Vofs - (VDD - |V TH |)(1 + x) 2} / [1 + a - (1 + x) 2 ;
[0031] Wherein, a is the body bias coefficient, x = C2 / C1, Vs1 is the source voltage of the light-emitting control transistor, and Vg1 is the gate voltage of the light-emitting control transistor.
[0032] Optionally, within the time period t1, the expression for calculating the threshold voltage compensation of the light-emitting control transistor is as follows:
[0033] (VDD - Vs1)*C2 + [(VDD - Vofs) - (Vs1 - Vg1)]*C1 = (Vg1 - Vofs)*C1*C2 / (C1 + C2) = Q;
[0034] During the time period t1, △Vs1 is the change in the source voltage of the light-emitting control transistor, and △Vg1 is the change in the gate voltage of the light-emitting control transistor, which are:
[0035] △Vg1 = Vg1 - Vofs = Q*(C1 + C2) / (C1*C2);
[0036] △Vs1 = Vs1 - VDD = Q*C1 / C2*(C1 + C2);
[0037] △Vs1 / △Vg1 = (1 - b) 2 ;
[0038] The current passing through TD:
[0039] I = β * (Vs1 - Vg1 - |V TH_EF |) 2 ;
[0040] Where β is a constant.
[0041] Optionally, within the time period t1: VDD is 3 - 6V and Vofs is 1 - 3V.
[0042] The present invention proposes a pixel circuit and a driving method applicable to Micro OLED. This pixel circuit can compensate for the differences in transistor threshold voltage characteristics between different pixels, thereby improving the display quality of the panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0044] Figure 1 It is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
[0045] Figure 2 It is a circuit diagram of a pixel circuit according to an embodiment of the present invention;
[0046] Figure 3 For Figure 2 the timing diagram of the driving method of the pixel circuit shown;
[0047] Figure 4 It is a circuit diagram of a pixel circuit according to another embodiment of the present disclosure;
[0048] Figure 5 For Figure 4 the timing diagram of the driving method of the pixel circuit shown. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0049] The following will describe the preferred embodiments of the present invention in more detail. Although the following describes the preferred embodiments of the present invention, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein.
[0050] In the present invention, unless otherwise stated, the orientation terms such as "upper" and "lower" generally refer to the upper and lower in the normal use state of the device, and "inner" and "outer" refer to those relative to the contour of the device. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first", "second", and "third" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality of" means two or more unless otherwise specifically defined. Since the present invention relates to electrical devices, "connection" and "interconnection" both represent conductive interconnection. Since the drawings describe the same device, the same reference numerals in the figures represent the same components.
[0051] In this embodiment, the pixel circuit is formed on a semiconductor substrate such as a silicon-based substrate, and a certain bias voltage is usually applied to the substrate. This voltage will affect the threshold voltage, leakage current, and other electrical characteristics of semiconductor devices. The change of the substrate bias voltage will change the threshold voltage of the device. For example, in a MOSFET, increasing the substrate bias voltage will increase the threshold voltage. This is because the bias voltage changes the potential difference between the substrate and the source / drain junction, thereby affecting the junction capacitance between the source and the substrate.
[0052] The body bias coefficient, that is, the body bias effect coefficient, refers to the degree of change in pixel performance parameters (such as voltage, sensitivity, noise, etc.) caused by the change of the substrate bias voltage. This coefficient can be obtained through experimental measurement and modeling. Specifically, the body bias effect coefficient of a pixel is a key parameter that quantitatively describes the influence of the change of the substrate bias voltage on pixel performance. For example, for sensitivity, the change of the substrate bias voltage may change the voltage characteristics of the photodiode, thereby affecting the response and sensitivity of the pixel to light. For noise, the substrate bias voltage affects the leakage current and noise characteristics of the device. Different substrate biases may increase or decrease the dark current noise of the pixel. For the dynamic range, by adjusting the substrate bias voltage, the dynamic range of the pixel can be optimized to have good performance under different lighting conditions. Understanding and controlling this coefficient helps to improve the performance of the sensor, such as increasing sensitivity, reducing noise, and expanding the dynamic range, when designing and optimizing an image sensor. These optimizations are particularly important in high-performance imaging applications such as scientific imaging, medical imaging, and high-end photography.
[0053] The following further elaborates on specific examples of the present invention with reference to the accompanying drawings. Figure 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention, as Figure 1As shown in the figure, the pixel circuit of the present invention includes: a data writing unit for controlling the input of a data signal; a first energy storage unit, the first end of which is connected to the output end of the data writing unit, for storing the data signal output by the data writing unit; a second energy storage unit, the first end of which is connected to the high level VDD, and the second end of which is connected to the second end of the first energy storage unit, for storing the data signal together with the first energy storage unit; a light emitting unit for performing light emitting display; a driving unit, the input end of which is connected to the high level VDD, the control end of which inputs a control signal, and the output end of which is used to provide a light emitting current to the light emitting unit; a light emitting control transistor, the input end of which is connected to the output end of the driving unit, the control end of which is connected to the first end of the first energy storage unit, and the output end of which is connected to the light emitting unit, for controlling the conduction of the driving unit and the light emitting unit; a compensation unit, the output end of which is connected to the first end of the first energy storage unit, the input end of which is connected to the output end of the light emitting control transistor, and the control end of which inputs a compensation control signal.
[0054] In this embodiment, the pixel circuit further includes a reset unit, which is connected to the input end of the light emitting unit for resetting the light emitting unit.
[0055] Figure 2 is the circuit diagram of the pixel circuit according to an embodiment of the present invention, as Figure 2 shown, in this embodiment, the data writing unit includes a first PMOS transistor T1, the source of which is connected to the data signal. The first energy storage unit includes a first capacitor C1, the first end of which is connected to the output end of the data writing unit. The second energy storage unit includes a second capacitor C2, the first end of which is connected to the high level VDD, and the second end of which is connected to the second end of the first capacitor. The driving unit includes a second PMOS transistor T2, the source of which is connected to the high level VDD, and the gate of which is connected to the second ends of the first capacitor and the second capacitor. The compensation unit includes a fourth PMOS transistor T4, the drain of which is connected to the first end of the first capacitor, and the gate of which is connected to the compensation control signal. In this embodiment, the light emitting control transistor TD is a PMOS transistor, the source of which is connected to the drain of the second PMOS transistor, and the gate of which is connected to the first end of the first capacitor. The input end of the light emitting unit is connected to the source of the fourth PMOS transistor and the drain of the light emitting control transistor.
[0056] In this embodiment, the reset unit of the pixel circuit includes a third PMOS transistor T3, the source of which is connected to the drain of the fourth PMOS transistor, the gate of which is connected to the reset signal, and the drain of which is grounded.
[0057] The present invention also provides a driving method for a pixel circuit, including the following steps: starting initialization, turning on the driving unit and the data writing unit; ending initialization, turning off the data writing unit and the driving unit; starting self-discharge, turning on the compensation unit, turning off the compensation unit after time t1, turning on the reset unit, and turning off the reset unit after time t2; writing information, turning on the data writing unit; emitting light, turning off the data writing unit and turning on the driving unit.
[0058] Figure 3 Yes Figure 2 is the timing diagram of the driving method of the pixel circuit shown below. The driving method of the pixel circuit shown will be described below in conjunction with the specific working process. Figure 2 The driving method of the pixel circuit shown is described.
[0059] First, in the initialization (init) stage, the driving unit is turned on and the data writing unit is turned on. Specifically, referring to Figure 3 , in the initialization stage, T1 / T2 / T3 / TD are all turned on, DATA = Vofs, and point G is initialized; then, when the initialization stage ends, the data writing unit is turned off and the driving unit is turned off.
[0060] After that, it enters the self-discharge stage. The compensation unit is turned on within time t1, and the compensation unit is turned off after time t1. The reset unit is turned on, and the reset unit is turned off after time t2. In the actual working process, point G is affected by both the potential drop of point S and the coupling drop, and at the same time, there is also the effect of charge flowing into point G causing its potential to rise. It is the combined effect of the two, and the schematic diagram shows that the descending effect dominates. Specifically, within the time period t1, T4 conducts, the potential of point S decreases, the source potential of the light-emitting control transistor decreases, so its gate potential increases, that is, the potential of point G increases. At the same time, due to the body bias effect, the threshold voltage of the TD transistor increases until the SG voltage difference is equal to the threshold voltage of TD, and TD turns off. At the same time, since only T4 conducts in this stage, the charge flowing into the source of TD is equal to the charge flowing out of the drain of TD.
[0061] |V TH_EF | = a*(VDD - Vs)+|V TH | = Vs - Vg------------(1)
[0062] (VDD - V S )*C2 + [(VDD - Vofs)-(Vs - Vg)]*C1 = (Vg - Vofs)*C1*C2 / (C1 + C2)---
[0063] -----(2)
[0064] Among them, V TH_EFis the effective / equivalent threshold voltage of the TD transistor, V TH is the threshold voltage of the TD transistor, and Vofs is the initialization voltage. The voltages at points S and G within time t1 can be obtained through Equations (1) and (2):
[0065] Vs1 = {[a - (1 + x) 2 VDD + Vofs + |V TH |} / [1 + a - (1 + x) 2 -----------------------(3)
[0066] Vg1 = (1 + a)Vofs - (VDD - |V TH |)(1 + x) 2} / [1 + a - (1 + x) 2 -------(4)
[0067] where a is the body bias coefficient, x = C2 / C1, Vs1 is the source voltage of the light-emitting control transistor, and Vg1 is the gate voltage of the light-emitting control transistor.
[0068] In some embodiments, VDD can be 3 - 6V and Vofs can be 1 - 3V.
[0069] The expression for calculating the threshold voltage compensation during the self-discharge stage t1 is as follows: Let Equation (2):
[0070] (VDD - Vs1)*C2 + [(VDD - Vofs) - (Vs1 - Vg1)]*C1 = (Vg1 - Vofs)*C1*C2 / (C1 + C2) = Q. Then, the voltage changes at points G and S during time t1, i.e., the gate voltage change and source voltage change of the light-emitting control transistor, are:
[0071] △Vg1 = Vg1 - Vofs = Q*(C1 + C2) / (C1*C2)
[0072] △Vs1 = Vs1 - VDD = Q*C1 / C2*(C1 + C2)
[0073] △Vs1 / △Vg1 = (1 - b) 2 -------(5)
[0074] where b = C2 / (C1 + C2), and this equation holds at any moment during time t1. The current passing through TD at any moment during time t1:
[0075] I = β*(Vs1 - Vg1 - |V TH_EF |) 2 -------(6)
[0076] Among them, β is a constant. At the same time:
[0077]
[0078] Combining (1), (6) and (7), we get:
[0079]
[0080] in,
[0081] m=b 2 -2b+a*(b-1) 2 ,
[0082] p=(1+a)*Vinit-(1+a)*(b 2 -2b)*Vofs-|V TH |
[0083] Vinit=VDD-Vofs
[0084] Solving differential equation (8), and considering t1 = 0, △Vg = Vg-Vofs = 0, we get
[0085] Vg1=1 / {1 / [m / (p+m*Vofs)-β*m*t / b / C1]}-p / m---------------(9)
[0086] At this time, the pressure difference between points S and G
[0087] Vsg=Vs1-Vg1=VDD+△Vs1-Vofs-△Vg1=VDD-Vofs+(b 2 -2b)*△
[0088] Vg1=Vinit'----------(10)
[0089] Where, △Vg1=(9)-Vofs
[0090] During the t2 period, T3 is turned on to initialize the OLED anode. Specifically, capacitors C1 and C2 are self-discharged through TD and T3. Since point G is in a floating state at this time, the SG voltage difference remains unchanged during this stage. As the voltage at point S decreases, the TD threshold voltage increases until a new balance is reached. The voltage difference between point S and point G during t2 is
[0091] Vs2-Vg2=a*(VDD-Vs3)+|V TH |=Vinit'
[0092] The voltages at points S and G in this stage can be obtained:
[0093] Vs2 = VDD - (Vinit’ - |V TH |) / a ------- (11)
[0094] Vg2 = Vs2 - Vinit’ ------ (12)
[0095] Then enter the information writing stage, and the data writing unit is turned on. Specifically, in the data writing stage, T1 is turned on, the Data voltage jumps from Vofs1 to the grayscale voltage Vdata, the potential of point G becomes Vdata, the potential of point S changes, and at this time, the voltage of point G is coupled to point S through C1
[0096] △Vs = (1 - b)△Vg,
[0097] △Vs3 = (1 - b) * △Vg3 ------ (13)
[0098] △Vg3 = Vdata - Vg3
[0099] At this time, Vs3 - Vg3 = Vs2 + (13) - Vdata ----- (14)
[0100] Finally, enter the light-emitting stage, the data writing unit is turned off, and the driving unit is turned on. Specifically, T2 / TD is turned on, and the OLED starts to emit light. Since point G is in a floating state, the SG voltage difference remains unchanged, the same as the information writing stage. At this time, the potential of point S becomes VDD, and the voltage of the TD transistor becomes |VTH|. At this time,
[0101] Vsg - |V TH | = (b / a - 1) * Vofs - b * Vdata + (b / a - 1)|V TH | + (1 - b - b / a) * (b 2 - 2b) * △Vg1 -------- (15)
[0102] Where,
[0103] △Vg1 = (13) - Vofs = 1 / {1 / [m / (p + m * Vofs) - β * m * t / b / C1]} - p / m - Vofs ---- (16)
[0104] Combining (16), consider Equation (15). If t1 = t = 0, then the self-discharge stage occurs completely in the t2 time period. At this time, △Vg1 = 0 in Equation (15), and the compensation effect of |V TH | is
[0105] (b / a - 1) ---- (17);
[0106] If t1 = t = large enough, then the self-discharge stage occurs entirely within the time period t1. At this time, the compensation effect of |V TH | in Equation (19) is (b / a - 1) + (1 - b - b / a) * (b 2 - 2b) / [b 2 - 2b + a * (b - 1) 2 = b - a * (1 - b) 2 / [b 2 - 2b + a * (b - 1) 2 --------(18)
[0107] It can be seen from Equations (17) and (18) that the corresponding optimal process conditions are a = b and a = b / (1 - b) 2 . That is, the closer a is to b, the closer t1 is to 0; the closer a is to b / (1 - b) 2 , the closer t1 is to large enough. In actual processes, when the panel is fabricated, TEG / testkey electrical tests are performed to measure the ID~VG curves under different Vs voltages. The corresponding |V TH_EF | is analyzed from the curves, and then the body bias coefficient a is fitted through Equation (1). Therefore, when the backplane is fabricated, a and b are completely fixed, and it is difficult to ensure that the process can meet the circuit requirements of b = a each time. Therefore, t1 is variable. Specifically, with b fixed, t1 = t * f[b, b / (1 - b) 2 , where the function f includes but is not limited to linear functions, quadratic functions, and exponential functions, and can be adjusted according to the panel operation to achieve the best display effect. Therefore, when the body bias coefficient a is in the range between b and b / (1 - b)2, by adjusting the length of the t1 time, the working time of the compensation unit can be adjusted, thereby adjusting the self-discharge degree to achieve the best compensation effect and further realizing the best display effect.
[0108] In some other embodiments, the pixel circuit further includes a G-point initialization unit. Figure 4 The circuit diagram of the pixel circuit according to another embodiment of the present invention is shown. The G-point initialization unit is connected to the first end of the first energy storage unit and is used to adjust the G-point voltage. Specifically, referring to Figure 4 , the G-point initialization unit includes a sixth PMOS transistor (T6), whose gate is connected to the initialization control signal, the source is connected to the initialization signal, and the drain is connected to the first end of the first energy storage unit.
[0109] Figure 5 is Figure 4 the timing diagram of the driving method of the pixel circuit shown, relative to Figure 3In the shown solution, the difference in the idea of this solution lies in adding a T6 to specifically initialize the G point. During the initialization phase, the G point initialization unit is turned on, and the other working processes are the same as those in Figure 3 the shown solution, which will not be elaborated here.
[0110] The above are only the embodiments of the present application, and do not limit the patent scope of the present application accordingly. Any equivalent structural or equivalent process transformation made by using the content of the specification and drawings of the present application, such as the mutual combination of technical features between the embodiments, or direct or indirect application in other related technical fields, shall similarly be included in the patent protection scope of the present application.
Claims
1. A method for driving a pixel circuit, characterized in that: include: A data writing unit, used for controlling the input of data signals; A first energy storage unit, a first end of which is connected to the output end of the data writing unit and is used to store the data signal output by the data writing unit; A second energy storage unit, a first end of which is connected to a high level VDD, and a second end of which is connected to a second end of the first energy storage unit, and is used to store data signals together with the first energy storage unit; A light-emitting unit, used for light-emitting display; The driving unit has an input terminal connected to a high level VDD, a control terminal inputting a control signal, and an output terminal being a point S, for providing a light-emitting current to the light-emitting unit; a light-emitting control transistor, whose input end is connected to the output end of the driving unit, whose control end is connected to the first end of the first energy storage unit, and whose output end is connected to the light-emitting unit, and is used to control conduction of the driving unit and the light-emitting unit; a compensation unit, the output end of which is connected to the first end of the first energy storage unit, the input end of which is connected to the output end of the light-emitting control transistor, the control end of which inputs a compensation control signal, and a reset unit, the reset unit being connected to the input end of the light-emitting unit and used to reset the light-emitting unit; A G point initialization unit, the G point initialization unit is connected to the first end of the first energy storage unit and is used to adjust the G point voltage; The method comprises the following steps: initialization; self-discharge; Write information; Light emission, wherein the self-discharging step includes adjusting the working time of the compensation unit to complete the adjustment of the threshold voltage of the light emission control transistor; Start initialization, turn on the driving unit, turn on the data writing unit, turn on the first PMOS transistor / the second PMOS transistor / the third PMOS transistor / the light-emitting control transistor, write data DATA=Vofs, and initialize the G point; The initialization is finished, the data writing unit is turned off, and the driving unit is turned off; The self-discharge is started for a time period of t, t=t1+t2, the compensation unit is turned on, and after t1 time, the compensation unit is turned off, the reset unit is turned on, and after t2 time, the reset unit is turned off; During the t1 period, the fourth PMOS transistor is turned on, the source potential of the light emitting control transistor is reduced, so that the gate potential thereof is increased. At the same time, due to the liner bias effect, the threshold voltage of the light emitting control transistor increases until the source and gate voltage difference is equal to the threshold voltage of the light emitting control transistor, and the light emitting control transistor is turned off. During the t1 period: |V TH_EF |=a*(VDD-Vs)+|V TH |=Vs-Vg; (VDD-V S )*C2+[(VDD-Vofs)-(Vs-Vg)]*C1=(Vg-Vofs)*C1*C2 / (C1+C2); Among them, V TH_EF is the equivalent threshold voltage of the light-emitting control transistor, V TH is the threshold voltage of the light-emitting control transistor, and Vofs is the initialization voltage; Vs1={[a-(1+x) 2 ]VDD+Vofs+|V TH |} / [1+a-(1+x) 2 ]; Vg1={(1+a)Vofs-(VDD-|V TH |)(1+x) 2 } / [1+a-(1+x) 2 ]; Wherein, a is the offset coefficient, x=C2 / C1, Vs1 is the source voltage of the light-emitting control transistor, Vg1 is the gate voltage of the light-emitting control transistor, During the t1 period, the expression for calculating the threshold voltage compensation of the light-emitting control transistor is as follows: (VDD-Vs1)*C2+[(VDD-Vofs)-(Vs1-Vg1)]*C1=(Vg1-Vofs)*C1*C2 / (C1+C2)=Q; In the time period t1, △Vs1 is the change in the source voltage of the light-emitting control transistor, and △Vg1 is the change in the gate voltage of the light-emitting control transistor: △Vg1=Vg1-Vofs=Q*(C1+C2) / (C1*C2); △Vs1=Vs1-VDD=Q*C1 / [C2*(C1+C2)]; △Vs1 / △Vg1=(1-b) 2 ; Current through TD: I=β*(Vs1-Vg1-|V TH_EF |) 2 ; Among them, β is a constant; During the t2 period, the third PMOS transistor is turned on to initialize the OLED anode, and the capacitors C1 and C2 are self-discharged through the light-emitting control transistor and the third PMOS transistor. Since the G point is in a floating state at this time, the SG voltage difference remains unchanged in this stage. As the S point voltage decreases, the threshold voltage of the light-emitting control transistor increases until a new balance is reached. S, G point voltage: Vs2=VDD-(Vinit'-|V TH |) / a Vg2=Vs2-Vinit', Where V TH To write information to the threshold voltage of the TD transistor, the data writing unit is turned on, the first PMOS transistor is turned on, the written data voltage jumps from Vofs1 to the grayscale voltage Vdata, the potential of point G changes to Vdata, the potential of point S changes, and at this time the voltage of point G is coupled to point S through C1; The data writing unit is turned off, the driving unit is turned on, The second PMOS transistor / light-emitting control transistor is turned on, and the OLED starts to emit light. Since point G is in a floating state, the SG voltage difference remains unchanged, the S point potential becomes VDD, and the light-emitting control transistor voltage becomes |V TH |, At this time, Vsg-|V TH |=(b / a-1)*Vofs-b*Vdata+(b / a-1)|V TH |+(1-bb / a)*(b 2 -2b)*△Vg1 Among them, △Vg1=1 / {1 / [m / (p+m*Vofs)-β*m*t / b / C1]}-p / m-Vofs=1 / {1 / [m / (p+m*Vofs)-β*m*t / b / C1]}-p / m-Vofs If t1=t=0, then the self-discharge phase occurs completely in the t2 period. The self-discharge is mainly initialized by the reset unit to the OLED anode. At this time, the gate voltage change of the light-emitting control transistor △Vg1=0, |V TH The compensation effect of | is: (b / a-1); If t1=t= is large enough, then the self-discharge phase occurs completely in the t1 period. At this time, the compensation unit works to adjust the threshold voltage of the light-emitting control transistor. The gate voltage change ΔVg1 of the light-emitting control transistor is not zero, and the threshold voltage |V TH The compensation effect of | is determined by the charge distribution and the bias effect in the time period t1. According to the charge distribution and the bias effect, |V TH The compensation effect of | is: |V TH |=(b / a-1)+(1-b-b / a)*(b 2 -2b) / [b 2 -2b+a*(b-1) 2 ]=[b-a*(1-b) 2 ] / [b 2 -2b+a*(b-1) 2 ]; When a=b, when the offset coefficient a is equal to the capacitance ratio b, the self-discharge phase occurs completely in the t2 time period, t1=0, t2=t, |V TH |=0; When a=b / (1-b) 2 , when b=C2 / (C1+C2), the self-discharge phase occurs completely in the t1 period; Where a is the offset coefficient, C1 is the first capacitance value, C2 is the second capacitance value, Vinit' represents the initialization voltage of the OLED anode in the initialization stage; P is a constant related to the capacitor charge distribution, which is used to describe the charge relationship between capacitors C1 and C2 in the initialization stage, and m is a proportional coefficient related to the offset effect or capacitor coupling; in the initialization stage, the first PMOS transistor, the second PMOS transistor, and the light-emitting control transistor are all turned on, the data signal is Vofs, and the G point is initialized. When a is between b and b / (1-b) 2 When t1=t*f[b,b / (1-b) 2 ], the function f is adjusted according to the panel working time.
2. The driving method of the pixel circuit according to claim 1, characterized in that: The data writing unit includes: a first PMOS transistor, a source of which is connected to a data signal.
3. The driving method of the pixel circuit according to claim 1, characterized in that: The first energy storage unit includes: a first capacitor, a first end of which is connected to the output end of the data writing unit.
4. The driving method of the pixel circuit according to claim 3, characterized in that: The second energy storage unit includes: a second capacitor, a first end of which is connected to the high level VDD, and a second end of which is connected to the second end of the first capacitor.
5. The driving method of the pixel circuit according to claim 4, characterized in that: The driving unit includes a second PMOS transistor, a source of which is connected to the high level VDD, and a gate of which is connected to the second ends of the first capacitor and the second capacitor.
6. The driving method of the pixel circuit according to claim 5, characterized in that: The compensation unit includes: a fourth PMOS transistor, a drain of which is connected to the first end of the first capacitor, and a gate of which is connected to a compensation control signal.
7. The driving method of the pixel circuit according to claim 6, characterized in that: The light emitting control transistor is a PMOS transistor, a source of which is connected to the drain of the second PMOS transistor, and a gate of which is connected to the first end of the first capacitor.
8. The driving method of the pixel circuit according to claim 7, characterized in that: The input end of the light emitting unit is connected to the source of the fourth PMOS transistor and the drain of the light emitting control transistor.
9. The driving method of the pixel circuit according to claim 1, characterized in that: The reset unit comprises: a third PMOS transistor, a source of which is connected to the output end of the compensation unit, a gate of which is connected to the reset signal, and a drain of which is grounded.
10. The driving method of the pixel circuit according to claim 9, characterized in that: The G point initialization unit includes: a sixth PMOS transistor, a gate of which is connected to the initialization control signal, a source of which is connected to the initialization signal, and a drain of which is connected to the first end of the first energy storage unit.
11. The driving method of the pixel circuit according to claim 10, characterized in that: The function f is a linear function, a quadratic function or an exponential function.
12. The driving method of the pixel circuit according to claim 11, characterized in that: During the t1 period: VDD is 3~6V, and Vofs is 1~3V.
Citation Information
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Pixel compensation circuit, driving method thereof and display device
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