Functional testing methods, systems, and electronic devices for digital signal processors

Abstract

This invention discloses a functional testing method, system, and electronic device for digital signal processors (DSPs). The method is applied to a high-performance application-specific integrated circuit (ASIC) prototype development platform system and includes: connecting the high-performance ASIC prototype development platform system to a central processing unit (CPU); receiving a first project file of the DSP sent by a computer terminal, wherein the first project file is used to simulate the DSP; and, in response to receiving a test instruction sent by the CPU, performing functional testing on the DSP based on the test instruction and the first project file to obtain test results for the DSP under test, wherein the test results are used to characterize whether the DSP has any abnormalities. This invention solves the technical problems of poor efficiency and stability in testing DSPs using high-performance ASIC prototype development platform systems in related technologies.

Description

Technical Field

[0001] This invention relates to the field of controller testing, and more specifically, to a functional testing method, system, and electronic device for a digital signal processor. Background Technology

[0002] Currently, when performing functional testing on digital signal processors, such as CVDSPs (Computer Vision Digital Signal Processors) in vehicles, the entire digital signal processor is typically burned into a relevant test platform, and then the digital signal processor is functionally tested according to a set of procedural test procedures. This results in excessive time being spent testing a specific function of the digital signal processor. Furthermore, when configuring the parameters of different processing modules in the digital signal processor, the corresponding central processing unit (CPU) also needs to be burned into the relevant test platform. There may be mutual interference between the CPU and the digital signal processor, resulting in poor overall efficiency and stability of the functional testing of the digital signal processor.

[0003] There is currently no effective solution to the above problems. Summary of the Invention

[0004] This invention provides a functional testing method, system, and electronic device for digital signal processors, to at least solve the technical problems of poor efficiency and stability in testing digital signal processors using high-performance dedicated chip prototype development platform systems in related technologies.

[0005] According to one aspect of the present invention, a functional testing method for a digital signal processor is provided, applied to a high-performance application-specific chip (ASIC) prototype development platform system. The method includes: connecting the high-performance ASIC prototype development platform system to a central processing unit (CPU); receiving a first engineering file of a digital signal processor sent by a computer terminal, wherein the first engineering file is used to simulate a digital signal processor; and, in response to receiving a test instruction sent by the CPU, performing a functional test on the digital signal processor based on the test instruction and the first engineering file to obtain a test result of the digital signal processor under test, wherein the test result is used to characterize whether the digital signal processor has any abnormalities.

[0006] Furthermore, functional testing of the digital signal processor is performed based on test instructions and the first project file to obtain test results for the digital signal processor under test, including: generating multiple test cases based on test instructions, wherein different test cases are used to test different functions of the digital signal processor; executing multiple test cases based on the first project file to obtain execution results for multiple test cases, wherein the execution results are used to characterize whether the first project file successfully executes the corresponding test cases; in response to the execution results characterizing the first project file to successfully execute multiple test cases, determining the test result as no abnormality in the digital signal processor; in response to the execution result of any test case characterizing the first project file to fail to execute any test case, determining the test result as an abnormality in the digital signal processor.

[0007] Furthermore, multiple test cases are executed based on the first project file to obtain the execution results of multiple test cases, including: executing the first test case among the multiple test cases based on the first project file to obtain the execution result of the first test case, wherein the first test case is used to represent any one of the multiple test cases; in response to the execution result of the first test case indicating that the first project file has successfully executed the first test case, the step of executing the second test case among the multiple test cases based on the second project file is repeated until the first project file has successfully executed the multiple test cases, wherein the second test case is used to represent the test cases other than the first test case among the multiple test cases.

[0008] Furthermore, in response to the execution result of the first test case indicating that the first engineering file failed to execute the first test case, the method further includes: sending a prompt message to a computer terminal, wherein the prompt message is used to indicate that there is an abnormality in the digital signal processor; receiving a second engineering file sent by the computer terminal, wherein the second engineering file is a file obtained by the computer terminal modifying the first engineering file based on the prompt message; and performing functional testing on the digital signal processor based on the test instructions and the second engineering file to obtain test results.

[0009] Furthermore, sending a prompt message to the computer terminal includes: sending the prompt message to the computer terminal via a debugging interface.

[0010] Furthermore, connecting the high-performance application-specific chip (ASIC) prototype development platform system to the central processing unit (CPU) includes: connecting the high-performance ASIC prototype development platform system to the CPU via a peripheral component interconnection fast channel.

[0011] Furthermore, receiving the first engineering file of the digital signal processor sent by the computer terminal includes: receiving the first engineering file sent by the computer terminal via a universal serial bus.

[0012] Furthermore, the serial port and network port of the central processing unit are connected to the computer terminal, and the central processing unit has a replaced version of the system burned into it.

[0013] According to another aspect of the present invention, a functional testing system for a digital signal processor is also provided, comprising: a central processing unit connected to a high-performance dedicated chip prototype development platform system, for sending test instructions to the high-performance dedicated chip prototype development platform system; and a computer terminal connected to the high-performance dedicated chip prototype development platform system, for sending a first engineering file of the digital signal processor, wherein the first engineering file is used to simulate the high-performance dedicated chip prototype development platform system performing functional tests on the digital signal processor based on the test instructions and the first engineering file, and obtaining test results of the digital signal processor under test, wherein the test results are used to characterize whether the digital signal processor has any abnormalities.

[0014] Furthermore, the central processing unit is deployed separately on the circuit board, which also has a first interface. The first interface is connected to the second interface of the central processing unit and the high-performance dedicated chip prototype development platform system. A peripheral component interconnection fast channel is established between the first interface and the second interface, which is used to transmit test commands.

[0015] Furthermore, a third interface and a memory are also deployed on the circuit board. The third interface includes a network port and a serial port. The third interface is connected to the central processing unit and the computer terminal. The memory is connected to the central processing unit. The third interface is used to transmit the system after version replacement to the central processing unit. The memory is used to store the system after version replacement.

[0016] Furthermore, the high-performance dedicated chip prototype development platform system is connected to a computer terminal via a universal serial bus and a debugging interface. The universal serial bus is used to transmit the first project file to the high-performance dedicated chip prototype development platform system, and the debugging interface is used to transmit prompt information to the computer terminal in the event of an anomaly in the digital signal processor.

[0017] According to another aspect of the present invention, an electronic device is also provided, comprising: a memory storing an executable program; and a processor for running the program, wherein the program executes the methods of various embodiments of the present invention during runtime.

[0018] According to another aspect of the present invention, a computer-readable storage medium is also provided, the computer-readable storage medium including a stored executable program, wherein, when the executable program is executed, it controls the device where the computer-readable storage medium is located to perform the methods of various embodiments of the present invention.

[0019] According to another aspect of the present invention, a computer program product is also provided, including a computer program that, when executed by a processor, implements the methods of various embodiments of the present invention.

[0020] According to another aspect of the present invention, a computer program product is also provided, including a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, implements the methods of various embodiments of the present invention.

[0021] According to another aspect of the present invention, a computer program is also provided, which, when executed by a processor, implements the methods of the various embodiments of the present invention.

[0022] In this embodiment of the invention, a high-performance dedicated chip prototype development platform system is connected to a central processing unit (CPU). A first project file of a digital signal processor (DSP) is received from a computer terminal. In response to a test command received from the CPU, functional testing of the DSP is performed based on the test command and the first project file to obtain the test results of the DSP under test. By configuring a first project file for simulating the DSP in the high-performance dedicated chip prototype development platform system and configuring the first project file using test commands, the operation of the DSP under different application scenarios can be simulated to determine whether the DSP can operate normally. This eliminates the need to burn the entire DSP and CPU onto the high-performance dedicated chip prototype development platform system and avoids considerations of mutual interference between different test modules. This significantly improves the efficiency and stability of functional testing of the DSP, thereby solving the technical problem of poor efficiency and stability in testing DSPs using a high-performance dedicated chip prototype development platform system in related technologies. Attached Figure Description

[0023] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this application, illustrate exemplary embodiments of the invention and, together with their description, serve to explain the invention and do not constitute an undue limitation thereof. In the drawings:

[0024] Figure 1 This is a flowchart illustrating a functional testing method for a digital signal processor according to an embodiment of this application;

[0025] Figure 2 This is a schematic diagram illustrating the functional testing principle of a digital signal processor according to this application;

[0026] Figure 3 This is a schematic diagram illustrating a functional testing process for a digital signal processor according to an embodiment of this application;

[0027] Figure 4 This is a structural block diagram of a functional testing system for a digital signal processor according to an embodiment of this application. Detailed Implementation

[0028] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0029] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0030] Example 1

[0031] According to an embodiment of the present invention, a method embodiment for functional testing of a digital signal processor is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0032] Figure 1 This is a flowchart illustrating a functional testing method for a digital signal processor according to an embodiment of this application. This method is applied to a high-performance dedicated chip prototype development platform system, such as... Figure 1 As shown, the method includes the following steps:

[0033] Step S102: Connect the high-performance dedicated chip prototype development platform system to the central processing unit.

[0034] The aforementioned high-performance application-specific chip (ASIC) prototype development platform system can refer to a HAPS (High-performance ASIC Prototyping System) platform used for FPGA (Field-Programmable Gate Array) prototype verification before chip manufacturing. The aforementioned central processing unit can refer to a processor outputting onto a separate circuit board, and can be a CPU (Central Processing Unit).

[0035] In one optional embodiment, given that the high-performance dedicated chip prototyping platform system performs well in terms of technology, economy, and security, and can provide a stable testing environment and strong data support for the processors to be tested, the processor functional testing process can be performed within the aforementioned high-performance dedicated chip prototyping platform system. Furthermore, to facilitate the management of the processor functional testing process using the high-performance dedicated chip prototyping platform system, it can be connected to the aforementioned central processing unit (CPU). This allows the user to control the operation of the high-performance dedicated chip prototyping platform system through the CPU, eliminating the need to burn a controller, such as a System on Chip (SOC), into the system for platform operation. This improves the user's control over the processor functional testing process using the high-performance dedicated chip prototyping platform system and enhances the user experience.

[0036] Step S104: Receive the first project file of the digital signal processor sent by the computer terminal.

[0037] The first project file is used to simulate a digital signal processor.

[0038] The aforementioned digital signal processor can refer to the processor currently being tested, used for processing digital signals. Examples include CVDSP modules, ISP modules (Image Signal Processors), and LiDAR modules (Light Detection and Ranging) in ADAS (Advanced Driver Assistance Systems). The aforementioned first project file can refer to software files or firmware used to simulate the digital signal processor. Different functions of the digital signal processor can be simulated by initializing and configuring the file parameters contained in the first project file.

[0039] In one optional embodiment, in order to stably and efficiently test the digital signal processor, the high-performance dedicated chip prototype development platform system can receive the first project file of the digital signal processor from a computer terminal, such as a PC (Personal Computer), workstation, server, or other device, so as to simulate different functions of the digital signal processor through the first project file.

[0040] Step S106: In response to receiving the test instruction sent by the central processing unit, perform functional testing on the digital signal processor based on the test instruction and the first project file to obtain the test result of the digital signal processor under test.

[0041] The test results are used to characterize whether the digital signal processor has any abnormalities.

[0042] The aforementioned test instructions may refer to instructions used to test different functions of a digital signal processor.

[0043] In one optional embodiment, the user can send the aforementioned test instructions to the high-performance dedicated chip prototype development platform system via the central processing unit. The corresponding high-performance dedicated chip prototype development platform system can test different functions of the digital signal processor according to the received test instructions and the received first project file. For example, the test instructions may contain different configuration parameters. The high-performance dedicated chip prototype development platform system can configure and adjust the file parameters contained in the first project file according to these configuration parameters, and then execute the first project file to simulate the operation results of the different functions of the digital signal processor in different application scenarios. Finally, the system determines whether the digital signal processor can operate normally based on the obtained operation results, thereby obtaining the aforementioned test results. The high-performance dedicated chip prototype development platform system can also output the obtained test results on a preset operation interface to facilitate the user to view the current operation status of the digital signal processor.

[0044] In this embodiment of the invention, a high-performance dedicated chip prototype development platform system is connected to a central processing unit (CPU). A first project file of a digital signal processor (DSP) is received from a computer terminal. In response to a test command received from the CPU, functional testing of the DSP is performed based on the test command and the first project file to obtain the test results of the DSP under test. By configuring a first project file for simulating the DSP in the high-performance dedicated chip prototype development platform system and configuring the first project file using test commands, the operation of the DSP under different application scenarios can be simulated to determine whether the DSP can operate normally. This eliminates the need to burn the entire DSP onto the high-performance dedicated chip prototype development platform system and avoids considerations of mutual interference between different test modules, significantly improving the efficiency and stability of functional testing of the DSP. This solves the technical problem of poor efficiency and stability in testing DSPs using a high-performance dedicated chip prototype development platform system in related technologies.

[0045] Furthermore, functional testing of the digital signal processor is performed based on test instructions and the first project file to obtain test results for the digital signal processor under test, including: generating multiple test cases based on test instructions, wherein different test cases are used to test different functions of the digital signal processor; executing multiple test cases based on the first project file to obtain execution results for multiple test cases, wherein the execution results are used to characterize whether the first project file successfully executes the corresponding test cases; in response to the execution results characterizing the first project file to successfully execute multiple test cases, determining the test result as no abnormality in the digital signal processor; in response to the execution result of any test case characterizing the first project file to fail to execute any test case, determining the test result as an abnormality in the digital signal processor.

[0046] The test cases mentioned above can be generated for different functions of the digital signal processor and are used to test different functions.

[0047] In one optional embodiment, when performing functional testing on a digital signal processor (DSP), the high-performance dedicated chip prototype development platform system can first generate multiple test cases corresponding to different functions of the DSP based on the received test instructions. Then, it can execute these multiple test cases using the aforementioned first project file to obtain the execution results corresponding to each test case. This allows the system to determine whether the first project file can successfully execute the corresponding test cases. If it can, meaning the execution result shows that the first project file successfully executed multiple test cases, then the test result indicates that the DSP is currently running normally and there are no abnormalities. If it cannot, meaning the execution result shows that the first project file did not successfully execute all the test cases, then the DSP is currently experiencing an abnormality. In this case, to facilitate user viewing, the high-performance dedicated chip prototype development platform system can also determine the functions corresponding to the currently unexecuted test cases and then output prompt information in a preset operation interface to inform the user of relevant information about the abnormal functions of the DSP.

[0048] Furthermore, multiple test cases are executed based on the first project file to obtain the execution results of multiple test cases, including: executing the first test case among the multiple test cases based on the first project file to obtain the execution result of the first test case, wherein the first test case is used to represent any one of the multiple test cases; in response to the execution result of the first test case indicating that the first project file has successfully executed the first test case, the step of executing the second test case among the multiple test cases based on the second project file is repeated until the first project file has successfully executed the multiple test cases, wherein the second test case is used to represent the test cases other than the first test case among the multiple test cases.

[0049] In one optional embodiment, when executing multiple test cases using the first project file, the testing order of these test cases can be determined first. For example, the priority of different test cases can be determined based on information such as the time of test case generation and the amount of data in the test cases. Then, these multiple test cases are executed sequentially according to the determined priority. For example, the first test case can be determined from the multiple test cases based on the priority, and then the first test case can be executed using the first project file to obtain the execution result corresponding to the first test case. After the execution result shows that the first test case has been successfully executed by the first project file, the high-performance dedicated chip prototype development platform system can repeat the above process to continue selecting the second test case from the multiple test cases and executing the second test case using the first project file, until all test cases have been executed. At this time, the high-performance dedicated chip prototype development platform system can obtain the execution results corresponding to each test case. It should be noted that the above process of selecting the first and second test cases by setting priorities is only an exemplary demonstration. In addition, the test cases can also be selected by traversal, polling, random selection, etc., which can be set by the user and are not limited here. In one optional embodiment, to improve the efficiency of transmitting abnormal functions of the digital signal processor, the second test case can be selected and executed only if the execution result of the first test case is that the first project file successfully executes the first test case. If the execution result of the first test case is that the first project file fails to execute the first test case, the high-performance dedicated chip prototype development platform system can promptly determine the function corresponding to the first test case and determine that the function may be abnormal. After marking the function, the second test case can be selected and executed. Users can quickly view the functions that may be abnormal based on the marking of different functions.

[0050] Furthermore, in response to the execution result of the first test case indicating that the first engineering file failed to execute the first test case, the method further includes: sending a prompt message to a computer terminal, wherein the prompt message is used to indicate that there is an abnormality in the digital signal processor; receiving a second engineering file sent by the computer terminal, wherein the second engineering file is a file obtained by the computer terminal modifying the first engineering file based on the prompt message; and performing functional testing on the digital signal processor based on the test instructions and the second engineering file to obtain test results.

[0051] In one optional embodiment, if the execution result of the first test case is detected as the first project file failing to execute the first test case, the high-performance dedicated chip prototype development platform system can also send a prompt message to the computer terminal indicating that the digital signal processor may have an anomaly. The computer terminal or user can quickly determine the operating status of the digital signal processor based on the prompt message and adjust the digital signal processor for the functions that may have an anomaly, such as adjusting the aforementioned first project file to obtain a corresponding second project file. Then, the computer terminal sends the second project file to the high-altitude platform processing system. The high-altitude platform processing system can continue to test the function of the digital signal processor according to the test instructions and the second project file to obtain the corresponding test results. This realizes the operation of adjusting the digital signal processor during the functional testing of the digital signal processor, thereby improving the efficiency of building a feasible digital signal processor.

[0052] Furthermore, sending a prompt message to the computer terminal includes: sending the prompt message to the computer terminal via a debugging interface.

[0053] In one optional embodiment, the computer terminal can connect to the Palace Museum debugging interface and the high-performance dedicated chip prototype development platform system. The corresponding high-performance dedicated chip prototype development platform system can send the prompt information to the computer terminal through the debugging result.

[0054] Furthermore, connecting the high-performance application-specific chip (ASIC) prototype development platform system to the central processing unit (CPU) includes: connecting the high-performance ASIC prototype development platform system to the CPU via a peripheral component interconnection fast channel.

[0055] In one optional embodiment, in order to ensure the stability of the connection between the high-performance dedicated chip prototype development platform system and the central processing unit and the data transmission efficiency, the high-performance dedicated chip prototype development platform system and the central processing unit can be connected through the aforementioned peripheral component interconnection fast channel.

[0056] Furthermore, receiving the first engineering file of the digital signal processor sent by the computer terminal includes: receiving the first engineering file sent by the computer terminal via a universal serial bus.

[0057] In one optional embodiment, a universal serial bus can be deployed between the computer terminal and the high-performance dedicated chip prototype development platform system. The computer terminal can send the first project file to the high-performance dedicated chip prototype development platform system through the universal serial bus to improve the stability of the first project file during transmission.

[0058] Furthermore, the serial port and network port of the central processing unit are connected to the computer terminal, and the central processing unit has a replaced version of the system burned into it.

[0059] In one optional embodiment, the CPU and computer terminal can be connected via the CPU's serial port and network port, allowing the user to flash a new version of the system onto the CPU via the computer terminal. This improves the compatibility and connectivity between the CPU and the computer terminal, and allows the CPU to store and manage information such as test instructions and test cases corresponding to the digital signal processors that need to be tested.

[0060] For ease of understanding, Figure 2 This is a schematic diagram illustrating the functional testing principle of a digital signal processor according to this application, such as... Figure 2 As shown, the computer terminal PC is connected to the high-performance application-specific chip (ASIC) prototype development platform system HAPS via a serial bus (USB) and a test interface (JTAG). The ASIC system HAPS is connected to the central processing unit (CPU) via a peripheral component interconnect (PCIE) fast channel. The CPU includes a network interface (NI), a serial port (SP), a PCIE interface, and a memory module (DDR). The CPU is connected to the computer terminal PC via the network interface (NI) and the serial port (SP).

[0061] Figure 3 This is a schematic diagram illustrating a functional testing process for a digital signal processor according to an embodiment of this application, such as... Figure 3As shown, taking the testing of the CVDSP module in ADAS as an example, when testing the function of the digital signal processor, the high-performance dedicated chip prototype development platform system can be started first, and the central processing unit, the high-performance dedicated chip prototype development platform system and the computer terminal can be connected accordingly. Then, the blank chip is programmed and the software version is replaced for the central processing unit, and the project file corresponding to the CVDSP module is downloaded to the high-performance dedicated chip prototype development platform system. After receiving the test command, the high-performance dedicated chip prototype development platform system can generate multiple test cases accordingly, and execute the first test case among these multiple test cases through the project file to obtain the corresponding execution result. If the execution result of the first test case is that it is not executed successfully, the problem of the CVDSP module can be reported to the computer terminal according to the execution result, and the project file can be modified according to the problem. Then, the modified project file is resent to the high-performance dedicated chip prototype development platform system, and then the next test case is executed. When all test cases are executed successfully, the corresponding test results can be output to confirm that the different functions of the CVDSP module can operate normally.

[0062] Example 2

[0063] According to another aspect of the present invention, a functional testing system for a digital signal processor is also provided. Figure 4 This is a structural block diagram of a functional testing system for a digital signal processor according to an embodiment of this application, such as... Figure 4 As shown, the system includes: a central processing unit 402, a high-performance dedicated chip prototype development platform system 404, and a computer terminal 406.

[0064] The central processing unit 402 is connected to the high-performance dedicated chip prototype development platform system 404 and is used to send test commands to the high-performance dedicated chip prototype development platform system. The computer terminal 406 is connected to the high-performance dedicated chip prototype development platform system 404 and is used to send the first project file of the digital signal processor. The first project file is used to simulate the digital signal processor. The high-performance dedicated chip prototype development platform system is used to perform functional tests on the digital signal processor based on the test commands and the first project file to obtain the test results of the digital signal processor under test. The test results are used to characterize whether there is any abnormality in the digital signal processor.

[0065] Furthermore, the central processing unit is deployed separately on the circuit board, which also has a first interface. The first interface is connected to the second interface of the central processing unit and the high-performance dedicated chip prototype development platform system. A peripheral component interconnection fast channel is established between the first interface and the second interface, which is used to transmit test commands.

[0066] Furthermore, a third interface and a memory are also deployed on the circuit board. The third interface includes a network port and a serial port. The third interface is connected to the central processing unit and the computer terminal. The memory is connected to the central processing unit. The third interface is used to transmit the system after version replacement to the central processing unit. The memory is used to store the system after version replacement.

[0067] Furthermore, the high-performance dedicated chip prototype development platform system is connected to a computer terminal via a universal serial bus and a debugging interface. The universal serial bus is used to transmit the first project file to the high-performance dedicated chip prototype development platform system, and the debugging interface is used to transmit prompt information to the computer terminal in the event of an anomaly in the digital signal processor.

[0068] Example 3

[0069] Embodiments of this application also provide an electronic device, including: a memory storing an executable program; and a processor for running the program, wherein the program executes the methods in various embodiments of the present invention during runtime.

[0070] Example 4

[0071] Embodiments of this application also provide a computer-readable storage medium including a stored executable program, wherein, when the executable program is running, it controls the device where the computer-readable storage medium is located to perform the methods of various embodiments of the present invention.

[0072] Example 5

[0073] Embodiments of this application also provide a computer program product, including a computer program that, when executed by a processor, implements the methods of various embodiments of the present invention.

[0074] Example 6

[0075] Embodiments of this application also provide a computer program product, including a non-volatile computer-readable storage medium for storing a computer program that, when executed by a processor, implements the methods in various embodiments of the present invention.

[0076] Example 7

[0077] Embodiments of this application also provide a computer program that, when executed by a processor, implements the methods described in the various embodiments of the present invention.

[0078] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0079] In the above embodiments of the present invention, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0080] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some interfaces; indirect couplings or communication connections between units or modules may be electrical or other forms.

[0081] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0082] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0083] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer terminal (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0084] The above are merely preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method of functional testing of a digital signal processor, characterized by, The method is applied to a high-performance application-specific chip prototype development platform system, and the method comprises the following steps: connecting the high-performance application-specific chip prototype development platform system with a central processing unit; receiving a first engineering file of a digital signal processor sent by a computer terminal, wherein the first engineering file is used for simulating the digital signal processor; in response to receiving a test instruction sent by the central processing unit, performing a function test on the digital signal processor based on the test instruction and the first engineering file to obtain a test result of the digital signal processor to be tested, wherein the test result is used for representing whether the digital signal processor is abnormal; performing a function test on the digital signal processor based on the test instruction and the first engineering file to obtain a test result of the digital signal processor to be tested, comprising: generating a plurality of test cases based on the test instruction, wherein different test cases are used for testing different functions of the digital signal processor; executing the plurality of test cases based on the first engineering file to obtain an execution result of the plurality of test cases, wherein the execution result is used for representing whether the first engineering file successfully executes the corresponding test case, and the first engineering file simulates the function of the digital signal processor through file parameters; and determining the test result based on the execution result; a serial port and a network port of the central processing unit are connected with the computer terminal, and a version-replaced system is burned in the central processing unit, wherein the version-replaced system is burned into the central processing unit through the computer terminal.

2. The method of claim 1, wherein, determining the test result based on the execution result, comprising: in response to the execution result representing that the first engineering file successfully executes the plurality of test cases, determining that the test result is that the digital signal processor is not abnormal; in response to the execution result of any one test case representing that the first engineering file does not successfully execute the any one test case, determining that the test result is that the digital signal processor is abnormal.

3. The method of claim 1, wherein, executing the plurality of test cases based on the first engineering file to obtain an execution result of the plurality of test cases, comprising: executing a first test case in the plurality of test cases based on the first engineering file to obtain an execution result of the first test case, wherein the first test case is used for representing any one test case in the plurality of test cases; in response to the execution result of the first test case representing that the first engineering file successfully executes the first test case, repeatedly executing the step of executing a second test case in the plurality of test cases based on a second engineering file until the first engineering file successfully executes the plurality of test cases, wherein the second test case is used for representing a test case in the plurality of test cases except the first test case.

4. The method of claim 3, wherein, in response to the execution result of the first test case representing that the first engineering file does not successfully execute the first test case, the method further comprises: sending prompt information to the computer terminal, wherein the prompt information is used for prompting that the digital signal processor is abnormal; receive a second engineering file sent by the computer terminal, wherein the second engineering file is a file obtained by modifying the first engineering file based on the prompt information by the computer terminal; perform a function test on the digital signal processor based on the test instruction and the second engineering file to obtain the test result.

5. The method of claim 4, wherein, send prompt information to the computer terminal, including: send the prompt information to the computer terminal through the debugging interface.

6. The method according to any one of claims 1 to 5, characterized in that, connect the high-performance special-purpose chip prototype development platform system with the central processing unit, including: connect the high-performance special-purpose chip prototype development platform system with the central processing unit through the peripheral component interconnect express.

7. The method according to any one of claims 1 to 5, characterized in that, receive a first engineering file of a digital signal processor sent by a computer terminal, including: receive the first engineering file sent by the computer terminal through the universal serial bus.

8. A functional test system for a digital signal processor, characterized by, The system comprises: a central processing unit connected with a high-performance special-purpose chip prototype development platform system, configured to send a test instruction to the high-performance special-purpose chip prototype development platform system, a serial port and a network port of the central processing unit are connected with a computer terminal, a version-replaced system is burned in the central processing unit, and the version-replaced system is burned in the central processing unit through the computer terminal; a computer terminal connected with the high-performance special-purpose chip prototype development platform system, configured to send a first engineering file of a digital signal processor, wherein the first engineering file is used to simulate the digital signal processor The high-performance special-purpose chip prototype development platform system is configured to perform a function test on the digital signal processor based on the test instruction and the first engineering file to obtain a test result of the digital signal processor to be tested, wherein the test result is used to represent whether the digital signal processor is abnormal. The high-performance special-purpose chip prototype development platform system is further configured to generate a plurality of test cases based on the test instruction, wherein different test cases are used to test different functions of the digital signal processor, execute the plurality of test cases based on the first engineering file to obtain execution results of the plurality of test cases, wherein the execution results are used to represent whether the first engineering file successfully executes the corresponding test cases, the first engineering file simulates the functions of the digital signal processor through file parameters, and determine the test result based on the execution results.

9. The system of claim 8, wherein, The central processing unit is separately deployed on a circuit board, a first interface is further deployed on the circuit board, the first interface is connected with a second interface of the central processing unit and the high-performance special-purpose chip prototype development platform system, a peripheral component interconnect express is established between the first interface and the second interface, and the peripheral component interconnect express is used to transmit the test instruction.

10. The system of claim 9, wherein, The circuit board is also disposed with a third interface and a memory, the third interface comprises a network port and a serial port, the third interface is connected with the central processor and the computer terminal, the memory is connected with the central processor, the third interface is used for transmitting the version-replaced system to the central processor, and the memory is used for storing the version-replaced system.

11. The system of claim 8, wherein, The high-performance special chip prototype development platform system is connected with the computer terminal through a universal serial bus and a debugging interface, the universal serial bus is used for transmitting the first engineering file to the high-performance special chip prototype development platform system, and the debugging interface is used for transmitting prompt information to the computer terminal in the case that the digital signal processor has an exception.

12. An electronic device, comprising: Comprising: a memory storing an executable program; a processor configured to execute the program, wherein the program, when executed, performs the method of any one of claims 1 to 7.

13. A computer-readable storage medium, characterized in that, The computer-readable storage medium comprises a stored executable program, wherein the executable program, when executed, controls a device in which the storage medium is located to perform the method of any one of claims 1 to 7.

14. A computer program product, characterised in that, A computer program, which, when executed by a processor, implements the method of any one of claims 1 to 7.

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