A high-dimensional photonic neural network computing device and method based on wavelength division multiplexing

Abstract

The present application discloses a high-dimensional photonic neural network computing device and method based on wavelength division multiplexing, which relates to the field of photonic neural network computing. The device includes an FPGA control system, a multi-wavelength laser generating component, an on-chip integrated optical neural network component, a wavelength division multiplexing system, and a high-speed detection system; the on-chip integrated optical neural network component interacts with the FPGA control system and performs network training, modulates the received power-amplified light, and performs optical matrix multiplication and addition calculations on the data to be measured based on the trained fully connected neural network; the modulation signal is determined based on the trained convolution data; the wavelength division multiplexing system separates the multi-wavelength lasers in the result optical signal; the high-speed detection system determines the output power ratio of the separated laser signals of different wavelengths; and the FPGA control system determines the classification results of the lasers of different wavelengths for the data to be measured. The present application significantly improves the computing power while realizing the accurate calculation of the photonic neural network system.

Description

Technical Field

[0001] The present application relates to the field of photonic neural network computing, and in particular to a high-dimensional photonic neural network computing device and method based on wavelength division multiplexing. Background Art

[0002] The information age has put forward higher requirements on the computing power of computing chips, but the computing power of integrated electronic chips is difficult to further improve due to the limitations of electromagnetic crosstalk and the intrinsic propagation speed of electrons. Integrated photonic computing chips can effectively solve the problem of limited computing power of current electronic chips, and the improvements they bring mainly include four aspects: first, the propagation speed of photons is much faster than that of electrons. When completing the entire computing process, the delay it brings is only in the order of ps, which is much lower than the delay of the order of ns introduced by electrical chips; second, photons have rich dimensions, such as wavelength, polarization and orbital angular momentum. At present, in the field of communications, based on wavelength multiplexing, polarization multiplexing and mode multiplexing, demonstrations of communication systems of the order of 100Pbit / s have been demonstrated. In the field of photonic computing chips, photonic computing chips based on wavelength multiplexing and mode multiplexing have also emerged, which effectively improve computing power; third, photons of different frequencies have no obvious electromagnetic crosstalk, and photonic devices have a large transmission bandwidth, which can better support the propagation of parallel and high-bandwidth signals; fourth, lower thermal effect; in photonic computing chips, photons completing the computing process will lead to less heat generation, which can effectively solve the problem of heat dissipation that needs to be introduced when electronic chips are integrated on a large scale.

[0003] In 2017, Shen Yichen and others from the Massachusetts Institute of Technology realized language processing and classification of photonic neural networks based on the Mach-Zehnder (MZI) network. After that, the photonic neural network demonstrated based on the MZI network entered a period of rapid development. At present, the computing power of photonic neural networks demonstrated based on the MZI network is mostly limited to a few TOPS or tens of TOPS, while in the future big data will usually require the computing power of photonic computing chips to reach hundreds of TOPS. How to improve the computing power of photonic computing chips based on the MZI network has become an important research direction. Summary of the invention

[0004] The purpose of this application is to provide a high-dimensional photonic neural network computing device and method based on wavelength division multiplexing, which can significantly improve the computing power while realizing accurate calculation of the photonic neural network system.

[0005] To achieve the above objectives, this application provides the following solutions:

[0006] In the first aspect, the present application provides a high-dimensional photonic neural network computing device based on wavelength division multiplexing, including an FPGA control system and a multi-wavelength laser generation component, an on-chip integrated optical neural network component, a wavelength division multiplexing system, and a high-speed detection system arranged in sequence;

[0007] The multi-wavelength laser generating component is used to: generate multi-wavelength laser according to the laser generating instruction issued by the FPGA control system, and then amplify the power of the light according to the amplification instruction issued by the FPGA control system;

[0008] The on-chip integrated optical neural network component is used to: interact with the FPGA control system and conduct network training to determine the trained fully connected neural network and the convolution data in the FPGA control system; modulate the received power-amplified light according to the modulation signal sent by the FPGA control system to load the data to be tested; perform optical matrix multiplication and addition calculations on the data to be tested based on the trained fully connected neural network to obtain a result optical signal; wherein the modulation signal sent by the FPGA control system is determined based on the trained convolution data;

[0009] The wavelength division multiplexing system is used to separate the multi-wavelength lasers in the result optical signal; the high-speed detection system is used to determine the output power ratio of the laser signals with different wavelengths after separation;

[0010] The FPGA control system is also used to classify the received laser signals of different wavelengths according to their output power ratios, so as to obtain classification results of the data to be measured by laser signals of different wavelengths.

[0011] In a second aspect, the present application provides a high-dimensional photonic neural network computing method based on wavelength division multiplexing, which is applied to the high-dimensional photonic neural network computing device based on wavelength division multiplexing, and the method includes:

[0012] A multi-wavelength laser generating component is used to generate a multi-wavelength laser according to a laser generating instruction issued by an FPGA control system, and then amplifies the power of the light according to an amplification instruction issued by the FPGA control system;

[0013] Using an on-chip integrated optical neural network component to interact with the FPGA control system and perform network training to determine a trained fully connected neural network and convolution data within the FPGA control system;

[0014] The on-chip integrated optical neural network component is used to modulate the received power-amplified light according to the modulation signal sent by the FPGA control system to load the data to be tested; the modulation signal sent by the FPGA control system is determined based on the trained convolution data;

[0015] Using the on-chip integrated optical neural network component to perform optical matrix multiplication and addition calculations on the data to be tested based on the trained fully connected neural network to obtain a result optical signal;

[0016] A wavelength division multiplexing system is used to separate the multi-wavelength lasers in the result optical signal, and a high-speed detection system is used to determine the output power ratio of the laser signals with different wavelengths after separation;

[0017] The FPGA control system is used to classify the laser signals of different wavelengths according to their output power ratios, so as to obtain classification results of the data to be measured by lasers of different wavelengths.

[0018] According to the specific embodiments provided in the present application, the present application discloses the following technical effects: the present application provides a high-dimensional photonic neural network computing device and method based on wavelength division multiplexing, which can fully realize the calculation of the high-dimensional photonic neural network through the collaboration of the FPGA control system and the multi-wavelength laser generation component, the on-chip integrated optical neural network component, the wavelength division multiplexing system, and the high-speed detection system arranged in sequence; the on-chip integrated optical neural network component is combined with the FPGA control system for interaction and network training, the trained fully connected neural network and the convolution data in the FPGA control system are determined, and relevant calculations are performed based on this, which can ensure the calculation accuracy of the high-dimensional photonic neural network; finally, the MZI network (which includes multiple MZI components) in the on-chip integrated optical neural network component is combined with the wavelength division multiplexing system (which includes multiple wavelength multiplexing channels) in the present application, which can significantly improve the computing power of the semiconductor photonic neural network system. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0020] Figure 1 A schematic diagram of the structure of a high-dimensional photonic neural network computing device based on wavelength division multiplexing provided in one embodiment of the present application.

[0021] Figure 2 A schematic diagram of the structure of a light source with a wavelength interval of 0.4 nm provided in one embodiment of the present application.

[0022] Figure 3 A structural diagram of a silicon-based MZI network provided in one embodiment of the present application.

[0023] Figure 4 A brief flowchart of the training provided in one embodiment of the present application.

[0024] Figure 5 The data classification results of MNIST at different wavelengths provided by an embodiment of the present application.

[0025] Figure 6 A schematic flow chart of a high-dimensional photonic neural network calculation method based on wavelength division multiplexing provided in another embodiment of the present application.

[0026] Reference numerals:

[0027] 1-light source, 2-power amplification system, 3-high-speed optical modulator, 4-on-chip integrated optical neural network system, 5-wavelength division multiplexing system, 6-high-speed detection system, 7-FPGA control system, 21-single-frequency laser, 22-erbium-doped fiber amplifier, 23-microring resonator. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0029] Usually, the computing power of a photonic computing chip (C) is mainly determined by the dimension of photons processed (D), the number of multiplications and additions (MAC) of the photonic computing chip matrix, and the rate of signal loading (M), that is: C = D × MAC × M. At present, the rate of signal loading depends on the rate of electrical components, and the number of multiplications and additions of the photonic computing chip matrix depends on the size of the matrix. Therefore, increasing the dimension of photonic chips processing photons provides a new way to increase photonic computing power. At present, on-chip mode multiplexing and polarization multiplexing still have the disadvantage of few dimensions, and the chip computing power is difficult to further improve. Wavelength multiplexing can support the multiplexing and demultiplexing of hundreds of frequency components, which can effectively improve the computing power of photonic computing chips. Therefore, the high-dimensional photonic computing chip computing power based on wavelength multiplexing to achieve hundreds of TPOS computing power has become an important technical support.

[0030] Based on this, the present application provides a high-dimensional photonic neural network computing device and method based on wavelength division multiplexing, which solves the problem of insufficient computing power provided by a single MZI network, effectively promotes the photonic network accelerator with a computing power of 100 TOPS, and is expected to promote the photonic neural network processing system with a computing power of 100 TOPS, providing technical support for future large-capacity data parallel processing and data centers. At the same time, with the increase in the scale of the MZI network and the increase in the number of multiplexed wavelengths, it is expected that the system will reach POPS computing power in the future. The invention is simple to operate and has great flexibility, and can meet the application needs of scientific research, engineering and other related fields.

[0031] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0032] In an exemplary embodiment, Figure 1 As shown, a high-dimensional photonic neural network computing device based on wavelength division multiplexing is provided, including an FPGA control system 7 and a multi-wavelength laser generating component, an on-chip integrated optical neural network component, a wavelength division multiplexing system 5, and a high-speed detection system 6 arranged in sequence. The multi-wavelength laser generating component includes a light source 1 and a power amplification system 2 arranged in sequence; the on-chip integrated optical neural network component includes a high-speed optical modulator 3 and an on-chip integrated optical neural network system 4 arranged in sequence.

[0033] The multi-wavelength laser generating component is used to generate multi-wavelength laser according to the laser generating instruction issued by the FPGA control system 7, and then amplify the power of the light according to the amplification instruction issued by the FPGA control system 7.

[0034] Specifically, for the light source 1, the light source 1 is used to: receive the laser generation instruction issued by the FPGA control system 7, and generate a multi-wavelength laser according to the laser generation instruction. The frequency interval of the multi-wavelength laser obtained by the light source 1 is 50GHz, and its central wavelength can be 1560.2nm, which can be achieved by setting the radius of the micro-ring. In a practical application, if Figure 2 As shown, the light source 1 includes a single-frequency laser 21, an erbium-doped fiber amplifier 22 and a micro-ring resonant cavity 23 arranged in sequence; the single-frequency laser 21 has a central wavelength of 1560.2nm and a line width of 100kHz, and is used to generate a seed laser, which is used as the basis for the subsequent generation of multi-wavelength lasers. The erbium-doped fiber amplifier 22 is used to: amplify the power of the seed laser and then send it to the micro-ring resonant cavity 23; wherein the amplification multiple needs to ensure that its power can meet the threshold requirements for multi-wavelength generation. The micro-ring resonant cavity 23 is a silicon-modified material micro-ring resonant cavity, the structure is an add-drop structure, the radius is about 592 microns, the micro-ring resonant cavity 23 is encapsulated in a shell, and can be flexibly controlled by external temperature control. The micro-ring resonant cavity 23 is used to: receive the laser generation instruction issued by the FPGA control system 7, and adjust the temperature of the environment where the power-amplified seed laser is located according to the laser generation instruction to generate an optical frequency comb; the optical frequency comb includes multi-wavelength lasers arranged at equal intervals, and the frequency interval of each comb tooth is 50GHz.

[0035] As for the power amplifier system 2, the power amplifier system 2 is an erbium-doped fiber amplifier, which has an internal integrated isolator and an optical Bragg grating, and is used to: receive the amplification instruction issued by the FPGA control system 7, and after filtering out the pump laser in the multi-wavelength laser, perform light power amplification according to the amplification instruction. In practical applications, the drop end of the micro-ring resonator 23 is connected to the input end of the power amplifier system 2 of the multi-wavelength laser.

[0036] The on-chip integrated optical neural network component is used to: interact and train the network with the FPGA control system 7 to determine the trained fully connected neural network and the convolution data in the FPGA control system 7; modulate the received power-amplified light according to the modulation signal emitted by the FPGA control system 7 to load the data to be tested; based on the trained fully connected neural network, perform optical matrix multiplication and addition calculations on the data to be tested to obtain a result optical signal; wherein the modulation signal emitted by the FPGA control system is determined based on the trained convolution data.

[0037] Specifically, the high-speed optical modulator 3 is required to have approximately the same half-wave voltage and a relatively high modulation bandwidth within a certain wavelength range, and is a silicon-based intensity modulator; the high-speed optical modulator 3 is used to: receive the modulation signal sent by the FPGA control system 7; modulate the received power-amplified light according to the modulation signal to load the data to be tested. Since the loading method is mainly based on intensity coding, the data value of the intensity coding can only be between 0 and 1, and the high-speed optical modulator 3 specifically includes:

[0038] The receiving module is used to receive the modulation signal in the form of intensity coding sent by the FPGA control system; the data value range of the intensity coding is 0-1. The intensity modulation module is used to adjust the light intensity ratio according to the ratio of the intensity coding value corresponding to the modulation signal in the range of 0-1; when the value of the intensity coding is 0, no light is passed; when the value of the intensity coding is 1, light is passed according to the maximum intensity; wherein the light output by the intensity modulation module is the data to be measured.

[0039] The on-chip integrated optical neural network system 4 is used to: perform optical matrix multiplication and addition calculations on the data to be tested based on a fully connected neural network to obtain a result optical signal. Specifically, the on-chip integrated optical neural network system 4 includes a silicon-based MZI network, such as Figure 3 As shown, the network matrix size is a 12*12 matrix; the silicon-based MZI network includes multiple MZI devices, and the silicon-based MZI network is programmed by carrier tuning to be characterized as a fully connected neural network. The schematic diagram of the matrix training process is as follows Figure 4As shown, at the same time, the coupler in a single MZI device partially maintains the 50:50 power splitting function within the 100nm wavelength range. Among them, the convolution data (or convolution layer matrix) is determined on the FPGA control system 7, and the data after convolution processing is loaded into the silicon-based intensity modulator (i.e., the high-speed optical modulator 3, whose data loading rate is 20Gbit / s), and the matrix multiplication and addition calculation is completed in the MZI network (which is a fully connected layer matrix, specifically by programming the MZI network to realize the matrix multiplication and addition calculation), and the nonlinear layer calculation is completed in the FPGA control system 7, and the nonlinear function is the sigmond function; the specific training process of the convolution data (or convolution layer matrix) and the fully connected layer matrix mentioned above is as described in the example of the method below, and will not be described in detail here.

[0040] The wavelength division multiplexing system 5 is used to separate the multi-wavelength laser in the resulting optical signal, wherein the central wavelength is 1560.2nm and the wavelength division multiplexing frequency interval is 50GHz; the high-speed detection system 6 is used to determine the output power ratio of laser signals of different wavelengths after separation, specifically to determine the output power ratio of different wavelengths at different ports of the on-chip integrated optical neural network system.

[0041] The FPGA control system 7 is also used to classify the received laser signals of different wavelengths according to their output power ratios, so as to obtain the classification results of the data to be tested by lasers of different wavelengths. In a specific application example, the FPGA control system 7 realizes the matrix tuning and temperature control of the on-chip integrated optical neural network system 4 to ensure the stable and efficient operation of the chip; the FPGA control system 7 also performs analog-to-digital conversion on the data to be tested, so as to demonstrate the classification results. Figure 5 As shown, the data classification results of MNIST at different wavelengths are shown. It can be found that the recognition rate of the number 1 at each wavelength is basically the same, which proves that the entire device has a large wavelength transmission bandwidth.

[0042] Based on the same inventive concept, the embodiment of the present application also provides a high-dimensional photonic neural network computing method based on wavelength division multiplexing, which is applied to the high-dimensional photonic neural network computing device based on wavelength division multiplexing. The implementation scheme for solving the problem provided by the method is similar to the implementation scheme recorded in the above-mentioned device. Therefore, some specific limitations in the method embodiment provided below can refer to the limitations on the device above, and will not be repeated here. In an exemplary embodiment, Figure 6 As shown, a high-dimensional photonic neural network calculation method based on wavelength division multiplexing is provided, including the following steps 100-600.

[0043] In practical applications, before executing step 100, you first need to follow Figure 1Assemble a high-dimensional photonic neural network computing device based on wavelength division multiplexing, then turn on the single-frequency laser 21, set the central wavelength to 1560.2nm, set the power of the erbium-doped optical amplifier 22 to 2W, and tune the working temperature of the microring resonator 23 to enable it to generate a low-noise multi-wavelength light source; turn on the power amplification system 2 so that it can amplify the multi-wavelength frequency components except the pump laser, and the power of the multi-wavelength light source is amplified to 100mW, which can ensure the power amplification of wavelengths in the 40nm range.

[0044] Step 100, using a multi-wavelength laser generating component to generate a multi-wavelength laser according to a laser generating instruction issued by an FPGA control system, and then amplifying the power of the light according to an amplification instruction issued by the FPGA control system.

[0045] Step 200, using an on-chip integrated optical neural network component to interact and train the network with the FPGA control system to determine the trained fully connected neural network and the convolution data in the FPGA control system; the on-chip integrated optical neural network component includes a high-speed optical modulator and an on-chip integrated optical neural network system arranged in sequence.

[0046] Step 300, using the on-chip integrated optical neural network component to modulate the received power-amplified light according to the modulation signal emitted by the FPGA control system to load the data to be tested; the modulation signal emitted by the FPGA control system is determined based on the trained convolution data.

[0047] Step 400, using the on-chip integrated optical neural network component to perform optical matrix multiplication and addition calculations on the data to be tested based on the trained fully connected neural network to obtain a result optical signal.

[0048] Step 500: Use a wavelength division multiplexing system to separate the multi-wavelength lasers in the result optical signal, and use a high-speed detection system to determine the output power ratio of the separated laser signals with different wavelengths.

[0049] Step 600: using the FPGA control system to classify the laser signals of different wavelengths according to their output power ratios, so as to obtain classification results of the laser signals of different wavelengths for the data to be measured.

[0050] It should be noted that the above steps 100 to 600 are the use process of the device after the data are complete, and before use, the network data and convolution data therein need to be trained, that is, in an application example, the training process in step 200 specifically includes:

[0051] (1) The FPGA control system is used to obtain a training data set; the training data set includes multiple numbers to be tested and the expected output value of each number to be tested; in an application example, the numbers to be tested are 0-9, the expected output port value corresponding to number 0 (i.e., the expected output value) is (1,0,0,0,0,0,0,0,0,0), the expected output port value corresponding to number 1 (i.e., the expected output value) is (0,1,0,0,0,0,0,0,0,0,0), the expected output port value corresponding to number 2 (i.e., the expected output value) is (0,0,1,0,0,0,0,0,0,0,0), ..., the expected output port value corresponding to number 9 (i.e., the expected output value) is (0,0,0,0,0,0,0,0,0,1).

[0052] (2) Input any number to be tested into the single-layer convolutional neural network layer in the FPGA control system for convolution processing to obtain a training modulation signal; in practical applications, the database of 0-9 numbers is used, the size of a single number is a matrix of 5 rows and 6 columns, the convolution kernel uses a matrix of 3 rows and 3 columns, the step size is 1, and the pooling layer uses average pooling. The matrix of the original number is converted into a matrix of 4 rows and 3 columns, and the newly obtained matrix is ​​converted into a vector of 12 rows and 1 column. This vector is used as a training modulation signal, and then loaded into the on-chip integrated optical neural network system through a high-speed optical modulator to complete the corresponding calculation.

[0053] (3) Inputting the training modulated signal into the high-speed optical modulator to load and obtain training data; performing optical matrix multiplication and addition calculations on the training data based on the fully connected network layer in the on-chip integrated optical neural network system to obtain a training result optical signal.

[0054] (4) The FPGA control system is used to obtain the output power ratio of laser signals of different wavelengths corresponding to the training result optical signal, and nonlinear processing is performed to obtain the training classification results of laser signals of different wavelengths for the digital number to be tested. The nonlinear activation function uses the sigmond function. In practical applications, the training classification results are characterized by the voltage index ratio of each port.

[0055] (5) In combination with the expected output value of the digital number to be tested, determine whether the training classification result meets the preset conditions; in the specific application example, the training algorithm adopted is the gradient descent algorithm, and the objective function is set to count the voltage index ratios of each port after nonlinear calculation. On this basis, the preset conditions are set as follows: the training is considered to be completed when the real voltage index ratio and the calculated one are within a certain error range or the recognition rate reaches a certain error range.

[0056] (6) If the preset conditions are met, the training is stopped, and the structural parameters of the single-layer convolutional neural network layer are used as the trained convolution data, and the fully connected network layer is used as the trained fully connected neural network.

[0057] (7) If the preset conditions are not met, the structural parameters of the single-layer convolutional neural network layer are adjusted, the parameters of the fully connected network layer are adjusted, and then the process returns to the step of inputting any number to be tested into the single-layer convolutional neural network layer in the FPGA control system for convolution processing to continue iterative training.

[0058] In addition, the wavelength division multiplexing system can also be used to count the classification of the data to be measured at each wavelength. Through calculation, it can be known that within the 40nm wavelength range, its computing power can reach 100×20e 9 ×12×12×2=576TOPS. With the increase of reuse dimension, its core computing power is expected to exceed 1000TOPS. Figure 5 As shown, the recognition rate of the number 1 is the same for each wavelength.

[0059] Compared with the prior art, this application has the following advantages:

[0060] (1) Generally, the computing power of a single photonic neural network chip is usually difficult to exceed 100 TOPS. The photonic computing system described in this application can break through the computing power limitation based on wavelength multiplexing. Its computing power limitation mainly depends on the limit on the number of loaded wavelengths.

[0061] (2) The device of the present application is compatible with the wavelength division multiplexing system of current communications and can be effectively used for parallel processing of future large-capacity communications and data centers.

[0062] (3) While improving computing power, this application ensures the simplicity of the system and avoids the difficulties in controlling and manufacturing large-scale photonic devices.

[0063] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0064] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, according to the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A high-dimensional photonic neural network computing device based on wavelength division multiplexing, characterized in that: The high-dimensional photonic neural network computing device based on wavelength division multiplexing includes an FPGA control system and a multi-wavelength laser generation component, an on-chip integrated optical neural network component, a wavelength division multiplexing system, and a high-speed detection system arranged in sequence; The multi-wavelength laser generating component is used to: generate multi-wavelength laser according to the laser generating instruction issued by the FPGA control system, and then amplify the power of the laser according to the amplification instruction issued by the FPGA control system; The on-chip integrated optical neural network component is used to: interact with the FPGA control system and conduct network training to determine the trained fully connected neural network and the convolution data in the FPGA control system; modulate the received power-amplified laser according to the modulation signal sent by the FPGA control system to load the data to be tested; perform optical matrix multiplication and addition calculations on the data to be tested based on the trained fully connected neural network to obtain a result optical signal; wherein the modulation signal sent by the FPGA control system is determined based on the trained convolution data; The wavelength division multiplexing system is used to separate the multi-wavelength lasers in the result optical signal; the high-speed detection system is used to determine the output power ratio of the laser signals with different wavelengths after separation; The FPGA control system is also used to classify the received laser signals of different wavelengths according to their output power ratios, so as to obtain classification results of the data to be measured by laser signals of different wavelengths.

2. The high-dimensional photonic neural network computing device based on wavelength division multiplexing according to claim 1, characterized in that: The multi-wavelength laser generating assembly includes a light source and a power amplification system arranged in sequence; The light source is used to: receive a laser generation instruction issued by the FPGA control system, and generate a multi-wavelength laser according to the laser generation instruction; The power amplification system is used to receive an amplification instruction issued by the FPGA control system, and after filtering out the pump laser in the multi-wavelength laser, perform power amplification of the laser according to the amplification instruction.

3. The high-dimensional photonic neural network computing device based on wavelength division multiplexing according to claim 2, characterized in that: The light source comprises a single-frequency laser, an erbium-doped fiber amplifier and a micro-ring resonant cavity which are arranged in sequence; The single-frequency laser is used to generate a seed laser; The erbium-doped fiber amplifier is used to: amplify the power of the seed laser and then send it to the microring resonant cavity; The microring resonant cavity is used to: receive a laser generation instruction issued by the FPGA control system, and adjust the temperature of the environment in which the power-amplified seed laser is located according to the laser generation instruction to generate an optical frequency comb; the optical frequency comb includes multi-wavelength lasers arranged at equal intervals.

4. The high-dimensional photonic neural network computing device based on wavelength division multiplexing according to claim 3, characterized in that: The structure of the micro-ring resonant cavity is an add-drop structure, and the micro-ring resonant cavity is packaged in a shell.

5. The high-dimensional photonic neural network computing device based on wavelength division multiplexing according to claim 1, characterized in that: The on-chip integrated optical neural network component includes a high-speed optical modulator and an on-chip integrated optical neural network system arranged in sequence; The high-speed optical modulator is used to: receive the modulation signal sent by the FPGA control system; modulate the received power-amplified laser according to the modulation signal to load the data to be tested; The on-chip integrated optical neural network system is used to perform optical matrix multiplication and addition calculations on the data to be tested based on a fully connected neural network to obtain a result optical signal.

6. The high-dimensional photonic neural network computing device based on wavelength division multiplexing according to claim 5, characterized in that: The high-speed optical modulator specifically comprises: A receiving module is used to: receive a modulated signal in the form of intensity coding sent by the FPGA control system; the data value range of the intensity coding is 0-1; The intensity modulation module is used to adjust the light intensity ratio according to the ratio of the intensity coding value corresponding to the modulation signal in the range of 0-1; when the intensity coding value is 0, no light is passed; when the intensity coding value is 1, light is passed according to the maximum intensity; Wherein, the light output by the intensity modulation module is the data to be measured.

7. The high-dimensional photonic neural network computing device based on wavelength division multiplexing according to claim 5, characterized in that: The on-chip integrated optical neural network system includes a silicon-based MZI network; the silicon-based MZI network includes multiple MZI devices, and the silicon-based MZI network is programmed by carrier tuning to be characterized as a fully connected neural network.

8. A high-dimensional photonic neural network computing method based on wavelength division multiplexing, applied to a high-dimensional photonic neural network computing device based on wavelength division multiplexing as claimed in any one of claims 1 to 7, characterized in that: The high-dimensional photonic neural network calculation method based on wavelength division multiplexing includes: A multi-wavelength laser generating component is used to generate a multi-wavelength laser according to a laser generating instruction issued by an FPGA control system, and then amplifies the power of the laser according to an amplification instruction issued by the FPGA control system; Using an on-chip integrated optical neural network component to interact with the FPGA control system and perform network training to determine a trained fully connected neural network and convolution data within the FPGA control system; The on-chip integrated optical neural network component is used to modulate the received power-amplified laser according to the modulation signal sent by the FPGA control system to load the data to be tested; the modulation signal sent by the FPGA control system is determined based on the trained convolution data; Using the on-chip integrated optical neural network component to perform optical matrix multiplication and addition calculations on the data to be tested based on the trained fully connected neural network to obtain a result optical signal; A wavelength division multiplexing system is used to separate the multi-wavelength lasers in the result optical signal, and a high-speed detection system is used to determine the output power ratio of the laser signals with different wavelengths after separation; The FPGA control system is used to classify the laser signals of different wavelengths according to their output power ratios, so as to obtain classification results of the data to be measured by lasers of different wavelengths.

9. The high-dimensional photonic neural network calculation method based on wavelength division multiplexing according to claim 8, characterized in that: The on-chip integrated optical neural network component includes a high-speed optical modulator and an on-chip integrated optical neural network system arranged in sequence; An on-chip integrated optical neural network component is used to interact with the FPGA control system and perform network training to determine the trained fully connected neural network and the convolution data in the FPGA control system, specifically including: The FPGA control system is used to obtain a training data set; the training data set includes a plurality of numbers to be tested and an expected output value of each number to be tested; Input any digital number to be tested into the single-layer convolutional neural network layer in the FPGA control system for convolution processing to obtain a training modulation signal; Inputting the training modulated signal into the high-speed optical modulator to load and obtain training data; performing optical matrix multiplication and addition calculations on the training data based on the fully connected network layer in the on-chip integrated optical neural network system to obtain a training result optical signal; The FPGA control system is used to obtain the output power ratio of laser signals of different wavelengths corresponding to the training result optical signal, and nonlinear processing is performed to obtain the training classification results of lasers of different wavelengths for the number to be tested; In combination with the expected output value of the number to be tested, determining whether the training classification result meets a preset condition; If the preset conditions are met, the training is stopped, the structural parameters of the single-layer convolutional neural network layer are used as the trained convolution data, and the fully connected network layer is used as the trained fully connected neural network; If the preset conditions are not met, the structural parameters of the single-layer convolutional neural network layer are adjusted, the parameters of the fully connected network layer are adjusted, and then the step of inputting any number to be tested into the single-layer convolutional neural network layer in the FPGA control system for convolution processing is returned to continue iterative training.

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