A method for generating target code based on pattern matching

Abstract

The present invention provides a target code generation method based on pattern matching, which matches a code block to be matched with each intermediate code pattern matching block, finds the intermediate code pattern matching block that matches the code block to be matched, generates corresponding target code based on the found intermediate code pattern matching block, realizes the mapping of the code block to be matched to the target code, obtains the required target code, can be applicable to the target machine instruction set architecture, can be recognized and executed by a computer, and in the process of generating the target code, it will also be optimized, and supports code optimization of non-continuous intermediate representations.

Description

Technical Field

[0001] The present invention relates to the field of computer language compilation, and more specifically, to a target code generation method based on pattern matching. Background Art

[0002] The code generator in the compiler takes an intermediate representation (IR) as input and maps it to target machine code. Based on the IR, the appropriate target machine instructions are selected to implement the required operations, which usually involves mapping the operations in the high-level language to the target machine instruction set architecture.

[0003] Due to the diversity of target machine instruction set architectures, improving compiler portability is one of the important issues that need to be considered in compiler design.

[0004] The target machine code can be recognized and executed by the computer. The format of the original code is diverse and cannot be directly recognized by the computer. Therefore, how to make the original code recognizable by the computer is a problem that needs to be solved. Summary of the invention

[0005] The present invention aims at solving the technical problems existing in the prior art and provides a method for generating target code based on pattern matching, comprising:

[0006] Step S1, matching the code block to be matched with each intermediate code pattern matching block, finding the intermediate code pattern matching block that matches the code block to be matched, each of the intermediate code pattern matching blocks is organized according to the intermediate code pattern matching rule;

[0007] Step S2, generating target code according to the intermediate code pattern matching rule, the target machine code pattern generation rule and the matched intermediate code pattern matching block, wherein the target code is organized according to the target machine code pattern generation rule.

[0008] The present invention provides a target code generation method based on pattern matching, which matches the code block to be matched with each intermediate code pattern matching block, finds the intermediate code pattern matching block that matches the code block to be matched, and generates the corresponding target code based on the found intermediate code pattern matching block, thereby realizing the mapping of the code block to be matched to the target code, and obtaining the required target code, which can be applicable to the target machine instruction set architecture. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 A flow chart of a method for generating target code based on pattern matching provided by the present invention;

[0010] Figure 2 It is a schematic diagram of the definition of pattern matching rule pairs;

[0011] Figure 3 The diagram is a diagram of the fma multiplication-add instruction being expanded into a multiplication mul instruction and an addition add instruction;

[0012] Figure 4 Schematic diagram of optimizing mul+add+sat instruction into mad instruction;

[0013] Figure 5 A schematic diagram of the matching process between the code block to be matched and the intermediate code pattern matching block;

[0014] Figure 6 It is a schematic diagram of the overall process of the target code generation method based on pattern matching;

[0015] Figure 7 This is a schematic diagram of the intermediate code pattern matching process;

[0016] Figure 8 It is a schematic diagram of the overall process of intermediate code pattern matching;

[0017] Fig. 9 A specific embodiment of target code generation based on pattern matching. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. In addition, the technical features in the various embodiments or single embodiments provided by the present invention can be arbitrarily combined with each other to form a feasible technical solution. This combination is not subject to the constraints of the sequence of steps and / or the structural composition mode, but must be based on the ability of ordinary technicians in this field to achieve. When the combination of technical solutions is contradictory or cannot be achieved, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0019] A compiler is a program that converts the original code written in a high-level programming language (C, C++ code, etc.) into another representation (machine binary language).

[0020] The main purpose of a compiler is to translate high-level computer languages ​​that are easy for people to write, read, and maintain into machine languages ​​that computers can interpret and run, that is, executable programs. The source code is generally a high-level language, such as Pascal, C, C++, C#, Java, etc., while the target language is assembly language or the target machine's object code, sometimes also called machine code.

[0021] The intermediate representation IR is a data structure or code used by the compiler to represent the source code. It is a program representation between the source language and the target language during the program compilation process. Almost all compilers require some form of intermediate representation to model the code being analyzed, converted, and optimized. During the compilation process, the intermediate representation must have sufficient expressiveness to accurately express the source code without losing information, and fully consider the completeness of the compilation from source code to target code, the ease of use of compilation optimization, and the performance.

[0022] Target code generation is the process of converting intermediate code into target code, which is code that can be directly executed by the computer. The main task of target code generation is to translate the intermediate code into target code so that the computer can execute it. The process of target code generation includes the selection of code generation strategy, register allocation, setting of calling convention, etc.

[0023] Target code optimization is the process of improving the target code to improve the execution efficiency of the program. The main task of target code optimization is to analyze the target code, find out where it can be improved, and improve the target code. The methods of target code optimization include constant folding, dead code elimination, loop invariant optimization, etc.

[0024] The existing compiler target code generation method has a complex process, does not have configurable general target code generation rules, has low execution efficiency, and is not easy to maintain and expand. Usually, it simply performs a one-to-one translation from the intermediate representation to the target code without optimization. This translation method does not support special instructions enough and cannot optimize non-continuous intermediate representations.

[0025] The present invention matches the code block to be matched with each intermediate code pattern matching block, finds the intermediate code pattern matching block that matches the code block to be matched, generates the corresponding target code based on the found intermediate code pattern matching block, realizes the mapping of the code block to be matched to the target code, obtains the required target code, can be applicable to the target machine instruction set architecture, can be recognized and executed by the computer, and in the process of generating the target code, it will also be optimized, and supports code optimization of non-continuous intermediate representations.

[0026] Figure 1 A flow chart of a target code generation method based on pattern matching provided by the present invention, such as Figure 1 As shown, the method includes:

[0027] Step S1, matching the code block to be matched with each intermediate code pattern matching block, finding the intermediate code pattern matching block that matches the code block to be matched, each of the intermediate code pattern matching blocks is organized according to the intermediate code pattern matching rules.

[0028] Among them, firstly, pattern matching rules are defined, and the pattern matching rules include intermediate code pattern matching rules and corresponding target machine code pattern generation rules.

[0029] Define pattern matching rules: There are two types of pattern matching rules, namely intermediate code pattern matching rules (PatternMatch) and corresponding target machine code pattern generation rules (PatternReplace). These two appear in pairs, and one instruction can have multiple pairs of pattern matching rules.

[0030] Among them, each line in the intermediate code pattern matching rule (PatternMatch) is composed of the following four tuples: <operation code, {operand number list}, {condition function list}, condition function flag>.

[0031] Opcode: The opcode of the instruction to match.

[0032] Operand number list: The numbers of the operands to be matched must be positive numbers. Different numbers represent different operands, and one number represents one operand.

[0033] Conditional function list: The conditional functions in the conditional function list are executed for the matching instructions. These functions return TRUE or FALSE. If set to isFloat32, it will determine whether all operands are of float32 type.

[0034] Conditional function flag: There are only two values: and or or. and means that all conditional functions must be met to return TRUE; or means that only any one of the conditional functions needs to be met to return TRUE.

[0035] Each line in the target machine code pattern generation rule (PatternReplace) consists of the following triples: <opcode, {operand number list}, {operand setting function list}>.

[0036] Opcode: The opcode of the instruction for which the target code will be generated.

[0037] Operand number list: operands used when generating the target instruction. Negative numbers indicate that a temporary register will be requested. Only the target operand dst can use a new negative number, indicating that a new temporary register is requested. The remaining operands must use the operand numbers that appear in the operand number list of the intermediate code pattern matching rule or the newly generated negative number of the target operand dst.

[0038] Operand setting function list: indicates the operand to be set by calling this function, and 0 indicates that no operation is performed on the corresponding operand. For example, {dst_sat,0, set_enableX} means setting the sat saturation operation for the first operand, that is, the operation performed when the result overflows, no action is taken for the second operand, and the X component is set for the third operand.

[0039] like Figure 2 The following is the definition of the pattern matching rule pair, where op1 and op2 are the opcodes in the intermediate code pattern matching rule, dst, src0, src2, .... are operands, func1, func1, .... are conditional functions, and and_or is the conditional function flag. OpX and opY are the opcodes in the target machine code pattern generation rule, dst, src0, src2, .... are operands, and func1, func1, .... are conditional functions.

[0040] For pattern matching rule pairs, for example, see Figure 3 , an instruction in the intermediate code pattern matching block is fma{1,2,3,4},{_noFMASupport}, and, here _noFMASupport determines whether the architecture supports fma multiplication and addition operations. The function returns TRUE, which means it does not support. If it does not support, the instruction is expanded into two instructions, the first instruction is the mul multiplication instruction, and the second instruction is the add instruction. The first operand of the operand of the first multiplication mul instruction in the target machine code pattern generation rule, that is, the destination operand, is assigned -1. -1 here means that a temporary register needs to be allocated to store the operand after the multiplication mul operation. The original register can be used to store the operand after the second add instruction operation.

[0041] See also Figure 4 , Figure 4 A pattern matching rule pair is also shown, such as Figure 4The following figure shows that the three instructions mul + add + sat are optimized and one mad instruction is generated. The isFloat32 in the intermediate code pattern matching rule indicates that the operand must be float32. The dst_sat function in the target machine code pattern generation rule indicates that a sat saturation operation needs to be performed on the first operand.

[0042] The optimized target code is generated using the defined pattern matching rules. When the optimized target code is generated using the pattern matching rules, in order to optimize and support non-continuous instructions, a back-to-front traversal method is used here to traverse the matching code blocks and the intermediate code pattern matching blocks.

[0043] The to-be-matched code block includes multiple instructions, and each of the intermediate code pattern matching blocks includes multiple instructions. Figure 5 and Figure 6 Step S1, matching the code block to be matched with each intermediate code pattern matching block, and finding the intermediate code pattern matching block matching the code block to be matched, including:

[0044] Step S101, set the pointer CurrPointer of the code block to be matched to the position of the last instruction of the code block to be matched, and traverse the instructions of the code block to be matched one by one from the back to the front;

[0045] Step S102: In each cycle, the intermediate code scanning pointer IRPointer = CurrPointer, and is ready to scan from the current position upward;

[0046] Step S103: Set the pattern matching block pointer PMPointer to the last instruction position of the first intermediate code pattern matching block corresponding to the instruction pointed to by CurrPointer.

[0047] First, define three traversal pointers: (the description of the pointers should be placed before step S1)

[0048] The pointer CurrPointer of the code block to be matched points to the instruction in the code block to be matched: Initially, the pointer CurrPointer is set to the last instruction of the code block to be matched. During matching, it is reduced by 1 in each round of loop. During each round of matching, according to the opcode corresponding to the instruction pointed to by the pointer CurrPointer of the code block to be matched, the pattern matching rule pair corresponding to the opcode is found, and then pattern matching begins.

[0049] Intermediate code scanning pointer IRPointer: It is set equal to CurrPointer at the beginning of each loop. When matching, in order to support non-continuous instructions, for instructions without source operands (such as jump, label, barrier, etc.), IRPointer is reduced by 1 each time. For instructions with source operands, and the source operand has a corresponding definition def instruction, IRPointer is set to the def definition of the source operand.

[0050] The pattern matching block pointer PMPointer points to the instruction in the intermediate code pattern matching block: Initially, the pattern matching block pointer PMPointer is set to the last instruction position of the first intermediate code pattern matching block. During traversal, if the first instruction of the intermediate code pattern matching block is reached, PMPointer is set to the last instruction of the next intermediate code pattern matching block, and then the previous instruction is matched one by one. Among them, there may be multiple intermediate code pattern matching blocks corresponding to a certain instruction in the code block to be matched, and PMPointer is set to the last instruction position of the first intermediate code pattern matching block.

[0051] Step S104: According to the intermediate code pattern matching rule, pattern matching is performed between the instructions of the code block to be matched and the instructions of the first intermediate code pattern matching block.

[0052] For details, see Figure 7 and Figure 8 , step S104 includes the following sub-steps:

[0053] Step S401: Initially, the pattern block matching pointer PMPointer points to the last instruction of the first intermediate code pattern matching block, and the intermediate code scanning pointer IRPointer is equal to CurrPointer.

[0054] Step S402: If PMPointer <= IRPointer, the next step of matching is performed, that is, step S403 is executed, otherwise the matching fails, and the process jumps to step S106. If PMPointer > IRPointer, it means that the remaining instructions to be matched are less than the instructions in the matching rule, and the matching will inevitably fail.

[0055] Step S403, the IRPointer instruction is matched according to the preset rules (intermediate code pattern matching rules) defined by the PMPointer instruction. When the IRPointer instruction is matched with the PMPointer instruction, first determine whether the opcode of the IRPointer instruction is the same as the opcode of the instruction pointed to by PMPointer. If they are different, the matching fails. On the basis of the same opcode, then determine whether the operands used by the two correspond in sequence according to the operand number list. If they do not correspond, the matching fails. On the basis of the correspondence, finally verify the PMPointer instruction according to the conditional function list and the conditional function flag. Only when these verifications pass can it be considered a successful match, that is, the IRPointer instruction and the PMPointer instruction are successfully matched.

[0056] Step S404. If step S403 matches successfully, when PMPointer points to the first instruction of the first intermediate code pattern matching block, the matching success flag is returned, that is, the code block to be matched matches the first intermediate code pattern matching block, and step S2 is executed. If PMPointer has not yet pointed to the first instruction of the first intermediate code pattern matching block, step S405 is executed; if step S403 fails to match, jump to step S106.

[0057] Step S405: PMPointer moves upward to point to the previous instruction, that is, PMPointer = PMPointer-1, and matches the previous instruction.

[0058] Step S406: If IRPointer points to an instruction active operand, and the definition instruction of the source operand is def, IRPointer = def; otherwise, IRPointer = IRPointer-1, and jump to step S402. If IRPointer points to an instruction active operand, non-continuous instruction matching can be performed, and the definition instruction def of the source operand can be quickly found according to the Def-use chain.

[0059] Step S105: If the match is successful, execute step S2 to generate the target code according to the intermediate code pattern matching rule, the target machine code pattern generation rule and the matched intermediate code pattern matching block.

[0060] It is understandable that when an intermediate code pattern matching block that matches the code block to be matched is found, the required target instructions are generated according to the instructions and operands in the target machine code pattern generation rules, and the generated target instructions are inserted after the instruction pointed to by CurrPointer. The non-destination operand here should be the corresponding operand from the intermediate code pattern matching rule. When the destination operand in the operand list is negative, a temporary register is requested. After the target machine code is generated, if the matched instructions are no longer used, these unnecessary instructions can be deleted.

[0061] Step S106: If the match fails, PMPointer points to the last instruction position of the next intermediate code pattern matching block until an intermediate code pattern matching block matching the code block to be matched is found or all intermediate code pattern matching blocks are traversed.

[0062] It is understandable that during the matching process, if the code block to be matched fails to match the current intermediate code pattern matching block, the PMPointer points to the last instruction position of the next intermediate code pattern matching block, that is, the code block to be matched is matched with the next intermediate code pattern matching block, until an intermediate code pattern matching block that matches the code block to be matched is found, or all intermediate code pattern matching blocks are matched.

[0063] Step S2, generating target code according to the intermediate code pattern matching rule, the target machine code pattern generation rule and the matched intermediate code pattern matching block.

[0064] It is understandable that, through the matching process of step S1, an intermediate code pattern matching block matching the code block to be matched is found, and the corresponding target machine code pattern generation rule is found according to the matched intermediate code pattern matching block. According to the instructions and operands in the target machine code pattern generation rule, the corresponding target code is generated.

[0065] The following example illustrates the target code generation method based on pattern matching. Fig. 9 , mainly including the following steps:

[0066] Step 1: The pointer CurrPointer of the code block to be matched is set to the last instruction position of the intermediate code pattern matching block, that is, instruction 6: abs r7, r6. At this time, since the abs instruction has no corresponding intermediate code pattern matching block pair, it is not necessary to perform pattern matching on it. CurrPointer = CurrPointer - 1, that is, CurrPointer points to the previous instruction 5: sat r6, r5.

[0067] Step 2: Since the sat instruction defines the corresponding intermediate code pattern matching block, the intermediate code scanning pointer IRPointer = CurrPointer is set, that is, IRPointer also points to instruction 5.

[0068] Step 3. The pattern matching block pointer PMPointer is set to the last instruction position of the first intermediate code pattern matching block corresponding to the instruction pointed to by CurrPointer, that is, PMPointer points to instruction 3: sat {6, 5}, {}, or.

[0069] S401. At this time, PMPointer points to instruction 3: sat in the intermediate code pattern matching rule.

[0070] S402, at this time PMPointer=3, IRPointer=5, PMPointer<= IRPointer is satisfied.

[0071] S403, at this time, IRPointer points to instruction 5: sat r6, r5, PMPointer points to instruction 3: sat {6,5}, {}, or, both operands and operation codes match, so the instruction matches successfully.

[0072] S404: Because PMPointer does not point to the first instruction of the intermediate code pattern matching block, the matching continues.

[0073] S405, PMPointer = PMPointer – 1, pointing to 2: add {5, 1, 4}, {isFloat32},and.

[0074] S406, because the sat instruction pointed to by IRPointer has source operand r5, find the definition def of source operand r5 as instruction 3: add r5, r1, r4, and set IRPointer to instruction 3. Continue to execute S402. Figure 8 Status shown.

[0075] Repeat the above matching rules, and finally the match will be successful and enter S5.

[0076] S5. Based on the target machine code pattern generation rule, use the above operands to generate mad instructions, that is, generate instructions mad r6, r2, r3, r4 and set the sat flag, and insert the instruction below CurPointer. Check whether the successfully matched instructions 1, 3, and 5 will still be used. If they are no longer used, mark them as deleted.

[0077] The present invention provides a target code generation method based on pattern matching, which matches a code block to be matched with each intermediate code pattern matching block, finds the intermediate code pattern matching block that matches the code block to be matched, and generates corresponding target code based on the found intermediate code pattern matching block, thereby realizing the mapping of the code block to be matched to the target code, and obtaining the required target code, which can be applicable to the target machine instruction set architecture and can be recognized and executed by a computer. In the process of generating the target code, it will also be optimized, and code optimization of non-continuous intermediate representations is supported.

[0078] It should be noted that in the above embodiments, the description of each embodiment has its own emphasis, and for parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0079] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0080] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded computer, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0081] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0082] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0083] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0084] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A target code generation method based on pattern matching, characterized in that: include: Step S1, matching the code block to be matched with each intermediate code pattern matching block, finding the intermediate code pattern matching block that matches the code block to be matched, each of the intermediate code pattern matching blocks is organized according to the intermediate code pattern matching rule; Step S2, generating a target code according to the intermediate code pattern matching rule, the target machine code pattern generation rule and the matched intermediate code pattern matching block, wherein the target code is organized according to the target machine code pattern generation rule; Each line in the intermediate code pattern matching rule includes a four-tuple, wherein the four-tuple is <operation code, {operand number list}, {condition function list}, condition function flag>; Wherein, the opcode represents the opcode of the instruction to be matched; The operand number list includes numbers of the matched operands, which are positive numbers. Different numbers represent different operands, and one number represents one operand. The conditional function list includes the conditional functions in the conditional function list to be executed for the matched instruction, and the conditional function returns TRUE or FALSE; The conditional function flag has only two values: and or or. and means that all conditional functions must be met to return TRUE; or means that only any one of the conditional functions needs to be met to return TRUE. Each line in the target machine code pattern generation rule includes a triple, and the triple is: <Opcode, {operand number list}, {operand setting function list}>; Wherein, the opcode represents the opcode of the instruction of the target code to be generated; The operand number list includes the operands used when generating the target instruction. Negative numbers indicate that a temporary register will be requested. Only the target operand dst can use a new negative number, indicating that a new temporary register is requested. The remaining operands must use the operand numbers that appear in the operand number list of the intermediate code pattern matching rule or the negative numbers that are newly generated by the target operand dst. The operand setting function list sets the function called by each operand, and 0 means no operation is performed on the corresponding operand.

2. The target code generation method based on pattern matching according to claim 1, characterized in that: The code block to be matched includes a plurality of instructions, and each of the intermediate code pattern matching blocks includes a plurality of instructions. The step S1 matches the code block to be matched with each of the intermediate code pattern matching blocks to find an intermediate code pattern matching block that matches the code block to be matched, including: Step S101, set the pointer CurrPointer of the code block to be matched to the position of the last instruction of the code block to be matched, and traverse the instructions of the code block to be matched one by one from the back to the front; Step S102: In each cycle, the intermediate code scanning pointer IRPointer = CurrPointer, and is ready to scan from the current position upward; Step S103, setting the pattern matching block pointer PMPointer to the last instruction position of the first intermediate code pattern matching block corresponding to the instruction pointed to by CurrPointer; Step S104: According to the intermediate code pattern matching rule, pattern matching is performed between the instructions of the code block to be matched and the instructions of the first intermediate code pattern matching block; Step S105: If the match is successful, execute step S2; Step S106: If the match fails, PMPointer points to the last instruction position of the next intermediate code pattern matching block until an intermediate code pattern matching block matching the code block to be matched is found or all intermediate code pattern matching blocks are traversed.

3. The target code generation method based on pattern matching according to claim 2 is characterized in that: Step S104, according to the intermediate code pattern matching rule, pattern matching is performed between the instructions of the code block to be matched and the instructions of the first intermediate code pattern matching block, including: Step S401, the pattern matching block pointer PMPointer points to the last instruction of the intermediate code pattern matching block, and the intermediate code scanning pointer IRPointer is equal to CurrPointer; Step S402: If PMPointer <= IRPointer, execute step S403; otherwise, the match fails and jump to step S106; Step S403, matching the intermediate code pattern defined by the PMPointer pointing instruction with the IRPointer pointing instruction; Step S404: If the match in step S403 is successful, when PMPointer points to the first instruction of the intermediate code pattern matching block, return the match success flag and execute step S2; when PMPointer does not point to the first instruction of the intermediate code pattern matching block, execute S405; if the match in step S403 fails, jump to step S106; Step S405, PMPointer moves upward to point to the previous instruction, that is, PMPointer = PMPointer-1; Step S406: If IRPointer points to an instruction active operand, and its definition instruction is def, IRPointer = def; otherwise, IRPointer = IRPointer-1, and jump to step S402.

4. The target code generation method based on pattern matching according to claim 3 is characterized in that: The step S403, matching the intermediate code pattern matching rule defined by the PMPointer pointing instruction with the IRPointer pointing instruction, comprises: When matching, first determine whether the opcode of the instruction pointed to by IRPointer is the same as the opcode of the instruction pointed to by PMPointer. If they are different, the match fails and jumps to step S106. If they are the same, then the operands in the operand number list of the instruction pointed to by IRPointer correspond to the operands in the operand number list of the instruction pointed to by PMPointer. If they do not correspond, the match fails and the process goes to step S106. If they correspond, the instruction pointed to by PMPointer is verified according to the conditional function list and the conditional function. If the verification passes, the instruction pointed to by IRP ointer matches the instruction pointed to by PMPointer; if the verification fails, the match fails and jumps to step S106.

5. The target code generation method based on pattern matching according to claim 1, characterized in that: Step S2, generating target code according to the intermediate code pattern matching rule, the target machine code pattern generation rule and the matched intermediate code pattern matching block, further comprising: Generate a target instruction based on the instruction and operand in the target machine code pattern generation rule, and insert the generated target instruction after the instruction pointed to by CurrPointer.

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