Memory access method based on trusted execution environment and related device

Abstract

The present disclosure provides a memory access method based on a trusted execution environment and related equipment. The method comprises: obtaining at least one to-be-processed data item to be written into a trusted execution environment; for at least part of the to-be-processed data items, calculating the positions of a plurality of candidate data storage units corresponding to each to-be-processed data item, and constructing an association relationship between the to-be-processed data items and the plurality of candidate data storage units; wherein the plurality of candidate data storage units are deployed in the trusted execution environment; based on a preset careless matching algorithm and the association relationship, determining a matching relationship between the to-be-processed data item and a target data storage unit in the plurality of candidate data storage units; and based on the matching relationship, writing the to-be-processed data item into the target data storage unit. The memory access method based on the trusted execution environment and the related equipment can enhance the confidentiality and integrity of data in the processing process.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of computer, and in particular, to a memory access method based on trusted execution environment and related device. BACKGROUND

[0002] This section is intended to provide background or context to the embodiments of the disclosure recited in the claims. The description herein does not constitute admission that the prior art is prior art nor does it constitute an admission of any description in this section as prior art to an application.

[0003] The trusted execution environment (TEE) is implemented by a separate trusted area divided from the processor and the memory, which provides high-level security protection by isolating the execution of selected code and data from the execution of the main operating system.

[0004] However, for the data stored in the trusted execution environment, an attacker can analyze the data content by analyzing the data access mode, thereby threatening the security of the trusted execution environment. SUMMARY

[0005] Therefore, the purpose of the present disclosure is to provide a memory access method based on trusted execution environment and related device, which at least solves one of the technical problems in the related art to some extent.

[0006] To achieve the above purpose, the first aspect of the present disclosure provides a memory access method based on trusted execution environment, comprising:

[0007] Obtaining at least one to-be-processed data item to be written into the trusted execution environment;

[0008] For at least part of the to-be-processed data items, the positions of a plurality of candidate data storage units corresponding to each of the to-be-processed data items are calculated, and an association relationship between the to-be-processed data items and the plurality of candidate data storage units is constructed; wherein the plurality of candidate data storage units are deployed in the trusted execution environment;

[0009] Based on a preset careless matching algorithm and the association relationship, a matching relationship between the to-be-processed data items and a target data storage unit in the plurality of candidate data storage units is determined;

[0010] Based on the matching relationship, the to-be-processed data items are written into the target data storage unit.

[0011] In some embodiments, the calculation of the positions of a plurality of candidate data storage units corresponding to each of the to-be-processed data items comprises:

[0012] The placement position of the candidate data storage unit in the index table is calculated based on a preset number of hash functions, and the number of the hash functions is the same as the number of the candidate data storage unit.

[0013] In some embodiments, the number of the hash functions is 3-6.

[0014] In some embodiments, the determination of the matching relationship between the to-be-processed data item and the target data storage unit in the plurality of candidate data storage units based on the preset careless matching algorithm and the association relationship comprises:

[0015] A first vertex set is determined based on at least one of the to-be-processed data items, a second vertex set is determined based on the table entries corresponding to the placement position of the candidate data storage unit in the index table, and an edge set is determined based on the association relationship;

[0016] An alternate path between each vertex in the first vertex set and each vertex in the second vertex set is found based on the edge set, and a path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set is determined;

[0017] A matching relationship between the to-be-processed data item and the table entry corresponding to the target data storage unit in the index table is determined based on the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set.

[0018] In some embodiments, the determination of the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set based on the finding of the alternate path between each vertex in the first vertex set and each vertex in the second vertex set based on the edge set comprises:

[0019] The edge set is carelessly sorted based on a preset first priority rule;

[0020] The first matching relationship between each vertex in the first vertex set and each vertex in the second vertex set is constructed by traversing the first sorted edge set;

[0021] The edge set is carelessly sorted based on a preset second priority rule;

[0022] The first matching relationship is adjusted by traversing the second sorted edge set, and the path matching relationship is obtained.

[0023] In some embodiments, the first priority rule comprises at least one of:

[0024] The edges pointing to the same vertex in the first vertex set are arranged in a group;

[0025] the edge from the second vertex set to the first vertex set is oriented;

[0026] the edge with the smaller count is oriented.

[0027] the edge with the smaller count is oriented.

[0028] In some embodiments, the second priority rule comprises at least one of:

[0029] the edges pointing to the same vertex in the second vertex set are set in one group;

[0030] the edge from the second vertex set to the first vertex set is oriented;

[0031] the edge with the larger count is oriented.

[0032] In some embodiments, the writing the to-be-processed data item into the target data storage unit comprises:

[0033] writing the index information corresponding to the to-be-processed data item into a table entry corresponding to the target data storage unit in an index table.

[0034] In some embodiments, the method further comprises:

[0035] hierarchically storing the table entries in the index table.

[0036] In some embodiments, the method further comprises:

[0037] obtaining a query request for a to-be-queried data item;

[0038] hierarchically querying the index table based on the query request;

[0039] in response to obtaining the index information corresponding to the to-be-queried data in a target hierarchy, obtaining the to-be-queried data item based on the index information;

[0040] obtaining a first data item based on an oblivious algorithm for at least part of the remaining hierarchies, and obtaining a query result for the query request based on the to-be-queried data item and the first data item.

[0041] A second aspect of the present disclosure provides a memory access apparatus based on a trusted execution environment, comprising:

[0042] an obtaining module configured to obtain at least one to-be-processed data item to be written into the trusted execution environment;

[0043] The computing module is configured to: for at least part of the to-be-processed data items, calculate the positions of a plurality of candidate data storage units corresponding to each of the to-be-processed data items, and construct an association relationship between the to-be-processed data items and the plurality of candidate data storage units; wherein the plurality of candidate data storage units are deployed in the trusted execution environment.

[0044] The determining module is configured to: determine a matching relationship between the to-be-processed data items and a target data storage unit in the plurality of candidate data storage units based on a preset careless matching algorithm and the association relationship.

[0045] The writing module is configured to: write the to-be-processed data items into the target data storage unit based on the matching relationship.

[0046] The third aspect of the present disclosure provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the memory access method based on the trusted execution environment according to the first aspect.

[0047] The fourth aspect of the present disclosure provides a non-transitory computer readable storage medium, which stores computer instructions for causing the computer to execute the memory access method based on the trusted execution environment according to the first aspect.

[0048] The fifth aspect of the present embodiment of the present disclosure provides a computer program product, comprising computer program instructions, which, when executed on a computer, cause the computer to execute the memory access method based on the trusted execution environment according to the first aspect.

[0049] It can be seen from the above that the memory access method based on the trusted execution environment and the related device provided by the present disclosure, after obtaining the to-be-processed data items to be written in the memory deployed in the trusted execution environment, for at least part of the to-be-processed data items, the positions of the plurality of candidate data storage units of each to-be-processed data item are calculated and the association relationship between the to-be-processed data items and the plurality of candidate data storage units deployed in the trusted execution environment is constructed, then the matching relationship between the to-be-processed data items and the target data storage unit in the plurality of candidate data storage units is determined by using the oblivious matching algorithm, and then the to-be-processed data items are written into the target data storage unit deployed in the trusted execution environment based on the matching relationship, so that the oblivious memory access mode of the trusted execution environment is realized. Since the positions of the plurality of candidate data storage units of the to-be-processed data items are determined first, and then the target data storage unit is determined from the plurality of candidate data storage units by using the oblivious matching algorithm to write the to-be-processed data items, the data access mode can be effectively hidden, and potential attackers can be prevented from inferring the data content by analyzing the access mode. In combination with the trusted execution environment, the confidentiality and integrity of the data in the processing process can be further enhanced. BRIEF DESCRIPTION OF DRAWINGS

[0050] In order to more clearly illustrate the technical solutions in the present disclosure or the related art, the drawings needed to be used in the embodiments or the related art description will be briefly introduced. Obviously, the drawings in the following description are only embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor.

[0051] Figure 1 A flowchart of an exemplary method provided by an embodiment of the present disclosure is shown.

[0052] Figure 2 A schematic diagram of an exemplary principle according to an embodiment of the present disclosure is shown.

[0053] Figure 3 A schematic diagram of an exemplary effect provided by an embodiment of the present disclosure is shown.

[0054] Figure 4 A schematic diagram of an exemplary effect provided by an embodiment of the present disclosure is shown.

[0055] Figure 5 A schematic diagram of an exemplary effect provided by an embodiment of the present disclosure is shown.

[0056] Figure 6 A schematic diagram of an exemplary device provided by an embodiment of the present disclosure is shown.

[0057] Figure 7A hardware structure schematic diagram of an exemplary computer device provided by an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0058] For the purposes of the present disclosure, the technical solutions and advantages thereof are more clearly apparent, the present disclosure is further described in detail below with reference to the embodiments and the accompanying drawings.

[0059] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood as the common meanings understood by those skilled in the art to which the present disclosure belongs. The terms "first", "second", and similar terms used in the embodiments of the present disclosure do not represent any order, number, or importance, but are only used to distinguish different components. The terms "include", "contain", and similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, and do not exclude other elements or objects. The terms "connect" or "connected" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right", and the like are only used to represent relative positional relationships, and when the absolute positions of the described objects change, the relative positional relationships can also change accordingly.

[0060] It can be understood that, before using the technical solutions of the various embodiments of the present disclosure, the user will be informed of the type of personal information involved, the scope of use, the use scenario, and the like in an appropriate manner, and the user's authorization will be obtained.

[0061] For example, in response to receiving the user's active request, the user is sent prompt information to explicitly prompt the user that the operation requested to be performed will require the acquisition and use of the user's personal information. Thus, the user can choose whether to provide personal information to the electronic device, application program, server, or storage medium, and the like software or hardware that performs the operation of the technical solutions of the present disclosure, according to the prompt information.

[0062] As an optional but non-limiting implementation manner, in response to accepting the user's active request, the manner of sending prompt information to the user may, for example, be a pop-up window manner, in which the prompt information can be presented in the form of text. In addition, the pop-up window can also carry selection controls for the user to select "agree" or "disagree" to provide personal information to the electronic device.

[0063] It can be understood that the above notification and user authorization process is only illustrative, and does not limit the implementation manner of the present disclosure, and other manners that meet the relevant laws and regulations can also be applied to the implementation manner of the present disclosure.

[0064] With the increasing popularity of cloud computing technology, the security and privacy of data of cloud services have also rapidly emerged. In this ever-evolving environment, a trusted execution environment (TEES, i.e., a product using TEE) plays an increasingly important role due to its ability to provide enhanced security functions (e.g., isolation, confidentiality, and integrity) without significantly increasing performance overhead, without relying on a trusted third party or non-colluding servers. Currently, many cloud service providers have included a trusted execution environment as part of their infrastructure services.

[0065] A trusted execution environment provides a high level of security protection by isolating the execution of selected code and data from the execution of the host operating system, so that even a system administrator cannot access these code and data. Inside the processor of the trusted execution environment, secret data can be transparently encrypted and decrypted when transmitted between the main memory and the processor by a memory encryption engine, and the encryption keys are derived from a root key embedded in the processor. In addition, a user can verify the integrity of an application or system running in the trusted execution environment through an authentication process, thereby ensuring that the selected code and data can also perform calculations correctly and confidentially in an untrusted cloud environment.

[0066] However, side-channel attacks related to memory access patterns and timing can cause data in the trusted execution environment to be disclosed. For example, when accessing the memory in the trusted execution environment, such as when sorting the memory, the data of each memory block is constantly exchanged, and this process is a confidential process in the trusted execution environment. However, outside the trusted execution environment, through analysis and speculation of side-channel data, it can be speculated that this is a sorting process, and even based on the exchange of memory blocks, the range of data exchanged can be roughly determined.

[0067] Therefore, the present disclosure provides a memory access method based on a trusted execution environment to solve the above problems.

[0068] As shown in Figure 1 the memory access method based on the trusted execution environment comprises:

[0069] In step S101, at least one to-be-processed data item to be written into the trusted execution environment is obtained.

[0070] In the present embodiment, when data needs to be written into the memory deployed in the trusted execution environment, one or more to-be-processed data items can be generated based on the data to be written, and each to-be-processed data item is written into a different data storage unit of the memory; wherein each to-be-processed data item can be a data block of the data to be written.

[0071] In the present embodiment, the to-be-processed data item to be written into the trusted execution environment can be obtained.

[0072] Step S103, for at least part of the to-be-processed data items, calculating the positions of a plurality of candidate data storage units corresponding to each of the to-be-processed data items, and constructing the association relationship between the to-be-processed data items and the plurality of candidate data storage units; wherein the plurality of candidate data storage units are deployed in the trusted execution environment.

[0073] In this embodiment, for at least part of the to-be-processed data items, the positions of a plurality of candidate data storage units corresponding to each of the to-be-processed data items can be calculated, and the association relationship between the to-be-processed data items and the plurality of candidate data storage units can be constructed. In this embodiment, the plurality of candidate data storage units are deployed in the trusted execution environment.

[0074] Step S105, determining the matching relationship between the to-be-processed data items and a target data storage unit in the plurality of candidate data storage units based on a preset careless matching algorithm and the association relationship.

[0075] In this embodiment, the careless matching algorithm is used to match the association relationship between the to-be-processed data items and the plurality of candidate data storage units corresponding thereto, so as to determine the matching relationship between the to-be-processed data items and a target data storage unit in the plurality of candidate data storage units, and realize the careless matching between the to-be-processed data items and the target data storage unit.

[0076] Step S107, writing the to-be-processed data items into the target data storage unit based on the matching relationship.

[0077] After the matching relationship between the to-be-processed data items and the target data storage unit is obtained, the to-be-processed data items can be written into the target data storage unit, and the writing of the to-be-processed data items into the memory deployed in the trusted execution environment is completed.

[0078] In the embodiment, after obtaining the to-be-processed data items to be written into the memory of the trusted execution environment, for at least part of the to-be-processed data items, the positions of the plurality of candidate data storage units of each to-be-processed data item are calculated and the association relationship between the to-be-processed data items and the plurality of candidate data storage units deployed in the trusted execution environment is constructed, then the matching relationship between the to-be-processed data items and the target data storage unit in the plurality of candidate data storage units is determined by using the oblivious matching algorithm, and then the to-be-processed data items are written into the target data storage unit deployed in the trusted execution environment based on the matching relationship, so as to realize the oblivious memory access mode of the trusted execution environment. Since the positions of the plurality of candidate data storage units of the to-be-processed data items are determined first, and then the target data storage unit is determined from the plurality of candidate data storage units by using the oblivious matching algorithm to write the to-be-processed data items, the data access mode can be effectively hidden, and potential attackers can be prevented from inferring the data content by analyzing the access mode. In combination with the trusted execution environment, the confidentiality and integrity of the data in the processing process can be further enhanced.

[0079] In some embodiments, the step S103 of calculating the positions of the plurality of candidate data storage units corresponding to each to-be-processed data item comprises: calculating the placement positions of the candidate data storage units in the index table based on a preset number of hash functions, and the number of hash functions is the same as the number of candidate data storage units.

[0080] In some embodiments, the index table can be a hash table.

[0081] In the embodiment, the placement positions of the plurality of candidate data storage units in the index table are calculated by using a preset number of hash functions, that is, the index information of the plurality of candidate data storage units is calculated by using the hash functions to store the positions of the table entries in the index table. Meanwhile, the number of hash functions is the same as the number of candidate data storage units, and each hash function corresponds to the placement position of the candidate data storage unit in the index table one by one, that is, the position of the table entry in the index table storing the index information of the candidate data storage unit is processed by each hash function separately.

[0082] In the embodiment, the placement positions of the plurality of candidate data storage units in the index table are calculated by a plurality of hash functions, and each hash function independently processes the position of the entry stored in the index table by different candidate data storage units, so that no additional storage space (stash) is needed, compared with the traditional cuckoo hash algorithm, which eliminates the need for additional storage space (stash), so that when reading the memory, there is no need to read the stash, thereby reducing the memory usage and improving the operation efficiency.

[0083] In some embodiments, the number of hash functions is 3-6.

[0084] In the related art, when using the cuckoo hash algorithm to determine the storage position of the data item to be processed in the index table, two disjoint vertex sets are composed of entries of two hash sub-tables, and the connection of each data item is defined by (h1(x), h2(x)), wherein h represents a pseudo-random function. This way requires a stash to achieve a negligible overflow probability, but the minimum size requirement of the stash significantly slows down the overall search speed of the cuckoo hash table. Even if all the stashes are combined into a single stash with a size of logn, there is no substantial efficiency improvement. Specifically, the existing cuckoo hash design requires linear scanning of hundreds or thousands of data blocks for a single operation, which seriously affects its actual performance. For data of no more than 256 items, both the standard balls-into-bins hash and the cuckoo hash with stash require nearly 50 oblivious choices per search. Similarly, the path-based ORAM (ORAM, Oblivious Random Access Memory, hides which data blocks the client operates and whether these operations are read or write by accessing additional virtual blocks, regularly shuffling data, and continuously writing back data after each read) also requires the same number of choices, and its construction complexity is higher. This finding puts the cuckoo hash in an awkward position when dealing with medium-sized data block sets, because it has to linearly scan its stash, resulting in hundreds or even thousands of additional oblivious choices in the entire ORAM. At the same time, combining stashes cannot alleviate the problem, because the combined stash is still small, so it cannot meet the hash table of medium size (2 16 ~2 20 Data blocks or tens to hundreds of megabytes).

[0085] Wherein, ORAM (Oblivious Random Access Memory) hides which data blocks the client operates and whether these operations are read or write by accessing additional virtual blocks, regularly shuffling data, and continuously writing back data after each read.

[0086] Path-based ORAM, n data blocks are randomly allocated to a binary tree with n / 2 leaf nodes. The client uses a position map to track each data block corresponding to the leaf node. At each access, it selects a path from the root to the leaf containing the target data according to the map and another randomly selected path. Then it operates the data, and shuffles the blocks along the two paths and writes back, which is called eviction. The optimal complexity of this way is insufficient.

[0087] In this embodiment, by setting 3-6 hash functions, and each hash function independently processes different table entries, the overflow probability can be ignored, so that the stash does not need to be used, thereby reducing the use of memory and improving the lookup efficiency of the hash table, that is, improving the memory access efficiency.

[0088] In some embodiments, the hash function is generated based on a pseudo-random function. In this embodiment, a plurality of keys can be generated using the pseudo-random function, and each hash function uses a different key to calculate the placement position of the candidate data storage unit in the index table.

[0089] In some embodiments, the step S105 determines the matching relationship between the target data storage unit and the plurality of candidate data storage units based on the preset oblivious matching algorithm and the association relationship.

[0090] Step S201, determine a first vertex set based on at least one of the to-be-processed data items, determine a second vertex set based on the table entries corresponding to the placement positions of the candidate data storage units in the index table, and determine an edge set based on the association relationship.

[0091] In some embodiments, the oblivious matching algorithm can include an oblivious bipartite graph matching algorithm. In this embodiment, the first vertex set of the oblivious bipartite graph matching algorithm, i.e. the left vertex set, contains the to-be-processed data items, the second vertex set of the oblivious bipartite graph matching algorithm, i.e. the right vertex set, contains the table entries corresponding to the placement positions of the candidate data storage units in the index table, and a plurality of edges are determined based on the association relationship between each to-be-processed data item and the table entries corresponding to the placement positions of the plurality of candidate data storage units in the index table.

[0092] In some embodiments, the second vertex set, i.e. the right vertex set, can contain hash buckets corresponding to the placement positions of the candidate data storage units in the index table, which is not limited in this embodiment.

[0093] In some embodiments, the number of vertices in the second vertex set is greater than the number of vertices in the first vertex set, i.e. the number of table entries corresponding to the placement positions of the candidate data storage units in the index table is greater than the number of to-be-processed data items.

[0094] In some embodiments, the number of vertices in the second vertex set is a multiple of the number of vertices in the first vertex set, i.e., the number of entries corresponding to the placement positions of the candidate data storage units in the index table is a multiple of the number of data items to be processed, for example, the number of vertices in the first vertex set, i.e., the number of data items to be processed, is n, and the number of vertices in the second vertex set, i.e., the number of entries corresponding to the placement positions of the candidate data storage units in the index table, is 2n.

[0095] In some embodiments, the number of hash functions, i.e., the number of positions of the plurality of candidate data storage units corresponding to each data item to be processed, is k, and the edge of each data item to be processed is k.

[0096] In step S203, an alternating path between each vertex in the first vertex set and each vertex in the second vertex set is found based on the edge set, and a path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set is determined.

[0097] In this embodiment, the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set, i.e., the path matching relationship between each data item to be processed in the first vertex set and each entry in the second vertex set, is determined by finding an alternating path between each vertex in the first vertex set and each vertex in the second vertex set.

[0098] In this embodiment, the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set, i.e., the path matching relationship between each data item to be processed in the first vertex set and each entry in the second vertex set, is determined by finding an alternating path between each vertex in the first vertex set and each vertex in the second vertex set.

[0099] In step S205, a matching relationship between each data item to be processed and the entry corresponding to the target data storage unit in the index table is determined based on the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set.

[0100] In this embodiment, after the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set is obtained, the matching relationship between each data item to be processed and the entry corresponding to the target data storage unit in the index table can be determined based on the path matching relationship.

[0101] In some embodiments, the determination of the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set based on the edge set in step S203 includes:

[0102] In step S301, the edge set is casually sorted based on a preset first priority rule.

[0103] In the embodiment, the first ordering of the edge set can be performed based on a first priority rule. In the ordering, the edges can be selected based on the short point, direction, state or counter of the edge, so as to better construct the match.

[0104] The first priority rule comprises at least one of the following: edges pointing to the same vertex in the first vertex set are arranged in a group; edges are first directed from the second vertex set to the first vertex set; free edges are first directed; and edges with smaller counters are first directed.

[0105] In step S303, the first match relationship between each vertex in the first vertex set and each vertex in the second vertex set is constructed by traversing the first ordered edge set.

[0106] In the embodiment, the match is constructed by traversing the first ordered edge set.

[0107] If the current edge is the first edge in the first ordered edge set with its left end point, and the state of the previous edge is unmatched, the state can be updated and the current edge can be added to the match. If the current edge is a free edge and the previous edge is matched, the direction of the current edge and the previous edge can be exchanged, and their states and match relationship can be updated.

[0108] In step S305, the second ordering of the edge set is performed based on a preset second priority rule.

[0109] After the match is constructed, the second ordering of the edge set is performed based on the second priority rule, so as to further adjust the match.

[0110] The second priority rule comprises at least one of the following: edges pointing to the same vertex in the second vertex set are arranged in a group; edges are first directed from the second vertex set to the first vertex set; and edges with larger counters are first directed.

[0111] In step S307, the first match relationship is adjusted by traversing the second ordered edge set, and the path match relationship is obtained.

[0112] In the embodiment, the second ordered edge set is traversed, and the state of each edge is updated. The new state of the edge can be determined according to the current state, direction and whether the edge is included in the match.

[0113] Finally, a path match relationship is output. Based on the path match relationship, the match relationship between the data item to be processed and the table entry corresponding to the target data storage unit in the index table can be determined.

[0114] In some embodiments, the writing of the to-be-processed data item into the target data storage unit in step S107 comprises: writing index information corresponding to the to-be-processed data item into a table entry corresponding to the target data storage unit in an index table.

[0115] In the embodiment, after obtaining the matching relationship between the to-be-processed data item and the table entry corresponding to the target data storage unit in the index table, the index information corresponding to the to-be-processed data item is written into the table entry corresponding to the target data storage unit in the index table, and the writing of the to-be-processed data item in the trusted execution environment is completed.

[0116] In some embodiments, the method further comprises: hierarchically storing the table entries in the index table.

[0117] In the embodiment, the table entries in the index table are hierarchically stored. In the embodiment, the initial layer of the hash table is a linear scanning layer with a capacity of 256-1024, and is determined based on the data block size of each candidate data item. In each layer, the data items are continuously aligned on each layer, which helps to better utilize the chip cache and bandwidth. At the same time, hierarchical storage is more suitable for parallel processing.

[0118] In the embodiment, by hierarchically storing the table entries in the index table, the performance when processing large-scale data is effectively improved, and the method can be applied to scenarios with large amounts of data and efficient processing requirements.

[0119] In some embodiments, the method further comprises:

[0120] In step S401, a query request for a to-be-queried data item is obtained.

[0121] In step S403, the index table is hierarchically queried based on the query request.

[0122] In step S405, in response to obtaining index information corresponding to the to-be-queried data item in a target layer, the to-be-queried data item is obtained based on the index information.

[0123] In step S407, at least part of the remaining layers are queried based on the first data item obtained by the oblivious algorithm, and a query result for the query request is obtained based on the to-be-queried data item and the first data item.

[0124] The first data item is a data item obtained by querying the memory by means of the oblivious algorithm, and is a data item that does not match the query request for the data item to be queried. The first data item can be a data item already stored in the memory, for example, a data item stored in the memory before the query request. The data item can include a real data item corresponding to the storage request, or a virtual data item not corresponding to the storage request generated by means of the oblivious algorithm when the storage request is executed.

[0125] In the embodiment, when it is necessary to query the data item to be queried stored in the trusted execution environment, hierarchical querying can be performed based on the index table; when the index information corresponding to the data item to be queried is obtained in the target level, the data item to be queried can be obtained based on the index information; and after the index information corresponding to the data item to be queried is obtained, the querying is not stopped, but the querying of at least part of the remaining levels is continued to obtain the first data item, and the data item to be queried and the first data item are combined together as the query result for the query request, so that the real query content of the user can be hidden, and the security in the data processing process is improved.

[0126] After the query result is obtained, since the query result is still located in the trusted execution environment of the memory, the data item to be queried is obtained based on the index information, and the first data item is obtained based on the oblivious algorithm, so the user of the query request can distinguish the data item to be queried and the first data item, while the user located outside the trusted execution environment cannot distinguish the data item to be queried and the first data item, thereby ensuring the security of the data in the trusted execution environment of the memory.

[0127] In some embodiments, the method for placing the data item to be processed to be written into the trusted execution environment in the hash table includes:

[0128] Step S501, determining the size of the hash bucket.

[0129] In the embodiment, the size b of the hash bucket (i.e., the number of elements that can be accommodated by each bucket in the hash table) is calculated according to the number n of the data items to be processed to be written into the trusted execution environment and the number k of the hash functions. Generally, b = 2n / k.

[0130] Step S503, generating a pseudo-random function (PRF) and a key.

[0131] In the embodiment, a pseudo-random function (PRF) is selected, and the output range of the PRF is {1,...,b}. K PRF keys ski(i from 1 to k) are randomly generated.

[0132] Step S505, initialization.

[0133] In this embodiment, a first vertex set L (containing indexes of all data items to be processed) and a second vertex set R (containing all possible hash bucket indexes) are initialized.

[0134] Step S507, edges are established.

[0135] In this embodiment, for each data item to be processed, k hash functions (each function using a different key) are used to calculate k candidate bucket positions. And an edge is established for each data item to be processed and candidate bucket position.

[0136] Step S509, a match is found.

[0137] In this embodiment, an oblivious matching algorithm is used to find a match on the graph composed of L, R and E. This match represents a bucket placement scheme P, i.e. the placement position of the data items to be processed in the hash table.

[0138] In this embodiment, the steps of the oblivious matching algorithm include:

[0139] Step S601, initialization.

[0140] In this embodiment, each edge e = (u, v) in the bipartite graph G = (L U R, E) is initialized, where u e L and v e R, and its direction dir (default r, indicating the direction from L to R), state st (including unknown, free.alter (unmatched), alternat_bk (matched), default unknown), and counter ctr (indicating the number of times included in the match, default 0) are set.

[0141] In this embodiment, the left edge indicates that it contains or tends to contain in the match.

[0142] In this embodiment, the left vertex set of the bipartite graph G, i.e. the first vertex set, is composed of n data items to be processed; and the right vertex set of the bipartite graph G, i.e. the second vertex set, is composed of 2n table entries in the hash table.

[0143] Step S603, outer loop.

[0144] In this embodiment, a better match is found through multiple iterations. Wherein the loop variable t is traversed from 0 to r, indicating that the maximum number of iterations or attempts allowed is r, i.e. the maximum allowable length of the alternate path.

[0145] Step S605, first sorting.

[0146] In this embodiment, the edge set E is ordered according to a first priority rule. The first priority rule is based on the endpoints, direction, status or counter of the edges, and by ordering it is possible to better select edges to build a matching, thus achieving inadvertent ordering.

[0147] The first priority rule comprises: edges pointing from the first vertex set to the same vertex are set in one group; edges are oriented first from the second vertex set to the first vertex set; free edges are oriented first; edges with smaller counters are oriented first.

[0148] In this embodiment, in each iteration, the edges are ordered according to the first priority rule. It will group the edges by left vertex, then left group, then right group free edges. A counter is used in this process to ensure that in each iteration, the previously back edges are moved to the front.

[0149] Step S607, build a matching.

[0150] In this embodiment, the ordered edge set is traversed and attempts are made to build a matching.

[0151] Where, if the current edge e is the first edge of its left endpoint u in the first ordered edge group, and the previous edge e o The state of (if any) is unmatched (such as alternate_bk), the state can be updated and attempts are made to add e to the matching M.

[0152] If e is free (free) and e o is matched (alternat), the direction of e and e o may be exchanged, and their states and matching relationships are updated.

[0153] In this embodiment, the first edge of each group is attempted to be included in the matching M, and if the first edge tends to alternate (i.e. reverse), and there is indeed a free edge, an augmenting path is obtained, and the states of the two edges are updated to unknown.

[0154] Step S609, second ordering.

[0155] In this embodiment, after building a matching, the edge set E is ordered according to a second priority rule, so as to further adjust the matching, thus achieving inadvertent ordering.

[0156] The second priority rule comprises: edges pointing from the second vertex set to the same vertex are set in one group; edges are oriented first from the second vertex set to the first vertex set; edges with larger counters are oriented first.

[0157] In this embodiment, the edge state is propagated through the vertices in R, which requires the edges to be re-grouped explicitly based on their associated vertices in R. In each group, the edges that often go left and reverse are prioritized, and then linearly scanned.

[0158] Step S611, state update.

[0159] The sorted edge set is traversed, and the state of each edge is updated. This can involve deciding the new state according to the current state of the edge, direction, and whether it is already included in the matching.

[0160] Step S613, output.

[0161] Finally, a path matching relationship is output, based on which the matching relationship between the data item to be processed and the corresponding entry in the index table of the target data storage unit can be determined.

[0162] In the oblivious matching algorithm described in this embodiment, all edges in the matching are oriented from right to left, and edges not in the matching are oriented from left to right; a pair of edges sharing the same vertex, with exactly one of them included in the matching, is an alternating path, and the edge in the matching is an alternating edge. When a new data item to be processed (i.e., a new vertex in L) is added, it is equivalent to recursively finding an alternating path from the new vertex to any currently idle right-side vertex. For an idle vertex in R, the edges in contact with it are considered free edges.

[0163] In this embodiment, as shown in Figure 2 , the recursive process is converted into a propagation-based approach. That is, a vertex in L propagates its available free edges and alternating edges to other vertices through vertices in R.

[0164] In this embodiment, efficient data matching and sorting operations can be achieved without revealing the data matching pattern. It is particularly suitable for data processing tasks that require high privacy protection, such as oblivious computation and private data merging. Compared with traditional matching bipartite graph algorithms, the oblivious bipartite graph matching provides higher security.

[0165] Step S511, place entry.

[0166] In this embodiment, according to the found matching P, the index information of the data item to be processed A is placed in the corresponding position of the hash table T.

[0167] Step S513, initialize counter.

[0168] In this embodiment, a counter ctr is set for virtual lookup.

[0169] Step S515, return table and counter.

[0170] In this embodiment, the filled hash table T and the counter ctr are returned.

[0171] Step S517, searching, includes steps S5171-S5177.

[0172] Step S5171, setting a return value.

[0173] In this embodiment, if the query key q is empty (⊥), the return value is set as a dummy item, and the counter ctr is updated; otherwise, q is taken as the query key.

[0174] Step S5173, calculating bucket indices.

[0175] In this embodiment, the k bucket indices are calculated using the k hash functions and the updated query key (or counter value).

[0176] Step S5175, scanning and selecting.

[0177] In this embodiment, the hash table items corresponding to the bucket indices are scanned, and an item matching the query key is tried to be found. If a matching item is found, it is marked as a dummy item (indicating that it has been visited).

[0178] Step S5177, returning a result.

[0179] In this embodiment, the previously set dummy item (for an empty query) or the actual query result (if found) is returned.

[0180] Step S519, extracting, includes steps S5191-S5193.

[0181] Step S5191, compressing and truncating a table.

[0182] In this embodiment, the items in the hash table T are obliviously compressed, and the size of T is truncated to half, generating a new table T'.

[0183] Step S5193, returning a table.

[0184] In this embodiment, the new table T' with the order obliviously shuffled is returned.

[0185] In this embodiment, when the hash table is constructed, the number of iterations r of the oblivious matching algorithm is bound, i.e., the maximum allowable length of the alternate path. For a larger n, e.g., n is greater than or equal to a preset value, the maximum allowable length of the alternate path is set to log n; for a smaller n, e.g., n is less than the preset value, the maximum allowable length of the alternate path is set to the preset value, e.g., 30.

[0186] In this embodiment, the data to be written into the trusted execution environment is split into at least one data item to be processed, each data item to be processed is obliviously compressed, and then they are collectively compressed through a non-oblivious stage, thereby achieving secure access to the memory in the trusted execution environment. For an array consisting of n data items to be processed, each data item is independently and uniformly randomly labeled, and the total number of possible arrangements is 2n n To place an adversary at a disadvantage in distinguishing any particular arrangement, all arrangements should occur with equal probability, so the entropy is n bits.

[0187] The oblivious compression method includes:

[0188] Output: a compressed array B'.

[0189] Step S701, select a public parameter Z.

[0190] In this embodiment, a public parameter Z is selected, which is a divisor of n, for dividing the data items to be processed into multiple sub-arrays.

[0191] Step S703, divide the array B.

[0192] In this embodiment, for an array B containing n data blocks, the array B is divided into n / Z sub-arrays B_i, each containing Z consecutive data blocks. For each i from 1 to n / Z, the sub-array B_i consists of B[1+(i-1)Z] to B[iZ].

[0193] Step S705, obliviously compress each sub-array B_i.

[0194] In this embodiment, for each sub-array B_i, an oblivious compression method is used to compress it into a compact sub-array B'_i. This step can include rearranging non-empty data blocks to consecutive positions in the sub-array, while leaving enough space to simulate the original layout of the sub-array (even if these spaces are empty). Importantly, the compression process should be oblivious, i.e., independent of the specific content of the data blocks in the sub-array B_i.

[0195] The oblivious compression (Oblivious compaction) can use a pseudo-random function (PRF) to generate a permutation that is used to rearrange the data blocks while leaving enough "gaps" to simulate the original layout.

[0196] Step S707, non-obliviously combine the sub-arrays B'_i.

[0197] In this embodiment, after oblivious compaction, all compressed subarrays B'_i are non-obliviously (i.e., depending on their contents) combined into a complete array B'. This step typically only requires concatenating the subarrays in order, as they were already compacted during the oblivious compaction stage.

[0198] Step S709: Return the compressed array B'.

[0199] In this embodiment, the compressed array B' is returned.

[0200] In this embodiment, the adversary can be prevented from distinguishing 2 by unintentionally relaxing the h(n)-bit. h Instead of all possible permutations, we obtain a number of permutations, resulting in an entropy of h(n)-bit. Effective protection is provided as long as h(n) is close to n.

[0201] In this embodiment, page-level inadvertence and cache-level inadvertence can be used to relax the restrictions.

[0202] In some embodiments, for most TEEs that encrypt data at the page level, the chip fetches / refreshes and encrypts / decrypts the entire page into the cache / memory, making it impossible for adversaries to distinguish specific data accesses within the page. Therefore, when multiple pending data items reside in the same memory page of the trusted execution environment, the pending data items are not inadvertently sorted, thereby relaxing page-level inadvertence.

[0203] In some embodiments, such as when a client-maintained local cache cannot be exploited by an adversary, writes to and queries to that local cache can be protected without inadvertently ordering access patterns.

[0204] like Figure 3 As shown, when there are 3 hash functions, the failure probability is relatively low, ranging from 2 to 64, making it suitable for hash tables larger than 32768. When there are 4 to 6 hash functions, the utility is even better (i.e., it can be applied to smaller hash tables) and the security is higher (i.e., the failure probability is even lower), with the failure probability being less than or equal to 2. -128 .

[0205] like Figure 4 As shown, in the unintentional compression experiment, n data blocks with random values ​​and n uniformly random marker bits were generated, half of which were 1 and half of which were 0. Figure 4The relaxed oblivious compression algorithm is shown in comparison to the computation time of orcompact, which runs in 0(n log n) time, and 0CompactByHalf, which has been adapted to be doubly oblivious and runs in 0(n log Z) time.

[0206] In Figure 4 Table (a) shows that the h-bit oblivious compression of the embodiments of the present application achieves a significant performance improvement from 7.9 to 43 times compared to the fully oblivious method, at a cost of approximately 1% loss of bit obliviousness. At the same time, it shows that the improved method of the embodiments of the present application outperforms the fully oblivious method orcompact by a factor from 1.1 to 6.9, thanks to the additional input assumption and accepting a negligible failure probability.

[0207] Figure 4 Table (b) shows the execution time of the three algorithms for different data block sizes. This further emphasizes the overall performance improvement provided by the method of the embodiments of the present application. A knee point is observed in the execution time of all three algorithms around 2 8 This can be due to the CPU cache size, since the entire data block needs to be accessed for the oblivious operation, rather than just checking their tag bits.

[0208] Figure 4 Table (c) shows the real-time performance of these algorithms for increasing numbers of threads. It shows that all three algorithms exhibit effective parallelization capabilities. Specifically, the performance improvement of the method of the embodiments of the present application decreases from 12.6 to 7.7 times as the number of threads increases. This indicates that the method of the embodiments of the present application has a stronger performance advantage in a single-threaded environment.

[0209] Figure 4 Table (d) observes that the running time of the method of the embodiments of the present application grows logarithmically with the size Z of the subarray, which is expected as a result of its asymptotic time complexity 0(n log Z). It also shows the rate of security loss versus bit obliviousness for different Z. It can be observed that the security loss decreases rapidly with the increase of Z, and its absolute value is also quite low, ranging from 0.01% to 1%.

[0210] As Figure 5 shown, the method of the embodiments of the present application is compared with the performance of Oblix. In which, n data blocks are generated from 0 to n-1 keys and values of random bits. These blocks are then randomly shuffled to permute the data, after which the method of the embodiments of the present application is constructed based on this data, and the construction time is amortized to n data accesses.

[0211] As Figure 5As shown, the amortized access time of the method of the embodiments of the present application grows logarithmically with its capacity n, from 59 microseconds for 216216 data blocks to 212.8 microseconds for 226226 data blocks. Meanwhile, the page-level and cache-level oblivious simple relaxations bring about performance improvements of about 5.5% to 20% and 7.4% to 28% respectively, assuming a memory page size of 4KB and a private cache size of 128KB.

[0212] Figure 5 Table (b) shows that the method of the embodiments of the present application is about 3.1 to 6.8 times faster than Oblix. Specifically, the access time of the method of the embodiments of the present application is 59 microseconds for processing 216216 data blocks, while the access time of Oblix is 382.3 microseconds. While the access time of the method of the embodiments of the present application is 212.8 microseconds for processing 226226 data blocks, while Oblix takes more than 650 microseconds.

[0213] Figure 5 Table (c) shows that parallelization effectively improves the access efficiency of the method of the embodiments of the present application, and can support up to 8 threads.

[0214] Figure 5 In Table (d), it is observed that the access time grows slowly with the expansion of the data block size (note that the x-axis is in logarithmic scale), that is, the method of the embodiments of the present application can maintain its efficiency even when processing large data blocks. Meanwhile, the two relaxations show better performance improvement speed when processing small data blocks, because they are less effective when processing large blocks of data.

[0215] It should be noted that the method of the embodiments of the present disclosure can be performed by a single device, such as a computer or a server, etc. The method of the embodiments can also be applied to a distributed scenario, which is completed by multiple devices cooperating with each other. In the case of such a distributed scenario, one of the multiple devices can only perform one or more steps in the method of the embodiments of the present disclosure, and the multiple devices will interact with each other to complete the method.

[0216] It should be noted that some embodiments of the present disclosure have been described above. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in a different order than the order described above and still achieve desirable results. Additionally, the processes depicted in the figures do not necessarily require the particular order shown, or sequential order to achieve the desired results. In certain implementations, multitasking and parallel processing can be advantageous.

[0217] Based on the same inventive concept, the disclosure also provides a memory access device based on a trusted execution environment corresponding to any of the above-mentioned embodiment methods.

[0218] Reference Figure 6 The memory access device based on the trusted execution environment comprises:

[0219] The obtaining module 11 is configured to obtain at least one to-be-processed data item to be written into the trusted execution environment.

[0220] The computing module 13 is configured to, for at least part of the to-be-processed data items, calculate the positions of a plurality of candidate data storage units corresponding to each of the to-be-processed data items, and construct an association relationship between the to-be-processed data items and the plurality of candidate data storage units; wherein the plurality of candidate data storage units are deployed in the trusted execution environment.

[0221] The determining module 15 is configured to determine a matching relationship between the to-be-processed data items and a target data storage unit in the plurality of candidate data storage units based on a preset oblivious matching algorithm and the association relationship.

[0222] The writing module 17 is configured to write the to-be-processed data items into the target data storage unit based on the matching relationship.

[0223] For the convenience of description, the above device is described as various modules respectively described in terms of functions. Of course, the functions of each module can be implemented in the same or multiple software and / or hardware when implementing the disclosure.

[0224] The device of the above-mentioned embodiment is used to implement the corresponding memory access method based on the trusted execution environment in any of the above-mentioned embodiments, and has the beneficial effects of the corresponding method embodiments, which are not described here again.

[0225] In some embodiments, the computing of the positions of a plurality of candidate data storage units corresponding to each of the to-be-processed data items comprises:

[0226] The placement positions of the candidate data storage units in the index table are calculated based on a preset number of hash functions, and the number of the hash functions is the same as the number of the candidate data storage units.

[0227] In some embodiments, the number of the hash functions is 3-6.

[0228] In some embodiments, the determination of the matching relationship between the to-be-processed data items and a target data storage unit in the plurality of candidate data storage units based on a preset oblivious matching algorithm and the association relationship comprises:

[0229] determining a first vertex set based on the at least one data item to be processed, determining a second vertex set based on the table entry corresponding to the placement position of the candidate data storage unit in the index table, and determining an edge set based on the association relationship;

[0230] finding an alternate path between each vertex in the first vertex set and each vertex in the second vertex set based on the edge set, and determining a path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set;

[0231] determining a matching relationship between the data item to be processed and the table entry corresponding to the target data storage unit in the index table based on the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set.

[0232] In some embodiments, the finding of the alternate path between each vertex in the first vertex set and each vertex in the second vertex set based on the edge set, and the determination of the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set, comprises:

[0233] performing a first oblivious sorting of the edge set based on a preset first priority rule;

[0234] traversing the first sorted edge set to construct a first matching relationship between each vertex in the first vertex set and each vertex in the second vertex set;

[0235] performing a second oblivious sorting of the edge set based on a preset second priority rule;

[0236] traversing the second sorted edge set to adjust the first matching relationship to obtain the path matching relationship.

[0237] In some embodiments, the first priority rule comprises at least one of:

[0238] edges pointing to the same vertex in the first vertex set are arranged in a group;

[0239] edges are first directed from the second vertex set to the first vertex set;

[0240] free edges are first directed;

[0241] edges with smaller counts are first directed.

[0242] In some embodiments, the second priority rule comprises at least one of:

[0243] edges pointing to the same vertex in the second vertex set are arranged in a group;

[0244] edges are first directed from the second vertex set to the first vertex set;

[0245] The edge with a larger count is oriented first.

[0246] In some embodiments, the writing the to-be-processed data item into the target data storage unit comprises:

[0247] The index information corresponding to the to-be-processed data item is written into a table entry corresponding to the target data storage unit in an index table.

[0248] In some embodiments, the method further comprises:

[0249] The table entries in the index table are stored hierarchically.

[0250] In some embodiments, the method further comprises:

[0251] Obtaining a query request for a to-be-queried data item;

[0252] Performing hierarchical query on the index table based on the query request;

[0253] In response to obtaining the index information corresponding to the to-be-queried data in a target hierarchy, obtaining the to-be-queried data item based on the index information;

[0254] Performing query on at least part of the remaining hierarchies based on the first data item obtained by using the oblivious algorithm, and obtaining a query result for the query request based on the to-be-queried data item and the first data item.

[0255] Corresponding to the method of any of the above embodiments based on the same inventive concept, the disclosure also provides an electronic device, which comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the method of any of the above embodiments when executing the program.

[0256] Figure 7 A more specific hardware structure of an electronic device is shown, which can include a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, the memory 1020, the input / output interface 1030, and the communication interface 1040 are connected to each other through the bus 1050 for communication within the device.

[0257] The processor 1010 can be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits, etc., for executing relevant programs to implement the technical solutions provided by the embodiments of the present specification.

[0258] The memory 1020 can be implemented by a ROM (Read Only Memory), a RAM (Random Access Memory), a static storage device, a dynamic storage device, etc. The memory 1020 can store an operating system and other application programs, and when the technical solutions provided by the embodiments of the present specification are implemented by software or firmware, the relevant program codes are stored in the memory 1020 and called and executed by the processor 1010.

[0259] The input / output interface 1030 is configured to connect input / output modules to implement information input and output. The input / output modules can be configured as components in the device (not shown in the figure) or externally connected to the device to provide corresponding functions. The input devices can include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output devices can include a display, a speaker, a vibrator, an indicator light, etc.

[0260] The communication interface 1040 is configured to connect a communication module (not shown in the figure) to implement the communication interaction between the device and other devices. The communication module can realize communication through a wired manner (such as USB, network cable, etc.) or through a wireless manner (such as mobile network, WIFI, Bluetooth, etc.).

[0261] The bus 1050 includes a channel for transmitting information between various components (such as the processor 1010, the memory 1020, the input / output interface 1030, and the communication interface 1040) of the device.

[0262] It should be noted that although the above device only shows the processor 1010, the memory 1020, the input / output interface 1030, the communication interface 1040, and the bus 1050, in the specific implementation process, the device can also include other components necessary for normal operation. In addition, those skilled in the art can understand that the above device can also only include the components necessary to implement the solutions of the embodiments of the present specification, and does not have to include all the components shown in the figure.

[0263] The electronic device of the above embodiments is configured to implement the corresponding trusted execution environment-based memory access method of any of the preceding embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0264] Based on the same inventive concept, the disclosure also provides a non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform the trusted execution environment-based memory access method of any of the preceding embodiments.

[0265] The computer-readable medium of the present embodiments includes permanent and non-permanent, removable and non-removable media, which can be implemented by any method or technology to store information. The information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassette, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information accessible by a computing device.

[0266] The storage medium of the above embodiments stores computer instructions for causing a computer to perform the trusted execution environment-based memory access method of any of the preceding embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0267] Based on the same inventive concept, the disclosure also provides a computer program product including computer program instructions. In some embodiments, the computer program instructions can be executed by one or more processors of a computer to cause the computer and / or the processors to perform the trusted execution environment-based memory access method. Corresponding to the execution subject of each step in each embodiment of the method, the processor performing the corresponding step can belong to the corresponding execution subject.

[0268] The computer program product of the above embodiments is configured to cause the computer and / or the processor to perform the trusted execution environment-based memory access method of any of the preceding embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0269] Those of ordinary skill in the art will realize that the foregoing discussion of any of the embodiments has been presented for the purpose of illustration and description and is not intended to be exhaustive or to limit the disclosure to the precise forms described, and that various alternatives, modifications, and variations can be employed without departing from the spirit or scope of the disclosure as set forth in the claims. Examples of such alternative, modifications, and variations can include, but are not limited to, the following:

[0270] In addition, to simplify the description and discussion, and so as not to make the embodiments of the disclosure difficult to understand, the well-known power / ground connections to integrated circuit (IC) chips and other components can or can not be shown in the provided drawings. Further, devices can be shown in block diagram form in order to avoid making the embodiments of the disclosure difficult to understand, and this also takes into account the fact that details regarding implementation of these block diagram devices are highly dependent on the platform to which the embodiments of the disclosure are to be implemented (i.e., these details should be well within the understanding of one of ordinary skill in the art). Where specific details (e.g., circuitry) are set forth in order to describe an illustrative embodiment of the disclosure, it should be apparent to one of ordinary skill in the art that the embodiments of the disclosure can be practiced without or with variation of these specific details. Thus, these descriptions should not be construed as limiting, but merely as descriptive of illustrative embodiments of the disclosure.

[0271] While the disclosure has been described in connection with specific embodiments thereof, it will be understood that many modifications, variations and alternatives will be apparent to those skilled in the art as a result of the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) can use the embodiments discussed.

[0272] The embodiments of the disclosure are intended to cover all such alternatives, modifications, and variations as falling within the broad scope of the appended claims. Accordingly, any one of the steps of the embodiments of the disclosure can be performed in any order, and many of the steps can be performed in any order or in parallel, unless otherwise specified.

Claims

1. A memory access method based on a trusted execution environment, comprising: obtaining at least one to-be-processed data item to be written into the trusted execution environment; for at least part of the to-be-processed data items, calculating positions of a plurality of candidate data storage units corresponding to each of the to-be-processed data items, and constructing an association relationship between the to-be-processed data items and the plurality of candidate data storage units; wherein the plurality of candidate data storage units are deployed in the trusted execution environment; based on a preset oblivious matching algorithm and the association relationship, determining a matching relationship between the to-be-processed data items and a target data storage unit in the plurality of candidate data storage units; the determining of the matching relationship between the to-be-processed data items and the target data storage unit in the plurality of candidate data storage units based on the preset oblivious matching algorithm and the association relationship comprises: determining a first vertex set based on at least one of the to-be-processed data items, determining a second vertex set based on table entries corresponding to placement positions of the candidate data storage units in an index table, and determining an edge set based on the association relationship; finding an alternate path between each vertex in the first vertex set and each vertex in the second vertex set based on the edge set, and determining a path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set; and determining a matching relationship between the to-be-processed data items and table entries corresponding to the target data storage unit in the index table based on the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set; based on the matching relationship, writing the to-be-processed data items into the target data storage unit.

2. The method of claim 1, wherein, the calculating of the positions of the plurality of candidate data storage units corresponding to each of the to-be-processed data items comprises: calculating the placement positions of the candidate data storage units in the index table based on a preset number of hash functions, and the number of the hash functions is the same as the number of the candidate data storage units.

3. The method of claim 2, wherein, the number of the hash functions is 3-6.

4. The method of claim 1, wherein, the finding of the alternate path between each vertex in the first vertex set and each vertex in the second vertex set based on the edge set, and the determining of the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set comprises: obliviously first sorting the edge set based on a preset first priority rule; traversing the first sorted edge set, and constructing a first matching relationship between each vertex in the first vertex set and each vertex in the second vertex set; obliviously second sorting the edge set based on a preset second priority rule; traversing the second sorted edge set, adjusting the first matching relationship, and obtaining the path matching relationship.

5. The method of claim 4, wherein, the first priority rule comprises at least one of: setting edges pointing to the same vertex in the first vertex set in a group; directing edges from the second vertex set to the first vertex set first; directing free edges first; directing edges with smaller counts first.

6. The method of claim 4, wherein, the second priority rule comprises at least one of: setting edges pointing to the same vertex in the second vertex set in a group; directing edges from the second vertex set to the first vertex set first; Edges with larger counts are oriented first.

7. The method of claim 1, wherein, The writing of the to-be-processed data item into the target data storage unit comprises: The index information corresponding to the to-be-processed data item is written into a table entry corresponding to the target data storage unit in an index table.

8. The method of claim 7, further comprising: The table entries in the index table are hierarchically stored.

9. The method of claim 8, further comprising: obtaining a query request for a to-be-queried data item; hierarchically querying the index table based on the query request; in response to obtaining the index information corresponding to the to-be-queried data in a target hierarchy, obtaining the to-be-queried data item based on the index information; obtaining a first data item based on an oblivious algorithm for at least part of the remaining hierarchies, and obtaining a query result for the query request based on the to-be-queried data item and the first data item.

10. A memory access apparatus based on a trusted execution environment, comprising: an obtaining module configured to obtain at least one to-be-processed data item to be written into the trusted execution environment; a calculating module configured to, for at least part of the to-be-processed data items, calculate the positions of a plurality of candidate data storage units corresponding to each of the to-be-processed data items, and construct an association relationship between the to-be-processed data items and the plurality of candidate data storage units; wherein the plurality of candidate data storage units are deployed in the trusted execution environment; a determining module configured to, based on a preset oblivious matching algorithm and the association relationship, determine a matching relationship between the to-be-processed data items and a target data storage unit in the plurality of candidate data storage units; determine a first vertex set based on at least one of the to-be-processed data items, determine a second vertex set based on table entries corresponding to placement positions of the candidate data storage units in an index table, and determine an edge set based on the association relationship; find an alternate path between each vertex in the first vertex set and each vertex in the second vertex set based on the edge set, determine a path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set, and determine a matching relationship between the to-be-processed data items and a table entry corresponding to the target data storage unit in the index table based on the path matching relationship between each vertex in the first vertex set and each vertex in the second vertex set; a writing module configured to write the to-be-processed data items into the target data storage unit based on the matching relationship.

11. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the memory access method based on the trusted execution environment as claimed in any one of claims 1 to 9 when executing the program.

12. A non-transitory computer-readable storage medium storing computer instructions for causing a computer to execute the memory access method based on the trusted execution environment as claimed in any one of claims 1 to 9.

13. A computer program product, characterised in that, Computer program instructions, when executed on a computer, cause the computer to perform the memory access method based on the trusted execution environment according to any one of claims 1 to 9.

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