Quantum circuit construction method and device for sparse hamiltonian block coding

Abstract

The application discloses a quantum circuit construction method and device for sparse Hamiltonian block coding, and the method comprises the following steps: H decomposing the block coding operator U H into quantum gates U T and quantum gates U W , constructing a quantum circuit corresponding to the block coding operator U H based on the quantum gates U T and the quantum gates U W . It can be seen that, in the process of realizing Hamiltonian simulation, the Hamiltonian block coding operator can be decomposed into a plurality of quantum gates by using the block coding method, and a quantum circuit is constructed based on the quantum gates, which is favorable for reducing the demand of quantum algorithm on hardware resources and improving the efficiency of hardware resources in processing quantum problems.

Description

Technical Field

[0001] This invention relates to the field of quantum scientific computing, and in particular to a method and apparatus for constructing quantum circuits using sparse Hamiltonian block encoding. Background Technology

[0002] A quantum computer is a physical device that performs high-speed mathematical and logical operations, stores and processes quantum information in accordance with the laws of quantum mechanics. When a device processes and calculates quantum information and runs quantum algorithms, it is a quantum computer. Therefore, quantum computers have a much higher efficiency in processing mathematical problems than ordinary computers.

[0003] Quantum circuits are commonly used quantum computing models in the field of quantum computing. They represent, in an abstract sense, the circuitry that operates on qubits (qubits). They are collections of various quantum logic gates. In quantum computing, simulation primarily involves processing quantum state vectors using the operation matrices of quantum logic gates within a quantum program to obtain the final state after processing. Quantum logic gates are generally represented using unitary matrices, which are not only matrix forms but also represent operations and transformations.

[0004] In quantum mechanics, the energy of a system is described by the Hamiltonian operator H. Solving for all or part of the properties of the Hamiltonian of a given system constitutes a core problem in a series of disciplines such as condensed matter physics, computational chemistry, and high-energy physics. In the process of Hamiltonian simulation, traditional block coding methods are resource-intensive and inefficient. In contrast, methods relying on block coding (where block coding operators directly apply the Hamiltonian to the target quantum state through the introduction of auxiliary bits) are resource-efficient and highly effective. Therefore, there is an urgent need to provide a specific quantum circuit construction method for Hamiltonian simulation using block coding to reduce the hardware resource requirements of quantum algorithms while improving the efficiency of hardware resources in handling quantum problems. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a method and apparatus for constructing quantum circuits using sparse Hamiltonian block encoding, which can help reduce the hardware resource requirements of quantum algorithms and improve the efficiency of hardware resources in processing quantum problems.

[0006] To address the aforementioned technical problems, the first aspect of this invention discloses a method for constructing quantum circuits using sparse Hamiltonian block encoding, characterized in that the method comprises:

[0007] Determine the block coding operator U corresponding to the Hamiltonian H to be simulated. H The Hamiltonian H is a sparse Hermitian matrix representation with dimension N, and the block coding operator U HThe unitary matrix is ​​an extension based on the Hamiltonian H;

[0008] The block coding operator U H Decomposed into quantum gate U T and quantum gate U W The decomposition method is as follows:

[0009]

[0010] in, For the quantum gate U T The conjugate transpose matrix; the quantum gate U T and the quantum gate U W It is in unitary matrix form;

[0011] Based on the quantum gate U T and the quantum gate U W Construct the block coding operator U H The corresponding quantum circuit.

[0012] As an optional implementation, in the first aspect of the invention, the quantum gate U T By quantum gate U B and quantum gate U S Confirmation is confirmed, and the confirmation method is as follows:

[0013] U T =U B ·U S

[0014] Among them, the quantum gate U B and the quantum gate U S The quantum gate U is in unitary matrix form. S To exchange operator matrices, the following operations are implemented:

[0015] U S |j,k>=|k,j>

[0016] Where j and k represent the eigenstates with indices j and k, respectively; the quantum gate U S For a matrix where each row and each column contains only one element (1) and all other elements are zero, the element 1 is defined in the quantum gate U. S The position in the middle is as follows:

[0017]

[0018] j = a * 2N + b,

[0019] k = b * 2N + a;

[0020] where \(a,b\in[0,2N - 1]\); \(N\) is the dimension of the Hamiltonian \(H\). is the quantum gate \(U\) S the element in the corresponding matrix with row label \(j\) and column label \(k\).

[0021] As an optional implementation, in the first aspect of the present invention, the quantum gate \(U\) W is determined by the quantum gate \(U\) S and the quantum gate \(U\) M The determination method is as follows:

[0022] \(U\) W \(=\) \(U\) S \(U\) M

[0023] where the quantum gate \(U\) S and the quantum gate \(U\) M are in the form of unitary matrices.

[0024] As an optional implementation, in the first aspect of the present invention, the quantum gate \(U\) R is obtained by acting on the 0 - controlled quantum gate \(U\) C based on an auxiliary qubit. The method is as follows:

[0025]

[0026] where \(N\) is the dimension of the Hamiltonian \(H\), \(I\) is the identity matrix, and the quantum gate \(U\) B and the quantum gate \(U\) C are in the form of unitary matrices.

[0027] As an optional implementation, in the first aspect of the present invention, the quantum gate \(U\) M is obtained by the following method:

[0028]

[0029] where \(I\) is the identity matrix; is used for the tensor product calculation of vectors in two vector spaces, \(|j\rangle\) is the initial state right - vector of the qubit with serial number \(j\), \(\langle j|\) is the initial state left - vector of the qubit with serial number \(j\), \(N\) is the dimension of the Hamiltonian \(H\); the element \(A\) jk is the element in the vector matrix corresponding to the Hamiltonian \(H\) with row label \(j\) and column label \(k\); \(\text{sign}()\) represents taking the sign; \(N\) is the dimension of the Hamiltonian \(H\); \(i\) represents the unit imaginary number; \(s\) represents the number of all eigenstates of this group of qubits.

[0030] As an optional implementation, in the first aspect of the present invention, the quantum gate \(U\) C is constructed as follows:

[0031]

[0032] Among them, the quantum gate U C The corresponding matrix is ​​implemented N target matrices C j Composition; j∈[1,N]; the target matrix C j It is in unitary matrix form, where N is the dimension of the Hamiltonian H; element A jk The element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents signing; N is the dimension of the Hamiltonian H; i represents the unit imaginary number; s represents the number of all eigenstates of the group of qubits.

[0033] As an optional implementation, in the first aspect of the invention, the target matrix C j By quantum gate U G Quantum gates and quantum gates Confirmed, the calculation method is as follows:

[0034]

[0035] Among them, the quantum gate U G The quantum gate and the quantum gate It is in unitary matrix form and is constructed as follows:

[0036]

[0037] Where |0> represents the initial state of a group of qubits; s represents the number of all eigenstates of the group of qubits; l represents the index of each quantum eigenstate of the group of qubits; |l> represents the vector corresponding to the quantum eigenstate with index , of the group of qubits; element A jk The element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents taking the sign; N is the dimension of the Hamiltonian H; i represents the unit imaginary number.

[0038] As an optional implementation, in the first aspect of the invention, the quantum gate For a generalized block unitary matrix, its block elements are:

[0039]

[0040] Among them, elements Located in the quantum gate The element in the k-th row and k-th column of the corresponding matrix Located in the quantum gate The element in the k-th row and N+k-th column of the corresponding matrix Located in the quantum gate The element in the (N+k)th row and kth column of the corresponding matrix Located in the quantum gate The corresponding matrix is ​​in the (N+k)th row and (N+k)th column; N is the dimension of the Hamiltonian H; element A jk The element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents taking the sign, and i represents the imaginary unit.

[0041] A second aspect of the present invention discloses a quantum circuit construction device using sparse Hamiltonian block encoding, the device comprising:

[0042] The determination module is used to determine the block coding operator U corresponding to the Hamiltonian H to be simulated. H The Hamiltonian H is a sparse Hermitian matrix representation with dimension N, and the block coding operator U H The unitary matrix is ​​an extension based on the Hamiltonian H;

[0043] The decomposition module is used to decompose the block coding operator U H Decomposed into quantum gate U T and quantum gate U W The decomposition method is as follows:

[0044]

[0045] in, For the quantum gate U T The conjugate transpose matrix; the quantum gate U T and the quantum gate U W It is in unitary matrix form;

[0046] Building modules for using the quantum gate U T and the quantum gate U W Construct the block coding operator U H The corresponding quantum circuit.

[0047] As an optional implementation, in a second aspect of the invention, the quantum gate U T By quantum gate U B and quantum gate U S Confirmation is confirmed, and the confirmation method is as follows:

[0048] U T =U B ·U S

[0049] Among them, the quantum gate U B and the quantum gate U S The quantum gate U is in unitary matrix form. S To exchange operator matrices, the following operations are implemented:

[0050] U S |j,k>=|k,j>

[0051] Where j and k represent the eigenstates with indices j and k, respectively; the quantum gate U S For a matrix where each row and each column contains only one element (1) and all other elements are zero, the element 1 is defined in the quantum gate U. S The position in the middle is as follows:

[0052]

[0053] j = a * 2N + b,

[0054] k = b * 2N + a;

[0055] Where a, b ∈ [0, 2N-1]; N is the dimension of the Hamiltonian H. For the quantum gate U S The element in the matrix whose row label is j and column label is k.

[0056] As an optional implementation, in a second aspect of the invention, the quantum gate U W By the quantum gate U S and quantum gate U M Confirmation is confirmed, and the confirmation method is as follows:

[0057] U W =U S U M

[0058] Among them, the quantum gate U S and the quantum gate U M It is in unitary matrix form.

[0059] As an optional implementation, in a second aspect of the invention, the quantum gate U B The quantum gate U is controlled by an auxiliary bit through the action of 0. C The method to obtain it is as follows:

[0060]

[0061] Where N is the dimension of the Hamiltonian H, I is the identity matrix, and the quantum gate U B and the quantum gate U Cis in the form of a unitary matrix.

[0062] As an optional implementation, in the second aspect of the present invention, the quantum gate U M is obtained in the following manner:

[0063]

[0064] where I is the identity matrix; is used for the tensor product calculation of vectors in two vector spaces, |j> is the initial state ket of the qubit with serial number j, <j| is the initial state bra of the qubit with serial number j, and N is the dimension of the Hamiltonian H; the element A jk is the element in the vector matrix corresponding to the Hamiltonian H with row label j and column label k; sign() represents taking the sign; N is the dimension of the Hamiltonian H; i represents the imaginary unit; s represents the number of all eigenstates of this group of qubits.

[0065] As an optional implementation, in the second aspect of the present invention, the quantum gate U C is constructed as follows:

[0066]

[0067] where the quantum gate U C corresponding matrix is composed of N target matrices C ; j ∈ [1, N]; the target matrix C j is in the form of a unitary matrix, and N is the dimension of the Hamiltonian H; the element A j is the element in the vector matrix corresponding to the Hamiltonian H with row label j and column label k; jk sign() represents taking the sign; N is the dimension of the Hamiltonian H; i represents the imaginary unit; s represents the number of all eigenstates of this group of qubits. sign() represents taking the sign; N is the dimension of the Hamiltonian H; i represents the imaginary unit; s represents the number of all eigenstates of this group of qubits.

[0068] As an optional implementation, in the second aspect of the present invention, the target matrix Cj is determined by the quantum gate U G , the quantum gate and the quantum gate , and the calculation method is as follows:

[0069]

[0070] where the quantum gate U G , the quantum gate and the quantum gate are in the form of unitary matrices and are constructed as follows:

[0071]

[0072] Where |0> represents the initial state of a group of qubits; s represents the number of all eigenstates of the group of qubits; l represents the index of each quantum eigenstate of the group of qubits; |l> represents the vector corresponding to the quantum eigenstate with index , of the group of qubits; element A jk The element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents taking the sign; N is the dimension of the Hamiltonian H; i represents the unit imaginary number.

[0073] As an optional implementation, in a second aspect of the invention, the quantum gate For a generalized block unitary matrix, its block elements are:

[0074]

[0075] Among them, elements Located in the quantum gate The element in the k-th row and k-th column of the corresponding matrix Located in the quantum gate The element in the k-th row and N+k-th column of the corresponding matrix Located in the quantum gate The element in the (N+k)th row and kth column of the corresponding matrix Located in the quantum gate The corresponding matrix is ​​in the (N+k)th row and (N+k)th column; N is the dimension of the Hamiltonian H; element A jk The element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents taking the sign, and i represents the imaginary unit.

[0076] A third aspect of the present invention discloses another quantum circuit construction device using sparse Hamiltonian block encoding, the device comprising:

[0077] Memory containing executable program code;

[0078] A processor coupled to the memory;

[0079] The processor calls the executable program code stored in the memory to execute the steps in the sparse Hamiltonian block encoding quantum circuit construction method disclosed in the first aspect of the present invention.

[0080] The fourth aspect of the present invention discloses a computer storage medium storing computer instructions, which, when invoked, are used to execute steps in the sparse Hamiltonian block encoding quantum circuit construction method disclosed in the first aspect of the present invention.

[0081] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0082] In this embodiment of the invention, the block coding operator U corresponding to the Hamiltonian H to be simulated is determined. H The block coding operator U H Decomposed into quantum gate U T and quantum gate U W Based on the quantum gate U T and the quantum gate U W Construct the block coding operator U H As can be seen from the corresponding quantum circuits, this invention can decompose the block-coded operator of the Hamiltonian into multiple quantum gates and further construct quantum circuits based on the quantum gates in the process of realizing Hamiltonian simulation. Thanks to the advantages of block coding in terms of hardware resources and efficiency, this invention is conducive to reducing the hardware resource requirements of quantum algorithms and improving the efficiency of hardware resources in processing quantum problems. Attached Figure Description

[0083] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0084] Figure 1 This is a flowchart illustrating a method for constructing quantum circuits using sparse Hamiltonian block encoding, as disclosed in an embodiment of the present invention.

[0085] Figure 2 This is a circuit implementation diagram of a quantum circuit construction method using sparse Hamiltonian block encoding disclosed in an embodiment of the present invention;

[0086] Figure 3 This is a schematic diagram of the structure of a quantum circuit construction device using sparse Hamiltonian block encoding disclosed in an embodiment of the present invention;

[0087] Figure 4 This is a schematic diagram of another sparse Hamiltonian block-encoded quantum circuit construction device disclosed in an embodiment of the present invention. Detailed Implementation

[0088] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0089] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or end that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or ends.

[0090] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0091] It's important to note that a true quantum computer has a hybrid structure, comprising two main parts: a classical computer responsible for performing classical computations and control, and a quantum device responsible for running quantum programs to achieve quantum computation. A quantum program is a sequence of instructions written in a quantum language such as QRunes that can run on a quantum computer, supporting operations on quantum logic gates and ultimately enabling quantum computing. Specifically, a quantum program is a sequence of instructions that operates on quantum logic gates according to a specific timing order.

[0092] In practical applications, due to limitations in the development of quantum device hardware, quantum computing simulations are often required to verify quantum algorithms, quantum applications, and so on. Quantum computing simulation is the process of simulating the execution of a quantum program corresponding to a specific problem using a virtual architecture (i.e., a quantum virtual machine) built with the resources of a regular computer. Typically, it is necessary to construct a quantum program corresponding to a specific problem. The quantum program referred to in this embodiment of the invention is a program written in a classical language that represents qubits and their evolution, wherein qubits, quantum logic gates, etc., related to quantum computing all have corresponding classical code representations.

[0093] Quantum circuits, also known as quantum logic circuits, are a common manifestation of quantum programming and are the most widely used general-purpose quantum computing model. They represent circuits that operate on qubits under an abstract concept. They consist of qubits, circuits (timelines), and various quantum logic gates. Finally, the results are often read out through quantum measurement operations.

[0094] Quantum circuits can be represented as a sequence of quantum logic gates arranged in a specific time order. For example:

[0095] q0:RX(q0),H(q0),CNOT(q0,q2),X(q0)

[0096] q1:X(q1), RY(q1), H(q1), CNOT(q2,q1)

[0097] q2:H(q2),X(q2),CNOT(q0,q2),CNOT(q2,q1),RZ(q2)

[0098] Unlike traditional circuits that use metal wires to transmit voltage or current signals, in quantum circuits, the circuits can be seen as being connected by time. That is, the state of a quantum bit evolves naturally over time, following the instructions of the Hamiltonian operator, until it encounters a quantum logic gate and is manipulated.

[0099] A quantum program corresponds to a single quantum circuit. The quantum program described in this application refers to this single quantum circuit, where the total number of qubits in the single quantum circuit is the same as the total number of qubits in the quantum program. This can be understood as follows: a quantum program can consist of a quantum circuit, measurement operations on the qubits within the quantum circuit, registers storing the measurement results, and control flow nodes (jump instructions). A single quantum circuit can contain dozens, hundreds, or even thousands of quantum logic gate operations. The execution of a quantum program is the process of executing all the quantum logic gates in a specific timing order. It should be noted that the timing order refers to the chronological sequence in which individual quantum logic gates are executed.

[0100] It's important to note that in classical computing, the most basic unit is the bit, and the most fundamental control mode is the logic gate. Circuit control can be achieved through combinations of logic gates. Similarly, the way to process qubits is through quantum logic gates. Quantum logic gates enable the evolution of quantum states and are the foundation of quantum circuits. Quantum logic gates include single-qubit gates, such as Hadamard gates (H-gates), Pauli-X gates (X-gates), Pauli-Y gates (Y-gates), Pauli-Z gates (Z-gates), RX gates, RY gates, RZ gates, etc.; and multi-qubit quantum logic gates, such as CNOT gates, CR gates, iSWAP gates, Tofoli gates, etc. Quantum logic gates are generally represented using unitary matrices, which are not only matrix forms but also operations and transformations. The effect of a quantum logic gate on a quantum state is generally calculated by left-multiplying the unitary matrix by the matrix corresponding to the right vector of the quantum state.

[0101] A quantum state, or the logical state of a qubit, is represented in binary in quantum algorithms (or quantum programs). For example, a set of qubits q0, q1, and q2 represents the 0th, 1st, and 2nd qubits, ordered from most significant bit to least significant bit as q2q1q0. This set of qubits corresponds to a total of 2^(1 / 2) qubits, which refers to 8 eigenstates (determined states): |000>, |001>, |010>, |011>, |100>, |101>, |110>, and |111>. Each bit in a quantum state corresponds to a qubit. For example, in the |000> state, 000 corresponds to q2qlq0 from most significant bit to least significant bit. |> is the Dirac notation.

[0102] Taking a single qubit as an example, the logical state ψ of a single qubit may be in a superposition of the states |0>, |1>, and |0> and |1> (an uncertain state), specifically expressed as ψ = a|0> + b|1>, where a and b are complex numbers representing the amplitude (probability amplitude) of the quantum state, and the square of the amplitude represents the probability. 2 b 2 Let a represent the probabilities that the logical state is |0> and |1>, respectively. 2 +b 2 =1. In short, a quantum state is a superposition of eigenstates. When the probability of other states is 0, it is in a uniquely determined eigenstate.

[0103] This invention discloses a method and apparatus for constructing quantum circuits using sparse Hamiltonian block encoding. Implementing the method described in the embodiments of this invention not only helps reduce the hardware resource requirements of quantum algorithms but also improves the efficiency of hardware resources in processing quantum problems. These will be described in detail below.

[0104] Example 1

[0105] Please see Figure 1 , Figure 1 This is a flowchart illustrating a method for constructing quantum circuits using sparse Hamiltonian block encoding, as disclosed in an embodiment of the present invention. Figure 1 The described method can be applied to scenarios involving Hamiltonian simulation, as well as as a condition for implementing quantum algorithms such as quantum linear algorithms. It can also serve as a prerequisite for developing virtual machine solvers for the Quantum Discrete Adiabatic Linear Solver (QDALS). This invention does not limit the scope of the application. Based on this sparse Hamiltonian block encoding method for constructing quantum circuits, combinatorial optimization calculations or machine learning based on quantum computing can also be performed. Figure 1 As shown, the method for constructing quantum circuits using sparse Hamiltonian block encoding includes the following operations:

[0106] 101. Determine the block coding operator U corresponding to the Hamiltonian H to be simulated. H ;

[0107] In this embodiment of the invention, the Hamiltonian H is a sparse Hermitian matrix representation with dimension N, and the block coding operator U... H Let H be a unitary matrix extended from the Hamiltonian H; for an N-dimensional Hamiltonian H with sparsity S, when ||H|| max When ≤1, its dimension is 4N. 2 Block coding operator U H .

[0108] 102. The block coding operator U H Decomposed into quantum gate U T and quantum gate U W ;

[0109] In this embodiment of the invention, the decomposition method is as follows:

[0110]

[0111] in, For quantum gate U T The conjugate transpose of the quantum gate U; T and quantum gate U W It is in unitary matrix form; quantum gate U T and quantum gate U W The dimension is 4N 2 .

[0112] 103. Based on quantum gate U T and quantum gate U W Construct block coding operator U H The corresponding quantum circuit.

[0113] In this embodiment of the invention, quantum circuits are used to carry out quantum computation based on qubits and quantum logic gates; the data register requires n = logN bits, and the auxiliary register requires n + 2 bits. All quantum gates are obtained by multiplying other quantum gates (unitary matrices), therefore U H The computation process is purely unitary, which allows it to be implemented using quantum circuits.

[0114] As can be seen, the embodiments of the present invention can decompose the block-coded operator of the Hamiltonian into multiple quantum gates and further construct quantum circuits based on the quantum gates in the process of realizing Hamiltonian simulation. Thanks to the advantages of block coding in terms of hardware resources and efficiency, the present invention is conducive to reducing the hardware resource requirements of quantum algorithms and improving the efficiency of hardware resources in processing quantum problems.

[0115] In an optional embodiment, the quantum gate U T By quantum gate U B and quantum gate U S Confirmation is confirmed, and the confirmation method is as follows:

[0116] U T =U B ·U S

[0117] Among them, quantum gate U B and quantum gate U S For a dimension of 4N 2 The unitary matrix form of the quantum gate U S To exchange operator matrices, the following operations are implemented:

[0118] U S |j,k>=|k,j>

[0119] Where j and k represent the eigenstates with indices j and k, respectively; the quantum gate U S For a matrix where each row and each column contains only one element (1) and all other elements are zero, the element 1 is in the quantum gate U. S The position in the middle is as follows:

[0120]

[0121] j = a * 2N + b,

[0122] k = b * 2N + a;

[0123] Where a, b∈[0, 2N-1]; N is the dimension of the Hamiltonian H. For quantum gate U S The element in the matrix whose row label is j and column label is k.

[0124] As can be seen, this optional embodiment can utilize block coding to implement the quantum gate U during the Hamiltonian simulation process. T Decomposed into quantum gate U B and quantum gate U S Thanks to the advantages of block coding in terms of hardware resources and efficiency, this alternative embodiment can decompose quantum gate U T Further reduce the hardware resource requirements of quantum algorithms, while improving the efficiency of hardware resources in handling quantum problems.

[0125] In an optional embodiment, the quantum gate U W By quantum gate U S and quantum gate U M Confirmation is confirmed, and the confirmation method is as follows:

[0126] U W =U S U M

[0127] Among them, quantum gate U M and quantum gate U S For a dimension of 4N 2 It is in unitary matrix form.

[0128] As can be seen, this optional embodiment can utilize block coding to implement the quantum gate U during the Hamiltonian simulation process. W Decomposed into quantum gate U M and quantum gate U S Thanks to the advantages of block coding in terms of hardware resources and efficiency, this alternative embodiment can decompose quantum gate U W Further reduce the hardware resource requirements of quantum algorithms, while improving the efficiency of hardware resources in handling quantum problems.

[0129] In an optional embodiment, the quantum gate U B The quantum gate U is controlled by an auxiliary bit through the action of 0. C The method to obtain it is as follows:

[0130]

[0131] Where N is the dimension of the Hamiltonian H, I is the identity matrix, and U is the quantum gate. R For a dimension of 4N 2 The unitary matrix form of the quantum gate U c For a dimension of 2N 2 It is in unitary matrix form.

[0132] As can be seen, this optional embodiment can utilize block coding to implement the quantum gate U during the Hamiltonian simulation process. BDecompose into controlling the quantum gate U by acting 0 based on an auxiliary bit C Obtained, benefiting from the advantages of block encoding in terms of hardware resources and efficiency, this optional embodiment can decompose U R to further reduce the requirements of the quantum algorithm for hardware resources while improving the efficiency of the hardware resources in processing quantum problems.

[0133] In an optional embodiment, the quantum gate U M is obtained in the following manner:

[0134]

[0135] where I is the identity matrix; used for the tensor product calculation of vectors in two vector spaces, |j> is the right eigenvector of the initial state of the qubit with serial number j, <j| is the left eigenvector of the initial state of the qubit with serial number j, and N is the dimension of the Hamiltonian H; the element A jk is the element in the vector matrix corresponding to the Hamiltonian H with row label j and column label k; sign() represents taking the sign; N is the dimension of the Hamiltonian H; i represents the unit imaginary number; s represents the number of all eigenstates of this group of qubits.

[0136] It can be seen that this optional embodiment can further limit the acquisition method of the quantum gate U during the implementation of Hamiltonian simulation. Benefiting from the advantages of block encoding in terms of hardware resources and efficiency, this optional embodiment can further reduce the requirements of the quantum algorithm for hardware resources while improving the efficiency of the hardware resources in processing quantum problems. M

[0137] In an optional embodiment, the quantum gate U C is constructed as follows:

[0138]

[0139] where the dimension of the quantum gate U C is 2N 2 and the matrix corresponding to the quantum gate U C is composed of N target matrices C for realizing j ; j ∈ [1, N]; the target matrix C j is in the form of a 2N-dimensional unitary matrix, and N is the dimension of the Hamiltonian H; the element A jk is the element in the vector matrix corresponding to the Hamiltonian H with row label j and column label k; sign() represents taking the sign; N is the dimension of the Hamiltonian H; i represents the unit imaginary number; s represents the number of all eigenstates of this group of qubits.​

[0140] In this optional embodiment, C i All are unitary matrices, therefore the quantum gate U c It is definitely a unitary matrix. Based on this optional embodiment, the circuit implementation diagram of the sparse Hamiltonian block encoding quantum circuit construction method disclosed in this embodiment of the invention can be as follows: Figure 2 As shown.

[0141] As can be seen, this optional embodiment can utilize block coding to implement the quantum gate U during the Hamiltonian simulation process. C Decomposed into multiple 2N-dimensional target matrices C j Thanks to the advantages of block coding in terms of hardware resources and efficiency, this alternative embodiment can be implemented via U C The decomposition further reduces the hardware resource requirements of quantum algorithms, while improving the efficiency of hardware resources in processing quantum problems.

[0142] In an optional embodiment, the target matrix C j By quantum gate U G Quantum gates and quantum gates Confirmed, the calculation method is as follows:

[0143]

[0144] Among them, quantum gate U G Quantum gates and quantum gates It is in unitary matrix form and is constructed as follows:

[0145]

[0146] Where |0> represents the initial state of a group of qubits; s represents the number of all eigenstates of the group of qubits; l represents the index of each quantum eigenstate of the group of qubits; |l> represents the vector corresponding to the quantum eigenstate with index , of the group of qubits; element A jk Let j be the element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents retrieving the sign; N is the dimension of the Hamiltonian H; i represents the imaginary unit.

[0147] In this optional embodiment, the quantum gate U G Quantum gates and quantum gates The dimension is 2N, and the quantum gate U G Operating on n+1 bits, it can be implemented by log s controlled Hadamard gates; quantum gates It operates on n+1 bits; The operation involves swapping the ()th row and the kth row of the identity matrix, therefore it must be a unitary matrix.

[0148] As can be seen, this optional embodiment can utilize block coding to encode the target matrix C during the Hamiltonian simulation process. j Decomposed into quantum gate U G Quantum gates and quantum gates Thanks to the advantages of block coding in terms of hardware resources and efficiency, this alternative embodiment can achieve the desired result through the target matrix C. j The decomposition further reduces the hardware resource requirements of quantum algorithms, while improving the efficiency of hardware resources in processing quantum problems.

[0149] In an optional embodiment, quantum gates For a generalized block unitary matrix, its block elements are:

[0150]

[0151] Among them, elements Located in the quantum gate The element in the k-th row and k-th column of the corresponding matrix Located in the quantum gate The element in the k-th row and N+k-th column of the corresponding matrix Located in the quantum gate The element in the (N+k)th row and kth column of the corresponding matrix Located in the quantum gate The corresponding matrix is ​​in the (N+k)th row and (N+k)th column; N is the dimension of the Hamiltonian H; element A jk Let j be the element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents taking the sign, and i represents the imaginary unit.

[0152] As can be seen, this optional embodiment can further constrain the quantum gate by using block coding in the process of realizing Hamiltonian simulation. As the block element of a generalized block-based unitary matrix, this alternative embodiment benefits from the advantages of block coding in terms of hardware resources and efficiency, and can be implemented through quantum gates. The constraints further reduce the hardware resource requirements of quantum algorithms, while improving the efficiency of hardware resources in handling quantum problems.

[0153] Example 2

[0154] Please see Figure 3 , Figure 3 This is a schematic diagram of a quantum circuit construction device using sparse Hamiltonian block encoding, as disclosed in an embodiment of the present invention. Figure 3The described device can be applied to scenarios involving Hamiltonian simulation, as well as as a condition for implementing quantum algorithms such as quantum linear algorithms. It can also serve as a prerequisite for developing a virtual machine solver for the Quantum Discrete Adiabatic Linear Solver (QDALS). This invention does not limit the scope of the application. Based on this sparse Hamiltonian block encoding quantum circuit construction device, it can also perform combinatorial optimization calculations or machine learning based on quantum computing. Figure 3 As shown, the sparse Hamiltonian block-encoded quantum circuit construction device includes:

[0155] Module 201 is used to determine the block coding operator U corresponding to the Hamiltonian H to be simulated. H The Hamiltonian H is a sparse Hermitian matrix representation with dimension N, and the block coding operator U H It is a unitary matrix extended based on the Hamiltonian H;

[0156] Decomposition module 202 is used to decompose the block coding operator U H Decomposed into quantum gate U T and quantum gate U W The decomposition method is as follows:

[0157]

[0158] in, For quantum gate U T The conjugate transpose of the quantum gate U; T and quantum gate U W It is in unitary matrix form;

[0159] Module 203 is used for quantum gate U T and quantum gate U W Construct block coding operator U H The corresponding quantum circuit.

[0160] As can be seen, the apparatus described in the embodiments of the present invention can decompose the block-coded operator of the Hamiltonian into multiple quantum gates and further construct quantum circuits based on the quantum gates in the process of realizing Hamiltonian simulation. Thanks to the advantages of block coding in terms of hardware resources and efficiency, this apparatus is conducive to reducing the hardware resource requirements of quantum algorithms and improving the efficiency of hardware resources in processing quantum problems.

[0161] In an optional embodiment, the quantum gate U T By quantum gate U B And quantum gate UU S Confirmation is confirmed, and the confirmation method is as follows:

[0162] UT =U B ·UU S

[0163] Among them, quantum gate U B And quantum gate UU S It is in unitary matrix form, with quantum gate UU S To exchange operator matrices, the following operations are implemented:

[0164] U S |j,k>=|k,j>

[0165] Where j and k represent the eigenstates with indices j and k, respectively; the quantum gate U S For a matrix where each row and each column contains only one element (1) and all other elements are zero, the element 1 is in the quantum gate U. S The position in the middle is as follows:

[0166]

[0167] j = a * 2N + b,

[0168] k = b * 2N + a;

[0169] Where a, b∈[0, 2N-1]; N is the dimension of the Hamiltonian H. For quantum gate U S The element in the matrix whose row label is j and column label is k.

[0170] As can be seen, this optional embodiment can utilize block coding to implement the quantum gate U during the Hamiltonian simulation process. T Decomposed into quantum gate U B and quantum gate U S Thanks to the advantages of block coding in terms of hardware resources and efficiency, this alternative embodiment can decompose quantum gate U T Further reduce the hardware resource requirements of quantum algorithms, while improving the efficiency of hardware resources in handling quantum problems.

[0171] In an optional embodiment, the quantum gate U W By quantum gate U S and quantum gate U M Confirmation is confirmed, and the confirmation method is as follows:

[0172] U W =U S U M

[0173] Among them, quantum gate U S and quantum gate U M It is in unitary matrix form.

[0174] It can be seen that in the process of implementing Hamiltonian simulation, this optional embodiment can use the method of block encoding to decompose the quantum gate U W into the quantum gate U M and the quantum gate U S . Benefiting from the advantages of block encoding in terms of hardware resources and efficiency, this optional embodiment can further reduce the demand of the quantum algorithm for hardware resources by decomposing the quantum gate U W , and at the same time improve the efficiency of the hardware resources in processing quantum problems.

[0175] In an optional embodiment, the quantum gate U B is obtained by acting on the 0-controlled quantum gate U C based on an auxiliary qubit. The method is as follows:

[0176]

[0177] where N is the dimension of the Hamiltonian H, I is the identity matrix, and the quantum gates U B and the quantum gate U C are in the form of unitary matrices.

[0178] It can be seen that in the process of implementing Hamiltonian simulation, this optional embodiment can use the method of block encoding to decompose the quantum gate U B into the one obtained by acting on the 0-controlled quantum gate U C based on an auxiliary qubit. Benefiting from the advantages of block encoding in terms of hardware resources and efficiency, this optional embodiment can further reduce the demand of the quantum algorithm for hardware resources by decomposing U R , and at the same time improve the efficiency of the hardware resources in processing quantum problems.

[0179] In an optional embodiment, the quantum gate U M is obtained by the following method:

[0180]

[0181] where I is the identity matrix; is used for the tensor product calculation of vectors in two vector spaces, |j> is the right eigenvector of the initial state of the qubit with serial number j, <j| is the left eigenvector of the initial state of the qubit with serial number j, and N is the dimension of the Hamiltonian H; the element A jk is the element in the vector matrix corresponding to the Hamiltonian H with the row label j and the column label k; Sign() represents taking the sign; N is the dimension of the Hamiltonian H; i represents the unit imaginary number; s represents the number of all eigenstates of this group of qubits.

[0182] As can be seen, this optional embodiment can further constrain the quantum gate U by using a block coding method in the process of realizing Hamiltonian simulation. M Thanks to the advantages of block coding in terms of hardware resources and efficiency, this alternative embodiment can further reduce the hardware resource requirements of quantum algorithms while improving the efficiency of hardware resources in processing quantum problems.

[0183] In an optional embodiment, the quantum gate U C The construction method is as follows:

[0184]

[0185] Among them, quantum gate U C The corresponding matrix is ​​implemented N target matrices C j Composition; j∈[1,N]; target matrix C j It is in unitary matrix form, where N is the dimension of the Hamiltonian H; element A jk Let j be the element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents signing; N is the dimension of the Hamiltonian H; i represents the imaginary unit; s represents the number of all eigenstates of the group of qubits.

[0186] As can be seen, this optional embodiment can utilize block coding to implement the quantum gate U during the Hamiltonian simulation process. C Decomposed into multiple 2N-dimensional target matrices C j Thanks to the advantages of block coding in terms of hardware resources and efficiency, this alternative embodiment can be implemented via U C The decomposition further reduces the hardware resource requirements of quantum algorithms, while improving the efficiency of hardware resources in processing quantum problems.

[0187] In an optional embodiment, the target matrix C j By quantum gate U G Quantum gates and quantum gates Confirmed, the calculation method is as follows:

[0188]

[0189] Among them, quantum gate U G Quantum gates and quantum gates It is in unitary matrix form and is constructed as follows:

[0190]

[0191] Where |0> represents the initial state of a group of qubits; s represents the number of all eigenstates of the group of qubits; l represents the index of each quantum eigenstate of the group of qubits; |l> represents the vector corresponding to the quantum eigenstate with index , of the group of qubits; element A jk Let j be the element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents retrieving the sign; N is the dimension of the Hamiltonian H; i represents the imaginary unit.

[0192] As can be seen, this optional embodiment can utilize block coding to encode the target matrix C during the Hamiltonian simulation process. j Decomposed into quantum gate U G Quantum gates and quantum gates Thanks to the advantages of block coding in terms of hardware resources and efficiency, this alternative embodiment can achieve the desired result through the target matrix C. j The decomposition further reduces the hardware resource requirements of quantum algorithms, while improving the efficiency of hardware resources in processing quantum problems.

[0193] In an optional embodiment, quantum gates For a generalized block unitary matrix, its block elements are:

[0194]

[0195] Among them, elements Located in the quantum gate The element in the k-th row and k-th column of the corresponding matrix Located in the quantum gate The element in the k-th row and N+k-th column of the corresponding matrix Located in the quantum gate The element in the (N+k)th row and kth column of the corresponding matrix Located in the quantum gate The corresponding matrix is ​​in the (N+k)th row and (N+k)th column; N is the dimension of the Hamiltonian H; element A jk Let j be the element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; sign() represents taking the sign, and i represents the imaginary unit.

[0196] As can be seen, this optional embodiment can further constrain the quantum gate by using block coding in the process of realizing Hamiltonian simulation. As the block element of a generalized block-based unitary matrix, this alternative embodiment benefits from the advantages of block coding in terms of hardware resources and efficiency, and can be implemented through quantum gates. The constraints further reduce the hardware resource requirements of quantum algorithms, while improving the efficiency of hardware resources in handling quantum problems.

[0197] Example 3

[0198] Please see Figure 4 , Figure 4 This is a schematic diagram of another quantum circuit construction device using sparse Hamiltonian block encoding disclosed in an embodiment of the present invention. Figure 4 The sparse Hamiltonian block-encoded quantum circuit construction device shown may include:

[0199] Memory 301 storing executable program code;

[0200] Processor 302 coupled to memory 301;

[0201] The processor 302 calls the executable program code stored in the memory 301 to execute the steps in the sparse Hamiltonian block encoding quantum circuit construction method described in Embodiment 1 or Embodiment 2 of the present invention.

[0202] Example 4

[0203] This invention discloses a computer storage medium storing computer instructions. When these computer instructions are invoked, they are used to execute the steps in the sparse Hamiltonian block encoding quantum circuit construction method described in Embodiment 1 of this invention.

[0204] Example 5

[0205] This invention discloses a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to perform the steps in the sparse Hamiltonian block-encoded quantum circuit construction method described in Embodiment 1.

[0206] The system embodiments described above are merely illustrative. The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0207] Through the detailed description of the above embodiments, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, including read-only memory (ROM), random access memory (RAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), one-time programmable read-only memory (OTPROM), electrically-Erasable Programmable Read-Only Memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, disk storage, magnetic tape storage, or any other computer-readable medium that can be used to carry or store data.

[0208] Finally, it should be noted that the sparse Hamiltonian block encoding quantum circuit construction method and apparatus disclosed in the embodiments of the present invention are merely preferred embodiments of the present invention and are only used to illustrate the technical solutions of the present invention, not to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for constructing quantum circuits using sparse Hamiltonian block encoding, characterized in that, The method comprises: determining a block encoding operator corresponding to a Hamiltonian H to be simulated , the Hamiltonian H being in a sparse Hermite matrix representation form with a dimension of N, the block encoding operator being a unitary matrix expanded on the basis of the Hamiltonian H; The block encoding operator Decomposed into quantum gates And quantum gates In the following way: wherein, is a conjugate transpose of the quantum gate ; the quantum gate and the quantum gate are unitary matrices. based on the quantum gate and the quantum gate , constructing the block encoding operator corresponding quantum circuit.

2. The method of Claim 1, wherein, The quantum gate By the quantum gate And the quantum gate Determination, the determination method is as follows: Wherein the quantum gate and the quantum gate are in the form of a unitary matrix, the quantum gate is in the form of a permutation operator matrix, for implementing the following operations: wherein, an eigenstate of index j and an eigenstate of index k; the quantum gate is a matrix having only one element 1 for each row and each column and other elements being 0, the element 1 being in the position of the quantum gate . wherein, ; N is the dimension of the Hamiltonian H, is the quantum gate corresponding to the element in the matrix with row label j and column label k.

3. The method of Claim 2, wherein, The quantum gate By the quantum gate And quantum gate Determined, the determination method is as follows: Wherein the quantum gate and the quantum gate are in the form of a unitary matrix.

4. The method for constructing a sparse Hamiltonian block encoded quantum circuit according to claim 2 or 3, wherein, The quantum gate Controlling quantum gates by acting 0 based on one ancilla bit Obtained, the method is as follows: where N is the dimension of the Hamiltonian H, is the identity matrix, the quantum gate and the quantum gate is a unitary matrix.

5. The method of Claim 4, wherein, The quantum gate Obtained by the following manner: in, It is the identity matrix; Used for calculating the tensor product of vectors in two vector spaces. For the serial number The initial right vector of the qubit, For the serial number The initial state left vector of the qubit, where N is the dimension of the Hamiltonian H; element The element with row label j and column label k in the vector matrix corresponding to the Hamiltonian H; ; The sign represents the value; N is the dimension of the Hamiltonian H; The imaginary unit represents the unit; This represents the number of all eigenstates of the set of qubits.

6. The method of Claim 5, wherein, The quantum gate The construction is as follows: The quantum gate The corresponding matrix is composed of N target matrices implemented by ; ; the target matrices are unitary matrices, N is the dimension of the Hamiltonian H; the element is the element in the Hamiltonian H corresponding to the row label j and the column label k in the vector matrix; ; represents the sign; N is the dimension of the Hamiltonian H; represents the unit imaginary number; represents the number of all eigenstates of the group of quantum bits.

7. The method of Claim 6, wherein, The target matrix By quantum gate , quantum gate And quantum gate Determined, the calculation is as follows: Wherein, the quantum gate , the quantum gate , and the quantum gate are unitary matrix forms, and are constructed as follows: wherein, represents an initial state of a set of qubits; s represents the number of eigenstates of the set of qubits; and l represents the serial number of each quantum eigenstate of the set of qubits; represents a vector corresponding to the quantum eigenstate with the serial number l of the set of qubits; and the element is an element in the vector matrix corresponding to the Hamiltonian H with the row label j and the column label k; ; represents a sign; and N is the dimension of the Hamiltonian H; represents a unit imaginary number.

8. The method of Claim 7, wherein, The quantum gate is a generalized block unitary matrix, whose block unitary is wherein the element located in the quantum gate corresponding matrix in the jth row and the kth column located in the quantum gate corresponding matrix in the jth row and the kth column located in the quantum gate corresponding matrix in the jth row and the kth column located in the quantum gate corresponding matrix in the jth row and the kth column located in the quantum gate corresponding matrix in the jth row and the kth column located in the quantum gate corresponding matrix in the jth row and the kth column located in the quantum gate corresponding matrix in the jth row and the kth column located in the quantum gate corresponding matrix in the jth row and the kth column; N is the dimension of the Hamiltonian H; the element is the element of the Hamiltonian H in the vector matrix with row index j and column index k; ; denotes the imaginary unit, denotes the imaginary unit.

9. A quantum circuit construction device using sparse Hamiltonian block encoding, characterized in that, The device comprises: A determining module is configured to determine a block encoding operator corresponding to a Hamiltonian H to be simulated , the Hamiltonian H is in a sparse Hermite matrix representation form, and the dimension of the Hamiltonian H is N, and the block encoding operator is a unitary matrix expanded on the basis of the Hamiltonian H; a decomposition module for decomposing said block encoding operator into quantum gates and quantum gates in the following way: wherein, is a conjugate transpose of the quantum gate ; the quantum gate and the quantum gate is a unitary matrix form; a construction module for constructing the block encoding operator based on the quantum gate and the quantum gate , the block encoding operator corresponding quantum circuit.

10. A quantum circuit construction device using sparse Hamiltonian block encoding, characterized in that, The device comprises: a memory storing executable program code; a processor coupled with the memory; the processor invokes the executable program code stored in the memory to perform the steps in the sparse Hamiltonian block encoding quantum circuit construction method according to any one of claims 1-8.

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