Task scheduling optimization method, device, equipment, storage medium and chip

Abstract

The present disclosure relates to a task scheduling optimization method, device, equipment, storage medium and chip, which can be applied to the field of autonomous driving, wherein the method includes: obtaining the prior information of each of the m nodes in the task directed graph, m is a positive integer, and the prior information at least includes the communication link where the corresponding node is located, the deadline of the communication link, the trigger mode, the trigger cycle and the execution duration; based on the prior information of each of the m nodes, the initial solution calculation of the task scheduling is performed to obtain the initial solution information of each of the m nodes, and the initial solution information includes at least one of the initial priority, the initial binding core and the initial phase; based on the initial solution information of each of the m nodes, the optimization calculation is performed to obtain the optimal solution information of the m nodes, and the optimal solution information corresponds to the initial solution information. In this way, it is possible to solve the technical problems existing in the related technology that the actual scheduling is not optimal in output.

Description

Technical Field

[0001] The present disclosure relates to the field of computer processing technology, and in particular to a task scheduling optimization method, device, equipment, storage medium and chip. Background Art

[0002] Task scheduling technology is one of the key technologies in real-time systems. The purpose of real-time task scheduling is to ensure that each task meets its time constraints as much as possible and respond to external requests in a timely manner. Real-time scheduling technology can usually be divided into multiple methods. For example, in autonomous driving real-time systems, it can include static table-driven and priority-driven strategies. At present, real-time task scheduling (such as real-time scheduling of autonomous driving tasks) is mostly focused on theoretical research and discussion, and on the basis of ensuring that deadline tasks do not miss the deadline, resource utilization is improved. However, it is found in practice that there are still some shortcomings. For example, current research mostly determines the priority of tasks based on cycle and deadline, while ignoring the impact and value density of real-time tasks on the entire system, making the actual scheduling not optimal in output.

[0003] Therefore, it is urgent to propose a task scheduling optimization solution. Summary of the invention

[0004] In order to overcome the problems existing in the related art, the present disclosure provides a task scheduling optimization method, device, equipment, storage medium and chip to solve the technical problems existing in the above-mentioned related art that the actual scheduling is not optimal in output.

[0005] According to a first aspect of an embodiment of the present disclosure, a task scheduling optimization method is provided, comprising:

[0006] Obtaining prior information of m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of a communication link where the corresponding node is located, a deadline of the communication link, a triggering mode, a triggering cycle, and an execution duration;

[0007] Calculate an initial solution for task scheduling based on the prior information of each of the m nodes to obtain initial solution information of each of the m nodes, where the initial solution information includes at least one of an initial priority, an initial core binding, and an initial phase;

[0008] An optimization calculation is performed based on the initial solution information of each of the m nodes to obtain optimal solution information of the m nodes, where the optimal solution information corresponds to the initial solution information.

[0009] In some embodiments, the initial solution information includes an initial priority, the communication link includes a critical link, the critical link includes a directed edge between nodes, and the initial solution calculation of task scheduling based on the prior information of each of the m nodes to obtain the initial solution information of each of the m nodes includes:

[0010] Prioritizing the critical link based on the deadline of the critical link to obtain the priority of the critical link;

[0011] Based on the priority of the critical link, configuring the priority of each node in the critical link to obtain the initial priority of each node in the critical link;

[0012] The priority of the critical link is negatively correlated with the deadline of the critical link, and the initial priority of the predecessor node in the critical link is higher than the initial priority of the successor node in the critical link.

[0013] In some embodiments, the initial solution information includes an initial priority, the communication link includes a non-critical link, the non-critical link includes a node, and the initial solution calculation of the task scheduling based on the prior information of each of the m nodes to obtain the initial solution information of each of the m nodes includes:

[0014] Based on the triggering period of the non-critical link, priority configuration is performed on the nodes in the non-critical link to obtain the initial priority of the nodes in the non-critical link;

[0015] The initial priority of the node in the non-critical link is negatively correlated with the triggering period of the non-critical link.

[0016] In some embodiments, the initial solution information includes an initial phase, and the initial solution calculation for task scheduling based on the prior information of each of the m nodes to obtain the initial solution information of each of the m nodes includes:

[0017] Repeatedly traverse each node in the communication link and perform the following steps until each node meets the corresponding execution time requirement:

[0018] When the triggering mode of the node is time triggering, updating the initial phase of the node based on the initial phase of the first predecessor node and the execution duration of the first predecessor node; and / or,

[0019] When the node is a cross node, determining the second predecessor nodes corresponding to all communication links where the cross node is located, and updating the initial phase of the cross node based on the initial phase and execution duration of each of the second predecessor nodes;

[0020] Among them, the first predecessor node is the predecessor node of the node, and the triggering mode of the predecessor node is the time trigger; the second predecessor node is the predecessor node of the node in the corresponding communication link, and the triggering mode of the predecessor node is the time trigger; the intersection node is a node where at least two of the communication links intersect.

[0021] In some embodiments, updating the initial phase of the cross node based on the initial phase and execution duration of each of the second predecessor nodes includes:

[0022] Based on the initial phases of the second predecessor nodes, selecting the second predecessor node with the largest initial phase as the target predecessor node;

[0023] Based on the initial phase and execution duration of the target predecessor node, the initial phase of the intersection node is updated.

[0024] In some embodiments, the method further comprises:

[0025] When the triggering mode of the node is message triggering, phase assignment and updating of the node are prohibited.

[0026] In some embodiments, the initial solution information includes an initial core binding, and the initial solution calculation for task scheduling based on the prior information of each of the m nodes to obtain the initial solution information of each of the m nodes includes:

[0027] Traverse the nodes in the sorting result and execute the following steps until all the m nodes are assigned to the cores:

[0028] Based on the triggering period of all nodes currently bound to s cores in the electronic device, determine the saturation of each of the s cores, where the saturation is used to reflect the contention of the corresponding core, and s is a positive integer;

[0029] Based on the saturation of each of the s cores, the current node is allocated to the core with the smallest saturation among the s cores, so as to obtain an initial bound core of the current node;

[0030] The current node is the node currently traversed in the sorting result, and the sorting result is a result obtained by sorting the m nodes based on their respective initial priorities.

[0031] In some embodiments, performing optimization calculation based on the initial solution information of each of the m nodes to obtain the optimal solution information of the m nodes includes:

[0032] Determine the objective function and constraints;

[0033] Based on the objective function and the constraint conditions, optimizing the initial solution information of each of the m nodes to obtain the optimal solution information of the m nodes;

[0034] Among them, the objective function is used to indicate the weighted sum of the normalized end-to-end delay and the normalized jitter crossing rate, the normalized end-to-end delay is obtained by normalizing the end-to-end delay of the key link in the task directed graph, and the normalized jitter crossing rate is obtained by normalizing the inter-frame jitter crossing rate of the node in the task directed graph, and the constraint conditions include: the proportion of the number of frame tasks in the node that exceed the trigger period within the preset time length to the total number of frame tasks of the node does not exceed a preset first threshold; and / or the completion time difference between any adjacent frame tasks in the node does not exceed a preset second threshold.

[0035] In some embodiments, the optimizing the initial solution information of each of the m nodes based on the objective function and the constraint condition to obtain the optimal solution information of the m nodes includes:

[0036] The simulated annealing algorithm is called to iteratively adjust the initial solution information of each of the m nodes to minimize the objective function when the constraint condition is met, thereby outputting the optimal solution information of the m nodes.

[0037] In some embodiments, the triggering method includes time triggering and message triggering.

[0038] According to a second aspect of an embodiment of the present disclosure, a task scheduling optimization device is provided, including:

[0039] An acquisition module is configured to acquire prior information of each of m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of a communication link where the corresponding node is located, a deadline of the communication link, a triggering mode, a triggering cycle, and an execution duration;

[0040] A processing module is configured to calculate an initial solution of task scheduling based on the prior information of each of the m nodes, and obtain initial solution information of each of the m nodes, wherein the initial solution information includes at least one of an initial priority, an initial core binding, and an initial phase;

[0041] The processing module is further configured to perform optimization calculation based on the initial solution information of each of the m nodes to obtain optimal solution information of the m nodes, wherein the optimal solution information corresponds to the initial solution information.

[0042] For the contents not introduced or described in the embodiments of the present disclosure, please refer to the relevant introduction in the aforementioned method embodiments, and the embodiments of the present disclosure are not limited thereto.

[0043] According to a third aspect of an embodiment of the present disclosure, there is provided an electronic device, comprising: a processor; and a memory for storing processor executable instructions; wherein the processor is configured to execute the executable instructions to implement the steps of the above-mentioned task scheduling optimization method.

[0044] According to a fourth aspect of an embodiment of the present disclosure, a computer-readable storage medium is provided, on which computer program instructions are stored. When the program instructions are executed by a processor, the steps of the task scheduling optimization method provided in the first aspect of the present disclosure are implemented.

[0045] According to a fifth aspect of an embodiment of the present disclosure, a chip is provided, including: a processor and an interface; the processor is used to read instructions to execute the steps of the above-mentioned task scheduling optimization method.

[0046] The technical solution provided by the embodiments of the present disclosure may include the following beneficial effects: the electronic device obtains the prior information of each of the m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of the communication link where the corresponding node is located, the deadline of the communication link, the trigger mode, the trigger cycle, and the execution duration; the initial solution calculation of the task scheduling is performed based on the prior information of each of the m nodes, and the initial solution information of each of the m nodes is obtained, and the initial solution information includes at least one of the initial priority, the initial binding core, and the initial phase; the optimization calculation is performed based on the initial solution information of each of the m nodes, and the optimal solution information of the m nodes is obtained, and the optimal solution information corresponds to the initial solution information. In this way, the initial solution information of the node can be optimized, thereby reducing the scheduling delay of the node task, and at the same time, it can solve the technical problems existing in the related technology that the actual scheduling is not optimal in output.

[0047] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0049] Figure 1 The diagram is a schematic diagram of a topological structure of a task directed graph according to an exemplary embodiment.

[0050] Figure 2 It is a flowchart of a task scheduling optimization method according to an exemplary embodiment.

[0051] Figure 3 The figure is a schematic diagram of a process of initial priority allocation according to an exemplary embodiment.

[0052] Figure 4 The diagram is a schematic diagram of a cross node according to an exemplary embodiment.

[0053] Figure 5 The figure is a schematic diagram of another process of initial priority allocation according to an exemplary embodiment.

[0054] Figure 6 The figure is a schematic diagram of a process of initial phase allocation according to an exemplary embodiment.

[0055] Figure 7 It is a schematic diagram of the topological structure of another task directed graph according to an exemplary embodiment.

[0056] Figure 8 The figure is a schematic diagram of a process of initial core binding allocation according to an exemplary embodiment.

[0057] Fig. 9 It is a schematic diagram of a flow chart of optimization calculation according to an exemplary embodiment.

[0058] Fig.10 The diagram is a schematic diagram of task scheduling according to an exemplary embodiment.

[0059] Fig.11 It is a structural diagram of a task scheduling optimization device according to an exemplary embodiment.

[0060] Fig.12 The diagram is a schematic structural diagram of an electronic device according to an exemplary embodiment.

[0061] Fig.13 It is a schematic structural diagram of a vehicle according to an exemplary embodiment.

[0062] Fig.14 The figure is a schematic diagram showing the structure of a chip according to an exemplary embodiment. DETAILED DESCRIPTION

[0063] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0064] It should be noted that all actions of acquiring signals, information or data in the present disclosure are performed with the authorization given by the owner of the corresponding device.

[0065] In real-time scheduling, such as in the real-time scheduling system of autonomous driving. The autonomous driving system can be modeled as a directed graph (DG) consisting of multiple nodes and the data dependencies between them. Among them, the node represents the autonomous driving task, and the directed edge represents the data flow between the nodes. For example, the sensor node can transmit the collected data to the path planning node, and the path planning node sends the control signal to the control node. Generally speaking, the triggering methods of the node include time triggering and message triggering. Among them, time triggering means that when the set trigger period is reached, the node can be triggered to generate a frame task and wait for execution. Message triggering means that the node needs to wait for the message received from the predecessor node before it triggers the node to generate a frame task and wait for execution. Any two frame tasks of the same node do not overlap / intersect in time. When the node is triggered, a task instance (that is, the task instance corresponding to the frame task) will be created. The task instance obtains data from the input channel, performs corresponding logical processing, and writes the calculation results to the output channel.

[0066] In order to ensure the real-time performance of the autonomous driving system, on the one hand, it is necessary to ensure that the end-to-end delay of the key link meets the constraints so that the sensor data can act on the control node in time; on the other hand, it is also necessary to ensure that the frame rate of the nodes on the non-link meets the constraints so that the intermediate calculation results can be released in time. Among them, the key link refers to a path composed of a series of interdependent nodes and directed edges between them. Data is transmitted between task instances and dependent edges in sequence, forming a complete sequence from the source node to the target node, which is called a propagation chain of the key link. The end-to-end delay refers to the difference between the time when the first task instance (i.e., frame task) on the propagation chain is triggered and the time when the last task instance completes its processing task. The frame rate constraint of the node means that each task instance (i.e., frame task) can be executed within its deadline (also called the target cycle) after being triggered.

[0067] In order to improve stability, the scheduling process of the autonomous driving system must also be deterministic. The determinism of the autonomous driving system is reflected in the fact that the end-to-end delay of the key link and the jitter degree of the node meet the constraints. Among them, node jitter can represent the time difference between two adjacent task instances of the same node when they are first scheduled to the computing unit. The above constraints require the system to eliminate randomness in the operation process as much as possible. Due to the complexity of autonomous driving tasks and dependencies, and the resource limitations of computing units, it is a challenging task to ensure the real-time and deterministic nature of the autonomous driving system at the same time.

[0068] In order to solve the above problems, the present disclosure provides a task scheduling optimization method, device, equipment, storage medium and chip. The following first introduces some embodiments to which the present disclosure is applicable.

[0069] Tasks in real-time scheduling systems (such as autonomous driving system tasks) can be modeled as task directed graphs ,in and They are the task node set and edge set of the communication link of the real-time scheduling system, which can also be called node set and edge set respectively. , represents a task in the real-time scheduling system, each edge in the edge set Representation Node Depends on The data / message generated by the node The set of predecessor nodes can be expressed as ,node The set of successor nodes can be expressed as .

[0070] According to the node triggering mode, the node set can be divided into a time-triggered node set and a message-triggered node set, which are represented as . For time-triggered nodes (hereinafter referred to as time-triggered nodes) , consisting of five tuples Among them, They correspond to the trigger period, execution duration, priority, phase, and core binding of the node. Core binding refers to which core processor of the electronic device the node (specifically, the frame task of the node) is bound to for processing. The trigger time of the time-triggered node Depend on and Determine, which can be expressed as , n is the nth frame task of the node. For message-triggered nodes (hereinafter referred to as message-triggered nodes) , also composed of five tuples Among them, Indicates the trigger node of the node. Other parameters are the same as those of the time trigger node and will not be repeated here. Both . The message trigger node is on the dependency edge When there is data update, it is triggered and a task instance (i.e. frame task) is issued.

[0071] Message trigger node The time triggers the predecessor node It can be defined as shown in the following formula (1):

[0072] Formula (1)

[0073] Among them, the message trigger node Its time triggers the predecessor node The trigger cycle is the same as that of For The time triggers the predecessor node Departure, delivery to The node sequence passed is defined as shown in the following formula (2):

[0074] Formula (2)

[0075] Among them, [ ] represents a node set and U represents a union.

[0076] The set of critical links in the system can be defined as Each key link represents a node sequence , where |X| represents the length of sequence X. Among them, two adjacent nodes and There is an edge between ; That is, for all , both .

[0077] For example, see Figure 1 is a schematic diagram of a task directed graph according to an exemplary embodiment. Figure 1 The task directed graph shown in Figure 1 contains 12 nodes, 4 communication links, and directed edges between nodes. The 12 nodes are to The four communication links are as shown in the figure: ; , ; , ; , As shown in the figure, for the node For example, its predecessor node is , the successor node is .

[0078] The real-time scheduling system involved in the present disclosure can be applied to real-time scheduling in any field, such as real-time scheduling of autonomous driving, real-time scheduling of robots, real-time scheduling of drones, or other application fields or application scenarios that support real-time scheduling, etc., and the present disclosure does not make too many limitations or details on this.

[0079] Based on the above examples, see Figure 2 FIG. 1 is a flow chart of a task scheduling optimization method according to an exemplary embodiment. Figure 2 The method shown can be applied to an electronic device, and the method may include the following implementation steps:

[0080] S201. Obtain the prior information of each of the m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of the communication link where the corresponding node is located, the deadline of the communication link, the triggering mode, the triggering period, and the execution duration.

[0081] The above-mentioned prior information in the present disclosure may be information pre-customized and configured according to the actual needs of the system, which may include but is not limited to any one or more combinations of the following information: communication links included in the task directed graph, deadlines of communication links, triggering methods of nodes, triggering cycles of nodes, execution duration of nodes or other custom information.

[0082] Among them, the communication link may include a critical link and / or a non-critical link, where the critical link refers to a path composed of a series of mutually dependent nodes and directed edges between nodes in a task directed graph. The non-critical link here may refer to a single or independent node in a task directed graph without a data dependency relationship, and the non-critical link usually includes a single / independent node. The present disclosure does not limit the number of the above-mentioned critical links and the above-mentioned non-critical links, which may be one or more, and will be determined according to the actual situation, and the present disclosure does not limit this. For the convenience of describing the relevant content, the present disclosure will hereinafter explain the relevant content with a critical link and a non-critical link. In practical applications, the number of the above-mentioned critical links or the above-mentioned non-critical links may be multiple, and multiple critical links may also be executed according to the corresponding description implementation principle of a critical link, and multiple non-critical links may also be executed according to the corresponding description implementation principle of a non-critical link. The present disclosure does not make too many restrictions and details. The above-mentioned triggering mode may include time triggering or message triggering, which may correspond to the relevant introduction in the aforementioned embodiment, and will not be repeated here. The above-mentioned triggering period may refer to the time period of the triggering node (specifically, it may be the frame task in the node). The execution time mentioned above may refer to the time required for executing each frame task in the node.

[0083] The present disclosure does not limit the implementation method for obtaining the above-mentioned prior information. For example, it can be obtained from other devices (such as servers or terminal devices) through the network, or directly obtained from the local database of the system.

[0084] S202. Calculate an initial solution for task scheduling based on the prior information of each of the m nodes to obtain initial solution information of each of the m nodes, where the initial solution information includes at least one of an initial priority, an initial core binding, and an initial phase.

[0085] In the present disclosure, the above-mentioned initial priority refers to the priority configured for the node, which can be used to affect the scheduling and execution of the corresponding frame task in the node. The above-mentioned initial binding core refers to the core or core bound to the node configuration, which can be used to provide corresponding computing resources for the node (specifically, the corresponding frame task in the node). The above-mentioned initial phase refers to the phase configured for the node, and each node can execute / complete the corresponding frame task at a fixed but unequal phase interval.

[0086] S203 . Perform optimization calculation based on the initial solution information of each of the m nodes to obtain optimal solution information of the m nodes, where the optimal solution information corresponds to the initial solution information.

[0087] In the present disclosure, the above-mentioned optimal solution information and the initial solution information of the above-mentioned node correspond one to one, which may specifically include, for example, at least one of the following: optimal priority, optimal binding core and optimal phase.

[0088] The electronic devices involved in the present disclosure may also be referred to as terminal devices (terminal), user equipment (UE), mobile station (MS), mobile terminal (MT), etc. The above-mentioned electronic devices may be automobiles with communication functions, smart cars, drones, robots, mobile phones (Mobile Phones), wearable devices, tablet computers (Pads), computers with wireless transceiver functions, virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, wireless terminal devices in industrial control (Industrial Control), wireless terminal devices in self-driving, wireless terminal devices in remote medical surgery, wireless terminal devices in smart grids (Smart Grid), wireless terminal devices in transportation safety (Transportation Safety), wireless terminal devices in smart cities (Smart City), wireless terminal devices in smart homes (Smart Home), etc. The embodiments of the present disclosure do not limit the specific technology and specific device form adopted by the electronic devices.

[0089] By implementing the disclosed embodiment, the electronic device obtains the prior information of each of the m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of the communication link where the corresponding node is located, the deadline of the communication link, the trigger mode, the trigger cycle, and the execution duration; based on the prior information of each of the m nodes, the initial solution calculation of the task scheduling is performed to obtain the initial solution information of each of the m nodes, and the initial solution information includes at least one of the initial priority, the initial binding core, and the initial phase; based on the initial solution information of each of the m nodes, the optimization calculation is performed to obtain the optimal solution information of the m nodes, and the optimal solution information corresponds to the initial solution information. In this way, the initial solution information of the node can be optimized, thereby reducing the scheduling delay of the node task, and at the same time, it can solve the technical problems existing in the related technology that the actual scheduling is not optimal in output.

[0090] The present disclosure does not limit the specific implementation of the above step S202. Figures 3 to 8 In this disclosure, there may be one or more communication links included in the task directed graph, which can be determined according to actual conditions, and this disclosure does not make too many restrictions on this. When the above communication link includes a key link, please refer to Figure 3 FIG. 1 is a flow chart showing an initial priority allocation process according to an exemplary embodiment. Figure 3 The flowchart shown may include the following implementation steps:

[0091] S301: Priority configuration is performed on the key link based on the deadline of the key link to obtain the priority of the key link.

[0092] The present disclosure can configure a priority for a critical link according to the deadline of the critical link itself, thereby obtaining the priority of the critical link. Usually, the priority of the critical link is negatively correlated with the deadline of the critical link, that is, the shorter the deadline of the critical link, the higher the priority of the critical link; conversely, the longer the deadline of the critical link, the lower the priority of the critical link.

[0093] S302. Based on the priority of the critical link, each node in the critical link is prioritized to obtain the initial priority of each node in the critical link; wherein the priority of the critical link is negatively correlated with the deadline of the critical link, and the initial priority of the predecessor node in the critical link is higher than the initial priority of the successor node in the critical link.

[0094] The present disclosure can configure the priority of each node in the critical link based on the priority of the critical link to obtain the initial priority of each node in the critical link. For each critical link, the initial priority of the predecessor node in the critical link will be higher than the initial priority of its successor node.

[0095] In an optional embodiment, when there are at least two communication links (specifically, key links) in the above task directed graph with crossover / crossover nodes, the present disclosure configures or reconfigures the priorities of the crossover node and all its successor nodes in the key link based on the principle that the priority of the predecessor node is higher than the priority of the successor node in the same link when configuring the priority of each node in the key link with a lower priority. For example, see Figure 4 Schematic diagram of a cross node shown in the present disclosure. Figure 4 As shown, it includes a key link 1 and a key link 2, wherein the priority of the key link 1 is greater than the priority of the key link 2. Figure 3 According to the process shown, the initial priority can be configured for each node in the critical link 1 first. For example, the initial priority of node 1 in the critical link 1 is configured as 1, the initial priority of node 2 is configured as 2, and the initial priority of node 3 is configured as 3. Then, the initial priority is configured for each node in the critical link 2. Since node 2 is the intersection node of the critical link 1 and the critical link 2, if the initial priority of node 4 in the critical link 2 is configured as 4, the principle that the priority of the predecessor node is higher than the priority of the successor node in the same link is not met; therefore, it is necessary to configure or reconfigure the priorities of node 4, node 2, and node 3 in the critical link 2. For example, the initial priority of node 4 in the critical link 2 can be configured as 2, the initial priority of node 2 can be configured as 3, and the initial priority of node 3 can be configured as 4. It can be seen that the final Figure 4 The initial priority of each node configuration in the task priority diagram shown includes: the initial priority of node 1 is 1, the initial priority of node 2 is 3, the initial priority of node 3 is 4, and the initial priority of node 4 is 2.

[0096] When the above communication links include non-critical links, see Figure 5 FIG. 1 is a flow chart showing an initial priority allocation process according to an exemplary embodiment. Figure 5 The flowchart shown may include the following implementation steps:

[0097] S501. Based on the triggering period of the non-critical link, the nodes in the non-critical link are prioritized to obtain the initial priority of the nodes in the non-critical link; wherein the initial priority of the nodes in the non-critical link is negatively correlated with the triggering period of the non-critical link.

[0098] The present disclosure can configure the priority of the nodes in the non-critical link according to the trigger cycle of the non-critical link, so as to obtain the initial priority of the non-critical link / the node in the non-critical link. Generally, the initial priority of the non-critical link or its node is negatively correlated with the trigger cycle of the non-critical link, that is, the shorter the trigger cycle of the non-critical link, the higher the initial priority of the non-critical link or its node; conversely, the longer the trigger cycle of the non-critical link, the lower the initial priority of the non-critical link or its node.

[0099] In an optional embodiment, when the above communication link includes a critical link and a non-critical link, the present disclosure can first configure the initial priority for the critical link and all its nodes, and then configure the initial priority for the nodes in the non-critical link. Figure 3 and Figure 5 The relevant introduction in the embodiments will not be repeated here.

[0100] In practical applications, the present disclosure may adopt a priority allocation algorithm based on topological sorting, as described above. Figure 3 and Figure 5 The process shown here assigns a corresponding initial priority to each node in the task directed graph. The above-mentioned priority assignment algorithm based on topological sorting can be shown in Table 1 below:

[0101] Table 1

[0102]

[0103] Among them, the key nodes in Table 1 refer to nodes on key links, and the non-key nodes refer to nodes on non-key links, which are not limited or detailed in this disclosure.

[0104] See also Figure 6 FIG. 1 is a schematic diagram of a process flow of initial phase allocation according to an exemplary embodiment. Figure 6 The flowchart shown may include the following implementation steps:

[0105] Repeatedly traverse each node in the communication link and execute the following steps S601 and / or S602 until each node meets the corresponding execution time requirement:

[0106] S601: When the triggering mode of the node is time-triggered, based on the initial phase of a first predecessor node and the execution duration of the first predecessor node, update the initial phase of the node, wherein the first predecessor node is the predecessor node of the node, and the triggering mode of the predecessor node is the time-triggered.

[0107] The number of the above-mentioned communication links in the present disclosure may be one or more, which may be determined according to actual conditions, and the present disclosure does not limit this. The present disclosure may repeatedly / repeatedly traverse each communication link in all communication links, for example, traverse in the order of the numbers of each communication link, etc., and perform phase updates on the nodes in the communication links whose triggering mode is time-triggered, until all nodes meet the corresponding execution time requirements (i.e., transmission requirements) and are not updated; otherwise, repeat the above steps S601 and / or S602 to perform phase updates on the nodes in the communication links whose triggering mode is time-triggered.

[0108] In a specific implementation, when the above-mentioned communication link is a non-critical link, since the non-critical link includes independent nodes, the phase of the nodes in the non-critical link may not be updated, and the initial phase (such as 0, etc.) configured for the nodes in the non-critical link may be directly used. When the above-mentioned communication link is a critical link, the critical link may include at least two nodes, and the phase of the nodes in the critical link whose triggering mode is time triggering may be updated according to steps S601 and / or S602. Optionally, the present disclosure may perform phase initialization on the nodes whose triggering mode is time triggering in all communication links, and obtain the initial phases of these nodes, such as all being 0, etc. The present disclosure may not perform any operation on the nodes whose triggering mode is message triggering in all communication links. It may wait for the initial phase of the predecessor node whose triggering mode is time triggering to be determined, and then determine the execution timing of the node whose triggering mode is message triggering based on the initial phase of the predecessor node and its execution duration and other information. The present disclosure does not make too many restrictions and details here.

[0109] In step S601, for the node in the critical link whose triggering mode is time triggering, the present disclosure can determine and update the initial phase of the node based on the initial phase and execution duration of the first predecessor node, and specifically, the initial phase of the node can be the sum of the initial phase and execution duration of the above-mentioned first predecessor node. The above-mentioned first predecessor node can refer to a predecessor node close to the node in the critical link, and the triggering mode of the predecessor node is time triggering. Optionally, in order to save computing resources, when traversing each node in the critical link, the present disclosure can first check whether the initial phase of each node in the link meets the corresponding execution duration requirement. If it meets, the initial phase of the corresponding node may not be updated; conversely, if it does not meet, the initial phase of the corresponding node may be updated according to the principle of the above-mentioned step S601. Without considering computing resources, the present disclosure can perform determination and update of each node in the link according to step S601.

[0110] In an optional embodiment, for a node in a link whose triggering mode is message triggering, the present disclosure may prohibit performing phase amplitude and update on the node, that is, not performing phase adjustment on the node.

[0111] For example, see Figure 7 A schematic diagram of the topological structure of a task directed graph is shown in FIG. Figure 7 The task directed graph shown includes critical link 1 and critical link 2. The triggering mode of all nodes in critical link 1 is time triggering. The triggering modes of nodes 4 and 5 in critical link 2 are message triggering, and the triggering mode of node 6 is time triggering. According to the principle of the above-mentioned step S401, the present disclosure can assign an initial phase of 0 to node 1 in critical link 1, an initial phase of 2 to node 2, and an initial phase of 4 to node 3; and an initial phase of 0 to node 6 in critical link 2. Since both nodes 4 and 5 are message triggered nodes, phase allocation is not required. The triggering time of node 2 can be determined based on the initial phase and execution duration of node 6, and the execution duration of each of nodes 4 and 5, and can be specifically 0+1+2+3=6ms.

[0112] S602. When the node is a cross node, determine the second predecessor nodes corresponding to all communication links where the cross node is located, and update the initial phase of the cross node based on the initial phase and execution duration of each of the second predecessor nodes; wherein the second predecessor node is the predecessor node of the node in the corresponding communication link, and the triggering mode of the predecessor node is the time trigger, and the cross node is a node where at least two of the communication links are crossed.

[0113] When traversing each node in the communication link, the present disclosure can detect whether the node is a cross node on at least two communication links. If not, the present disclosure can determine and update the initial phase of the node according to the above step S601; otherwise, the present disclosure can first determine the second predecessor nodes corresponding to each of the communication links where the cross node is located, and the second predecessor node is the predecessor node of the cross node in the corresponding communication link, and the triggering mode of the predecessor node is time triggering. Further, the present disclosure can determine and update the initial phase of the cross node based on the initial phase and execution duration of each second predecessor node. Specifically, the present disclosure can select a second predecessor node with the largest initial phase as the target predecessor node based on the initial phase of each second predecessor node; and then determine and update the initial phase of the above cross node based on the initial phase and execution duration of the target predecessor node. For example, the initial phase of the cross node can be the sum of the initial phase and execution duration of the above target predecessor node. Optionally, the present disclosure may determine and update the initial phases of all subsequent nodes of the cross node in the link according to the principle of the above step S601, which will not be described in detail here.

[0114] For example, citing the above Figure 4In the example shown, when allocating an initial phase to node 2 in traversing critical link 2, the present disclosure detects that node 2 is the intersection node of critical link 1 and critical link 2, and the second predecessor node of node 2 on critical link 1 is node 1, and the second predecessor node of node 2 on critical link 2 is node 4. The initial phase of node 1 is 0, and the initial phase of node 4 is 2, so the present disclosure can select the initial phase 2 of node 4 plus the execution time 5 of node 4 as the initial phase of node 2, that is, the initial phase of node 2 is 7. Similarly, the present disclosure determines and updates the phase of the next node 3 of node 2 in critical link 2 according to the above step S601, and the initial phase of node 3 can be updated to 7 plus 2, which is equal to 9.

[0115] It can be understood that the present disclosure optimizes the data transmission between nodes in the key link, so that the data / message can be transmitted to the follower node in time after the predecessor node generates it, and coordinates the cross nodes between different key links to reduce the end-to-end delay of each key link. To achieve the above purpose, the present disclosure can call a multi-link sequential phase assignment algorithm, according to the above Figure 4 The principle shown is to assign and update the phase of the nodes in the link as needed. Among them, the above multi-link sequential phase assignment algorithm can be shown in the following Table 2:

[0116] Table 2

[0117]

[0118] See also Figure 8 FIG. 1 is a flow chart showing an initial core binding allocation process according to an exemplary embodiment. Figure 8 The flowchart shown may include the following implementation steps:

[0119] Traverse the nodes in the sorting result and execute the following steps S801 and S802 until all the m nodes are allocated to the cores:

[0120] S801. Based on the triggering period of all nodes currently bound to s cores in the electronic device, determine the saturation of each of the s cores, where the saturation is used to reflect the contention situation of the corresponding core, and s is a positive integer.

[0121] The present disclosure can first sort the m nodes based on their respective initial priorities, for example, sorting them in order from high to low priority, etc., to obtain a corresponding sorting result, which includes the above m nodes. Assume that the electronic device includes s cores, and s is a positive integer customized by the system according to actual conditions. The present disclosure can sequentially traverse each node in the above sorting result to execute steps S801 and S802 until all the m nodes in the sorting result are assigned to the corresponding cores.

[0122] In step S801, the present disclosure may first determine all nodes currently bound to each of the s cores, and then calculate and determine the saturation of each of the s cores according to the trigger period of all nodes currently bound to each of the s cores, and the saturation is used to reflect the contention or competition of the corresponding cores. For example, if a core is bound to node 1 and node 2, the trigger period of node 1 is 3ms, and the trigger period of node 2 is 5ms, then the saturation of the core may be 3 times 5, which is equal to 15.

[0123] S802. Based on the saturation of each of the s cores, the current node is assigned to the core with the smallest saturation among the s cores to obtain the initial bound core of the current node; wherein the current node is the node currently traversed in the sorting result, and the sorting result is the result obtained by sorting the m nodes based on their respective initial priorities.

[0124] The present disclosure can allocate the currently traversed node (also referred to as the current node) to the core with the smallest saturation among the s cores according to the saturation of each core, thereby obtaining the initial bound core of the current node. It can be understood that in order to reduce the scheduling delay of the frame task, the present disclosure can adopt, for example, the minimum saturation bound core adjustment algorithm, according to the above Figure 8 According to the principle shown, high priority nodes are allocated to cores with lower saturation / smaller size, thereby optimizing the queuing waiting time of nodes (frame tasks on nodes). Among them, the above minimum saturation binding core adjustment algorithm can be shown in the following Table 3:

[0125] Table 3

[0126]

[0127] The present disclosure does not limit the specific implementation of the above step S203. For example, see Fig. 9 FIG. 1 is a flow chart showing an optimization calculation according to an exemplary embodiment. Fig. 9 The flowchart shown may include the following implementation steps:

[0128] S901. Determine an objective function and constraints; wherein the objective function is used to indicate a weighted sum of a normalized end-to-end delay and a normalized jitter crossing rate, wherein the normalized end-to-end delay is obtained by normalizing the end-to-end delay of a critical link in the task directed graph, and the normalized jitter crossing rate is obtained by normalizing the inter-frame jitter crossing rate of a node in the task directed graph, and the constraints include: the proportion of the number of frame tasks in the node that exceed the trigger period within a preset time length to the total number of frame tasks of the node does not exceed a preset first threshold; and / or the completion time difference between any adjacent frame tasks in the node does not exceed a preset second threshold.

[0129] The initial solution information obtained by the present disclosure based on the above initial solution calculation is usually not the optimal task scheduling configuration and needs to be further optimized. When optimizing the task scheduling configuration, it is necessary to pay attention to performance indicators such as end-to-end delay and jitter crossing rate. Therefore, the present disclosure designs an objective function to measure these factors; for example, the above objective function can be the weighted sum of the normalized end-to-end delay and the normalized jitter crossing rate, and its calculation formula can be shown as the following formula (3):

[0130] Formula (3)

[0131] in, is the normalized end-to-end delay, is the normalized jitter crossing rate, These are optimization weights pre-configured by the system based on actual conditions.

[0132] The above-mentioned normalized end-to-end delay may refer to the normalization of the end-to-end delay of all key links in the above-mentioned task directed graph, and the above-mentioned end-to-end delay refers to the difference between the time when the first frame task in the key link is triggered and executed and the time when the last frame task is executed. The above-mentioned normalized jitter crossing rate may refer to the normalization of the inter-frame jitter crossing rate of all nodes in the above-mentioned task directed graph, and the above-mentioned inter-frame jitter crossing rate may refer to the ratio between the number of inter-frame intervals that cross the boundary of the node within a preset time length (such as the simulation time length of the simulator) and the total number of inter-frame intervals, and the inter-frame interval that crosses the boundary refers to the inter-frame interval that satisfies the difference ratio between the trigger period of the node is greater than the preset ratio. For example, please refer to Fig.10 FIG. 1 is a schematic diagram of a task scheduling according to an exemplary embodiment. Fig.10 The above-mentioned inter-frame interval crossing the boundary and its jitter crossing boundary rate are introduced in the present disclosure. Fig.10 Figure 2 shows a schematic diagram of frame task scheduling execution of 5 nodes. Fig.10 As shown, the two interframe intervals marked on node 2 can be 34ms and 38ms respectively. The trigger period of node 2 is assumed to be 33.33ms. The jitter rates of these two interframe intervals can be: (34-33.33) / 33.33=2%, (38-33.33) / 33.33=14%. Since 2% is less than the preset ratio of 10% and 14% is greater than the preset ratio of 10%, the interframe interval with an interframe interval jitter rate greater than the preset ratio is considered to be out of bounds, which is called an out-of-bounds interframe interval. Based on this principle, the interframe interval jitter out-of-bounds rate can be the ratio between the number of out-of-bounds interframe intervals and the total number of interframe intervals within a preset duration (e.g., the simulation duration of the simulator).

[0133] The calculation formulas for the normalized end-to-end delay and the normalized jitter crossing rate are shown in the following formula (4):

[0134]

[0135]

[0136] Formula (4)

[0137] in, Indicates The sum of the end-to-end delays of all key links in the task directed graph in the round of iterative calculation, and Respectively represent the minimum Value and maximum value. Indicates The jitter out-of-bounds rate in the task directed graph during round iterative computation. and Respectively represent the minimum Value and maximum value.

[0138] The above objective function comprehensively considers the two performance indicators of end-to-end delay and jitter crossing rate to measure the quality of solution information. In addition, to ensure that the intermediate calculation results of the node can be released in time, the corresponding constraints must be met. The constraint can be a condition pre-defined by the system or user according to the actual situation. For example, it can include but is not limited to a combination of one or more of the following conditions:

[0139] (1) Deadline constraint: The number of frame tasks in each node that exceeds the trigger period of the node (that is, the deadline of each frame task in the node) within the above-mentioned preset duration is not allowed to exceed the preset first threshold in the total number of all frame tasks in the node. The above-mentioned preset first threshold is customized by the system or the user according to the actual situation, for example, it can be an empirical value set according to user experience, or it can be a statistical value calculated based on a series of experimental data.

[0140] (2) Jitter constraint: For task nodes with constrained jitter, the completion / release time difference between any two adjacent frame tasks in each node is not allowed to exceed the preset second threshold. The preset second threshold is customized by the system or the user according to the actual situation. For example, it can be an empirical value set according to user experience, or a statistical value calculated based on a series of experimental data.

[0141] S902: Based on the objective function and the constraint conditions, optimize the initial solution information of each of the m nodes to obtain the optimal solution information of the m nodes.

[0142] The present disclosure can optimize the initial solution information of each of the above-mentioned m nodes according to the above-mentioned objective function and the above-mentioned constraints. Among them, the present disclosure does not limit the specific implementation method of the above-mentioned optimization. For example, in a specific embodiment, in order to ensure that the above-mentioned end-to-end delay and jitter out-of-bounds rate can be minimized during the optimization process while satisfying all constraints; the embodiment of the present disclosure can adopt, for example, a simulated back-off algorithm or a search algorithm based on simulated annealing, to iteratively adjust the initial solution information of each of the above-mentioned m nodes, so as to minimize the above-mentioned objective function while satisfying the above-mentioned constraints, thereby outputting the optimal solution information of the above-mentioned m nodes. Among them, in each iterative calculation process, the scheduling configuration is continuously adjusted by detecting and processing the nodes that violate the above-mentioned constraints to gradually approach the global optimal solution. The above-mentioned algorithm can be shown in Table 4 below:

[0143] Table 4

[0144]

[0145] Optionally, after obtaining the optimal solution information of the above m nodes, the present invention can input the optimal solution information of the above m nodes into the real-time scheduling system, so as to collect the corresponding task directed graph data again and generate the next round of optimal task scheduling strategy, thereby forming an optimization closed loop.

[0146] It can be seen that the present disclosure proposes an initial solution calculation algorithm based on priority, phase and binding core to optimize the scheduling of communication links, optimize the data transmission of each node on the communication link, and reduce the scheduling delay of frame tasks on the node. In order to further obtain the scheduling configuration of the global optimal solution, the present disclosure introduces a simulated annealing algorithm, which searches the solution space under constraints by gradually adjusting the priority, phase and binding core to ensure that the end-to-end delay of the system in the worst case and average case meets the set constraints and meets the frame rate constraints of the node. The present disclosure can apply the optimized task scheduling strategy (i.e., the optimal solution information of each node) to the real-time scheduling system, collect actual operation data and continuously optimize it to form a closed-loop process to avoid problems such as the scheduling configuration being not optimal due to simulator simulation deviation or limited prior information collection. By implementing the disclosed embodiment, the electronic device obtains the prior information of each of the m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of the communication link where the corresponding node is located, the deadline of the communication link, the trigger mode, the trigger cycle, and the execution duration; based on the prior information of each of the m nodes, the initial solution calculation of the task scheduling is performed to obtain the initial solution information of each of the m nodes, and the initial solution information includes at least one of the initial priority, the initial binding core, and the initial phase; based on the initial solution information of each of the m nodes, the optimization calculation is performed to obtain the optimal solution information of the m nodes, and the optimal solution information corresponds to the initial solution information. In this way, the initial solution information of the node can be optimized, thereby reducing the scheduling delay of the node task, and at the same time, it can solve the technical problems existing in the related technology that the actual scheduling is not optimal in output.

[0147] Based on the above examples, see Fig.11 FIG. 1 is a schematic diagram showing a structure of a task scheduling optimization device according to an exemplary embodiment. Fig.11 The device shown can be applied to an electronic device, and the device may include an acquisition module 1101 and a processing module 1102. Among them:

[0148] The acquisition module 1101 is configured to acquire prior information of each of m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of a communication link where the corresponding node is located, a deadline of the communication link, a trigger mode, a trigger cycle, and an execution duration;

[0149] The processing module 1102 is configured to calculate an initial solution of task scheduling based on the prior information of each of the m nodes, and obtain initial solution information of each of the m nodes, wherein the initial solution information includes at least one of an initial priority, an initial core binding, and an initial phase;

[0150] The processing module 1102 is further configured to perform optimization calculation based on the initial solution information of each of the m nodes to obtain optimal solution information of the m nodes, where the optimal solution information corresponds to the initial solution information.

[0151] In some embodiments, the initial solution information includes an initial priority, the communication link includes a critical link, the critical link includes a directed edge between nodes, and the processing module 1102 is configured to:

[0152] Prioritizing the critical link based on the deadline of the critical link to obtain the priority of the critical link;

[0153] Based on the priority of the critical link, configuring the priority of each node in the critical link to obtain the initial priority of each node in the critical link;

[0154] The priority of the critical link is negatively correlated with the deadline of the critical link, and the initial priority of the predecessor node in the critical link is higher than the initial priority of the successor node in the critical link.

[0155] In some embodiments, the initial solution information includes an initial priority, the communication link includes a non-critical link, the non-critical link includes a node, and the processing module 1102 is configured to:

[0156] Based on the triggering period of the non-critical link, priority configuration is performed on the nodes in the non-critical link to obtain the initial priority of the nodes in the non-critical link;

[0157] The initial priority of the node in the non-critical link is negatively correlated with the triggering period of the non-critical link.

[0158] In some embodiments, the initial solution information includes an initial phase, and the processing module 1102 is configured to:

[0159] Repeatedly traverse each node in the communication link and perform the following steps until each node meets the corresponding execution time requirement:

[0160] When the triggering mode of the node is time triggering, updating the initial phase of the node based on the initial phase of the first predecessor node and the execution duration of the first predecessor node; and / or,

[0161] When the node is a cross node, determining the second predecessor nodes corresponding to all communication links where the cross node is located, and updating the initial phase of the cross node based on the initial phase and execution duration of each of the second predecessor nodes;

[0162] Among them, the first predecessor node is the predecessor node of the node, and the triggering mode of the predecessor node is the time trigger; the second predecessor node is the predecessor node of the node in the corresponding communication link, and the triggering mode of the predecessor node is the time trigger; the intersection node is a node where at least two of the communication links intersect.

[0163] In some embodiments, the processing module 1102 is configured to:

[0164] Based on the initial phases of the second predecessor nodes, selecting the second predecessor node with the largest initial phase as the target predecessor node;

[0165] Based on the initial phase and execution duration of the target predecessor node, the initial phase of the intersection node is updated.

[0166] In some embodiments, the processing module 1102 is further configured to:

[0167] When the triggering mode of the node is message triggering, phase assignment and updating of the node are prohibited.

[0168] In some embodiments, the initial solution information includes an initial core binding, and the processing module 1102 is configured to:

[0169] Traverse the nodes in the sorting result and execute the following steps until all the m nodes are assigned to the cores:

[0170] Based on the triggering period of all nodes currently bound to s cores in the electronic device, determine the saturation of each of the s cores, where the saturation is used to reflect the contention of the corresponding core, and s is a positive integer;

[0171] Based on the saturation of each of the s cores, the current node is allocated to the core with the smallest saturation among the s cores, so as to obtain an initial bound core of the current node;

[0172] The current node is the node currently traversed in the sorting result, and the sorting result is a result obtained by sorting the m nodes based on their respective initial priorities.

[0173] In some embodiments, the processing module 1102 is configured to:

[0174] Determine the objective function and constraints;

[0175] Based on the objective function and the constraint conditions, optimizing the initial solution information of each of the m nodes to obtain the optimal solution information of the m nodes;

[0176] Among them, the objective function is used to indicate the weighted sum of the normalized end-to-end delay and the normalized jitter crossing rate, the normalized end-to-end delay is obtained by normalizing the end-to-end delay of the key link in the task directed graph, and the normalized jitter crossing rate is obtained by normalizing the inter-frame jitter crossing rate of the node in the task directed graph, and the constraint conditions include: the proportion of the number of frame tasks in the node that exceed the trigger period within the preset time length to the total number of frame tasks of the node does not exceed a preset first threshold; and / or the completion time difference between any adjacent frame tasks in the node does not exceed a preset second threshold.

[0177] In some embodiments, the processing module 1102 is configured to:

[0178] The simulated annealing algorithm is called to iteratively adjust the initial solution information of each of the m nodes to minimize the objective function when the constraint condition is met, thereby outputting the optimal solution information of the m nodes.

[0179] In some embodiments, the triggering method includes time triggering and message triggering.

[0180] By implementing the embodiments of the present disclosure, the above-mentioned device can obtain the prior information of each of the m nodes in the task directed graph, where m is a positive integer, and the prior information at least includes the communication link where the corresponding node is located, the deadline of the communication link, the trigger mode, the trigger cycle, and one of the execution duration; based on the prior information of each of the m nodes, the initial solution calculation of the task scheduling is performed to obtain the initial solution information of each of the m nodes, and the initial solution information at least includes one of the initial priority, the initial binding core, and the initial phase; based on the initial solution information of each of the m nodes, the optimization calculation is performed to obtain the optimal solution information of the m nodes, and the optimal solution information corresponds to the initial solution information. In this way, the initial solution information of the node can be optimized, thereby reducing the scheduling delay of the node task, and at the same time, it can also solve the technical problems existing in the related technology that the actual scheduling is not optimal in output.

[0181] The present disclosure also provides a computer-readable storage medium having computer program instructions stored thereon, which implement the steps of the task scheduling optimization method provided by the present disclosure when the program instructions are executed by a processor.

[0182] Fig.12 5 is a schematic diagram of a structure of an electronic device according to an exemplary embodiment. For example, the electronic device 500 may be a mobile phone, a computer, a digital broadcast terminal, a message transceiver device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0183] Reference Fig.12, the electronic device 500 may include one or more of the following components: a processing component 502 , a memory 504 , a power component 506 , a multimedia component 508 , an audio component 510 , an input / output interface 512 , a sensor component 514 , and a communication component 516 .

[0184] The processing component 502 generally controls the overall operation of the device 500, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 502 may include one or more processors 520 to execute instructions to complete all or part of the steps of the task scheduling optimization method described above. In addition, the processing component 502 may include one or more modules to facilitate the interaction between the processing component 502 and other components. For example, the processing component 502 may include a multimedia module to facilitate the interaction between the multimedia component 508 and the processing component 502.

[0185] The memory 504 is configured to store various types of data to support operations on the device 500. Examples of such data include instructions for any application or method operating on the device 500, contact data, phone book data, messages, pictures, videos, etc. The memory 504 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0186] Power supply component 506 provides power to various components of device 500. Power supply component 506 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to device 500.

[0187] The multimedia component 508 includes a screen that provides an output interface between the device 500 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 508 includes a front camera and / or a rear camera. When the electronic device 500 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0188] The audio component 510 is configured to output and / or input audio signals. For example, the audio component 510 includes a microphone (MIC), and when the device 500 is in an operating mode, such as a call mode, a recording mode, and a speech recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 504 or sent via the communication component 516. In some embodiments, the audio component 510 also includes a speaker for outputting audio signals.

[0189] The input / output interface 512 provides an interface between the processing component 502 and the peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0190] The sensor assembly 514 includes one or more sensors for providing various aspects of status assessment for the device 500. For example, the sensor assembly 514 can detect the open / closed state of the device 500, the relative positioning of components, such as the display and keypad of the device 500, and the sensor assembly 514 can also detect the position change of the device 500 or a component of the device 500, the presence or absence of user contact with the device 500, the orientation or acceleration / deceleration of the device 500, and the temperature change of the device 500. The sensor assembly 514 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 514 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 514 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0191] The communication component 516 is configured to facilitate wired or wireless communication between the device 500 and other devices. The device 500 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 516 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 516 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0192] In an exemplary embodiment, the device 500 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above-mentioned task scheduling optimization method.

[0193] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 504 including instructions, and the instructions can be executed by a processor 520 of the device 500 to complete the above-mentioned task scheduling optimization method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0194] In addition to being an independent electronic device, the above-mentioned device can also be a part of an independent electronic device. For example, in one embodiment, the device can be an integrated circuit (IC) or a chip, wherein the integrated circuit can be an IC or a collection of multiple ICs; the chip can include but is not limited to the following types: GPU (Graphics Processing Unit), CPU (Central Processing Unit), FPGA (Field Programmable Gate Array), DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit), SOC (System on Chip, SoC), etc. The above-mentioned integrated circuit or chip can be used to execute executable instructions (or codes) to implement the above-mentioned task scheduling optimization method. The executable instructions can be stored in the integrated circuit or chip, or can be obtained from other devices or equipment, for example, the integrated circuit or chip includes a processor, a memory, and an interface for communicating with other devices. The executable instruction can be stored in the memory, and when the executable instruction is executed by the processor, the above-mentioned task scheduling optimization method can be implemented; alternatively, the integrated circuit or chip can receive the executable instruction through the interface and transmit it to the processor for execution, so as to implement the above-mentioned task scheduling optimization method.

[0195] By implementing the disclosed embodiments, the electronic device can obtain the prior information of each of the m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of the communication link where the corresponding node is located, the deadline of the communication link, the trigger mode, the trigger cycle, and the execution duration; based on the prior information of each of the m nodes, the initial solution calculation of the task scheduling is performed to obtain the initial solution information of each of the m nodes, and the initial solution information includes at least one of the initial priority, the initial binding core, and the initial phase; based on the initial solution information of each of the m nodes, the optimization calculation is performed to obtain the optimal solution information of the m nodes, and the optimal solution information corresponds to the initial solution information. In this way, the initial solution information of the node can be optimized, thereby reducing the scheduling delay of the node task, and at the same time, it can also solve the technical problems existing in the related technology that the actual scheduling is not optimal in output.

[0196] The present disclosure also provides a computer-readable storage medium having computer program instructions stored thereon, which implement the steps of the task scheduling optimization method provided by the present disclosure when the program instructions are executed by a processor.

[0197] In another exemplary embodiment, a computer program product is further provided. The computer program product includes a computer program that can be executed by a programmable device. The computer program has a code portion for executing the above-mentioned task scheduling optimization method when executed by the programmable device.

[0198] See also Fig.13 , Fig.13 6 is a functional block diagram of a vehicle 600 shown in an exemplary embodiment. The vehicle 600 can be configured in a fully or partially autonomous driving mode. For example, the vehicle 600 can obtain environmental information about its surroundings through the perception system 620, and obtain an autonomous driving strategy based on the analysis of the surrounding environmental information to achieve fully autonomous driving, or present the analysis results to the user to achieve partially autonomous driving.

[0199] The vehicle 600 may include various subsystems, such as an infotainment system 610, a perception system 620, a decision control system 630, a drive system 640, and a computing platform 650. Optionally, the vehicle 600 may include more or fewer subsystems, and each subsystem may include multiple components. In addition, each subsystem and component of the vehicle 600 may be interconnected by wire or wirelessly.

[0200] In some embodiments, infotainment system 610 may include communication system 611 , entertainment system 612 , and navigation system 613 .

[0201] The communication system 611 may include a wireless communication system that can communicate wirelessly with one or more devices directly or via a communication network. For example, the wireless communication system may use 3G cellular communication, such as CDMA, EVDO, GSM / GPRS, or 4G cellular communication, such as LTE. Or 5G cellular communication. The wireless communication system may communicate with a wireless local area network (WLAN) using WiFi. In some embodiments, the wireless communication system may communicate directly with the device using an infrared link, Bluetooth, or ZigBee. Other wireless protocols, such as various vehicle communication systems, for example, the wireless communication system may include one or more dedicated short range communications (DSRC) devices, which may include public and / or private data communications between vehicles and / or roadside stations.

[0202] The entertainment system 612 may include a display device, a microphone and speakers. Users can listen to the radio and play music in the car based on the entertainment system; or connect the mobile phone to the vehicle and project the mobile phone's screen on the display device. The display device may be touch-screen, and users can operate by touching the screen.

[0203] In some cases, the user's voice signal can be obtained through a microphone, and based on the analysis of the user's voice signal, the user can control certain aspects of the vehicle 600, such as adjusting the temperature inside the vehicle, etc. In other cases, music can be played to the user through a speaker.

[0204] The navigation system 613 may include a map service provided by a map provider, thereby providing navigation of the driving route for the vehicle 600. The navigation system 613 may be used in conjunction with the vehicle's global positioning system 621 and inertial measurement unit 622. The map service provided by the map provider may be a two-dimensional map or a high-precision map.

[0205] The perception system 620 may include several sensors that sense information about the environment around the vehicle 600. For example, the perception system 620 may include a global positioning system 621 (the global positioning system may be a GPS system, or a Beidou system or other positioning systems), an inertial measurement unit (IMU) 622, a laser radar 623, a millimeter wave radar 624, an ultrasonic radar 625, and a camera 626. The perception system 620 may also include sensors of the internal systems of the monitored vehicle 600 (for example, an in-vehicle air quality monitor, a fuel gauge, an oil temperature gauge, etc.). Sensor data from one or more of these sensors can be used to detect objects and their corresponding characteristics (position, shape, direction, speed, etc.). This detection and recognition is a key function for the safe operation of the vehicle 600.

[0206] The global positioning system 621 is used to estimate the geographic location of the vehicle 600 .

[0207] The inertial measurement unit 622 is used to sense the change of the posture of the vehicle 600 based on the inertial acceleration. In some embodiments, the inertial measurement unit 622 may be a combination of an accelerometer and a gyroscope.

[0208] Lidar 623 utilizes lasers to sense objects in the environment in which vehicle 600 is located. In some embodiments, Lidar 623 may include one or more laser sources, a laser scanner, and one or more detectors, among other system components.

[0209] The millimeter wave radar 624 uses radio signals to sense objects in the surrounding environment of the vehicle 600. In some embodiments, in addition to sensing objects, the millimeter wave radar 624 can also be used to sense the speed and / or heading of the object.

[0210] The ultrasonic radar 625 may sense objects around the vehicle 600 using ultrasonic signals.

[0211] The camera device 626 is used to capture image information of the surrounding environment of the vehicle 600. The camera device 626 may include a monocular camera, a binocular camera, a structured light camera, a panoramic camera, etc. The image information acquired by the camera device 626 may include a static image or video stream information.

[0212] The decision control system 630 includes a computing system 631 that analyzes and makes decisions based on the information obtained by the perception system 620. The decision control system 630 also includes a vehicle controller 632 that controls the power system of the vehicle 600, and a steering system 633, a throttle 634 and a braking system 635 for controlling the vehicle 600.

[0213] The computing system 631 can be operated to process and analyze various information obtained by the perception system 620 in order to identify targets, objects and / or features in the surrounding environment of the vehicle 600. Targets may include pedestrians or animals, and objects and / or features may include traffic signals, road boundaries and obstacles. The computing system 631 may use object recognition algorithms, Structure from Motion (SFM) algorithms, video tracking and other technologies. In some embodiments, the computing system 631 can be used to map the environment, track objects, estimate the speed of objects, and so on. The computing system 631 can analyze the various information obtained and derive a control strategy for the vehicle.

[0214] The vehicle controller 632 can be used to coordinate the control of the vehicle's power battery and engine 641 to improve the power performance of the vehicle 600.

[0215] The steering system 633 is operable to adjust the forward direction of the vehicle 600. For example, in one embodiment, it may be a steering wheel system.

[0216] The throttle 634 is used to control the operating speed of the engine 641 and thereby control the speed of the vehicle 600 .

[0217] Braking system 635 is used to control the deceleration of vehicle 600. Braking system 635 can use friction to slow down wheel 644. In some embodiments, braking system 635 can convert the kinetic energy of wheel 644 into electric current. Braking system 635 can also take other forms to slow down the rotation speed of wheel 644 to control the speed of vehicle 600.

[0218] The drive system 640 may include components that provide powered movement for the vehicle 600. In one embodiment, the drive system 640 may include an engine 641, an energy source 642, a transmission system 643, and wheels 644. The engine 641 may be an internal combustion engine, an electric motor, an air compression engine, or a combination of other types of engines, such as a hybrid engine consisting of a gasoline engine and an electric motor, or a hybrid engine consisting of an internal combustion engine and an air compression engine. The engine 641 converts the energy source 642 into mechanical energy.

[0219] Examples of energy source 642 include gasoline, diesel, other petroleum-based fuels, propane, other compressed gas-based fuels, ethanol, solar panels, batteries, and other sources of electricity. Energy source 642 can also provide energy to other systems of vehicle 600.

[0220] The transmission system 643 can transmit the mechanical power from the engine 641 to the wheels 644. The transmission system 643 may include a gearbox, a differential, and a drive shaft. In one embodiment, the transmission system 643 may also include other devices, such as a clutch. Among them, the drive shaft may include one or more shafts that can be coupled to one or more wheels 644.

[0221] Some or all functions of the vehicle 600 are controlled by a computing platform 650. The computing platform 650 may include at least one processor 651 that may execute instructions 653 stored in a non-transitory computer-readable medium such as a memory 652. In some embodiments, the computing platform 650 may also be a plurality of computing devices that control individual components or subsystems of the vehicle 600 in a distributed manner.

[0222] The processor 651 may be any conventional processor, such as a commercially available CPU. Alternatively, the processor 651 may also include a graphics processor (Graphic Process Unit, GPU), a field programmable gate array (Field Programmable Gate Array, FPGA), a system on chip (System on Chip, SOC), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC) or a combination thereof. Figure 6Functionally illustrated processor, memory and other elements of the computer in the same block, but those of ordinary skill in the art will appreciate that the processor, computer or memory may actually include multiple processors, computers or memories that may or may not be stored in the same physical housing. For example, the memory may be a hard drive or other storage media that is located in a housing different from the computer. Therefore, references to processors or computers will be understood to include references to a collection of processors or computers or memories that may or may not operate in parallel. Different from using a single processor to perform the steps described herein, some components such as steering components and deceleration components may each have their own processors that only perform calculations related to the functions specific to the components.

[0223] In the embodiment of the present disclosure, the processor 651 may execute the above-mentioned task scheduling optimization method.

[0224] In various aspects described herein, processor 651 may be located remote from the vehicle and in wireless communication with the vehicle. In other aspects, some of the processes described herein are performed on a processor disposed within the vehicle and others are performed by a remote processor, including taking the necessary steps to perform a single maneuver.

[0225] In some embodiments, the memory 652 may include instructions 653 (e.g., program logic) that may be executed by the processor 651 to perform various functions of the vehicle 600. The memory 652 may also include additional instructions, including instructions to send data to, receive data from, interact with, and / or control one or more of the infotainment system 610, the perception system 620, the decision control system 630, and the drive system 640.

[0226] In addition to instructions 653, memory 652 may also store data such as road maps, route information, the vehicle's location, direction, speed, and other such vehicle data, and other information. Such information may be used by vehicle 600 and computing platform 650 during operation of vehicle 600 in autonomous, semi-autonomous, and / or manual modes.

[0227] The computing platform 650 may control functions of the vehicle 600 based on input received from various subsystems, such as the drive system 640, the perception system 620, and the decision control system 630. For example, the computing platform 650 may utilize input from the decision control system 630 in order to control the steering system 633 to avoid an obstacle detected by the perception system 620. In some embodiments, the computing platform 650 may be operable to provide control over many aspects of the vehicle 600 and its subsystems.

[0228] Alternatively, one or more of the above-mentioned components may be installed or associated separately from the vehicle 600. For example, the memory 652 may exist partially or completely separately from the vehicle 600. The above-mentioned components may be communicatively coupled together in a wired and / or wireless manner.

[0229] Optionally, the above components are only examples. In actual applications, the components in the above modules may be added or deleted according to actual needs. Figure 6 It should not be understood as limiting the embodiments of the present disclosure.

[0230] An autonomous vehicle traveling on a road, such as vehicle 600 above, can identify objects in its surroundings to determine adjustments to the current speed. Objects can be other vehicles, traffic control devices, or other types of objects. In some examples, each identified object can be considered independently, and based on the object's respective characteristics, such as its current speed, acceleration, spacing from the vehicle, etc., can be used to determine the speed to be adjusted by the autonomous vehicle.

[0231] Optionally, the vehicle 600 or a perception and computing device associated with the vehicle 600 (e.g., computing system 631, computing platform 650) can predict the behavior of the identified object based on the characteristics of the identified object and the state of the surrounding environment (e.g., traffic, rain, ice on the road, etc.). Optionally, each identified object depends on the behavior of each other, so all the identified objects can also be considered together to predict the behavior of a single identified object. The vehicle 600 can adjust its speed based on the predicted behavior of the identified object. In other words, the autonomous vehicle can determine what stable state the vehicle will need to adjust to (e.g., accelerate, decelerate, or stop) based on the predicted behavior of the object. In this process, other factors can also be considered to determine the speed of the vehicle 600, such as the lateral position of the vehicle 600 in the road on which it is traveling, the curvature of the road, the proximity of static and dynamic objects, and the like.

[0232] In addition to providing instructions to adjust the speed of the autonomous vehicle, the computing device may also provide instructions to modify the steering angle of vehicle 600 so that the autonomous vehicle follows a given trajectory and / or maintains a safe lateral and longitudinal distance from objects near the autonomous vehicle (e.g., vehicles in adjacent lanes on the road).

[0233] The vehicle 600 may be any type of travel vehicle, such as a car, a truck, a motorcycle, a bus, a ship, an airplane, a helicopter, an RV, a train, etc., and the present disclosure does not specifically limit the vehicle.

[0234] By implementing the disclosed embodiments, the above-mentioned vehicle can obtain the prior information of each of the m nodes in the task directed graph, where m is a positive integer, and the prior information at least includes the communication link where the corresponding node is located, the deadline of the communication link, the trigger mode, the trigger cycle, and one of the execution duration; based on the prior information of each of the m nodes, the initial solution calculation of the task scheduling is performed to obtain the initial solution information of each of the m nodes, and the initial solution information at least includes one of the initial priority, the initial binding core, and the initial phase; based on the initial solution information of each of the m nodes, the optimization calculation is performed to obtain the optimal solution information of the m nodes, and the optimal solution information corresponds to the initial solution information. In this way, the initial solution information of the node can be optimized, thereby reducing the scheduling delay of the node task, and at the same time, it can also solve the technical problems existing in the related technology that the actual scheduling is not optimal in output.

[0235] See also Fig.14 FIG. 1 is a schematic diagram showing the structure of a chip according to an exemplary embodiment. Fig.14 The chip 700 shown includes a processor 701 and an interface 702. Optionally, it may also include a memory 703. The number of the processor 701 may be one or more, and the number of the interface 702 may be multiple.

[0236] In one embodiment, for a case where a chip is used to implement the method embodiment of the present disclosure:

[0237] The interface 702 is used to receive or output signals;

[0238] The processor 701 is used to execute part or all of the content in the task scheduling optimization method embodiment.

[0239] It is understandable that the processor in the embodiment of the present disclosure can be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method embodiment can be completed by an integrated logic circuit of hardware in the processor or instructions in the form of software. The above processor can be a general-purpose processor, a digital signal processor (DigitalSignal Processor, DSP), an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.

[0240] It is understandable that the memory in the embodiments of the present disclosure may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0241] It should be noted here that the description of the above storage medium, device and chip embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium, storage medium and device embodiments of the present disclosure, please refer to the description of the method embodiments of the present disclosure for understanding.

[0242] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the present disclosure. The present disclosure is intended to cover any variations, uses or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0243] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A task scheduling optimization method, characterized in that: include: Obtaining prior information of m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of a communication link where the corresponding node is located, a deadline of the communication link, a triggering mode, a triggering cycle, and an execution duration; Calculate an initial solution for task scheduling based on the prior information of each of the m nodes to obtain initial solution information of each of the m nodes, where the initial solution information includes at least one of an initial priority, an initial core binding, and an initial phase; Performing optimization calculation based on the initial solution information of each of the m nodes to obtain optimal solution information of the m nodes, wherein the optimal solution information corresponds to the initial solution information; The performing optimization calculation based on the initial solution information of each of the m nodes to obtain the optimal solution information of the m nodes includes: According to the objective function and the constraint conditions, the initial solution information of each of the m nodes is optimized to obtain the optimal solution information of the m nodes; Among them, the objective function is used to indicate the weighted sum of the normalized end-to-end delay and the normalized jitter crossing rate, the normalized end-to-end delay is obtained by normalizing the end-to-end delay of the key link in the task directed graph, and the normalized jitter crossing rate is obtained by normalizing the inter-frame jitter crossing rate of the node in the task directed graph, and the constraint conditions include: the proportion of the number of frame tasks in the node that exceed the trigger period within the preset time length to the total number of frame tasks of the node does not exceed a preset first threshold; and / or the completion time difference between any adjacent frame tasks in the node does not exceed a preset second threshold; The task directed graph In and They are respectively a set of task nodes and a set of edges consisting of communication links; the bound core indicates the core processor to which the node is bound in the electronic device.

2. The method according to claim 1, characterized in that The initial solution information includes an initial priority, the communication link includes a key link, the key link includes a directed edge between nodes, and the initial solution calculation of task scheduling based on the prior information of each of the m nodes, and the initial solution information of each of the m nodes is obtained, including: Prioritizing the critical link based on the deadline of the critical link to obtain the priority of the critical link; Based on the priority of the critical link, configuring the priority of each node in the critical link to obtain the initial priority of each node in the critical link; The priority of the critical link is negatively correlated with the deadline of the critical link, and the initial priority of the predecessor node in the critical link is higher than the initial priority of the successor node in the critical link.

3. The method according to claim 1, characterized in that The initial solution information includes an initial priority, the communication link includes a non-critical link, the non-critical link includes a node, and the initial solution calculation of the task scheduling based on the prior information of each of the m nodes is performed to obtain the initial solution information of each of the m nodes, including: Based on the triggering period of the non-critical link, priority configuration is performed on the nodes in the non-critical link to obtain the initial priority of the nodes in the non-critical link; The initial priority of the node in the non-critical link is negatively correlated with the triggering period of the non-critical link.

4. The method according to claim 1, characterized in that The initial solution information includes an initial phase. The initial solution calculation for task scheduling based on the prior information of each of the m nodes, to obtain the initial solution information of each of the m nodes, includes: Repeatedly traverse each node in the communication link and perform the following steps until each node meets the corresponding execution time requirement: When the triggering mode of the node is time triggering, updating the initial phase of the node based on the initial phase of the first predecessor node and the execution duration of the first predecessor node; and / or, When the node is a cross node, determining the second predecessor nodes corresponding to all communication links where the cross node is located, and updating the initial phase of the cross node based on the initial phase and execution duration of each of the second predecessor nodes; Among them, the first predecessor node is the predecessor node of the node, and the triggering mode of the predecessor node is the time trigger; the second predecessor node is the predecessor node of the node in the corresponding communication link, and the triggering mode of the predecessor node is the time trigger; the intersection node is a node where at least two of the communication links intersect.

5. The method according to claim 4, characterized in that The updating of the initial phase of the intersection node based on the initial phase and execution duration of each of the second predecessor nodes includes: Based on the initial phases of the second predecessor nodes, selecting the second predecessor node with the largest initial phase as the target predecessor node; Based on the initial phase and execution duration of the target predecessor node, the initial phase of the intersection node is updated.

6. The method according to claim 4, characterized in that The method further comprises: When the triggering mode of the node is message triggering, phase assignment and updating of the node are prohibited.

7. The method according to claim 1, characterized in that The initial solution information includes an initial core binding, and the initial solution calculation for task scheduling based on the prior information of each of the m nodes is performed to obtain the initial solution information of each of the m nodes, including: Traverse the nodes in the sorting result and execute the following steps until all the m nodes are assigned to the cores: Based on the triggering period of all nodes currently bound to s cores in the electronic device, determine the saturation of each of the s cores, where the saturation is used to reflect the contention of the corresponding core, and s is a positive integer; Based on the saturation of each of the s cores, the current node is allocated to the core with the smallest saturation among the s cores, so as to obtain an initial bound core of the current node; The current node is the node currently traversed in the sorting result, and the sorting result is a result obtained by sorting the m nodes based on their respective initial priorities.

8. The method according to claim 1, characterized in that The optimizing the initial solution information of each of the m nodes based on the objective function and the constraint condition to obtain the optimal solution information of the m nodes includes: The simulated annealing algorithm is called to iteratively adjust the initial solution information of each of the m nodes to minimize the objective function when the constraint condition is met, thereby outputting the optimal solution information of the m nodes.

9. The method according to any one of claims 1 to 8, characterized in that The triggering modes include time triggering and message triggering.

10. A task scheduling optimization device, characterized in that: include: An acquisition module is configured to acquire prior information of each of m nodes in the task directed graph, where m is a positive integer, and the prior information includes at least one of a communication link where the corresponding node is located, a deadline of the communication link, a triggering mode, a triggering cycle, and an execution duration; A processing module is configured to calculate an initial solution of task scheduling based on the prior information of each of the m nodes, and obtain initial solution information of each of the m nodes, wherein the initial solution information includes at least one of an initial priority, an initial core binding, and an initial phase; The processing module is further configured to perform optimization calculation based on the initial solution information of each of the m nodes to obtain the optimal solution information of the m nodes, wherein the optimal solution information corresponds to the initial solution information; The processing module is further configured to optimize the initial solution information of each of the m nodes according to the objective function and the constraint conditions to obtain the optimal solution information of the m nodes; Among them, the objective function is used to indicate the weighted sum of the normalized end-to-end delay and the normalized jitter crossing rate, the normalized end-to-end delay is obtained by normalizing the end-to-end delay of the key link in the task directed graph, and the normalized jitter crossing rate is obtained by normalizing the inter-frame jitter crossing rate of the node in the task directed graph, and the constraint conditions include: the proportion of the number of frame tasks in the node that exceed the trigger period within the preset time length to the total number of frame tasks of the node does not exceed a preset first threshold; and / or the completion time difference between any adjacent frame tasks in the node does not exceed a preset second threshold; The task directed graph In and They are respectively a set of task nodes and a set of edges consisting of communication links; the bound core indicates the core processor to which the node is bound in the electronic device.

11. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to execute the executable instructions to implement the steps of the method described in any one of claims 1 to 9.

12. A computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the steps of the method described in any one of claims 1 to 9 are implemented.

13. A chip, characterized in that: The method comprises a processor and an interface; the processor is used to read instructions to execute the method according to any one of claims 1 to 9.

Images