A configurable volume accumulation processing device and method thereof

Abstract

The present invention belongs to the technical field of deep learning accelerator integrated circuits, and particularly relates to a configurable convolution processing device and method thereof. It includes a convolution preprocessing module, a convolution control module, a convolution addition array module, a convolution precision conversion module, and a convolution cache module, wherein the convolution control module selects an addition unit for performing an accumulation operation and a cache unit for storing the result of the convolution operation according to the convolution mode, and the convolution precision conversion module receives the accumulation result data from the convolution addition array module, performs saturation truncation processing on the data, and stores the final convolution result of the convolution operation in the convolution output cache unit. The present invention supports different convolution modes and different data precisions, has an accumulation operation that can be flexibly configured to match hardware information, improves the parallelism of the accelerated calculation of the convolution neural network, and has good scalability.

Description

Technical Field

[0001] The present invention belongs to the technical field of deep learning accelerator integrated circuits, and in particular relates to a configurable volume accumulation processing device and a method thereof. Background Art

[0002] Convolutional Neural Network (CNN) is a type of artificial neural network. It is an important branch of deep learning and has been widely used in image recognition and other fields in recent years. There are a large number of multiplication and accumulation operations in convolutional neural networks. With the continuous increase in the scale and complexity of multi-level neural networks, the amount of data operations involved is also increasing.

[0003] Currently, conventional accelerator hardware design methods cannot fully utilize hardware resources, resulting in reduced parallel computing capabilities of the hardware and waste of computing resources. Summary of the invention

[0004] The purpose of the present invention is to overcome the above-mentioned deficiencies in the prior art. The present invention provides a configurable volume accumulation processing device and method thereof to solve the above-mentioned problems in the background technology.

[0005] In order to solve the above technical problems, the present invention provides a configurable volume accumulation processing device, comprising:

[0006] The convolution accumulation preprocessing module receives the convolution mode, input data precision, output accumulation final result scaling factor, truncation parameter and output matrix width and height information from the configuration bus; wherein the convolution mode includes direct convolution and winograd convolution, and the input data precision includes int8 and int16, and generates the convolution accumulation mode information according to the convolution mode and input data precision; at the same time, receives the convolution packet information output from the convolution MAC array; parses the convolution packet information, and generates the convolution stripe operation start, convolution stripe operation end and convolution stripe channel end flags;

[0007] The convolution accumulation control module controls the selection of the addition unit and the cache unit for the convolution accumulation operation according to the convolution accumulation mode information; when the input data precision is int16, the int16 addition unit is selected to perform accumulation calculation on the convolution part and the data; when the input data precision is int8, both the int16 and int8 addition units are selected to perform accumulation calculation on the convolution part and the data;

[0008] The convolution accumulation and addition array module is composed of multiple parallel addition units and supports multiple parallel accumulation operations. It is used to pack and split the partial sum data output by the convolution MAC array, generate convolution accumulation addends, and complete the convolution accumulation and addition calculation.

[0009] The volume accumulation precision conversion module receives the accumulated final result data of the volume accumulation addition array module, performs precision conversion on the accumulated final result data according to the configuration information, and stores the volume accumulation result data after precision conversion into the volume accumulation output buffer unit;

[0010] The volume accumulation and addition cache module comprises a volume accumulation and addition intermediate result data cache unit and a volume accumulation and addition output cache unit respectively composed of 8 SRAMs; the volume accumulation and addition intermediate result data cache unit stores the intermediate result of the volume accumulation and addition operation output by the volume accumulation and addition array module.

[0011] Preferably, when the convolution accumulation mode is direct convolution and the input data precision is int16, it is set to mode 1; when the convolution accumulation mode is direct convolution and the input data precision is int8, it is set to mode 2; when the convolution accumulation mode is winograd convolution and the input data precision is int16, it is set to mode 3; when the convolution accumulation mode is winograd convolution and the input data precision is int8, it is set to mode 4.

[0012] Preferably, the convolution control module controls the selection of an addition unit for performing convolution operation according to the convolution mode information, and simultaneously selects a convolution intermediate result data cache unit and a convolution output cache unit; performs an accumulation operation on the partial sum data between stripes according to the convolution strip operation start flag and the convolution strip operation end flag generated by the convolution preprocessing module; and outputs the final result data of the convolution operation to the convolution precision conversion module according to the convolution channel end flag.

[0013] Preferably, when the volume accumulation mode is mode 1, an int16 addition unit is enabled to perform accumulation operation on the partial sum data output by each convolution MAC array in the convolution stripe operation, and M_SRAM0 in the volume accumulation intermediate result data cache unit is enabled to store the intermediate accumulation result obtained by the volume accumulation operation; D_SRAM0 in the volume accumulation output cache unit is enabled to store the volume accumulation result data after being processed by the volume accumulation precision conversion module;

[0014] When the volume accumulation mode is mode 2, for the partial sum data output by each convolution MAC array in the convolution stripe operation, an int16 and an int8 addition unit are enabled at the same time to perform accumulation operations, and M_SRAM0 and M_SRAM4 in the volume accumulation intermediate result data cache unit are enabled respectively to store the intermediate accumulation results obtained by the volume accumulation operation, and D_SRAM0 and D_SRAM1 in the volume accumulation output cache unit are enabled to store the volume accumulation result data after being processed by the volume accumulation precision conversion module.

[0015] Preferably, when the volume accumulation mode is mode 3, for the partial sum data output by each convolution MAC array in the convolution stripe operation, four int16 addition units are enabled to perform accumulation operations in parallel, and M_SRAM0~M_SRAM3 in the volume accumulation intermediate data result cache unit are enabled to store four intermediate accumulation results obtained by the volume accumulation operation, respectively, and D_SRAM0~D_SRAM3 in the volume accumulation output cache unit are enabled to store four volume accumulation result data after being processed by the volume accumulation precision conversion module;

[0016] When the volume accumulation mode is mode 4, for the partial sum data output by each convolution MAC array in the convolution stripe operation, 4 int16 and 4 int8 addition units are enabled at the same time to perform accumulation operations in parallel, and M_SRAM0~M_SRAM7 in the volume accumulation intermediate data result cache unit is enabled to store 8 intermediate accumulation results obtained by the volume accumulation operation, and D_SRAM0~D_SRAM7 in the volume accumulation output cache unit is enabled to store the volume accumulation result data after being processed by the volume accumulation precision conversion module.

[0017] Preferably, the volume accumulation and addition array module includes packaging and splitting the partial sum data output by the convolution MAC array; that is, packaging the partial sum data output by all convolution MAC arrays into a data packet, splitting the data packet according to the input data precision in the configuration information, generating operands for addition operations of int16 and int8 addition units respectively, completing the parallel accumulation calculation of the convolution parts and data between stripes, splicing the intermediate accumulation results of multiple parallel volume accumulation and addition operations, and the serial input data in the same stripe cycle are independent of each other and are not accumulated; when the convolution channel end flag is high, the volume accumulation and addition result data of the volume accumulation and addition operation is sent to the volume accumulation and addition precision conversion module; otherwise, the volume accumulation and addition result data is sent to the volume accumulation and addition intermediate result data cache unit.

[0018] Preferably, the volume accumulation and addition precision conversion module receives the accumulated final result data from the volume accumulation and addition array module, performs saturation truncation processing on the data to prevent the processed data from overflowing or underflowing, and determines the truncation length according to the truncation parameter in the configuration information, thereby storing the volume accumulation and addition result data after the precision conversion into the volume accumulation and addition output cache unit.

[0019] Preferably, the volume accumulation cache module sets the depth of the SRAM according to the maximum length of the convolution stripe processing cycle, and sets the bit width of the SRAM according to the maximum number of parallel multi-way convolution MAC arrays and the data accuracy of the accumulation result, so as to realize the caching of multi-way parallel accumulation results and multi-way serial stripe data.

[0020] The present invention also provides a configurable volume accumulation processing method, comprising the following steps:

[0021] Step S1: receiving convolution accumulation configuration information, including convolution mode, input data precision, output accumulation final result scaling factor, truncation parameter, width and height information of the output matrix, and convolution operation status information output by the convolution MAC array;

[0022] Step S2: Generate convolution accumulation mode information, as well as convolution strip operation start, convolution strip operation end and convolution strip channel end flag information;

[0023] Step S3: According to the volume accumulation mode information, select an adding unit for accumulation operation to perform volume accumulation operation, a volume accumulation intermediate result data cache unit M_SRAM for storing the intermediate accumulation result of the volume accumulation operation, and a volume accumulation output cache unit D_SRAM for storing the volume accumulation result data;

[0024] Step S4: determine whether the convolution stripe channel end flag is valid. If valid, send the convolution accumulation result data to the precision conversion module. If invalid, write the convolution accumulation result data into the convolution accumulation intermediate result data cache unit M_SRAM.

[0025] Step S5: Perform saturation truncation processing on the data, determine the truncation length according to the truncation parameter in the configuration information, and determine whether the result of the volume accumulation and addition operation overflows according to whether the values ​​of the data sign bit and the data valid bit are the same;

[0026] Step S6: If overflow occurs, the data value after precision conversion is the maximum positive number or the minimum negative number that the output bit width can represent; if not overflow occurs, the data value after precision conversion is the value after truncation of the final result of accumulation, and the data is written into the volume accumulation output cache unit D_SRAM.

[0027] Compared with the prior art, the present invention has the following beneficial effects:

[0028] The present invention proposes a configuration convolution processing device and method thereof, wherein the convolution processing includes a convolution preprocessing module, a convolution control module, a convolution addition array module, a convolution precision conversion module and a convolution cache module, wherein the convolution control module selects an addition unit for performing an accumulation operation and a cache unit for storing the convolution result according to the convolution mode, and the convolution precision conversion module receives the accumulation result data from the convolution addition array module, performs saturation truncation processing on the data, and stores the final convolution result of the convolution operation in the convolution output cache unit. The present invention supports different convolution modes and different data precisions, has an accumulation operation that can be flexibly configured to match hardware information, improves the parallelism of the accelerated calculation of the convolution neural network, and has good scalability. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 The present invention is a block diagram of the structure of a configurable volume accumulation processing device provided by the present invention.

[0030] Figure 2 It is a flow chart of the steps of a configurable volume accumulation processing method provided by the present invention. DETAILED DESCRIPTION

[0031] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in very simplified form and in non-precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0032] The embodiment of the present invention provides a configurable convolution accumulation processing method, which is in the accumulation calculation stage of the convolution pipeline in the deep learning accelerator, and its purpose is to accumulate the part and data output by the convolution MAC to obtain the final convolution result. Figure 1 As shown, it includes a volume accumulation preprocessing module, a volume accumulation control module, a volume accumulation addition array module, a volume accumulation precision conversion module and a volume accumulation cache module.

[0033] like Figure 1As shown in the figure, the convolution accumulation preprocessing module generates convolution accumulation mode information according to the convolution mode and input data precision of the configuration bus (AXI). When the convolution mode is direct convolution and the input data precision is int16, it is set to mode 1; when the convolution mode is direct convolution and the input data precision is int8, it is set to mode 2; when the convolution mode is winograd convolution and the input data precision is int16, it is set to mode 3; when the convolution mode is winograd convolution and the input data precision is int8, it is set to mode 4; the convolution packet information data is parsed to generate the convolution stripe operation start, convolution stripe operation end and convolution channel end flags.

[0034] like Figure 1As shown, the convolution control module controls the selection of the adding unit for the accumulation operation according to the convolution mode information, and selects the convolution intermediate result data cache unit for storing the intermediate result of the convolution operation, and the convolution output cache unit for storing the final result of the convolution; according to the convolution stripe operation start flag and the convolution stripe operation end flag generated by the accumulation preprocessing module, the accumulation operation is performed on the partial sum data between the stripes, and according to the convolution channel end flag, the final accumulation result of the convolution operation is output to the convolution precision conversion module; when the convolution mode is mode 1, the partial sum of each convolution MAC array output in the convolution stripe operation is converted to the convolution precision conversion module; The sum data is divided and enabled, an int16 addition unit is enabled for accumulation operation, and M_SRAM0 in the volume accumulation and addition intermediate result cache unit is enabled to store the intermediate accumulation result obtained by the volume accumulation and addition operation, and D_SRAM0 in the volume accumulation and addition output cache unit is used to store the volume accumulation and addition data after being processed by the volume accumulation and addition precision conversion module; when the volume accumulation and addition mode is mode 2, for the partial sum data output by each convolution MAC array in the convolution stripe operation, an int16 and an int8 addition unit are enabled for accumulation operation at the same time, and M_SRAM0 and M_SRAM in the volume accumulation and addition intermediate result data cache unit are enabled respectively 4, used to store the intermediate accumulation results obtained by the volume accumulation and addition operation. D_SRAM0 and D_SRAM1 in the volume accumulation and addition output cache unit are used to store the volume accumulation and addition data after being processed by the volume accumulation and addition precision conversion module. When the volume accumulation and addition mode is mode 3, for the partial sum data output by each convolution MAC array in the convolution stripe operation, 4 int16 addition units are enabled to perform accumulation operations in parallel, and M_SRAM0 to M_SRAM3 in the volume accumulation and addition intermediate result data cache unit are enabled to store the 4 intermediate accumulation results obtained by the volume accumulation and addition operation, respectively. D_SRAM0 to D_SRAM1 in the volume accumulation and addition output cache unit are used to store the 4 intermediate accumulation results obtained by the volume accumulation and addition operation, respectively. D_SRAM3 stores 4 volume accumulation data after being processed by the volume accumulation precision conversion module; when the volume accumulation mode is mode 4, for the partial sum data output by each convolution MAC array in the convolution stripe operation, 4 int16 and 4 int8 addition units are enabled at the same time to perform accumulation operations in parallel, and M_SRAM0 to M_SRAM7 in the volume accumulation intermediate result data cache unit are enabled to store the 8 intermediate accumulation results obtained by the volume accumulation operation, and D_SRAM0 to D_SRAM7 in the volume accumulation output cache unit are used to store the volume accumulation data after being processed by the volume accumulation precision conversion module.

[0035] like Figure 1As shown, the convolution accumulation and addition array module includes packing and splitting the partial sum data output by the convolution MAC array, packing the partial sum data output by all convolution MAC arrays into a data packet, inputting data precision according to the configuration information, splitting the data packet, generating operands for addition operations of int16 and int8 addition units respectively, completing the parallel accumulation calculation of the convolution partial sum data between stripes, splicing the intermediate results of multi-channel parallel convolution accumulation and addition operations, and the serial input data in the same strip cycle are independent of each other and are not accumulated. When the convolution channel end flag is high, the accumulation result of the convolution accumulation and addition operation is sent to the convolution accumulation and addition precision conversion module; otherwise, the accumulation result is sent to the convolution accumulation and addition intermediate result data cache unit.

[0036] like Figure 1 As shown, the volume accumulation and addition precision conversion module receives the accumulation result data from the volume accumulation and addition array module, performs saturation truncation processing on the data to prevent the processed data from overflowing or underflowing, determines the truncation length according to the truncation parameter of the configuration information, and stores the data with precision conversion into the volume accumulation and addition output cache unit.

[0037] like Figure 1 As shown in the figure, the volume accumulation cache module includes a volume accumulation intermediate result data cache unit and a volume accumulation output cache unit, which are respectively composed of 8 SRAMs. The depth of the SRAM is set according to the maximum length of the convolution stripe processing cycle, and the bit width of the SRAM is set according to the maximum number of parallel multi-way convolution MAC arrays and the data accuracy of the accumulation result, so as to realize the caching of multi-way parallel accumulation results and multi-way serial stripe data accumulation results.

[0038] like Figure 2 As shown, the embodiment of the present invention also provides a configurable volume accumulation processing method, the method steps are as follows:

[0039] S1: Receive the convolution accumulation configuration information, including the convolution mode, input data precision, output accumulation final result scaling factor, truncation parameter, output matrix width and height information, and convolution packet information output by the convolution MAC array;

[0040] S2: Generate convolution accumulation mode information, convolution strip operation start, convolution strip operation end and convolution strip channel end flag information;

[0041] S3: According to the volume accumulation mode information, select an adding unit for accumulation operation to perform volume accumulation operation, a volume accumulation intermediate result data cache unit M_SRAM for storing intermediate results of volume accumulation operation, and a volume accumulation output cache unit D_SRAM for storing final results of volume accumulation;

[0042] S4: Determine whether the convolution stripe channel end flag is valid. If valid, send the convolution accumulation result data to the precision conversion module. If invalid, write the convolution accumulation result data into the convolution accumulation intermediate result data cache unit M_SRAM.

[0043] S5: Perform saturation truncation processing on the data, determine the truncation length according to the truncation parameter of the configuration information, and determine whether the result of the volume accumulation and addition operation overflows according to whether the values ​​of the data sign bit and the data valid bit are the same;

[0044] S6: If overflow occurs, the data value after precision conversion is the maximum positive number or the minimum negative number that the output bit width can represent; if overflow does not occur, the data value after precision conversion is the value after truncation of the final result of accumulation, and the data is written into the volume accumulation output buffer unit.

[0045] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A configurable volume accumulation processing device, characterized in that: include: The convolution accumulation preprocessing module receives the convolution mode, input data precision, output accumulation final result scaling factor, truncation parameter and output matrix width and height information from the configuration bus; wherein the convolution mode includes direct convolution and winograd convolution, and the input data precision includes int8 and int16, and generates the convolution accumulation mode information according to the convolution mode and input data precision; at the same time, receives the convolution packet information output from the convolution MAC array; parses the convolution packet information, and generates the convolution stripe operation start, convolution stripe operation end and convolution stripe channel end flags; The convolution accumulation control module controls the selection of the addition unit and the cache unit for the convolution accumulation operation according to the convolution accumulation mode information; when the input data precision is int16, the int16 addition unit is selected to perform accumulation calculation on the convolution part and the data; when the input data precision is int8, both the int16 and int8 addition units are selected to perform accumulation calculation on the convolution part and the data; The convolution accumulation and addition array module is composed of multiple parallel addition units and supports multiple parallel accumulation operations. It is used to pack and split the partial sum data output by the convolution MAC array, generate convolution accumulation addends, and complete the convolution accumulation and addition calculation. The volume accumulation precision conversion module receives the accumulated final result data of the volume accumulation addition array module, performs precision conversion on the accumulated final result data according to the configuration information, and stores the volume accumulation result data after precision conversion into the volume accumulation output buffer unit; The volume accumulation and addition cache module includes a volume accumulation and addition intermediate result data cache unit and a volume accumulation and addition output cache unit each consisting of 8 SRAMs; the volume accumulation and addition intermediate result data cache unit stores the intermediate result of the volume accumulation and addition operation output by the volume accumulation and addition array module; When the convolution accumulation mode is direct convolution and the input data precision is int16, it is set to mode 1; when the convolution accumulation mode is direct convolution and the input data precision is int8, it is set to mode 2; when the convolution accumulation mode is winograd convolution and the input data precision is int16, it is set to mode 3; when the convolution accumulation mode is winograd convolution and the input data precision is int8, it is set to mode 4; When the volume accumulation mode is mode 1, an int16 addition unit is enabled to perform accumulation operation on the partial sum data output by each convolution MAC array in the convolution stripe operation, and M_SRAM0 in the volume accumulation intermediate result data cache unit is enabled to store the intermediate accumulation result obtained by the volume accumulation operation; D_SRAM0 in the volume accumulation output cache unit is enabled to store the volume accumulation result data after being processed by the volume accumulation precision conversion module; When the volume accumulation mode is mode 2, for the partial sum data output by each convolution MAC array in the convolution stripe operation, an int16 and an int8 addition unit are enabled to perform accumulation operation, and M_SRAM0 and M_SRAM4 in the volume accumulation intermediate result data cache unit are enabled respectively to store the intermediate accumulation result obtained by the volume accumulation operation, and D_SRAM0 and D_SRAM1 in the volume accumulation output cache unit are enabled to store the volume accumulation result data after being processed by the volume accumulation precision conversion module; When the volume accumulation mode is mode 3, for the partial sum data output by each convolution MAC array in the convolution stripe operation, four int16 addition units are enabled to perform accumulation operations in parallel, and M_SRAM0~M_SRAM3 in the volume accumulation intermediate data result cache unit is enabled to store four intermediate accumulation results obtained by the volume accumulation operation, respectively, and D_SRAM0~D_SRAM3 in the volume accumulation output cache unit is enabled to store four volume accumulation result data after being processed by the volume accumulation precision conversion module; When the volume accumulation mode is mode 4, for the partial sum data output by each convolution MAC array in the convolution stripe operation, 4 int16 and 4 int8 addition units are enabled at the same time to perform accumulation operations in parallel, and M_SRAM0~M_SRAM7 in the volume accumulation intermediate data result cache unit is enabled to store 8 intermediate accumulation results obtained by the volume accumulation operation, and D_SRAM0~D_SRAM7 in the volume accumulation output cache unit is enabled to store the volume accumulation result data after being processed by the volume accumulation precision conversion module.

2. A configurable volume accumulation processing device as claimed in claim 1, characterized in that: The convolution accumulation control module controls the selection of an addition unit for performing convolution accumulation operation according to the convolution accumulation mode information, and simultaneously selects a convolution accumulation intermediate result data cache unit and a convolution accumulation output cache unit; performs an accumulation operation on the partial sum data between stripes according to the convolution stripe operation start flag and the convolution stripe operation end flag generated by the convolution accumulation preprocessing module; and outputs the accumulated final result data of the convolution accumulation operation to the convolution accumulation precision conversion module according to the convolution channel end flag.

3. A configurable volume accumulation processing device as claimed in claim 1, characterized in that: The volume accumulation and addition array module includes packaging and splitting the partial sum data output by the convolution MAC array; that is, packaging the partial sum data output by all convolution MAC arrays into a data packet, splitting the data packet according to the input data precision in the configuration information, generating operands for addition operations of int16 and int8 addition units respectively, completing the parallel accumulation calculation of the convolution partial sum data between stripes, splicing the intermediate accumulation results of multi-channel parallel volume accumulation and addition operations, and the serial input data in the same stripe cycle are independent of each other and are not accumulated; when the convolution channel end flag is high, the volume accumulation and addition result data of the volume accumulation and addition operation is sent to the volume accumulation and addition precision conversion module; otherwise, the volume accumulation and addition result data is sent to the volume accumulation and addition intermediate result data cache unit.

4. A configurable volume accumulation processing device as claimed in claim 1, characterized in that: The volume accumulation and addition precision conversion module receives the final result data of the accumulation from the volume accumulation and addition array module, performs saturation truncation processing on the data to prevent the processed data from overflowing or underflowing, and determines the truncation length according to the truncation parameter in the configuration information, so as to store the volume accumulation and addition result data after the precision conversion into the volume accumulation and addition output cache unit.

5. The configurable volume accumulation processing device according to claim 1, characterized in that: The volume accumulation cache module sets the depth of the SRAM according to the maximum length of the convolution stripe processing cycle, and sets the bit width of the SRAM according to the maximum number of parallel multi-way convolution MAC arrays and the data accuracy of the accumulation result, so as to realize the caching of multi-way parallel accumulation results and multi-way serial stripe data.

6. A configurable volume accumulation processing method, using a configurable volume accumulation processing device as claimed in any one of claims 1 to 5, characterized in that: The steps include: Step S1: receiving convolution accumulation configuration information, including convolution mode, input data precision, output accumulation final result scaling factor, truncation parameter, width and height information of the output matrix, and convolution operation status information output by the convolution MAC array; Step S2: Generate convolution accumulation mode information, as well as convolution strip operation start, convolution strip operation end and convolution strip channel end flag information; Step S3: According to the volume accumulation mode information, select an adding unit for accumulation operation to perform volume accumulation operation, a volume accumulation intermediate result data cache unit M_SRAM for storing the intermediate accumulation result of the volume accumulation operation, and a volume accumulation output cache unit D_SRAM for storing the volume accumulation result data; Step S4: determine whether the convolution stripe channel end flag is valid. If valid, send the convolution accumulation result data to the precision conversion module. If invalid, write the convolution accumulation result data into the convolution accumulation intermediate result data cache unit M_SRAM. Step S5: Perform saturation truncation processing on the data, determine the truncation length according to the truncation parameter in the configuration information, and determine whether the result of the volume accumulation and addition operation overflows according to whether the values ​​of the data sign bit and the data valid bit are the same; Step S6: If overflow occurs, the data value after precision conversion is the maximum positive number or the minimum negative number that the output bit width can represent; if not overflow occurs, the data value after precision conversion is the value after truncation of the final result of accumulation, and the data is written into the volume accumulation output cache unit D_SRAM.

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