Pixel circuit, driving method and display device

Abstract

The present invention provides a pixel circuit, driving method, and display device. The pixel circuit includes a light-emitting element, a driving circuit, a driving node control circuit, and a first writing circuit. The driving circuit generates a driving current for the light-emitting element under the control of the potential of the driving node. The first writing circuit writes a first data voltage to the control node under the control of a write control signal. The driving node control circuit controls the connection or disconnection between the driving node and the first voltage terminal under the control of the potential of the control node. The present invention proposes a pixel circuit structure that utilizes high current density combined with short-duration luminescence.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit, a driving method and a display device. Background Art

[0002] With the advent of the metaverse and the promotion of AR (augmented reality) and VR (virtual reality) technologies, microdisplays have become mainstream, and silicon-based OLED (organic light-emitting diode) and LED (light-emitting diode) display devices have become essential components. Compared to OLED light-emitting devices, LED light-emitting devices have inherent advantages in brightness and lifespan due to their inorganic light emission and optoelectronic properties. Summary of the Invention

[0003] In one aspect, an embodiment of the present invention provides a pixel circuit, including a light-emitting element, a driving circuit, a driving node control circuit, and a first writing circuit;

[0004] The control terminal of the driving circuit is electrically connected to the driving node, and the driving circuit is used to generate a driving current for driving the light-emitting element under the control of the potential of the driving node;

[0005] The first write circuit is electrically connected to the write control line, the first data line and the control node respectively, and is used to write the first data voltage provided by the first data line into the control node under the control of the write control signal provided by the write control line;

[0006] The driving node control circuit is electrically connected to the control node, the first voltage terminal and the driving node respectively, and is used to control the connection or disconnection between the driving node and the first voltage terminal under the control of the potential of the control node.

[0007] Optionally, the pixel circuit according to at least one embodiment of the present invention further includes a storage circuit, a second writing circuit and a compensation control circuit;

[0008] The energy storage circuit is electrically connected to the driving node and is used to store electrical energy;

[0009] The first end of the driving circuit is electrically connected to the first node, and the second end of the driving circuit is electrically connected to the second node;

[0010] The second writing circuit is electrically connected to the scan line, the second data line and the first node respectively, and is used to control the second data line to write a second data voltage to the first node under the control of the scan signal provided by the scan line;

[0011] The compensation control circuit is electrically connected to the scan line, the driving node and the second node respectively, and is used to control the connection or disconnection between the driving node and the second node under the control of the scan signal.

[0012] Optionally, the pixel circuit according to at least one embodiment of the present invention further includes a first light emitting control circuit and a second light emitting control circuit;

[0013] The first light-emitting control circuit is electrically connected to the first light-emitting control terminal, the power supply voltage terminal, and the first node, respectively, and is configured to control the connection or disconnection between the power supply voltage terminal and the first node under the control of a first light-emitting control signal provided by the first light-emitting control terminal;

[0014] The second light emitting control circuit is electrically connected to the second light emitting control terminal, the second node, and the first electrode of the light emitting element, respectively, and is used to control the connection or disconnection between the second node and the first electrode of the light emitting element under the control of a second light emitting control signal provided by the second light emitting control terminal;

[0015] The second electrode of the light emitting element is electrically connected to the first voltage end.

[0016] Optionally, the pixel circuit according to at least one embodiment of the present invention further includes a first initialization circuit;

[0017] The first initialization circuit is electrically connected to the initial control terminal, the initial voltage terminal and the driving node respectively, and is used to write the initial voltage provided by the initial voltage terminal into the driving node under the control of the initial control signal provided by the initial control terminal.

[0018] Optionally, the pixel circuit according to at least one embodiment of the present invention further includes a second initialization circuit;

[0019] The second initialization circuit is electrically connected to the initial control terminal, the initial voltage terminal and the second node respectively, and is used to write the initial voltage provided by the initial voltage terminal into the second node under the control of the initial control signal provided by the initial control terminal.

[0020] Optionally, the first writing circuit includes a first transistor, and the driving node control circuit includes a second transistor;

[0021] The gate of the first transistor is electrically connected to the write control line, the first electrode of the first transistor is electrically connected to the first data line, and the second electrode of the first transistor is electrically connected to the control node;

[0022] A gate of the second transistor is electrically connected to the control node, a first electrode of the second transistor is electrically connected to the first voltage terminal, and a second electrode of the second transistor is electrically connected to the driving node.

[0023] Optionally, the driving circuit includes a driving transistor;

[0024] The gate of the driving transistor is electrically connected to the driving node, the first electrode of the driving transistor is electrically connected to the first node, the second electrode of the driving transistor is electrically connected to the second node, and the substrate of the driving transistor is electrically connected to the power supply voltage terminal.

[0025] Optionally, the energy storage circuit includes a storage capacitor, the second writing circuit includes a third transistor, and the compensation control circuit includes a fourth transistor;

[0026] A first terminal of the storage capacitor is electrically connected to the first node, and a second terminal of the storage capacitor is electrically connected to the second node;

[0027] The gate of the third transistor is electrically connected to the scan line, the first electrode of the third transistor is electrically connected to the second data line, and the second electrode of the third transistor is electrically connected to the first node;

[0028] A gate of the fourth transistor is electrically connected to the scan line, a first electrode of the fourth transistor is electrically connected to the driving node, and a second electrode of the fourth transistor is electrically connected to the second node.

[0029] Optionally, the first light emitting control circuit includes a fifth transistor, and the second light emitting control circuit includes a sixth transistor;

[0030] The gate of the fifth transistor is electrically connected to the first light emitting control terminal, the first electrode of the fifth transistor is electrically connected to the power supply voltage terminal, and the second electrode of the fifth transistor is electrically connected to the first node;

[0031] The gate of the sixth transistor is electrically connected to the second light emitting control terminal, the first electrode of the sixth transistor is electrically connected to the second node, and the second electrode of the sixth transistor is electrically connected to the first electrode of the light emitting element.

[0032] Optionally, the first initialization circuit includes a seventh transistor;

[0033] A gate of the seventh transistor is electrically connected to the initial control terminal, a first electrode of the seventh transistor is electrically connected to the initial voltage terminal, and a second electrode of the seventh transistor is electrically connected to the driving node.

[0034] Optionally, the second initialization circuit includes an eighth transistor;

[0035] A gate of the eighth transistor is electrically connected to the initial control terminal, a first electrode of the eighth transistor is electrically connected to the initial voltage terminal, and a second electrode of the eighth transistor is electrically connected to the second node.

[0036] In a second aspect, an embodiment of the present invention provides a driving method, which is applied to the above-mentioned pixel circuit, and the driving method includes:

[0037] The first writing circuit writes the first data voltage into the control node under the control of the writing control signal, and the driving node control circuit controls the connection or disconnection between the driving node and the first voltage terminal under the control of the potential of the control node.

[0038] Optionally, the first terminal of the driving circuit is electrically connected to the first node, and the second terminal of the driving circuit is electrically connected to the second node; the driving method includes:

[0039] When the driving node control circuit controls the connection between the driving node and the first voltage terminal, the driving circuit controls the disconnection between the first node and the second node under the control of the potential of the driving node.

[0040] Optionally, the pixel circuit further includes a storage circuit, a second writing circuit, a compensation control circuit, a first light-emitting control circuit, a second light-emitting control circuit, a first initialization circuit, and a second initialization circuit; the display cycle includes a threshold voltage reading phase, a light-emitting phase, a writing phase, and a selective light-emitting phase, which are sequentially arranged; and the driving method includes:

[0041] In the threshold voltage reading phase, the second writing circuit writes the second data voltage into the first node under the control of the scan signal; the compensation control circuit controls the connection between the driving node and the second node under the control of the scan signal;

[0042] In the light-emitting stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal; the second light-emitting control circuit controls the connection between the second node and the first electrode of the light-emitting element under the control of the second light-emitting control signal; and the driving circuit drives the light-emitting element to emit light;

[0043] In the write phase, the first write circuit writes the first data voltage into the control node under the control of the write control signal; the drive node control circuit controls the connection or disconnection between the drive node and the first voltage terminal under the control of the potential of the control node;

[0044] In the light-emitting selection stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal; the second light-emitting control circuit controls the connection between the second node and the first pole of the light-emitting element under the control of the second light-emitting control signal; when in the writing stage, the driving node control circuit controls the connection between the driving node and the first voltage terminal, the driving circuit disconnects the connection between its first terminal and the second terminal; when in the writing stage, the driving node control circuit controls the disconnection between the driving node and the first voltage terminal, the driving circuit drives the light-emitting element to emit light.

[0045] Optionally, the display period further includes a reset phase provided before the threshold voltage reading phase, and the driving method further includes:

[0046] In the reset stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal, the first initialization circuit writes the initial voltage to the driving node under the control of the initial control signal, and the second initialization circuit writes the initial voltage to the second node under the control of the initial control signal.

[0047] In a third aspect, an embodiment of the present invention further provides a display device comprising the above-mentioned pixel circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 is a structural diagram of a pixel circuit according to at least one embodiment of the present invention;

[0049] Figure 2 is a structural diagram of a pixel circuit according to at least one embodiment of the present invention;

[0050] Figure 3 is a structural diagram of a pixel circuit according to at least one embodiment of the present invention;

[0051] Figure 4 is a circuit diagram of a pixel circuit according to at least one embodiment of the present invention;

[0052] Figure 5 This invention Figure 4 An operation timing diagram of at least one embodiment of the pixel circuit shown;

[0053] Figure 6A This invention Figure 4 A schematic diagram of the working state of at least one embodiment of the pixel circuit shown in FIG. 1 in a reset phase S1;

[0054] Figure 6B This invention Figure 4 A schematic diagram of the working state of at least one embodiment of the pixel circuit in the threshold voltage reading phase S2 is shown;

[0055] Figure 6C This invention Figure 4 A schematic diagram of the working state of at least one embodiment of the pixel circuit shown in FIG. 1 in the light emitting stage S3;

[0056] Figure 6D This invention Figure 4 A schematic diagram of the working state of at least one embodiment of the pixel circuit shown in FIG. 1 during the writing phase S4;

[0057] Figure 6E This invention Figure 4 A schematic diagram of the working state of at least one embodiment of the pixel circuit shown in FIG. 1 in the light emitting stage S5;

[0058] Figure 7 This invention Figure 4 An operation timing diagram of at least one embodiment of the pixel circuit shown;

[0059] Figure 8 This invention Figure 4 FIG. 1 is an operational timing diagram of at least one embodiment of a pixel circuit shown. DETAILED DESCRIPTION

[0060] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0061] The transistors used in all embodiments of the present invention may be thin film transistors, field effect transistors, or other devices with the same characteristics. In the embodiments of the present invention, to distinguish the two electrodes of the transistor except the gate, one electrode is referred to as the first electrode and the other electrode is referred to as the second electrode.

[0062] In actual operation, when the transistor is a thin film transistor or a field effect transistor, the first electrode may be a drain electrode, and the second electrode may be a source electrode; or, the first electrode may be a source electrode, and the second electrode may be a drain electrode.

[0063] In related technologies, the design of pixel circuits in silicon-based LED display devices reflects their quality. If a voltage-type pixel circuit is used, the current-brightness characteristics of the LED inorganic light-emitting device (i.e., when the same voltage is applied to both ends of the light-emitting device, different brightness levels will appear due to the LED manufacturing process. However, when the same current is applied to the LED, the brightness remains the same. Coupled with the back-gate effect of silicon-based MOS (metal-oxide-semiconductor) transistors (different threshold voltages under different source-gate voltages), as well as differences in threshold voltages within the same wafer due to manufacturing processes, the following phenomena may occur:

[0064] (1) Voltage-type pixel circuits have higher requirements for LED manufacturing processes, while current-type pixel circuits can provide stable current to ensure the same brightness at different locations;

[0065] (2) The back-gate effect and the difference in threshold voltage will lead to different brightness at the same current, which is characterized by mura (uneven display);

[0066] (3) After the miniaturization of LED devices, the photoelectric efficiency drops rapidly. At low current density, adjacent LEDs emit inconsistent brightness at the same current, resulting in large differences in the brightness of each luminous pixel at low and medium grayscales, which is also characterized as mura.

[0067] Based on this, an embodiment of the present invention provides a new silicon-based LED pixel circuit, which is current-driven and can compensate for differences in threshold voltage. In order to address the problem of large differences in brightness and chromaticity of micro-LEDs at low current density, a pixel circuit structure that utilizes high current density combined with short-time light emission is proposed, thereby providing a pixel driving circuit for a high-quality silicon-based LED display device.

[0068] In the related art, LED display can be applied to various displays, but when it is combined with silicon, due to the area limitation of silicon substrate, most applications are limited to application products below 1.5 inches. In addition, the characteristics of silicon-based small devices with high integration, silicon-based LED display is characterized by high PPI (pixel density). High PPI requires small LED light-emitting devices. The smaller the LED device, the more its defects will be magnified, and the efficiency, brightness and chromaticity at low current density will deteriorate. The embodiment of the present invention avoids the area where LED characteristics are poor at low current density, and uses high current density with short-time light emission to achieve various grayscales and high-quality display effects.

[0069] like Figure 1 As shown, the pixel circuit according to the embodiment of the present invention includes a light-emitting element E1, a driving circuit 11, a driving node control circuit 12 and a first writing circuit 13;

[0070] The control terminal of the driving circuit 11 is electrically connected to the driving node N0, and the driving circuit 11 is used to generate a driving current for driving the light-emitting element E1 under the control of the potential of the driving node N0;

[0071] The first write circuit 13 is electrically connected to the write control line Gm, the first data line DC and the control node NC, and is configured to write the first data voltage Vdata1 provided by the first data line DC into the control node NC under the control of the write control signal provided by the write control line Gm;

[0072] The driving node control circuit 12 is electrically connected to the control node NC, the first voltage terminal V1 and the driving node N0 respectively, and is used to control the connection or disconnection between the driving node N0 and the first voltage terminal V1 under the control of the potential of the control node NC.

[0073] The pixel circuit described in the embodiment of the present invention adds a light-emitting duration control module composed of a driving node control circuit 12 and a first writing circuit 13, so that the conduction time of the driving transistor included in the driving circuit 11 can be controlled through the driving node control circuit 12 and the first writing circuit 13, thereby controlling the light-emitting duration and further adjusting the light-emitting brightness.

[0074] The present invention Figure 1 In the embodiment of the pixel circuit shown, when in operation, the first writing circuit 13 writes the first data voltage Vdata1 into the control node NC under the control of the writing control signal, and the driving node control circuit 12 controls the connection or disconnection between the driving node N0 and the first voltage terminal V1 under the potential of the control node NC;

[0075] When the driving node N0 is connected to the first voltage terminal V1, the driving transistor is turned off; when the driving node N0 is disconnected from the first voltage terminal V1, the driving transistor can be turned on under the control of the potential of its control terminal.

[0076] The pixel circuit according to at least one embodiment of the present invention may further include a storage circuit, a second writing circuit, and a compensation control circuit;

[0077] The energy storage circuit is electrically connected to the driving node and is used to store electrical energy;

[0078] The first end of the driving circuit is electrically connected to the first node, and the second end of the driving circuit is electrically connected to the second node;

[0079] The second writing circuit is electrically connected to the scan line, the second data line and the first node respectively, and is used to control the second data line to write a second data voltage to the first node under the control of the scan signal provided by the scan line;

[0080] The compensation control circuit is electrically connected to the scan line, the driving node and the second node respectively, and is used to control the connection or disconnection between the driving node and the second node under the control of the scan signal.

[0081] In a specific implementation, the pixel circuit may further include an energy storage circuit, a second writing circuit and a compensation control circuit;

[0082] The energy storage circuit can be used to maintain the potential of the driving node. Under the control of the scan signal, the second writing circuit controls the connection or disconnection between the driving node and the second node to perform threshold voltage compensation control.

[0083] like Figure 2 As shown, in Figure 1 Based on at least one embodiment of the pixel circuit shown, the pixel circuit according to at least one embodiment of the present invention may further include a storage circuit 21, a second writing circuit 22 and a compensation control circuit 23;

[0084] The energy storage circuit 21 is electrically connected to the driving node N0 and is used to store electrical energy;

[0085] The first end of the driving circuit 11 is electrically connected to the first node N1, and the second end of the driving circuit 11 is electrically connected to the second node N2;

[0086] The second writing circuit 22 is electrically connected to the scan line Gn, the second data line Da and the first node N1 respectively, and is used to control the second data line Da to write the second data voltage Vdata2 to the first node N1 under the control of the scan signal provided by the scan line Gn;

[0087] The compensation control circuit 23 is electrically connected to the scan line Gn, the driving node N0 and the second node N2 respectively, and is used to control the connection or disconnection between the driving node N0 and the second node N2 under the control of the scan signal.

[0088] In at least one embodiment of the present invention, the pixel circuit may further include a first light emitting control circuit and a second light emitting control circuit;

[0089] The first light-emitting control circuit is electrically connected to the first light-emitting control terminal, the power supply voltage terminal, and the first node, respectively, and is configured to control the connection or disconnection between the power supply voltage terminal and the first node under the control of a first light-emitting control signal provided by the first light-emitting control terminal;

[0090] The second light emitting control circuit is electrically connected to the second light emitting control terminal, the second node, and the first electrode of the light emitting element, respectively, and is used to control the connection or disconnection between the second node and the first electrode of the light emitting element under the control of a second light emitting control signal provided by the second light emitting control terminal;

[0091] The second electrode of the light emitting element is electrically connected to the first voltage end.

[0092] In a specific implementation, the pixel circuit may further include a first light-emitting control circuit and a second light-emitting control circuit. The first light-emitting control circuit controls the connection or disconnection between the power supply voltage terminal and the first node under the control of a first light-emitting control signal. The second light-emitting control circuit controls the connection or disconnection between the second node and the first pole of the light-emitting element under the control of a second light-emitting control signal to perform light-emitting control.

[0093] The pixel circuit according to at least one embodiment of the present invention may further include a first initialization circuit;

[0094] The first initialization circuit is electrically connected to the initial control terminal, the initial voltage terminal and the driving node respectively, and is used to write the initial voltage provided by the initial voltage terminal into the driving node under the control of the initial control signal provided by the initial control terminal.

[0095] In a specific implementation, the pixel circuit may further include a first initialization circuit. In the initialization phase, the first initialization circuit writes an initial voltage to the driving node under the control of an initial control signal, so that the driving transistor included in the driving circuit can be turned on when the threshold voltage reading phase begins.

[0096] The pixel circuit according to at least one embodiment of the present invention may further include a second initialization circuit;

[0097] The second initialization circuit is electrically connected to the initial control terminal, the initial voltage terminal and the second node respectively, and is used to write the initial voltage provided by the initial voltage terminal into the second node under the control of the initial control signal provided by the initial control terminal.

[0098] In a specific implementation, the pixel circuit may further include a second initialization circuit. Under the control of an initial control signal, the second initialization circuit writes an initial voltage into the second node to initialize the potential of the second node.

[0099] like Figure 3 As shown, in Figure 2 Based on at least one embodiment of the pixel circuit shown, the pixel circuit according to at least one embodiment of the present invention may further include a first light emitting control circuit 31, a second light emitting control circuit 32, a first initialization circuit 33 and a second initialization circuit 34;

[0100] The first light emitting control circuit 31 is electrically connected to the first light emitting control terminal EM1, the power supply voltage terminal ELVDD and the first node N1, respectively, and is used to control the connection or disconnection between the power supply voltage terminal ELVDD and the first node N1 under the control of the first light emitting control signal provided by the first light emitting control terminal EM1;

[0101] The second light emitting control circuit 32 is electrically connected to the second light emitting control terminal EM2, the second node N2, and the first electrode of the light emitting element E1, respectively, and is configured to control the connection or disconnection between the second node N2 and the first electrode of the light emitting element E1 under the control of a second light emitting control signal provided by the second light emitting control terminal EM2;

[0102] The second electrode of the light emitting element E2 is electrically connected to the first voltage terminal V1;

[0103] The first initialization circuit 33 is electrically connected to the initial control terminal R1, the initial voltage terminal I1 and the driving node N0 respectively, and is configured to write the initial voltage Vinit provided by the initial voltage terminal I1 into the driving node N0 under the control of the initial control signal provided by the initial control terminal R1.

[0104] The second initialization circuit 34 is electrically connected to the initial control terminal R1, the initial voltage terminal I1 and the second node N2 respectively, and is used to write the initial voltage Vinit provided by the initial voltage terminal I1 into the second node N2 under the control of the initial control signal provided by the initial control terminal R1.

[0105] The present invention Figure 3 When at least one embodiment of the pixel circuit shown is in operation, a display cycle includes a reset phase, a threshold voltage reading phase, a light emitting phase, a writing phase, and a selective light emitting phase, which are arranged in sequence;

[0106] In the reset phase, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal, the first initialization circuit writes the initial voltage to the driving node under the control of the initial control signal, and the second initialization circuit writes the initial voltage to the second node under the control of the initial control signal;

[0107] In the threshold voltage reading phase, the second writing circuit writes the second data voltage into the first node under the control of the scan signal; the compensation control circuit controls the connection between the driving node and the second node under the control of the scan signal;

[0108] In the light-emitting stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal; the second light-emitting control circuit controls the connection between the second node and the first electrode of the light-emitting element under the control of the second light-emitting control signal; and the driving circuit drives the light-emitting element to emit light;

[0109] In the write phase, the first write circuit writes the first data voltage into the control node under the control of the write control signal; the drive node control circuit controls the connection or disconnection between the drive node and the first voltage terminal under the control of the potential of the control node;

[0110] In the light-emitting selection stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal; the second light-emitting control circuit controls the connection between the second node and the first pole of the light-emitting element under the control of the second light-emitting control signal; when in the writing stage, the driving node control circuit controls the connection between the driving node and the first voltage terminal, the driving circuit disconnects the connection between its first terminal and the second terminal; when in the writing stage, the driving node control circuit controls the disconnection between the driving node and the first voltage terminal, the driving circuit drives the light-emitting element to emit light.

[0111] Optionally, the first writing circuit includes a first transistor, and the driving node control circuit includes a second transistor;

[0112] The gate of the first transistor is electrically connected to the write control line, the first electrode of the first transistor is electrically connected to the first data line, and the second electrode of the first transistor is electrically connected to the control node;

[0113] A gate of the second transistor is electrically connected to the control node, a first electrode of the second transistor is electrically connected to the first voltage terminal, and a second electrode of the second transistor is electrically connected to the driving node.

[0114] Optionally, the driving circuit includes a driving transistor;

[0115] The gate of the driving transistor is electrically connected to the driving node, the first electrode of the driving transistor is electrically connected to the first node, the second electrode of the driving transistor is electrically connected to the second node, and the substrate of the driving transistor is electrically connected to the power supply voltage terminal.

[0116] Optionally, the energy storage circuit includes a storage capacitor, the second writing circuit includes a third transistor, and the compensation control circuit includes a fourth transistor;

[0117] A first terminal of the storage capacitor is electrically connected to the first node, and a second terminal of the storage capacitor is electrically connected to the second node;

[0118] The gate of the third transistor is electrically connected to the scan line, the first electrode of the third transistor is electrically connected to the second data line, and the second electrode of the third transistor is electrically connected to the first node;

[0119] A gate of the fourth transistor is electrically connected to the scan line, a first electrode of the fourth transistor is electrically connected to the driving node, and a second electrode of the fourth transistor is electrically connected to the second node.

[0120] Optionally, the first light emitting control circuit includes a fifth transistor, and the second light emitting control circuit includes a sixth transistor;

[0121] The gate of the fifth transistor is electrically connected to the first light emitting control terminal, the first electrode of the fifth transistor is electrically connected to the power supply voltage terminal, and the second electrode of the fifth transistor is electrically connected to the first node;

[0122] The gate of the sixth transistor is electrically connected to the second light emitting control terminal, the first electrode of the sixth transistor is electrically connected to the second node, and the second electrode of the sixth transistor is electrically connected to the first electrode of the light emitting element.

[0123] Optionally, the first initialization circuit includes a seventh transistor;

[0124] A gate of the seventh transistor is electrically connected to the initial control terminal, a first electrode of the seventh transistor is electrically connected to the initial voltage terminal, and a second electrode of the seventh transistor is electrically connected to the driving node.

[0125] Optionally, the second initialization circuit includes an eighth transistor;

[0126] A gate of the eighth transistor is electrically connected to the initial control terminal, a first electrode of the eighth transistor is electrically connected to the initial voltage terminal, and a second electrode of the eighth transistor is electrically connected to the second node.

[0127] like Figure 4 As shown, in Figure 3 Based on at least one embodiment of the pixel circuit shown, the light-emitting element is a micro-LED ML; the first writing circuit includes a first transistor M1, and the driving node control circuit includes a second transistor M2; the cathode of the micro-LED ML is electrically connected to the low voltage terminal ELVSS;

[0128] The gate of the first transistor M1 is electrically connected to the write control line Gm, the source of the first transistor M1 is electrically connected to the first data line DC, and the drain of the first transistor M1 is electrically connected to the control node NC;

[0129] The gate of the second transistor M2 is electrically connected to the control node NC, the source of the second transistor M2 is electrically connected to the high voltage terminal VGH, and the drain of the second transistor M2 is electrically connected to the driving node N0;

[0130] The driving circuit includes a driving transistor M0;

[0131] The gate of the driving transistor M0 is electrically connected to the driving node N0, the source of the driving transistor M0 is electrically connected to the first node N1, the drain of the driving transistor M0 is electrically connected to the second node N2, and the substrate of the driving transistor M0 is electrically connected to the power supply voltage terminal ELVDD;

[0132] The energy storage circuit includes a storage capacitor Cst, the second writing circuit includes a third transistor M3, and the compensation control circuit includes a fourth transistor M4;

[0133] A first end of the storage capacitor Cst is electrically connected to the first node N1, and a second end of the storage capacitor Cst is electrically connected to the second node N2;

[0134] The gate of the third transistor M3 is electrically connected to the scan line Gn, the source of the third transistor M3 is electrically connected to the second data line Da, and the drain of the third transistor M3 is electrically connected to the first node N1;

[0135] The gate of the fourth transistor M4 is electrically connected to the scan line Gn, the source of the fourth transistor M4 is electrically connected to the driving node N0, and the drain of the fourth transistor M4 is electrically connected to the second node N2;

[0136] The first light emitting control circuit includes a fifth transistor M5, and the second light emitting control circuit includes a sixth transistor M6;

[0137] The gate of the fifth transistor M5 is electrically connected to the first light emitting control terminal EM1, the source of the fifth transistor M5 is electrically connected to the power supply voltage terminal ELVDD, and the drain of the fifth transistor M5 is electrically connected to the first node N1;

[0138] The gate of the sixth transistor M6 is electrically connected to the second light emitting control terminal EM2, the source of the sixth transistor M6 is electrically connected to the second node N2, and the drain of the sixth transistor M6 is electrically connected to the anode of the micro light emitting diode M1;

[0139] The first initialization circuit includes a seventh transistor M7;

[0140] The gate of the seventh transistor M7 is electrically connected to the initial control terminal R1, the source of the seventh transistor M7 is electrically connected to the initial voltage terminal I1, and the drain of the seventh transistor M7 is electrically connected to the driving node N0;

[0141] The second initialization circuit includes an eighth transistor M8;

[0142] A gate of the eighth transistor M8 is electrically connected to the initial control terminal R1 , a source of the eighth transistor M8 is electrically connected to the initial voltage terminal I1 , and a drain of the eighth transistor M8 is electrically connected to the second node N2 .

[0143] exist Figure 4 In at least one embodiment shown, all transistors are p-type transistors, but the present invention is not limited thereto.

[0144] In at least one embodiment of the present invention, M0 may be a DMOS (double diffused metal-oxide-semiconductor) transistor.

[0145] like Figure 5 As shown, the present invention Figure 4 When at least one embodiment of the pixel circuit shown is in operation, a display cycle includes a reset phase S1, a threshold voltage reading phase S2, a light emitting phase S3, a writing phase S4, and a light emitting selection phase S5, which are arranged in sequence;

[0146] In the reset phase S1, EM1 provides a low voltage signal, EM2 provides a high voltage signal, R1 provides a low voltage signal, Gn provides a high voltage signal, and Gm provides a high voltage signal, such as Figure 6A As shown, M5 is turned on, M8 is turned on, I1 provides an initial voltage Vinit, and M7 is turned on. At this time, the gate potential of M0 is Vinit, the source potential of M0 is Vdd, and the drain potential of M0 is Vinit, so that when the threshold voltage reading phase S2 begins, M0 can be turned on and the potentials of N1 and N2 are initialized; wherein Vdd is the voltage value of the power supply voltage provided by ELVDD;

[0147] In the threshold voltage reading phase S2, EM1 provides a high voltage signal, EM2 provides a high voltage signal, R1 provides a high voltage signal, Gn provides a low voltage signal, and Gm provides a high voltage signal. The threshold voltage read at this time is the threshold voltage with a back gate effect when the data voltage is input; Figure 6B As shown, M7, M5 and M8 are turned off, M3 and M4 are turned on, N0 and N2 are short-circuited, and Da provides the second data voltage Vdata2;

[0148] At the beginning of the threshold voltage reading phase S2, M0 is turned on, and Vdata2 charges Cst through the turned-on M3, M0, and M4 until the potential VN0 of N0 becomes Vdata2+Vth-ef1, where Vth-ef1 is the threshold voltage with back gate effect of M0; VN0 is equal to Vdata+Vth-ef1;

[0149] Wherein, Vth-ef1=a(VB-Vdata2)+Vth, wherein Vth is the threshold voltage of M0 without back gate effect, VB is the substrate voltage of M0, VB is equal to Vdd, a is a constant, is the back gate effect coefficient, VN0 is equal to a(Vdd-Vdata2)+Vth;

[0150] In the light-emitting stage S3, Em1 and Em2 both provide low voltage signals, R1 provides a high voltage signal, Gn provides a high voltage signal, and Gm provides a high voltage signal, such as Figure 6C As shown, M5 and M6 are turned on, and the potential of VN0 is maintained at VN0 during the threshold voltage reading stage S2 under the maintenance of Cst; the potential of N1 is Vdd, and Id is equal to K×(Vgs-Vth) 2 Where K is the current coefficient, Vgs is the gate-source voltage of M0, and Id is equal to K×(a(Vdd-Vdata2)+Vth-Vdd-Vth) 2 At this time, the voltage difference between the substrate voltage of M0 and the gate voltage of M0 is 0, so the threshold voltage of M0 is Vth; Id is equal to K(a×Vdd-Vdd-a×Vdata2) 2 Therefore, the voltage generated by M3 is only related to Vdd and Vdata2, and has nothing to do with the threshold voltage;

[0151] In the writing phase S4, EM1 and EM2 both provide high voltage signals, R1 and Gn both provide high voltage signals, Gm provides a low voltage signal, and DC provides the first data voltage Vdata1. Figure 6D As shown, the writing stage S4 is the stage of reading the signal of whether to continue to emit light or not, M1 is turned on, the potential of N0 is Vdata1, and other transistors are turned off; taking the medium and low grayscale as an example, Vdata1 is a low voltage signal, at this time M2 is turned on, N0 is connected to VGH, M0 is cut off, no current is generated in the pixel circuit, and no light is emitted; when the medium and high grayscale is required, Vdata1 is a high voltage signal, at this time M2 is turned off, N0 is disconnected from VGH, and M0 can be turned on under the control of its gate potential;

[0152] In the light-emitting stage S5, EM1 and EM2 both provide low voltage signals, R1 provides a high voltage signal, Gn provides a high voltage signal, and Gm provides a high voltage signal. Figure 6E As shown, M5 and M6 are open;

[0153] When N0 is connected to VGH in the writing stage S4, ML does not emit light in the light-emitting stage S5; when N0 is disconnected from VGH in the writing stage S4, the potential of N0 remains at the voltage in the light-emitting stage S3, and ML maintains the original current and continues to emit light.

[0154] Figure 5 This invention Figure 4 The timing diagram of each control signal and each data voltage when at least one embodiment of the pixel circuit is in operation and displays medium and low grayscales;

[0155] Figure 7 This invention Figure 4 The timing diagram of each control signal and each data voltage of at least one embodiment of the pixel circuit when operating and displaying medium and high grayscales is shown.

[0156] In related technologies, when LEDs are miniaturized, defects around the light-emitting area are amplified due to process factors such as etching, resulting in a further decrease in efficiency and poor brightness and color stability at low current densities. Embodiments of the present invention can effectively avoid defects in micro-LEDs at low current densities. If the efficiency of a micro-LED cannot be increased in a short period of time, the LED's light-emitting area can be reduced to increase the LED's current density, ensuring that the LED is in a high-efficiency area across a wide range of grayscale levels. In this case, long-term light emission is required, which means adjusting the duty cycle of the light-emitting control signal. The timing of the duty cycle adjustment of the first and second light-emitting control signals can also be supported.

[0157] like Figure 8 As shown, the present invention Figure 4 When at least one embodiment of the pixel circuit is in operation and displays medium and high grayscales, the duty cycle of EM1 can be adjusted to control the brightness of ML.

[0158] exist Figure 8 In the figure, the time labeled F1 is the first frame time, and the time labeled F2 is the second frame time.

[0159] The embodiment of the present invention improves the connection relationship of the substrate of M0 and the source reset, and compensates and offsets the threshold voltage change caused by the back gate effect.

[0160] In the related art, the back-gate effect refers to an effect in which the threshold voltage drop of a MOS (metal-oxide-semiconductor) transistor changes depending on the difference in potential between its source and substrate.

[0161] The driving method according to an embodiment of the present invention is applied to the above-mentioned pixel circuit, and the driving method includes:

[0162] The first writing circuit writes the first data voltage into the control node under the control of the writing control signal, and the driving node control circuit controls the connection or disconnection between the driving node and the first voltage terminal under the control of the potential of the control node.

[0163] In at least one embodiment of the present invention, the first terminal of the driving circuit is electrically connected to the first node, and the second terminal of the driving circuit is electrically connected to the second node; the driving method includes:

[0164] When the driving node control circuit controls the connection between the driving node and the first voltage terminal, the driving circuit controls the disconnection between the first node and the second node under the control of the potential of the driving node.

[0165] In at least one embodiment of the present invention, the pixel circuit further includes a storage circuit, a second writing circuit, a compensation control circuit, a first light-emitting control circuit, a second light-emitting control circuit, a first initialization circuit, and a second initialization circuit; the display cycle includes a threshold voltage reading phase, a light-emitting phase, a writing phase, and a selective light-emitting phase, which are sequentially arranged; and the driving method includes:

[0166] In the threshold voltage reading phase, the second writing circuit writes the second data voltage into the first node under the control of the scan signal; the compensation control circuit controls the connection between the driving node and the second node under the control of the scan signal;

[0167] In the light-emitting stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal; the second light-emitting control circuit controls the connection between the second node and the first electrode of the light-emitting element under the control of the second light-emitting control signal; and the driving circuit drives the light-emitting element to emit light;

[0168] In the write phase, the first write circuit writes the first data voltage into the control node under the control of the write control signal; the drive node control circuit controls the connection or disconnection between the drive node and the first voltage terminal under the control of the potential of the control node;

[0169] In the light-emitting selection stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal; the second light-emitting control circuit controls the connection between the second node and the first pole of the light-emitting element under the control of the second light-emitting control signal; when in the writing stage, the driving node control circuit controls the connection between the driving node and the first voltage terminal, the driving circuit disconnects the connection between its first terminal and the second terminal; when in the writing stage, the driving node control circuit controls the disconnection between the driving node and the first voltage terminal, the driving circuit drives the light-emitting element to emit light.

[0170] In at least one embodiment of the present invention, the display period further includes a reset phase provided before the threshold voltage reading phase, and the driving method further includes:

[0171] In the reset stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal, the first initialization circuit writes the initial voltage to the driving node under the control of the initial control signal, and the second initialization circuit writes the initial voltage to the second node under the control of the initial control signal.

[0172] The display device according to the embodiment of the present invention includes the above-mentioned pixel circuit.

[0173] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A pixel circuit, characterized in that: It includes a light-emitting element, a driving circuit, a driving node control circuit and a first writing circuit; The control terminal of the driving circuit is electrically connected to the driving node, and the driving circuit is used to generate a driving current for driving the light-emitting element under the control of the potential of the driving node; The first write circuit is electrically connected to the write control line, the first data line and the control node respectively, and is used to write the first data voltage provided by the first data line into the control node under the control of the write control signal provided by the write control line; The driving node control circuit is electrically connected to the control node, the first voltage terminal and the driving node respectively, and is used to control the connection or disconnection between the driving node and the first voltage terminal under the control of the potential of the control node; The pixel circuit further includes a storage circuit, a second writing circuit and a compensation control circuit; The energy storage circuit is electrically connected to the driving node and is used to store electrical energy; The first end of the driving circuit is electrically connected to the first node, and the second end of the driving circuit is electrically connected to the second node; The second writing circuit is electrically connected to the scan line, the second data line and the first node respectively, and is used to control the second data line to write a second data voltage to the first node under the control of the scan signal provided by the scan line; The compensation control circuit is electrically connected to the scan line, the driving node and the second node respectively, and is used to control the connection or disconnection between the driving node and the second node under the control of the scan signal.

2. The pixel circuit according to claim 1, wherein: Also includes a first light emitting control circuit and a second light emitting control circuit; The first light-emitting control circuit is electrically connected to the first light-emitting control terminal, the power supply voltage terminal, and the first node, respectively, and is configured to control the connection or disconnection between the power supply voltage terminal and the first node under the control of a first light-emitting control signal provided by the first light-emitting control terminal; The second light emitting control circuit is electrically connected to the second light emitting control terminal, the second node, and the first electrode of the light emitting element, respectively, and is used to control the connection or disconnection between the second node and the first electrode of the light emitting element under the control of a second light emitting control signal provided by the second light emitting control terminal; The second electrode of the light emitting element is electrically connected to the first voltage end.

3. The pixel circuit according to claim 1, wherein: Also included is a first initialization circuit; The first initialization circuit is electrically connected to the initial control terminal, the initial voltage terminal and the driving node respectively, and is used to write the initial voltage provided by the initial voltage terminal into the driving node under the control of the initial control signal provided by the initial control terminal.

4. The pixel circuit according to claim 1, wherein: Also comprising a second initialization circuit; The second initialization circuit is electrically connected to the initial control terminal, the initial voltage terminal and the second node respectively, and is used to write the initial voltage provided by the initial voltage terminal into the second node under the control of the initial control signal provided by the initial control terminal.

5. The pixel circuit according to any one of claims 1 to 4, wherein: The first writing circuit includes a first transistor, and the driving node control circuit includes a second transistor; The gate of the first transistor is electrically connected to the write control line, the first electrode of the first transistor is electrically connected to the first data line, and the second electrode of the first transistor is electrically connected to the control node; A gate of the second transistor is electrically connected to the control node, a first electrode of the second transistor is electrically connected to the first voltage terminal, and a second electrode of the second transistor is electrically connected to the driving node.

6. The pixel circuit according to any one of claims 1 to 4, wherein: The driving circuit includes a driving transistor; The gate of the driving transistor is electrically connected to the driving node, the first electrode of the driving transistor is electrically connected to the first node, the second electrode of the driving transistor is electrically connected to the second node, and the substrate of the driving transistor is electrically connected to the power supply voltage terminal.

7. The pixel circuit according to claim 1, wherein: The energy storage circuit includes a storage capacitor, the second writing circuit includes a third transistor, and the compensation control circuit includes a fourth transistor; A first terminal of the storage capacitor is electrically connected to the first node, and a second terminal of the storage capacitor is electrically connected to the second node; The gate of the third transistor is electrically connected to the scan line, the first electrode of the third transistor is electrically connected to the second data line, and the second electrode of the third transistor is electrically connected to the first node; A gate of the fourth transistor is electrically connected to the scan line, a first electrode of the fourth transistor is electrically connected to the driving node, and a second electrode of the fourth transistor is electrically connected to the second node.

8. The pixel circuit according to claim 2, wherein: The first light emitting control circuit includes a fifth transistor, and the second light emitting control circuit includes a sixth transistor; The gate of the fifth transistor is electrically connected to the first light emitting control terminal, the first electrode of the fifth transistor is electrically connected to the power supply voltage terminal, and the second electrode of the fifth transistor is electrically connected to the first node; The gate of the sixth transistor is electrically connected to the second light emitting control terminal, the first electrode of the sixth transistor is electrically connected to the second node, and the second electrode of the sixth transistor is electrically connected to the first electrode of the light emitting element.

9. The pixel circuit according to claim 3, wherein: The first initialization circuit includes a seventh transistor; A gate of the seventh transistor is electrically connected to the initial control terminal, a first electrode of the seventh transistor is electrically connected to the initial voltage terminal, and a second electrode of the seventh transistor is electrically connected to the driving node.

10. The pixel circuit according to claim 4, wherein: The second initialization circuit includes an eighth transistor; A gate of the eighth transistor is electrically connected to the initial control terminal, a first electrode of the eighth transistor is electrically connected to the initial voltage terminal, and a second electrode of the eighth transistor is electrically connected to the second node.

11. A driving method, applied to the pixel circuit according to any one of claims 1 to 10, characterized in that: The driving method includes: The first writing circuit writes a first data voltage into the control node under the control of a writing control signal, and the driving node control circuit controls the connection or disconnection between the driving node and the first voltage terminal under the control of the potential of the control node; The first end of the driving circuit is electrically connected to the first node, and the second end of the driving circuit is electrically connected to the second node; the driving method includes: When the driving node control circuit controls the connection between the driving node and the first voltage terminal, the driving circuit controls the disconnection between the first node and the second node under the control of the potential of the driving node; The pixel circuit further includes a storage circuit, a second writing circuit, a compensation control circuit, a first light-emitting control circuit, a second light-emitting control circuit, a first initialization circuit, and a second initialization circuit; the display cycle includes a threshold voltage reading phase, a light-emitting phase, a writing phase, and a selective light-emitting phase, which are sequentially arranged; and the driving method includes: In the threshold voltage reading phase, the second writing circuit writes the second data voltage into the first node under the control of the scan signal; the compensation control circuit controls the connection between the driving node and the second node under the control of the scan signal; In the light-emitting stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal; the second light-emitting control circuit controls the connection between the second node and the first electrode of the light-emitting element under the control of the second light-emitting control signal; and the driving circuit drives the light-emitting element to emit light; In the write phase, the first write circuit writes the first data voltage into the control node under the control of the write control signal; the drive node control circuit controls the connection or disconnection between the drive node and the first voltage terminal under the control of the potential of the control node; In the light-emitting selection stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal; the second light-emitting control circuit controls the connection between the second node and the first pole of the light-emitting element under the control of the second light-emitting control signal; when in the writing stage, the driving node control circuit controls the connection between the driving node and the first voltage terminal, the driving circuit disconnects the connection between its first terminal and the second terminal; when in the writing stage, the driving node control circuit controls the disconnection between the driving node and the first voltage terminal, the driving circuit drives the light-emitting element to emit light.

12. The driving method according to claim 11, wherein: The display period further includes a reset phase provided before the threshold voltage reading phase, and the driving method further includes: In the reset stage, the first light-emitting control circuit controls the connection between the power supply voltage terminal and the first node under the control of the first light-emitting control signal, the first initialization circuit writes the initial voltage to the driving node under the control of the initial control signal, and the second initialization circuit writes the initial voltage to the second node under the control of the initial control signal.

13. A display device, characterized in that: The method comprises a pixel circuit according to any one of claims 1 to 10.

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