Chip packaging structure preparation method and chip packaging structure

Abstract

The present application provides a method for preparing a chip packaging structure and the chip packaging structure. The preparation method includes the following steps: mounting a chip on a substrate; providing an annular dam on the back side of the chip; installing a heat dissipation cover, the heat dissipation cover including a side cover and a top cover portion, the side cover circumferentially surrounding the top cover portion, the top cover portion having a boss on a side facing the chip; the top cover portion having an injection hole and an exhaust hole extending through the top cover portion, the injection hole and the exhaust hole being located around the boss of the top cover portion; the side cover being mounted on the substrate, the top cover portion being mounted on the annular dam, the injection hole, the exhaust hole, and the boss of the top cover portion being located within the annular dam, the sidewall of the boss being spaced a predetermined distance from the annular dam, the top cover portion, the back side of the chip, and the annular dam of the chip forming a receiving cavity, the receiving cavity being connected to the outside world through the injection hole and the exhaust hole; and injecting molten indium into the receiving cavity through the injection hole under predetermined ambient temperature conditions, and sealing the injection hole and the exhaust hole after the receiving cavity is filled with the molten indium.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor packaging technology, and in particular relates to a method for preparing a chip packaging structure and a chip packaging structure. Background Art

[0002] In recent years, due to the growing performance requirements, integrated circuit packaging has undergone rapid development from two-dimensional integrated circuit packaging to 2.5D and 3D integrated circuit packaging.

[0003] The chip packaging structure usually uses metal or alloy as the heat dissipation medium, which is fixed inside the heat dissipation cover of the chip packaging structure by pressing. After the pressing process is completed, the metal or alloy and the heat dissipation cover are easily delaminated to form voids or vacuum points, which affect the heat dissipation efficiency of the chip packaging structure. Summary of the Invention

[0004] One of the purposes of this application is to provide a method for preparing a chip packaging structure and a chip packaging structure to improve the heat dissipation efficiency of the chip packaging structure.

[0005] To achieve the above-mentioned and other related objectives, the present application provides a method for preparing a chip packaging structure, comprising the following steps:

[0006] mounting the chip on a substrate;

[0007] Setting a circular dam on the back side of the chip;

[0008] Install a heat dissipation cover, wherein the heat dissipation cover includes a side panel and a top cover portion, wherein the side panel circumferentially surrounds the top cover portion, and a boss is provided on the side of the top cover portion facing the chip, wherein the thickness of the boss is less than the height of the annular dam; and the top cover portion is provided with an injection hole and an exhaust hole penetrating the top cover portion, wherein the injection hole and the exhaust hole are located around the boss of the top cover portion;

[0009] The side panels are mounted on the substrate, and the top cover is mounted on the annular dam. The injection hole, exhaust hole, and boss of the top cover are all located within the annular dam. A predetermined distance is provided between the side wall of the boss and the annular dam. The top cover, the back surface of the chip, and the annular dam of the chip form a receiving cavity, which is connected to the outside world through the injection hole and exhaust hole.

[0010] Under predetermined ambient temperature conditions, molten indium is injected into the accommodation cavity from the injection hole. After the accommodation cavity is filled with the molten indium, the injection hole and the exhaust hole are sealed.

[0011] One of the objectives of the present application is to provide a chip packaging structure, the chip packaging structure comprising: a substrate, a chip, a heat dissipation cover, and a heat transfer portion; the chip is arranged on the substrate; the chip includes an annular dam, and the annular dam is arranged on the back of the chip; the heat dissipation cover includes side panels and a top cover portion; the side panels circumferentially surround the top cover portion, and the side panels are arranged on the substrate; the top cover portion covers the annular dam, and the heat dissipation cover, the back of the chip, and the annular dam of the chip form a receiving cavity; the top cover portion is provided with a boss on the side facing the chip; the thickness of the boss is less than the height of the annular dam; a predetermined distance is provided between the side wall of the boss and the annular dam; the heat transfer portion is located in the receiving cavity, the heat transfer portion is formed by cooling molten indium injected into the receiving cavity, and the heat transfer portion covers the table surface of the boss and extends to the side wall of the boss.

[0012] This application has at least the following beneficial effects:

[0013] Using the preparation method of the present application, molten indium is injected into a receiving cavity formed by the heat dissipation cover, the chip and the dam. The heat dissipation cover is provided with a boss on the side facing the chip, so that during the cooling and shrinkage of the molten indium, the cavities or vacuum points formed by delamination appear in the area between the side wall of the boss and the annular dam, rather than on the boss surface, thereby ensuring good contact performance between the boss surface and the indium, thereby improving the heat dissipation efficiency of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0015] Figure 1 It is a schematic diagram of the packaging structure in the prior art;

[0016] Figure 2 This is a schematic diagram of a chip flip-chip mounted on a substrate according to an embodiment of the present application, wherein the back side of the chip faces upwards;

[0017] Figure 3 This is a schematic diagram of a chip according to an embodiment of the present application having a circular dam on its back side;

[0018] Figure 4 This is a schematic diagram of a heat dissipation cover provided on the back of a chip according to an embodiment of the present application;

[0019] Figure 5 A schematic diagram of injecting molten indium into the receiving cavity of a chip according to an embodiment of the present application;

[0020] Illustration:

[0021] 10 substrate; 20 chip; 21 annular dam; 30 heat dissipation cover; 31 side wall; 32 top cover; 32a injection hole; 32b exhaust hole; 32c boss; 40 indium sheet; 41 molten indium. DETAILED DESCRIPTION

[0022] The following describes the embodiments of the present application through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments. The details in the present application can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other unless they conflict.

[0023] In the description of this application, it should be noted that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0024] The present application provides a method for preparing a chip packaging structure, comprising the following steps:

[0025] mounting the chip on a substrate;

[0026] Setting a circular dam on the back side of the chip;

[0027] Install a heat dissipation cover, wherein the heat dissipation cover includes a side panel and a top cover portion, wherein the side panel circumferentially surrounds the top cover portion, and a boss is provided on the side of the top cover portion facing the chip, wherein the thickness of the boss is less than the height of the annular dam; and the top cover portion is provided with an injection hole and an exhaust hole penetrating the top cover portion, wherein the injection hole and the exhaust hole are located around the boss of the top cover portion;

[0028] The side panels are mounted on the substrate, and the top cover is mounted on the annular dam. The injection hole, exhaust hole, and boss of the top cover are all located within the annular dam. A predetermined distance is provided between the side wall of the boss and the annular dam. The top cover, the back surface of the chip, and the annular dam of the chip form a receiving cavity, which is connected to the outside world through the injection hole and exhaust hole.

[0029] Under predetermined ambient temperature conditions, molten indium is injected into the accommodation cavity from the injection hole. After the accommodation cavity is filled with the molten indium, the injection hole and the exhaust hole are sealed.

[0030] Optionally, the predetermined spacing is 0.5-1 mm.

[0031] Optionally, the thickness of the boss is uniform.

[0032] Optionally, the projection of the boss on the substrate is square or circular.

[0033] Optionally, projections of the injection hole and the exhaust hole on the substrate are located at two ends of one diagonal line of the square.

[0034] Optionally, a side of the boss facing the chip is plated with silver and / or a side of the chip facing the top cover is plated with silver.

[0035] The present application also provides a chip packaging structure, which includes: a substrate, a chip, a heat dissipation cover, and a heat transfer portion; the chip is arranged on the substrate; the chip includes an annular dam, which is arranged on the back side of the chip; the heat dissipation cover includes side dams and a top cover portion; the side dams circumferentially surround the top cover portion, which is arranged on the substrate; the top cover portion is covered on the annular dam, and the heat dissipation cover, the back side of the chip and the annular dam of the chip form a receiving cavity; a boss is provided on the side of the top cover portion facing the chip; the thickness of the boss is less than the height of the annular dam; a predetermined distance is provided between the side wall of the boss and the annular dam; the heat transfer portion is located in the receiving cavity, and the heat transfer portion is formed by cooling molten indium injected into the receiving cavity, and the heat transfer portion covers the table surface of the boss and extends to the side wall of the boss.

[0036] Optionally, the heat transfer portion is a single-layer structure, and the single-layer structure is an indium layer after melting and cooling.

[0037] Optionally, the heat transfer part has a double-layer structure, the upper layer is an indium-silver alloy layer generated by the reaction of molten indium and silver, and the lower layer is an indium layer after melting and cooling; or the upper layer is an indium layer after melting and cooling, and the lower layer is an indium-silver alloy layer generated by the reaction of molten indium and silver.

[0038] Optionally, the heat transfer part has a three-layer structure, the upper layer is an indium-silver alloy layer generated by the reaction of molten indium and silver, the middle layer is an indium layer after melting and cooling, and the lower layer is an indium-silver alloy layer generated by the reaction of molten indium and silver.

[0039] The technical solution of the present invention is described in detail below with reference to the accompanying drawings.

[0040] like Figure 1 The figure shows an existing chip packaging structure, in which a chip 20 is generally flip-chip soldered on a substrate 10, an indium sheet 40 is provided on the chip 20, and then a heat dissipation cover 30 is covered on the chip 20. The heat dissipation cover 30 is fixed to the chip 20 and the substrate 10 with a sealant. During the fixing process, the indium sheet 40 is pressed together. During the pressing process, the indium sheet 40 is prone to delamination and forming voids or vacuum points between the indium sheet 40 and the heat dissipation cover 30, which affects the heat dissipation efficiency of the packaging structure.

[0041] Combined with the following Figures 2 to 5, the specific implementation methods of the present invention for solving the above problems are described in detail.

[0042] The present application provides a method for preparing a chip packaging structure, comprising the following steps: mounting a chip 20 on a substrate 10; providing a ring-shaped dam 21 on the back surface of the chip 20;

[0043] Install the heat dissipation cover 30, which includes a side panel 31 and a top cover 32. The side panel 31 circumferentially surrounds the top cover 32. The top cover 32 is provided with an injection hole 32a and an exhaust hole 32b that pass through the top cover 32. The top cover 32 is provided with a boss 32c on the side facing the chip 20. The thickness of the boss 32c is less than the height of the annular dam 21. The injection hole 32a and the exhaust hole 32b are located around the boss 32c of the top cover 32.

[0044] The side panel 31 is mounted on the substrate 10, and the top cover 32 is mounted on the annular dam 21. The injection hole 32a, exhaust hole 32b, and boss 32c of the top cover 32 are all located within the annular dam 21. A predetermined distance is provided between the side wall of the boss and the annular dam 21. The top cover 32, the back surface of the chip 20, and the annular dam 21 of the chip 20 form a receiving cavity. The receiving cavity communicates with the outside world through the injection hole 32a and exhaust hole 32b.

[0045] Under a predetermined ambient temperature, molten indium 41 is injected into the accommodation cavity from the injection hole 32 a . After the accommodation cavity is filled with the molten indium 41 , the injection hole 32 a and the exhaust hole 32 b are sealed.

[0046] Using the preparation method of the present application, molten indium is injected into the accommodating cavity formed by the heat dissipation cover, the chip and the dam. A boss is provided on the side of the top cover facing the chip, so that during the cooling and shrinkage of the molten indium, the stratified voids or vacuum points appear in the area between the side wall of the boss and the annular dam, rather than on the top of the boss, thereby ensuring good contact performance between the boss top and the indium, thereby improving the heat dissipation efficiency of the packaging structure.

[0047] Reference Figure 2 In one example, the chip 20 is soldered to the substrate 10 by soldering. The material of the solder can be one or more metals such as titanium, copper, nickel, tin and silver, but is not limited thereto.

[0048] Reference Figure 3 In one example, the shape of the annular dam 21 can be square or circular, or other suitable shapes. The annular dam 21 is made of metal, such as stainless steel.

[0049] Reference Figure 4In one example, the heat dissipation cover 30 may be made of a metal material such as copper, iron, tungsten, molybdenum, etc., but is not limited thereto. In this embodiment, the heat dissipation cover 30 is made of stainless steel.

[0050] The side panels 31 can be mounted on the base plate 10 by adhesive. The top cover 32 can be mounted on the annular dam 21 by adhesive. The adhesive is a composite adhesive with adhesive and curing properties, for example, a silicone-based, amino-based, or epoxy-based material.

[0051] In one example, the predetermined spacing between the sidewall of the boss and the annular dam 21 is 0.5-1 mm. For example, the projection of the chip 20 on the substrate 10 is a 5 mm * 5 mm square, the projection of the boss 32 c on the substrate 10 is a 3.5 mm * 3.5 mm square, and the predetermined spacing between the sidewall of the boss and the annular dam 21 is 0.75 mm.

[0052] In one example, the predetermined ambient temperature condition is 150° C. to 180° C. Molten indium tends to boil above 180° C. The step of injecting the molten indium can be performed in a high-temperature chamber, and the ambient temperature in the high-temperature chamber can be set to 150° C. to 180° C.

[0053] In one example, the thickness of the boss 32 c is uniform.

[0054] In one example, when the projection of the boss 32c on the substrate 10 is a square, further, the projections of the injection hole 32a and the exhaust hole 32b on the substrate 10 are located at two ends of one diagonal line of the square.

[0055] In one example, the step of injecting the molten indium 41 into the accommodation cavity further includes filling the accommodation cavity, the injection hole 32 a and the exhaust hole 32 b with the molten indium 41 .

[0056] In one example, after the accommodating cavity is filled with the molten indium 41 , the step of sealing the injection hole 32 a and the exhaust hole 32 b further includes extracting the remaining air between the accommodating cavity and the injection hole 32 a and the exhaust hole 32 b through the exhaust hole 32 b .

[0057] In one example, the injection hole 32 a and the exhaust hole 32 b may be sealed with liquid epoxy resin.

[0058] In one example, the side of the protrusion 32c facing the chip 20 is silver-plated, and / or the side of the chip 20 facing the top cover 32 is silver-plated. Silver-plating the side of the protrusion 32c facing the chip 20 can enhance the bonding between the chip 20 and indium, prevent delamination between the heat transfer portion formed by cooling the molten indium and the protrusion 32c, and form voids or vacuum points, thereby improving heat conduction efficiency. Silver-plating the side of the chip 20 facing the top cover 32 can enhance the heat dissipation efficiency of the chip package structure and enhance the bonding between the chip 20 and indium.

[0059] The present invention also provides a chip packaging structure, comprising: a substrate 10, a chip 20, a heat dissipation cover 30, and a heat transfer portion; the chip 20 is disposed on the substrate 10; the chip 20 includes an annular dam 21, which is disposed on the back of the chip 20; the heat dissipation cover 30 includes side shrouds 31 and a top cover 32, the side shrouds 31 circumferentially surrounding the top cover 32, and the side shrouds 31 are disposed on the substrate 10; the top cover 32 covers the annular dam 21, and the heat dissipation cover 30, the back of the chip 20, and the annular dam 21 of the chip 20 surround and form a receiving cavity; the top cover 32 has a boss 32c on the side facing the chip 20; the thickness of the boss 32c is less than the height of the annular dam 21; a predetermined distance is provided between the sidewall of the boss and the annular dam 21; the heat transfer portion is located within the receiving cavity, formed by cooling molten indium injected into the receiving cavity, and the heat transfer portion covers the top surface of the boss 32c and extends to the sidewall of the boss 32c.

[0060] With the chip packaging structure of the present application, heat from the chip 20 can be conducted through the heat transfer portion via the boss 32 c of the top cover 32 of the heat dissipation cover 30 to the heat sink (not shown) on top of the heat dissipation cover 30 .

[0061] In some embodiments of the present application, the heat transfer portion is a single-layer structure, for example, a melted and cooled indium layer.

[0062] In other embodiments of the present application, the heat transfer portion has a double-layer structure. For example, the upper layer is an indium-silver alloy layer formed by the reaction of molten indium and silver, while the lower layer is a melted and cooled indium layer. Alternatively, the upper layer is a melted and cooled indium layer, while the lower layer is an indium-silver alloy layer formed by the reaction of molten indium and silver. The use of the indium-silver alloy layer prevents delamination between the heat transfer portion and the heat dissipation cover 30 or chip 20, improves the coverage of the heat transfer portion on the heat dissipation cover 30 or chip 20 surface, and enhances the reliability of the packaged product.

[0063] In some other embodiments of the present application, the heat transfer portion has a multi-layer structure. For example, the heat transfer portion has a three-layer structure, wherein the upper layer is an indium-silver alloy layer formed by the reaction of molten indium and silver, the middle layer is a melted and cooled indium layer, and the lower layer is an indium-silver alloy layer formed by the reaction of molten indium and silver.

[0064] The above is only a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and replacements can be made without departing from the technical principles of the present application. These improvements and replacements should also be regarded as the scope of protection of the present application.

Claims

1. A method for preparing a chip packaging structure, characterized in that: The following steps are involved: mounting the chip on a substrate; providing an annular dam on the back side of the chip; Install a heat dissipation cover, wherein the heat dissipation cover includes a side panel and a top cover portion, wherein the side panel circumferentially surrounds the top cover portion, and the top cover portion is provided with a boss on a side facing the chip, wherein the thickness of the boss is less than the height of the annular dam; and the top cover portion is provided with an injection hole and an exhaust hole penetrating the top cover portion, wherein the injection hole and the exhaust hole are located around the boss of the top cover portion; The side enclosure is mounted on the substrate, and the top cover is mounted on the annular dam. The injection hole, the exhaust hole, and the boss of the top cover are all located within the annular dam. A predetermined distance is provided between the side wall of the boss and the annular dam. The top cover, the back surface of the chip, and the annular dam of the chip form a receiving cavity. The receiving cavity is connected to the outside through the injection hole and the exhaust hole. Under a predetermined ambient temperature, injecting molten indium from the injection hole into the receiving cavity, and sealing the injection hole and the exhaust hole after the receiving cavity is filled with the molten indium; A side of the boss facing the chip is plated with silver and / or a side of the chip facing the top cover is plated with silver.

2. The preparation method according to claim 1, characterized in that The predetermined spacing is 0.5-1 mm.

3. The preparation method according to claim 1, characterized in that The thickness of the boss is uniform.

4. The preparation method according to claim 1, wherein The projection of the boss on the substrate is square or circular.

5. The preparation method according to claim 4, characterized in that Projections of the injection hole and the exhaust hole on the substrate are located at two ends of one diagonal line of the square.

6. A chip packaging structure, characterized in that: The chip packaging structure includes: a substrate, a chip, a heat dissipation cover, and a heat transfer portion; the chip is arranged on the substrate; the chip includes an annular dam, which is arranged on the back of the chip; the heat dissipation cover includes side circumferences and a top cover portion; the side circumferences circumferentially surround the top cover portion, which is arranged on the substrate; the top cover portion is covered on the annular dam, and the heat dissipation cover, the back of the chip, and the annular dam of the chip form a receiving cavity; the top cover portion is provided with a boss on the side facing the chip; the thickness of the boss is less than the height of the annular dam; a predetermined distance is provided between the side wall of the boss and the annular dam; the heat transfer portion is located in the receiving cavity, and is formed by cooling molten indium injected into the receiving cavity, and the heat transfer portion covers the table surface of the boss and extends to the side wall of the boss; When the heat transfer portion has a double-layer structure, the upper layer is an indium-silver alloy layer formed by the reaction of molten indium and silver, and the lower layer is a melted and cooled indium layer; or the upper layer is a melted and cooled indium layer, and the lower layer is an indium-silver alloy layer formed by the reaction of molten indium and silver; When the heat transfer part has a three-layer structure, the upper layer is an indium-silver alloy layer formed by the reaction of molten indium and silver, the middle layer is an indium layer after melting and cooling, and the lower layer is an indium-silver alloy layer formed by the reaction of molten indium and silver.

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