Data merging method, device, storage control chip and storage medium

Abstract

The present application discloses a data merging method, device, storage control chip and storage medium. The method includes: judging whether the Flash meets the preset merging conditions, if so, confirming the block sequence to be merged; if not, cyclically judging until the preset merging conditions are met; establishing a mapping relationship between the logical address of each single-bit type block in the block sequence and the physical address of the multi-bit type block; calculating the sequence index of each single-bit type block under the current block sequence according to the first preset index algorithm, and matching each single-bit type block according to the sequence index; calculating the page offset of each single-bit type block according to the second preset page offset algorithm; completing the data merge according to the sequence index and page offset of each single-bit type block. Since the L2P table stores the final mapping relationship, there is no need to overwrite the old mapping relationship with the new mapping relationship every time the data is merged, which can minimize the operation of the L2P table and improve the overall quality of Flash.

Description

Technical Field

[0001] The present invention relates to the field of flash memory technology, and in particular to a data merging method, device, storage control chip and storage medium. Background Art

[0002] NAND Flash (hereinafter referred to as Flash) is one of the current mainstream storage media and is widely used in various types of storage products, such as USB flash drives, SD cards, solid-state drives, etc.

[0003] Flash includes SLC, MLC, TLC and QLC types. Different types of Flash have slight differences in capacity, read and write operations. For example, for TLC and QLC types of Flash, the block must be filled with data before the block can be read, which means that the Flash will start data merging (Merge) operations more frequently.

[0004] In the related technology, data merging needs to use the new mapping relationship to overwrite the old mapping relationship to achieve the update of the L2P (Logical to Physical) table. In practical applications, the update of the L2P table needs to be reduced as much as possible to ensure the overall quality of Flash. Summary of the invention

[0005] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a data merging method, device, storage control chip and storage medium to reduce the updating of the L2P table as much as possible and ensure the overall quality of Flash.

[0006] The first aspect of the present application provides a data merging method, comprising:

[0007] Determine whether the Flash meets the preset merging condition. If so, confirm the block sequence to be merged; if not, repeat the judgment until the preset merging condition is met.

[0008] Establishing a mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block in the block sequence;

[0009] Calculate the sequence index of each single-bit type block under the current block sequence according to a first preset index algorithm, and match each single-bit type block according to the sequence index;

[0010] Calculating the page offset of each of the single-bit type blocks according to a second preset page offset algorithm;

[0011] The data merging is completed according to the sequence index and page offset of each of the single-bit type blocks.

[0012] Furthermore, in one of the embodiments, the preset merging condition is confirmed as follows:

[0013] Determine whether the sum of the total number of pages filled with data in several single-bit type blocks is greater than or equal to the total number of free pages in a multi-bit type block. If so, determine that the Flash meets the preset merging condition; if not, determine that the Flash does not meet the preset merging condition.

[0014] Further, in one of the embodiments, calculating the sequence index of each of the single-bit type blocks under the current block sequence according to the first preset index algorithm includes:

[0015] Based on the physical page address mapped by each of the single-bit type blocks and the total number of pages of each of the single-bit type blocks, a sequence index of each of the single-bit type blocks under the current block sequence is calculated.

[0016] Further, in one embodiment, the calculating the page offset of each of the single-bit type blocks according to the second preset page offset algorithm includes:

[0017] Based on the physical page address mapped by each of the single-bit type blocks and the total number of pages of each of the single-bit type blocks, the page offset of each of the single-bit type blocks is calculated.

[0018] A second aspect of the present application provides a data merging device, comprising:

[0019] A judgment module is used to judge whether the Flash meets the preset merging condition. If so, it confirms the block sequence to be merged; if not, it repeats the judgment until the preset merging condition is met;

[0020] A mapping module, used to establish a mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block in the block sequence;

[0021] An index matching module, configured to calculate a sequence index of each of the single-bit type blocks under the current block sequence according to a first preset index algorithm, and match each of the single-bit type blocks according to the sequence index;

[0022] A page offset module, used to calculate the page offset of each of the single-bit type blocks according to a second preset page offset algorithm;

[0023] A merging module is used to complete the data merging according to the sequence index and page offset of each single-bit type block.

[0024] Furthermore, in one of the embodiments, the preset merging condition is confirmed as follows:

[0025] Determine whether the sum of the total number of pages filled with data in several single-bit type blocks is greater than or equal to the total number of free pages in a multi-bit type block. If so, determine that the Flash meets the preset merging condition; if not, determine that the Flash does not meet the preset merging condition.

[0026] Furthermore, in one embodiment, the index matching module is used to calculate the sequence index of each of the single-bit type blocks under the current block sequence according to a first preset index algorithm, including:

[0027] Based on the physical page address mapped by each of the single-bit type blocks and the total number of pages of each of the single-bit type blocks, a sequence index of each of the single-bit type blocks under the current block sequence is calculated.

[0028] Further, in one embodiment, the page offset module is used to calculate the page offset of each of the single-bit type blocks according to a second preset page offset algorithm, including:

[0029] Based on the physical page address mapped by each of the single-bit type blocks and the total number of pages of each of the single-bit type blocks, the page offset of each of the single-bit type blocks is calculated.

[0030] A third aspect of the present application provides a storage control chip, comprising the data merging device as described above.

[0031] A fourth aspect of the present application provides a computer-readable storage medium storing an executable code, which, when executed by a processor of an electronic device, enables the processor to execute the data merging method as described above.

[0032] The technical solution of the present application includes: judging whether the Flash meets the preset merging conditions, and if so, confirming the block sequence to be merged; if not, looping the judgment until the preset merging conditions are met; establishing a mapping relationship between the logical address of each single-bit type block in the block sequence and the physical address of the multi-bit type block; calculating the sequence index of each single-bit type block under the current block sequence according to the first preset index algorithm, and matching each single-bit type block according to the sequence index; calculating the page offset of each single-bit type block according to the second preset page offset algorithm; completing the data merge according to the sequence index and page offset of each single-bit type block. In the present application, since the mapping relationship between the logical address of each single-bit type block in the block sequence and the physical address of the multi-bit type block is established, that is, the L2P table stores the final mapping relationship, there is no need to overwrite the original mapping relationship with a new mapping relationship each time data is merged as in the related art. The present application can minimize the operation of the L2P table, thereby improving the overall quality of the Flash. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0034] Figure 1 is a flowchart of a data merging method shown in an embodiment of the present application;

[0035] Figure 2 The figure is a schematic diagram of the structure of a data merging device in one embodiment of the present application;

[0036] Figure 3 FIG. 1 is a schematic diagram of the structure of a storage control chip in an embodiment of the present application;

[0037] Figure 4 Shown is a schematic structural diagram of an electronic device in an embodiment of the present application. DETAILED DESCRIPTION

[0038] In order to facilitate the understanding of the present invention, the present invention will be described more comprehensively with reference to the accompanying drawings. The preferred embodiments of the present invention are shown in the accompanying drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thoroughly understood.

[0039] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only and do not represent the only implementation method.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0041] In the related technology, data merging needs to use the new mapping relationship to overwrite the old mapping relationship to achieve the update of the L2P (Logical to Physical) table. In practical applications, the update of the L2P table needs to be reduced as much as possible to ensure the overall quality of Flash.

[0042] Therefore, in order to solve the above technical problems, the present application provides a data merging method, which can reduce the update of the L2P table as much as possible and ensure the overall quality of Flash.

[0043] The technical solution of the present application is described in detail below with reference to the accompanying drawings.

[0044] Figure 1 A flow chart of a data merging method in an embodiment of the present application is shown.

[0045] See also Figure 1 , a data merging method, characterized by comprising:

[0046] Step S110, determine whether the Flash meets the preset merging condition, if so, confirm the block sequence to be merged; if not, repeat the determination until the preset merging condition is met.

[0047] L2P table: It is a management table that must be read before executing read and write operations on the Block. The L2P table records the mapping relationship between the logical address (LPA) and the physical address (PPA) in the Flash. Since the upper-level file system is not clear about the actual physical address of each Block inside the Flash, the file system can only allocate the data logical address to the storage control chip. The storage control chip receives the logical address, interacts with the Flash to complete the mapping of the logical address and the physical address, and completes the writing to the Flash. It can be said that the L2P table is one of the "important bridges" for the upper-level file system to interact with the Flash data.

[0048] In Flash, you can configure the type of blocks. For example, if Flash includes 100 blocks, n (n is a positive integer greater than or equal to 1) of them can be configured as single-bit (i.e. SLC) type blocks, and the remaining 100-n can be configured as multi-bit (TL or QLC) type blocks. It should be noted that in the same Flash, either SLC type blocks and TLC type blocks coexist, or SLC type blocks and QLC type blocks coexist.

[0049] The background purpose of the existing Flash to support the above operation is that although the capacity of multi-bit type blocks is much higher than that of single-bit type blocks, single-bit type blocks have better read and write performance than multi-bit type blocks. Therefore, for TLC or QLC type Flash, single-bit type blocks are equipped to act as cache. When these single-bit type blocks are full of data, the data of the single-bit type blocks needs to be merged and transferred to the multi-bit type blocks, so that the single-bit type blocks can free up space to continue writing data to act as cache.

[0050] In this embodiment, the block sequence to be merged includes two types of blocks, namely single-bit type blocks and multi-bit type blocks, wherein there are multiple single-bit type blocks and one multi-bit type block.

[0051] In this embodiment, whether the Flash meets the preset merging condition can be determined based on the relationship between the sum of the total number of pages filled with data in a plurality of single-bit type blocks and the total number of free pages of a certain multi-bit type block. For example, if the total number of pages filled with data in a plurality of single-bit type blocks is greater than or equal to the total number of free pages of the multi-bit type blocks, it is determined that the Flash meets the preset merging condition; if not, it is determined that the Flash does not meet the preset merging condition.

[0052] Step S120: Establish a mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block in the block sequence.

[0053] In the related art, the L2P table records the original mapping relationship from the logical address of the single-bit type block to the physical address. However, when performing data merging, the physical location of the data storage changes, and the L2P table must also be updated synchronously, so the old mapping relationship needs to be read from the Flash, and the new mapping relationship is used to overwrite and update it before writing it to the Flash, that is, the mapping relationship between the logical address of the single-bit type block and the physical address of the multi-bit type block is used to overwrite the mapping relationship between the logical address of the single-bit type block and the physical address of the multi-bit type block. This is the previous operation process. Because Flash data merging occurs frequently, the above operation process must read and overwrite the old mapping relationship every time a data merge occurs, resulting in a large number of operations on the L2P table.

[0054] For this embodiment, the L2P table does not record the original mapping relationship between the logical address of the single-bit type block and the physical address (old mapping relationship), but directly records the mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block (new mapping relationship), thereby saving the step of overwriting the old mapping relationship. For example, assuming that blocks A, B, C, and D in the Flash are single-bit type blocks, and block E is a multi-bit type block, the technical solution of the related technology is adopted, and the L2P table records the mapping relationship shown in Table 1 before data merging.

[0055] piece Mapping A LAA-PAA B LBA-PAB C LCA-PAC D LDA-PAD

[0056] Table 1

[0057] As can be seen from Table 1, blocks A to D have corresponding logical addresses (LAX) and physical addresses (PAX), where the logical address is assigned by the host system and the physical address is assigned by the Flash. There is a mapping relationship between the two addresses. Before data merging, if the user needs to read the data of these four blocks, they need to read these four mapping relationships in the L2P table to find the actual physical address where the data is stored. After starting the data merge, the old mapping relationship recorded in the L2P table must be overwritten and becomes the mapping relationship shown in Table 2.

[0058]

[0059]

[0060] Table 2

[0061] It can be seen from Table 1 that the mapping relationships corresponding to blocks A to D all eventually point to block E. From the above content, it can be seen that the technical solution of the related technology needs to operate the L2P table twice. The first operation is before the data is merged, recording the mapping relationship from the logical address of the single-bit type block to the physical address; the second operation is after the data is merged, recording the mapping relationship from the logical address of the single-bit type block to the physical address of the multi-bit type block. However, for the technical solution of this embodiment, the L2P table does not record the mapping relationship of Table 1 before the data merge, but directly records the mapping relationship of Table 2 after the data merge. The purpose of this is to take into account that since data merging is an inevitable event, the firmware design only needs to lock the final destination of each data merge and record this layer of mapping relationship in the L2P table, so as to reduce the frequent operation of the L2P table.

[0062] Step S130: Calculate the sequence index of each single-bit type block in the current block sequence according to the first preset index algorithm, and match each single-bit type block according to the sequence index.

[0063] It should be noted that in the confirmed block sequence to be merged, data merging has a sequence, which can be used to establish a sequence index of the single-bit type block under the current block sequence, and the single-bit type block can be matched based on the sequence index.

[0064] In this embodiment, the sequence index can be calculated according to the following formula 1):

[0065] Index=PhysicalPageoff / SLCPageCntPerBlk; 1)

[0066] Among them, "Index" represents the sequence index; "PhysicalPageoff" represents the physical page address mapped by the current single-bit type block; "SLCPageCntPerBlk" represents the total number of pages of the current single-bit type block; and " / " represents division and rounding.

[0067] Step S140: Calculate the page offset of each single-bit type block according to a second preset page offset algorithm.

[0068] It should be noted that after matching the single-bit type block according to the sequence index, it is also necessary to calculate the corresponding page offset and use the page offset to implement data merging.

[0069] In this embodiment, the page offset can be calculated according to the following formula 2):

[0070] Pageoffset=PhysicalPageoff%SLCPageCntPerBlk; 2)

[0071] Among them, "Pageoffset" represents the page offset; "PhysicalPageoff" represents the physical page address mapped by the current single-bit type block; "SLCPageCntPerBlk" represents the total number of pages of the current single-bit type block; and "%" represents the remainder of division.

[0072] Step S150: Complete data merging according to the sequence index and page offset of each single-bit type block.

[0073] It should be noted that the corresponding single-bit type block is matched according to the sequence index, and then the physical page of the single-bit type block is transferred to the physical page of the multi-bit type block according to the actual page mapping according to the page offset to achieve data merging.

[0074] The technical solution of this embodiment establishes a mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block, that is, the L2P table stores the mapping relationship after the data is merged. There is no need to overwrite the original mapping relationship (that is, the mapping relationship before the data is merged) with a new mapping relationship every time the data is merged as in the related art. This application can reduce the operation of the L2P table as much as possible, thereby improving the overall quality of the Flash.

[0075] In order to better understand the technical principles of the technical solution of the present application, specific embodiments are provided below to illustrate the principles.

[0076] Embodiment environmental conditions: Flash includes 20 blocks, namely A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, S, R and T blocks.

[0077] Among them, blocks A to D and blocks F to I are all single-bit type blocks; the rest of the blocks are multi-bit type blocks. The total number of pages of single-bit type blocks is 5 pages, and the total number of pages of multi-bit type blocks is 20 pages. All blocks have no data written in the initial state.

[0078] After a period of time of operation (i.e., reading and writing) on ​​the Flash, the four single-bit type blocks A, C, G, and I are all filled with data, and the remaining blocks are not written with data. At this time, it is determined whether the current Flash meets the preset merge condition. It should be noted that if it is determined that the Flash does not meet the preset merge condition, the judgment will be looped in this step until the current Flash meets the preset merge condition.

[0079] In this embodiment, since the sum of the total number of pages filled with data in the four blocks A, C, G and I is greater than or equal to the total number of free pages in the E block, it is determined that the current Flash meets the preset merging condition, data merging can be started, and it is confirmed that the A, C, G, I and E blocks constitute a block sequence to be merged.

[0080] It should be noted that, in this embodiment, whenever the sum of the total number of pages of several single-bit type blocks filled with data is greater than or equal to the total number of free pages of a multi-bit type block, data merging is immediately started. The advantage of this is that the number of free pages of single-bit type blocks can be kept at all times. Considering the Flash capacity, the number of single-bit type blocks acting as Cache is generally not configured too much. Therefore, in order to ensure that each time new data is written, it is written preferentially to the free pages of these single-bit type blocks, the data of the single-bit type blocks should be transferred in a timely manner at all times.

[0081] Imagine that in this embodiment, if data merging occurs after all single-bit type blocks are full (i.e., when all 8 blocks A to D, F to I are full of data), when the next data is written, since the single-bit type blocks have no "inventory", the new data can only be written into a multi-bit type block, and the read and write performance of the multi-bit type block is obviously not as good as that of the single-bit type block, which will cause the writing speed of the data to be greatly reduced. The judgment of the preset merging conditions of Flash in this embodiment is based on the above considerations, and the purpose is to ensure that Flash has enough idle single-bit type blocks as much as possible to ensure the read and write performance of Flash.

[0082] Subsequently, a mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block in the block sequence is established, as shown in Table 3.

[0083]

[0084]

[0085] Table 3

[0086] Since in this embodiment, the L2P table does not record the mapping relationship between the logical address of block A, block C, block G and block I before data merging and the physical address, and data merging needs to find the actual storage address of the data, how to find these blocks that need to be merged? In the firmware design, it is locked by creating an array, as follows:

[0087]

[0088] Among them, "Index" is a sequence index, and each sequence index will match a single-bit type block. Since each physical page of the multi-bit type block of block E maps the full data logical page of blocks A, C, G, and I, the sequence index can be calculated by formula 1).

[0089] The sequence index is equivalent to matching which block in the current block sequence to merge and transfer data, but the page offset is also needed to clarify which page of the block to transfer data. The page offset can be calculated by formula 2).

[0090] Table 4 shows the complete mapping relationship between blocks A, C, G, I and E after data merging.

[0091]

[0092]

[0093] Table 4

[0094] For example, the sequence index of block A is calculated by formula 1):

[0095] Index=PhysicalPageoff / SLCPageCntPerBlk=0;

[0096] According to formula 2), the page offset of block A has multiple values.

[0097] For the logical page address "100" of block A, Pageoffset = PhysicalPageoff% SLCPageCntPerBlk = 0% 6 = 0;

[0098] For the logical page address "101" of block A, Pageoffset = PhysicalPageoff% SLCPageCntPerBlk = 1% 6 = 1;

[0099] For the logical page address "102" of block A, Pageoffset = PhysicalPageoff% SLCPageCntPerBlk = 2% 6 = 2;

[0100] For the logical page address "103" of block A, Pageoffset = PhysicalPageoff% SLCPageCntPerBlk = 3% 6 = 3;

[0101] For the logical page address "104" of block A, Pageoffset=PhysicalPageoff%SLCPageCntPerBlk=4%6=4.

[0102] For the data merging of the remaining blocks, the calculation method of the sequence index and page offset can be found in block A, which will not be repeated here.

[0103] In the present embodiment, since a mapping relationship is established between the logical address of each single-bit type block in the block sequence and the physical address of the multi-bit type block, that is, the L2P table stores the mapping relationship after the data is merged, there is no need to overwrite the original mapping relationship (that is, the mapping relationship before the data is merged) with a new mapping relationship each time the data is merged as in the related art. The present application can minimize the operation of the L2P table, thereby improving the overall quality of the Flash.

[0104] Corresponding to the aforementioned method embodiments, the present application also discloses a data merging device and corresponding embodiments.

[0105] Figure 2 A schematic structural diagram of a data merging device in an embodiment of the present application is shown.

[0106] See also Figure 2 , a data merging device 300, comprising: a judgment module 310, a mapping module 320, an index matching module 330, a page offset module 340 and a merging module 350. Wherein:

[0107] The determination module 310 is used to determine whether the Flash meets the preset merging condition. If so, the block sequence to be merged is confirmed; if not, the determination is repeated until the preset merging condition is met.

[0108] It should be noted that, in this embodiment, the preset merge condition is confirmed as follows: determine whether the sum of the total number of pages of several single-bit type blocks filled with data is greater than or equal to the total number of free pages of a multi-bit type block. If so, it is determined that the Flash meets the preset merge condition; if not, it is determined that the Flash does not meet the preset merge condition.

[0109] The mapping module 320 is used to establish a mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block in the block sequence.

[0110] The index matching module 330 is used to calculate the sequence index of each single-bit type block in the current block sequence according to the first preset index algorithm, and match each single-bit type block according to the sequence index.

[0111] It should be noted that, in this embodiment, the sequence index can be calculated according to the following formula 1):

[0112] Index=PhysicalPageoff / SLCPageCntPerBlk; 1)

[0113] Among them, "Index" represents the sequence index; "PhysicalPageoff" represents the physical page address mapped by the current single-bit type block; "SLCPageCntPerBlk" represents the total number of pages of the current single-bit type block; and " / " represents division and rounding.

[0114] The page offset module 340 is used to calculate the page offset of each single-bit type block according to a second preset page offset algorithm.

[0115] It should be noted that, in this embodiment, the page offset can be calculated according to the following formula 2):

[0116] Pageoffset=PhysicalPageoff%SLCPageCntPerBlk; 2)

[0117] Among them, "Pageoffset" represents the page offset; "PhysicalPageoff" represents the physical page address mapped by the current single-bit type block; "SLCPageCntPerBlk" represents the total number of pages of the current single-bit type block; and "%" represents the remainder of division.

[0118] The merging module 350 is used to complete data merging according to the sequence index and page offset of each single-bit type block.

[0119] It should be noted that the data merging method implemented by the data merging device disclosed in this embodiment is the same as the above embodiment, so it will not be described in detail here. Optionally, each module in this embodiment and the above other operations or functions are respectively for implementing the methods in the above embodiments.

[0120] like Figure 3 Shown is a structural schematic diagram of a storage control chip in one embodiment of the present application.

[0121] Please refer to 3 , a storage control chip 400 includes the above-mentioned data merging device 300 .

[0122] It should be noted that the storage control chip of this embodiment establishes a mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block, that is, the L2P table stores the mapping relationship after the data is merged. There is no need to overwrite the original mapping relationship (that is, the mapping relationship before the data is merged) with a new mapping relationship every time the data is merged as in the related technology. The present application can minimize the operation of the L2P table, thereby improving the overall quality of the Flash.

[0123] See also Figure 4 Another embodiment of the present application shows a computing electronic device 500 including: a processor 510 and a memory 520.

[0124] The processor 510 can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0125] A general purpose processor may be a microprocessor or the processor may be any conventional processor. The memory 510 may include various types of storage units, such as system memory, read-only memory (ROM), and permanent storage.

[0126] Among them, ROM can store static data or instructions required by processor 520 or other modules of the computer. The permanent storage device can be a readable and writable storage device. The permanent storage device can be a non-volatile storage device that does not lose the stored instructions and data even if the computer is powered off. In some embodiments, the permanent storage device uses a large-capacity storage device (such as a magnetic or optical disk, flash memory) as a permanent storage device.

[0127] In some other embodiments, the permanent storage device may be a removable storage device (e.g., a floppy disk, an optical drive). The system memory may be a read-write storage device or a volatile read-write storage device, such as a dynamic random access memory. The system memory may store some or all of the instructions and data required by the processor at run time.

[0128] In addition, the memory 520 may include any combination of computer-readable storage media, including various types of semiconductor memory chips (eg, DRAM, SRAM, SDRAM, flash memory, programmable read-only memory), magnetic disks and / or optical disks.

[0129] In some embodiments, the memory 520 may include a removable storage device that can be read and / or written, such as a laser disc (CD), a read-only digital versatile disc (such as a DVD-ROM, a double-layer DVD-ROM), a read-only Blu-ray disc, an ultra-density optical disc, a flash memory card (such as an SD card, a mini SD card, and a Micro-SD card, etc.), a magnetic floppy disk, etc. The computer-readable storage medium does not contain a carrier wave and an instantaneous electronic signal transmitted wirelessly or by wire. The memory 520 stores executable code, and when the executable code is processed by the processor 510, the processor 510 can execute part or all of the methods described above.

[0130] In addition, the method according to the present application may also be implemented as a computer program or a computer program product, which includes computer program code instructions for executing some or all of the steps in the above method of the present application.

[0131] Alternatively, the present application can also be implemented as a computer-readable storage medium (or non-transitory machine-readable storage medium or machine-readable storage medium) on which executable code (or computer program or computer instruction code) is stored. When the executable code (or computer program or computer instruction code) is executed by a processor of an electronic device (or server, etc.), the processor executes part or all of the steps of the above-mentioned method according to the present application.

[0132] The embodiments of the present application have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A data merging method, characterized in that: include: Determine whether the Flash meets the preset merging conditions, and if so, confirm the block sequence to be merged; If not, the judgment is repeated until the preset merging condition is met; Establishing a mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block in the block sequence; Based on the physical page address mapped by each single-bit type block and the total number of pages of each single-bit type block, a sequence index of each single-bit type block under the current block sequence is calculated, and each single-bit type block is matched according to the sequence index; Calculating a page offset of each of the single-bit type blocks based on a physical page address mapped to each of the single-bit type blocks and a total number of pages of each of the single-bit type blocks; The data merging is completed according to the sequence index and page offset of each of the single-bit type blocks.

2. The data merging method according to claim 1, characterized in that: The preset merging conditions are confirmed as follows: Determine whether the sum of the total number of pages filled with data in a number of the single-bit type blocks is greater than or equal to the total number of free pages in a multi-bit type block. If so, determine that the Flash meets the preset merging condition; if not, determine that the Flash does not meet the preset merging condition.

3. A data merging device, characterized in that: include: A judgment module is used to judge whether the Flash meets the preset merging condition, and if so, confirm the block sequence to be merged; If not, the judgment is repeated until the preset merging condition is met; A mapping module, used to establish a mapping relationship between the logical address of each single-bit type block and the physical address of the multi-bit type block in the block sequence; An index matching module, configured to calculate a sequence index of each of the single-bit type blocks under the current block sequence based on a physical page address mapped to each of the single-bit type blocks and a total number of pages of each of the single-bit type blocks, and match each of the single-bit type blocks according to the sequence index; A page offset module, configured to calculate a page offset of each of the single-bit type blocks based on a physical page address mapped to each of the single-bit type blocks and a total number of pages of each of the single-bit type blocks; A merging module is used to complete the data merging according to the sequence index and page offset of each single-bit type block.

4. The data merging device according to claim 3, characterized in that: The preset merging conditions are confirmed as follows: Determine whether the sum of the total number of pages filled with data in several single-bit type blocks is greater than or equal to the total number of free pages in a multi-bit type block. If so, determine that the Flash meets the preset merging condition; if not, determine that the Flash does not meet the preset merging condition.

5. A storage control chip, characterized in that: The invention comprises the data merging device as described in any one of claims 1 to 2.

6. A computer-readable storage medium, characterized in that: An executable code is stored, and when the executable code is executed by a processor of an electronic device, the processor is caused to execute the data merging method according to any one of claims 1 to 2.

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