A method and device for VirtIO device chain descriptor management of a DPU

Abstract

The application provides a chained descriptor management method and device for a VirtIO device of a DPU, wherein a host receives a virtual input / output operation request sent by a virtual function; a descriptor is configured in a memory space pointed by a descriptor ring queue buffer, the descriptor including a previous chained descriptor address, a next chained descriptor address, a descriptor stop bit and other basic information; a descriptor header address is configured in a memory space pointed by an available data header ring queue buffer; a notification signal is sent to the VirtIO device through a base register, a control block in a completion ring queue buffer is returned after the VirtIO device completes corresponding virtual input / output operation, and the released descriptor is recycled according to information contained in the control block. The method provided by the application introduces a chained descriptor structure, realizes batch data transmission and concurrent processing, and improves the overall performance of the VirtIO device.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of virtualization, and in particular to a VirtIO device chain descriptor management method and device for a DPU. BACKGROUND

[0002] With the rapid development of cloud computing and virtualization technology, higher requirements are put forward for high-performance data plane, packet transmission rate and overall data transmission performance.

[0003] VirtIO (Virtual Input & Output) as an efficient I / O virtualization solution plays an important role in virtual machine performance optimization. However, the traditional virtio device descriptor management method mainly relies on single descriptor processing, which is often limited by performance bottlenecks and concurrent processing capabilities when processing large-scale data transmission and concurrent scenarios.

[0004] The existing VirtIO device usually adopts a single descriptor management mechanism, that is, only one descriptor is processed each time. This mechanism has frequent context switching and interrupt triggering when processing complex data transmission tasks, resulting in performance degradation. In addition, the single descriptor management method has limited support for concurrent processing and multi-channel transmission. SUMMARY

[0005] In view of this, the embodiments of the present application provide a VirtIO device chain descriptor management method and device for a DPU to solve the problem that the descriptor management mechanism adopted by the existing VirtIO device only processes one descriptor each time, and when processing complex data transmission tasks, there are frequent context switching and interrupt triggering, thereby resulting in low management efficiency, low performance, and not suitable for large-scale data transmission, multi-channel transmission, and concurrent processing application scenarios.

[0006] In one aspect, the present application provides a VirtIO device chain descriptor management method for a DPU, the method comprising the following steps:

[0007] The host machine receives a virtual input / output operation request containing virtual input / output operation information issued by a virtual function;

[0008] Configuring descriptors in the memory space pointed to by the descriptor ring queue buffer, and constructing a descriptor chain according to the last intra-chain descriptor address and the next intra-chain descriptor address contained in the descriptors; wherein each descriptor contains virtual input / output operation information issued by the corresponding virtual function;

[0009] Configuring descriptor header addresses in the memory space pointed to by the available data header ring queue buffer;

[0010] sending a notification signal to the VirtIO device through the base register, the notification signal including the configured descriptor information, descriptor header address information;

[0011] receiving a control block of the completion ring queue buffer, and recycling the descriptor according to information contained in the control block; wherein the control block is a data structure returned to the completion ring queue buffer by the VirtIO device after reading corresponding descriptors from the descriptor chain and completing corresponding virtual input / output operations according to the read descriptors.

[0012] In some embodiments of the present application, the method comprises:

[0013] forwarding the virtual input / output operation request to the host computer through the virtualization layer.

[0014] In some embodiments of the present application, the descriptors are configured in the memory space pointed to by the descriptor ring queue buffer, comprising:

[0015] allocating a ring buffer by the host computer as the descriptor ring queue buffer for storing the descriptors;

[0016] filling the contents of the descriptors in the descriptor ring queue buffer one by one;

[0017] updating the state field of the descriptor after filling.

[0018] In some embodiments of the present application, in a multi-queue environment, the method further comprises:

[0019] linking multiple descriptors to form a continuous descriptor chain according to the notification signal, the previous in-chain descriptor address and the next in-chain descriptor address;

[0020] traversing the descriptor chain to access each descriptor in the descriptor chain one by one according to the next in-chain descriptor address contained in each descriptor;

[0021] obtaining information in the required descriptor to perform corresponding data processing;

[0022] updating the descriptor chain structure after processing each descriptor.

[0023] On the other hand, the present application also provides a chained descriptor management method for a VirtIO device of a DPU, the method comprising the following steps:

[0024] the VirtIO device receiving a notification signal sent by the host computer, the notification signal including new available descriptor information;

[0025] reading a next available descriptor head address from the available data head ring queue buffer;

[0026] reading a corresponding descriptor from the descriptor ring queue buffer according to the descriptor head address, the descriptor containing information of a virtual input / output operation issued by a virtual function, the descriptor being pre-built as a descriptor chain according to a previous in-chain descriptor address and a next in-chain descriptor address contained therein;

[0027] after performing the corresponding virtual input / output operation according to the read descriptor, sending a corresponding control block to a completion ring queue buffer.

[0028] In some embodiments of the present application, reading a corresponding descriptor from the descriptor ring queue buffer according to the descriptor head address comprises:

[0029] first reading a first part of the corresponding descriptor from the descriptor ring queue buffer;

[0030] if there are subsequent descriptors not yet read, continuously reading a preset number of descriptors to achieve parallel processing.

[0031] In some embodiments of the present application, receiving a notification signal sent by the host computer comprises:

[0032] receiving an interrupt signal sent by the host computer to learn that there is a new available descriptor, and executing a predetermined interrupt handler to process the new descriptor;

[0033] or periodically checking descriptor state changes using a polling method to learn whether there is a new available descriptor.

[0034] In another aspect, the present application also provides a chained descriptor management apparatus for a VirtIO device of a DPU, comprising a processor, a memory and computer programs / instructions stored on the memory, the processor being configured to execute the computer programs / instructions, and when the computer programs / instructions are executed, the apparatus implements the steps of the method according to any one of the above embodiments.

[0035] In another aspect, the present application also provides a computer readable storage medium having computer programs stored thereon, the programs being executed by a processor to implement the steps of the method according to any one of the above embodiments.

[0036] In another aspect, the present application also provides a computer program product comprising computer programs / instructions, the computer programs / instructions being executed by a processor to implement the steps of the method according to any one of the above embodiments.

[0037] The beneficial effects of the present application are at least:

[0038] The application provides a chained descriptor management method and device for VirtIO device of DPU, wherein a host receives a virtual input / output operation request sent by a virtual function; a descriptor is configured in a memory space pointed by a descriptor ring queue buffer, the descriptor including a previous chained descriptor address, a next chained descriptor address, a descriptor stop bit and other basic information; a descriptor header address is configured in a memory space pointed by an available data header ring queue buffer; a notification signal is sent to the VirtIO device through a base register, a control block of a completion ring queue buffer is returned after the VirtIO device completes a corresponding virtual input / output operation, and the released descriptor is recycled according to information contained in the control block. The method provided by the application introduces a chained descriptor structure, supports concurrent processing of multiple descriptor chains, realizes batch data transmission and concurrent processing. Further, by reducing the number of interrupts and context switches, transmission delay is reduced, and the overall performance of the VirtIO device is significantly improved. Further, the chained descriptor structure makes it easier and more intuitive to manage multiple data buffers, reducing management complexity. Further, the design of the application has good flexibility and scalability, and the length and number of descriptor chains can be adjusted according to actual needs, adapting to VirtIO device scenarios of different scales and needs.

[0039] Additional advantages, objects, and features of the application will be set forth in part by the description that follows, and will in part be apparent to those of ordinary skill in the art upon examination of the following or can be learned from practice of the application. The objects and other advantages of the application can be realized and attained by the structure particularly pointed out in the specification as well as in the appended claims.

[0040] Those skilled in the art will appreciate that the objects and advantages of the application can be realized and attained by means summarized fully in the following description, and particularly pointed out in the appended claims. Accordingly, the foregoing background of the application is intended for illustrative purposes only and is not to be taken as limiting the scope of the application. BRIEF DESCRIPTION OF DRAWINGS

[0041] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the principles of the application. In the drawings:

[0042] Figure 1 A schematic diagram of the steps of the chained descriptor management method for the VirtIO device in an embodiment of the application.

[0043] Figure 2 A schematic diagram of the steps of the chained descriptor management method for the VirtIO device in an embodiment of the application.

[0044] Figure 3A framework flow chart of a descriptor ring queue buffer module descriptor management method in an embodiment of the present application.

[0045] Figure 4 A descriptor internal structure schematic diagram in an embodiment of the present application.

[0046] Figure 5 A descriptor chain structure schematic diagram in an embodiment of the present application.

[0047] Figure 6 A step schematic diagram of a VirtIO device chain descriptor management method in an embodiment of the present application. DETAILED DESCRIPTION

[0048] In order to make the objects, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the embodiments and drawings. Herein, the illustrative embodiments of the present application and the descriptions thereof are used to explain the present application, but are not used as the limitation of the present application.

[0049] It should be noted that, in order to avoid the present application being obscured by unnecessary details, only the structures and / or processing steps closely related to the solutions according to the present application are shown in the drawings, and other details not closely related to the present application are omitted.

[0050] It should be emphasized that the term "comprises / comprising" as used herein means the presence of the stated features, elements, steps or components, but does not preclude the presence or addition of one or more other features, elements, steps or components.

[0051] It should be noted that, if not specifically stated, the term "connected" as used herein can not only mean direct connection, but also indirect connection with an intermediate.

[0052] In the following, embodiments of the present application will be described with reference to the drawings. In the drawings, the same reference signs represent the same or similar parts or the same or similar steps.

[0053] It should be emphasized that the step labels mentioned in the following are not the limitation of the order of the steps, and it should be understood that the steps can be executed in the order mentioned in the embodiments, or in an order different from the embodiments, or several steps can be executed simultaneously.

[0054] In order to solve the problem that the descriptor management mechanism adopted by the existing VirtIO device only processes one descriptor at a time, frequent context switching and interrupt triggering exist when processing complex data transmission tasks, thereby causing low management efficiency and low performance, and the application scenarios of large-scale data transmission, multi-channel transmission and concurrent processing are not suitable, the present application proposes a chained descriptor management method for a VirtIO device of a DPU, wherein the DPU represents a data processing unit (Data Processing Unit), as shown in the figure Figure 1 The method is executed on the host side, and the method comprises the following steps S101-S105:

[0055] Step S101: receiving a virtual input / output operation request containing virtual input / output operation information issued by a virtual function.

[0056] Step S102: configuring descriptors in the memory space pointed to by the descriptor ring queue buffer, and constructing a descriptor chain according to the last intra-chain descriptor address and the next intra-chain descriptor address contained in the descriptors. Each descriptor contains the virtual input / output operation information issued by the corresponding virtual function.

[0057] Step S103: configuring descriptor header addresses in the memory space pointed to by the available data header ring queue buffer.

[0058] Step S104: sending a notification signal to the VirtIO device through the base register. The notification signal includes the configured descriptor information and the descriptor header address information.

[0059] Step S105: receiving a control block of the completion ring queue buffer, and recycling the descriptors according to the information contained in the control block. The control block is a data structure returned to the completion ring queue buffer by the VirtIO device after reading the corresponding descriptors from the descriptor chain and completing the corresponding virtual input / output operation according to the read descriptors.

[0060] As shown in the figure Figure 2 The overall framework flowchart of the chained descriptor management method for the VirtIO device is shown in the figure. The method takes the host as the execution end, sends a notification signal through the base register to notify the VirtIO device to perform a virtual input / output operation, configures data in the three VirtIO ring queue buffers in the memory space to realize the front-end configuration of the VirtIO device, and then obtains a control block from the completion ring queue buffer to further release the VirtIO ring queue buffer resources, realize the recycling of the virtual queue and the descriptors, and the specific steps are as follows:

[0061] In step S101, a host computer (HOST) receives a virtual input / output (I / O) operation request issued by a virtual function (VF). Information of the virtual I / O operation includes a data buffer, an operation type, and the like.

[0062] In some embodiments, the virtual I / O operation request is forwarded to the host computer by a virtualization layer. The virtualization layer is located above a physical host operating system and is responsible for managing and allocating physical resources to virtual machines, including processing resource requests of the virtual machines such as CPU, memory, storage, and I / O devices. The virtualization layer can be KVM, Xen, or the like.

[0063] In step S102, as shown in FIG. 2, the host computer configures descriptors in a memory space pointed to by a descriptor ring. The descriptors contain information of the virtual I / O operation in step S101, such as a data buffer, an operation type, and the like. Figure 3

[0064] The descriptor ring is used to store descriptors to be moved. The descriptors usually contain queue numbers, direct memory access (DMA) addresses, and data lengths, and the like, data flow moving information, and are used for data DMA operation to implement read and write operations of the virtual I / O.

[0065] In some embodiments, the descriptors are configured in the memory space pointed to by the descriptor ring, including the following steps:

[0066] Allocating a descriptor space: The host computer allocates a block of memory space, usually a ring buffer, as a descriptor ring buffer for storing descriptors. The descriptors are structured data blocks used to deliver necessary information about I / O operations.

[0067] Filling descriptor contents: The host computer fills the contents of the descriptors in the allocated descriptor ring buffer one by one. Each descriptor contains information required for performing an I / O operation, such as an address of a data buffer or a data descriptor itself, an operation type, read or write, a data length, and an offset, and the like.

[0068] Marking a descriptor state: After filling the descriptors, the host computer can update a state field of the descriptor to indicate that the descriptor has been prepared by the host computer and is waiting for processing by a virtual device.

[0069] In the present application, a chained descriptor structure is introduced to implement batch data transmission and concurrent processing. Therefore, as shown in FIG. 3, the host computer configures a descriptor chain in the memory space pointed to by the descriptor ring. Figure 4 ​As shown, the descriptor of the present application contains not only data, address, queue number, length and data valid bit in the common descriptor structure, but also last in-chain descriptor address, next in-chain descriptor address and descriptor end bit.

[0070] In some embodiments, as shown, the arrangement of the multiple descriptor chains of the multiple queues in the desc_ring, according to the notification signal, the last in-chain descriptor address and the next in-chain descriptor address, links the multiple descriptors to form continuous descriptor chains. According to the notification signal and the number of chained descriptors, the descriptor chains are arranged in a cross manner in sequence, but are associated in front and back through the chained pointers, which is easy to manage. Figure 5

[0071] In some embodiments, after the descriptor chains are constructed, the method further comprises:

[0072] Traversing the descriptor chains, each descriptor in the descriptor chains is accessed one by one according to the next in-chain descriptor address contained in each descriptor. The information in the required descriptor is obtained to perform corresponding data processing. After each descriptor is processed, the descriptor chain structure is updated.

[0073] In step S103, the host machine configures the descriptor header address in the memory space pointed by the available data header ring buffer (avail_ring). The descriptor header usually contains the metadata of the descriptor, such as the number of descriptors, the address of the next descriptor and other information.

[0074] The available data header ring buffer avail_ring is used to store the data headers to be moved, and the data header contains the queue number and the descriptor address, which can be used to obtain the corresponding descriptor from the desc_ring.

[0075] In step S104, the host machine sends the notification signal notify to the VirtIO device through the base address register (BAR). The base address register is part of the VirtIO device, which is used for communication and notification between the host machine and the VirtIO device. The notification signal includes the descriptor information that has been configured, and through the notification signal, the host machine informs the device that which descriptors are ready and can be used.

[0076] In step S105, the host machine receives the control block returned to the used ring by the VirtIO device after completing the corresponding virtual input / output operation, and recycles the released descriptor according to the information contained in the control block.

[0077] ​A completion ring buffer used_ring is completed, used for storing completion information needing to be returned, including a completion queue number, a completion data header and a completion descriptor, and a descriptor header read pointer in an available data header ring buffer corresponding to the present operation and a completion pointer in the completion ring buffer.

[0078] The application further provides a chained descriptor management method for a VirtIO device of a DPU, as shown in the accompanying drawings. Figure 6 The method is executed at the VirtIO device side, and the method comprises the following steps S201-S204.

[0079] Step S201: receiving a notification signal sent by a host, wherein the notification signal comprises new available descriptor information.

[0080] Step S202: reading a next available descriptor header address from an available data header ring buffer.

[0081] Step S203: reading a corresponding descriptor from a descriptor ring buffer according to the descriptor header address, wherein the descriptor contains virtual input / output operation information issued by a virtual function, and the descriptor is constructed into a descriptor chain according to a previous chained descriptor address and a next chained descriptor address contained in the descriptor.

[0082] Step S204: sending a corresponding control block to a completion ring buffer after performing a corresponding virtual input / output operation according to the read descriptor.

[0083] Also refer to Figure 2 and Figure 3 The method takes the VirtIO device as an execution end, and after receiving a notification signal, the VirtIO device reads a descriptor header address from an available data header ring buffer, then reads a descriptor from a descriptor ring buffer according to the descriptor header address, sends a control block carrying the descriptor header address to a completion ring buffer after completing a corresponding virtual input / output operation, indicating that the corresponding descriptor is no longer used, and the host can release relevant memory resources, specifically:

[0084] In step S201, the VirtIO device receives a notification signal notify sent by a host HOST. The notification signal comprises new available descriptor information, and the VirtIO device knows that there is new available descriptor through the notification signal.

[0085] In some embodiments, step S101 is implemented through a communication protocol or an interrupt mechanism. For example, the VirtIO device receives an interrupt signal sent by the host to know that there are new available descriptors and executes a predetermined interrupt handler to process the new descriptors, or it uses polling to periodically check descriptor state changes to know if there are any new available descriptors.

[0086] In step S202, the VirtIO device reads the address of the next available descriptor header from the available header ring buffer (avail_ring). The configuration and use of the available header ring buffer remain consistent with those described above.

[0087] In step S203, the VirtIO device reads the corresponding descriptor from the descriptor circular queue buffer (desc_ring) based on the descriptor header address obtained from the reading. The configuration and use of the descriptor circular queue buffer remain consistent with those described above.

[0088] In some embodiments, the VirtIO device first reads the first part of the corresponding descriptor from the descriptor circular queue buffer; if there are subsequent unread descriptors, a preset number of descriptors are read continuously to achieve parallel processing, for example, the preset number is 3.

[0089] In this invention, a chained descriptor structure is introduced to achieve batch data transmission and concurrent processing; therefore, similarly... Figure 4 As shown, the descriptor of the present invention not only includes data, address, queue number, length and data validity bits in the ordinary descriptor structure, but also includes the address of the previous in-chain descriptor, the address of the next in-chain descriptor and the descriptor end bit.

[0090] In step S204, after the VirtIO device performs the corresponding virtual input / output operation based on the virtual input / output operation information contained in the descriptor, it sends the corresponding control packet logic (CPL) to the completion ring queue buffer (used_ring). The control packet contains the descriptor header address, and the host machine can identify which descriptors have been used by retrieving the descriptor header address from the corresponding control packet in the completion ring queue buffer.

[0091] The present invention also provides a chained descriptor management device for VirtIO devices in a DPU, which can, as Figure 2 As shown, the steps include a host machine (HOST), a base address register (BAR), memory space (available data header circular queue buffer, descriptor circular queue buffer, completion circular queue buffer), and VirtIO devices, for executing a chained descriptor management method for VirtIO devices used by the DPU.

[0092] The application further provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the steps of the chain descriptor management method for a VirtIO device of a DPU.

[0093] Corresponding to the above method, the application further provides a device, which comprises a computer device, the computer device comprising a processor and a memory, the memory storing computer instructions, and the processor being configured to execute the computer instructions stored in the memory, and the device implements the steps of the above method when the computer instructions are executed by the processor.

[0094] The application further provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the steps of the edge computing server deployment method. The computer readable storage medium can be a tangible storage medium, such as a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a floppy disk, a hard disk, a removable storage disk, a CD-ROM, or any other form of storage medium known in the technical field.

[0095] In summary, the application provides a chain descriptor management method and device for a VirtIO device of a DPU. A host computer receives a virtual input / output operation request sent by a virtual function. A descriptor is configured in a memory space pointed to by a descriptor ring queue buffer, and the descriptor comprises a previous in-chain descriptor address, a next in-chain descriptor address, a descriptor end bit, and other basic information. A descriptor header address is configured in a memory space pointed to by an available data header ring queue buffer. A notification signal is sent to a VirtIO device through a base register, a control block of a completion ring queue buffer is returned after the VirtIO device completes a corresponding virtual input / output operation, and a released descriptor is recycled according to information contained in the control block. The method provided by the application introduces a chain descriptor structure, supports concurrent processing of multiple descriptor chains, and realizes batch data transmission and concurrent processing. Further, by reducing the number of interrupts and context switches, transmission delay is reduced, and the overall performance of the VirtIO device is significantly improved. Further, the chain descriptor structure makes it easier and more intuitive to manage multiple data buffers, and reduces the management complexity. Further, the design of the application has good flexibility and scalability, and the length and number of descriptor chains can be adjusted according to actual needs, and the VirtIO device scene of different scales and needs can be adapted.

[0096] Those of ordinary skill in the art will appreciate that the various illustrative components, systems and methods described in connection with the embodiments disclosed herein can be implemented as hardware, software, or both. The particular implementation is dependent on the specific application and design constraints imposed on the overall system. Skilled persons can implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application. When implemented in hardware, for example, the hardware can comprise an electronic circuit, an Application Specific Integrated Circuit (ASIC), a suitable firmware, a plug-in, a functional card, etc. When implemented in software, the elements of the application are the program or code segments to perform a specific task. The program or code segments can be stored in a machine-readable medium, or transmitted by a carrier wave as data signals over a transmission medium or communication link.

[0097] It is to be understood that the application is not limited to the particular configurations and processes described herein and shown in the drawings. For simplicity, detailed descriptions of known methods and apparatuses are omitted so as not to obscure the disclosure. In the above-described embodiments, several specific steps are described and illustrated as examples. However, the method processes of the present application are not limited to the specific steps described and illustrated, and the order of the steps can be changed, or other steps can be added, or replaced, or eliminated, depending on the application.

[0098] In the present application, features described and / or illustrated in relation to one embodiment can be used in the same or a similar way in one or more other embodiments, and / or combined with or instead of features of other embodiments.

[0099] The above description is only preferred embodiments of the present application, and is not intended to limit the present application. The embodiments of the present application can be variously changed and modified by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the present application.

Claims

1. A method for managing chained descriptors of VirtIO devices for a DPU, characterized in that, The method includes the following steps: The host machine receives virtual input / output operation requests containing virtual input / output operation information from the virtual function; Descriptors are configured in the memory space pointed to by the descriptor circular queue buffer. Each descriptor includes the address of the previous descriptor in the chain, the address of the next descriptor in the chain, and a descriptor stop bit. A descriptor chain is constructed based on the address of the previous descriptor in the chain and the address of the next descriptor in the chain contained in the descriptor, forming a chain structure. Each descriptor contains virtual input / output operation information issued by the corresponding virtual function. Configure the descriptor header address in the memory space pointed to by the available data header circular queue buffer; A notification signal is sent to the VirtIO device via the base address register. The notification signal includes the configured descriptor information and the descriptor header address information. The system receives a control block from the completion circular queue buffer and reclaims descriptors based on the information contained within the control block. The control block is a data structure that reads the corresponding descriptor from the descriptor chain by the VirtIO device, performs the corresponding virtual input / output operation based on the read descriptor, and then returns it to the completion circular queue buffer. The completion circular queue buffer is used to store the completion information that needs to be returned.

2. The method for managing chained descriptors of VirtIO devices for a DPU according to claim 1, characterized in that, The method includes: The virtual input / output operation requests are forwarded to the host machine through the virtualization layer.

3. The method for managing chained descriptors of VirtIO devices for a DPU according to claim 1, characterized in that, Configure descriptors in the memory space pointed to by the descriptor circular queue buffer, including: The host machine allocates a circular buffer, which serves as the circular queue buffer for the descriptors, and is used to store the descriptors; The contents of the descriptors are filled one by one into the descriptor circular queue buffer; After the population is complete, update the status field of the descriptor.

4. The method for managing chained descriptors of VirtIO devices for a DPU according to claim 1, characterized in that, In a multi-queue environment, the method further includes: Based on the notification signal, the address of the previous in-chain descriptor, and the address of the next in-chain descriptor, multiple descriptors are linked together to form a continuous descriptor chain; Traverse the descriptor chain and access each descriptor in the descriptor chain one by one according to the address of the next in-chain descriptor contained in each descriptor; Obtain the information from the required descriptor and perform corresponding data processing; After processing each descriptor, update the descriptor chain structure.

5. A method for managing chained descriptors of VirtIO devices for a DPU, characterized in that, The method includes the following steps: The VirtIO device receives a notification signal sent by the host machine, the notification signal including information about newly available descriptors; Read the address of the next available descriptor header from the available data header circular queue buffer; Based on the descriptor header address, the corresponding descriptor is read from the descriptor circular queue buffer. The descriptor contains virtual input / output operation information issued by the virtual function. The descriptor is pre-constructed into a descriptor chain based on the address of the previous in-chain descriptor and the address of the next in-chain descriptor contained therein. Traverse the descriptor chain based on the address of the previous in-chain descriptor and the address of the next in-chain descriptor in the descriptor chain; After performing the corresponding virtual input / output operations based on the descriptor obtained from the reading, the corresponding control block is sent to the completion circular queue buffer, wherein the completion circular queue buffer is used to store the completion information that needs to be returned.

6. The method for managing chained descriptors of VirtIO devices for a DPU according to claim 5, characterized in that, Based on the descriptor header address, the corresponding descriptor is read from the descriptor circular queue buffer, including: First, the first part of the corresponding descriptor is read from the descriptor circular queue buffer; If there are subsequent unread descriptors, a preset number of descriptors are read consecutively to achieve parallel processing.

7. The method for managing chained descriptors of VirtIO devices for a DPU according to claim 5, characterized in that, Receive notification signals sent by the host machine, including: The system receives an interrupt signal from the host machine to determine if a new descriptor is available, and executes a pre-defined interrupt handler to process the new descriptor. Alternatively, you can use polling to periodically check descriptor state changes to determine if any new descriptors are available.

8. A chain descriptor management device for VirtIO devices in a DPU, comprising a processor, a memory, and a computer program / instructions stored in the memory, characterized in that, The processor is configured to execute the computer program / instructions, and when the computer program / instructions are executed, the device implements the steps of the method as described in any one of claims 1 to 7.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the steps of the method as described in any one of claims 1 to 7.

10. A computer program product comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method according to any one of claims 1 to 7.

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