A method and system for calibrating digital signals on a chip

Abstract

This invention proposes a chip digital signal calibration method and system. The method involves: acquiring data information to be transmitted from a first chip and the data transmission task of that data; determining a second chip; querying historical transmission delay information of data from the first chip to the second chip and generating transmission delay distribution information; generating a digital signal using a preset digital signal generation strategy and acquiring current network environment characteristics; generating delay calibration information using a preset delay calibration strategy; adjusting the content of the delay calibration information to obtain target delay calibration information; generating a target digital signal and calibrating the chip's digital signal. This invention addresses the problem in existing technologies where, due to varying network conditions during data transmission, chip calibration delay information deviates, leading to low efficiency in chip digital signal calibration. This invention avoids network congestion caused by transmission in the same channel, thereby improving the efficiency of chip digital signal calibration.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit chip technology, and in particular to a chip digital signal calibration method and system. Background Technology

[0002] In the field of integrated circuit chips, the types of data processing are becoming more and more complex, the data capacity is increasing, and the data processing requirements are becoming more and more stringent. This makes it easy for data congestion or delays in data transmission and reception to occur during the digital signal interaction process of chips. Often, it is the signal delays that occur during the digital signal interaction process that cause time differences in the processing of data information by different chips.

[0003] Currently, the traditional method for calibrating digital signals in chips involves sending delay calibration information to each chip before each data transmission. This information is then used for delay calibration of other chips before the digital signal transmission process proceeds. However, due to differences in network conditions during data transmission, there is a delay error between the actual transmission delay and the predicted delay. This leads to deviations in the delay information obtained from chip calibration, resulting in low efficiency in calibrating digital signals in chips. Summary of the Invention

[0004] To address the aforementioned issues, this invention proposes a chip digital signal calibration method and system that avoids network congestion and increased data transmission delay caused by transmission in the same channel, thereby improving the efficiency of chip digital signal calibration.

[0005] To achieve the above objectives, embodiments of the present invention provide a chip digital signal calibration method, comprising:

[0006] Acquire the data information to be transmitted from the first chip and the data transmission task of the data information;

[0007] Based on the data transmission task, the second chip is determined by matching the data transmission process;

[0008] Based on a preset historical database, query the historical transmission delay information of the first chip transmitting data to the second chip, and generate transmission delay distribution information;

[0009] Based on the data content of the aforementioned data information, digital signals are generated using a preset digital signal generation strategy, and the characteristics of the current network environment are obtained.

[0010] Based on the current network environment characteristics and the transmission delay distribution information, delay calibration information is generated through a preset delay calibration strategy.

[0011] Based on the calibration communication information corresponding to the time delay calibration information, the content of the time delay calibration information is adjusted to obtain the target time delay calibration information;

[0012] Based on the digital signal and the target time delay calibration information, a target digital signal is generated and the chip digital signal is calibrated.

[0013] This invention proposes a chip digital signal calibration method. It involves acquiring data information to be transmitted from a first chip, determining a second chip based on the data transmission flow of the data transmission task, and simultaneously determining the accuracy of the second chip. Using historical transmission delay information from the first chip to the second chip, it generates transmission delay distribution information from the first chip to the target chip. It also generates digital signals using a preset digital signal generation strategy and acquires current network environment characteristics. Combining the transmission delay distribution information and current network environment characteristics, it obtains delay calibration information. Finally, by adjusting the content of the delay calibration information, it obtains target delay calibration information and calibrates the chip's digital signal. This reduces interference from the delay calibration information on the transmission channel during data transmission, thereby reducing calibration deviations caused by the transmission delay of the time calibration information. This invention comprehensively considers the current network environment characteristics of chip transmission and the transmission delay of the delay calibration information before generating target delay calibration information for the target chip, improving the calibration accuracy of the target delay calibration information. Furthermore, by transmitting the target delay calibration information and the corresponding digital signals of the data information through separate communication channels, it avoids network congestion and increased data transmission delay caused by transmission through the same channel, thus improving the efficiency of chip digital signal calibration.

[0014] Furthermore, the data transmission task based on the data information determines the second chip by matching the data transmission process, specifically as follows:

[0015] Based on the data information, obtain the data transmission task flow;

[0016] Based on the task flow, each transmission flow node of the data transmission task is determined;

[0017] Based on the transmission process node corresponding to the first chip, the second chip is obtained by matching the transmission process node corresponding to the first chip with the chip corresponding to the next process node.

[0018] Furthermore, the step of querying historical transmission delay information of the first chip transmitting data to the second chip based on a preset historical database and generating transmission delay distribution information specifically involves:

[0019] Based on a preset historical database, query the transmission latency of the first chip transmitting data to the second chip in different time periods and obtain the network operation status for each time period;

[0020] By grouping the various latency influencing factors corresponding to the network operation status of each time period, several transmission latency groups are obtained;

[0021] Historical transmission delay information is transmitted to the second chip by using the aforementioned several transmission delay groups as the first chip;

[0022] Based on the historical transmission delay information, transmission delay distribution information is generated.

[0023] This invention proposes a chip digital signal calibration method. By using a division strategy corresponding to the single variable method, the transmission delay of each historical time period is divided into multiple transmission delay groups, which improves the accuracy of identifying the impact of each delay influencing factor on the transmission delay.

[0024] Furthermore, based on the historical transmission delay information, transmission delay distribution information is generated, specifically as follows:

[0025] Based on the historical transmission delay information, the values ​​of delay influencing factors corresponding to each transmission delay group are calculated to obtain several delay influencing factor values.

[0026] By sorting the values ​​of the aforementioned delay influencing factors, the sub-transmission delay distribution information corresponding to each delay influencing factor is obtained.

[0027] Based on a preset fitting algorithm, the distribution information of each sub-transmission delay is fitted and processed to obtain the sub-target delay distribution information corresponding to each delay influencing factor.

[0028] The transmission delay distribution information is constructed based on the sub-target delay distribution information corresponding to each sub-transmission delay distribution.

[0029] This invention proposes a chip digital signal calibration method. By fitting the transmission delay distribution corresponding to each delay influencing factor, the transmission delay distribution information from the first chip to the second chip is obtained. This avoids the situation where discrete data affects the distribution information and improves the accuracy of the obtained transmission delay distribution information.

[0030] Furthermore, based on the data content of the aforementioned data information, a digital signal is generated through a preset digital signal generation strategy to obtain the characteristics of the current network environment, specifically as follows:

[0031] Based on the data type, match the corresponding digital signal generation strategy;

[0032] The data content of the data information is digitally generated using the digital signal generation strategy to obtain the data signal corresponding to the data information.

[0033] Based on the data signals corresponding to the aforementioned data information, collect current network environment information;

[0034] Obtain the latency impact factor values ​​of each latency impact factor corresponding to the current network environment information, and construct the current network environment characteristics.

[0035] This invention proposes a chip digital signal calibration method. By acquiring the current network environment information of the chip, the current network environment characteristics of the chip transmission are determined, thereby improving the accuracy of subsequent calculations of the predicted transmission delay of the chip transmission.

[0036] Furthermore, based on the current network environment characteristics and the transmission delay distribution information, delay calibration information is generated through a preset delay calibration strategy, specifically as follows:

[0037] Based on the current network environment characteristics and the transmission delay distribution information, the current delay influencing factor value of each delay influencing factor is queried and matched with the sub-target delay distribution information corresponding to each delay influencing factor to obtain the sub-transmission delay corresponding to the current delay influencing factor value of each delay influencing factor.

[0038] Based on the sub-target delay distribution information corresponding to each delay influencing factor, the transmission delay change information corresponding to each delay influencing factor is normalized to obtain the influence weight value corresponding to each delay influencing factor.

[0039] Based on the influence weight values ​​of each delay factor and the preset delay calibration strategy, delay calibration information is generated.

[0040] The chip digital signal calibration method proposed in this invention identifies the influence weight values ​​of each influencing factor to determine the predicted transmission delay, thereby improving the accuracy of the determined predicted transmission delay.

[0041] Furthermore, the generation of delay calibration information based on the influence weight values ​​of each delay influencing factor and a preset delay calibration strategy specifically involves:

[0042] Based on the influence weight values ​​corresponding to each delay influencing factor, the sub-transmission delays corresponding to the current delay influencing factor values ​​of each delay influencing factor are weighted and summed to obtain the predicted transmission delay;

[0043] Based on a preset delay calibration strategy, the predicted transmission delay is calibrated to obtain delay calibration information.

[0044] Furthermore, based on the calibration communication information corresponding to the latency calibration information, the latency calibration information is adjusted to obtain the target latency calibration information, specifically as follows:

[0045] Obtain the transmission channel corresponding to the delay calibration information and the current network status of the transmission channel, and construct the calibration communication information corresponding to the delay calibration information;

[0046] Based on the calibration communication information corresponding to the delay calibration information, the channel transmission delay of the delay calibration information to the second chip is calculated by using the channel delay influencing factor value, the influence weight value, and the sub-target delay distribution information corresponding to each delay influencing factor in the current network state of the transmission channel, and the adjustment content of the delay calibration information is obtained.

[0047] Based on the channel transmission delay and the predicted transmission delay, a strategy is used to generate adjustment content for the delay calibration information to obtain target delay calibration information.

[0048] The present invention proposes a chip digital signal calibration method, which generates target time delay calibration information by identifying the transmission delay of the transmission channel corresponding to the time delay calibration information, thereby reducing calibration deviation caused by the transmission delay of time calibration information and improving the accuracy of time delay calibration.

[0049] Furthermore, based on the digital signal and the target time delay calibration information, a target digital signal is generated and the chip digital signal is calibrated, specifically as follows:

[0050] Based on the data type corresponding to the target time delay calibration information, a calibration digital signal corresponding to the target time delay calibration information is generated by matching the corresponding digital signal generation strategy.

[0051] The target digital signal of the data information is constructed by combining the digital signal and the calibration digital signal.

[0052] Based on the target digital signal of the data information, the chip digital signal is calibrated.

[0053] This invention also provides a chip digital signal calibration system, including: a data information and task acquisition module, a chip determination module, a transmission delay distribution information acquisition module, a digital signal generation module, a delay calibration information acquisition module, a target delay calibration information acquisition module, and a digital signal calibration module;

[0054] The data information and task acquisition module is used to acquire the data information to be transmitted from the first chip and the data transmission task of the data information.

[0055] The chip determination module is used to determine the second chip based on the data transmission task of the data information by matching the data transmission process;

[0056] The transmission delay distribution information acquisition module is used to query the historical transmission delay information of the first chip transmitting data to the second chip based on a preset historical database, and generate transmission delay distribution information.

[0057] The digital signal generation module is used to generate digital signals and obtain current network environment characteristics based on the data content of the data information and through a preset digital signal generation strategy.

[0058] The latency calibration information acquisition module is used to generate latency calibration information based on the current network environment characteristics and the transmission latency distribution information, through a preset latency calibration strategy.

[0059] The target delay calibration information acquisition module is used to adjust the content of the delay calibration information based on the calibration communication information corresponding to the delay calibration information to obtain the target delay calibration information.

[0060] The digital signal calibration module is used to generate a target digital signal and calibrate the chip digital signal based on the digital signal and the target time delay calibration information.

[0061] This invention proposes a chip digital signal calibration system. The system acquires data information to be transmitted from a first chip via a data information and task acquisition module. A chip determination module determines a second chip based on the data transmission flow of the data transmission task, and simultaneously determines the accuracy of the second chip. A transmission delay distribution information acquisition module generates transmission delay distribution information from the first chip to the target chip based on historical transmission delay information from the first chip to the second chip. A digital signal generation module generates a digital signal according to a preset digital signal generation strategy and acquires current network environment characteristics. A delay calibration information acquisition module combines the transmission delay distribution information and current network environment characteristics to acquire delay calibration information. Finally, a target delay calibration information acquisition module performs calibration on the target chip. The delay calibration information is adjusted to obtain the target delay calibration information, and the chip's digital signal is calibrated through the digital signal calibration module. This reduces the interference of the delay calibration information on the transmission channel during data transmission, thereby reducing calibration deviations caused by the transmission delay of the delay calibration information. This embodiment of the invention comprehensively considers the current network environment characteristics of chip transmission and the transmission delay of the delay calibration information, and then generates the target delay calibration information for the target chip. This improves the calibration accuracy of the target delay calibration information. Furthermore, by transmitting the target delay calibration information and the corresponding digital signals of the data information through separate communication channels, network congestion and increased data transmission delay caused by transmission through the same channel are avoided, thereby improving the efficiency of chip digital signal calibration. Attached Figure Description

[0062] Figure 1This is a flowchart illustrating the steps of a chip digital signal calibration method according to a certain embodiment of the present invention.

[0063] Figure 2 This is a schematic diagram of the module structure of a chip digital signal calibration system provided in a certain embodiment of the present invention. Detailed Implementation

[0064] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0065] Example 1

[0066] See Figure 1 , Figure 1 This is a schematic flowchart illustrating the steps of a chip digital signal calibration method according to a certain embodiment of the present invention. Figure 1 As shown, this embodiment of the invention proposes a chip digital signal calibration method, including steps 101 to 107, each step of which is as follows:

[0067] Step 101: Obtain the data information to be transmitted from the first chip and the data transmission task of the data information;

[0068] As an example of this embodiment, the data information that the chip needs to transmit and the data transmission task of the data information are obtained. The data transmission task is the transmission process that the data information needs to transmit when the data information interacts between chips and the chips corresponding to each transmission process node in the transmission process.

[0069] Step 102: Based on the data transmission task of the data information, determine the second chip by matching the data transmission process;

[0070] As an example of this embodiment, based on the data transmission task of the data information, a task flow of the data transmission task is obtained; based on the task flow, each transmission process node of the data transmission task is determined; based on the transmission process node corresponding to the first chip, a second chip is obtained by matching the transmission process node corresponding to the first chip with the chip corresponding to the next process node. In a specific implementation, during the transmission flow, when the data information is transmitted from the first chip to the next chip, the target chip (equivalent to the second chip) corresponding to the next chip is queried; more specifically, the data transmission flow of the data transmission task is obtained, and based on the data transmission flow, each transmission process node of the data transmission task is obtained; in each transmission process node, the target transmission process node corresponding to the chip is queried, and the chip corresponding to the next transmission process node of the target transmission process node is taken as the target chip (equivalent to the second chip) of the data information.

[0071] Step 103: Based on the preset historical database, query the historical transmission delay information of the first chip transmitting data to the second chip, and generate transmission delay distribution information;

[0072] As an example of this embodiment, based on a preset historical database, the transmission delay of the first chip transmitting data to the second chip in different time periods is queried, and the network operating status of each time period is obtained; by grouping the delay influencing factors corresponding to the network operating status of each time period, several transmission delay groups are obtained; the several transmission delay groups are used as historical transmission delay information of the first chip transmitting data to the second chip; based on the historical transmission delay information, transmission delay distribution information is generated. Specifically, based on the historical transmission delay information, the values ​​of the delay influencing factors corresponding to each transmission delay group are calculated to obtain several delay influencing factor values; by sorting the distribution of the several delay influencing factor values, sub-transmission delay distribution information corresponding to each delay influencing factor is obtained; based on a preset fitting algorithm, the sub-transmission delay distribution information is fitted and distributed to obtain sub-target delay distribution information corresponding to each delay influencing factor; based on the sub-target delay distribution information corresponding to each sub-transmission delay distribution, the transmission delay distribution information is constructed. One possible implementation involves querying historical transmission delay information from a first chip to a target chip in a historical database, and identifying the transmission delay distribution information from the first chip to the target chip based on each historical transmission delay. The transmission delay distribution information includes sub-target delay information corresponding to different delay-influencing factors in the network environment when the first chip transmits to the target chip. The network environment includes multiple delay-influencing factors, including but not limited to: network congestion level, network device failure level, network path length, network protocol selection, network bandwidth information, and network security policy information.

[0073] As another example of this embodiment, when querying different historical time periods in the historical database, the chip transmits historical data information to the target chip with transmission latency, and identifies the network operation status information of each historical time period; it identifies each latency influencing factor in the network operation status information, and divides each transmission latency when each latency influencing factor is a single variable into the same group. Specifically, through the single variable strategy, the latency influencing factor values ​​of each latency influencing factor in the network environment of each historical time period are used to filter out the historical time periods where only each latency influencing factor is a single variable, which are taken as the target time period corresponding to the latency influencing factor. The transmission latency corresponding to each target time period is taken as the transmission latency group corresponding to each latency influencing factor. All transmission latency groups corresponding to the latency influencing factors are taken as the historical transmission latency information between the first chip and the target chip. Based on historical transmission delay information, the transmission delay distribution information from the first chip to the target chip is obtained. Specifically, for each delay influencing factor, the transmission delays in the corresponding transmission delay group are distributed in ascending order of the delay influencing factor value to obtain the sub-transmission delay distribution corresponding to the delay influencing factor. The sub-transmission delay distribution is fitted using a fitting algorithm to obtain the sub-target delay distribution information corresponding to the self-transmission delay distribution. The sub-delay distribution information corresponding to all delay influencing factors is used as the transmission delay distribution information from the chip to the target chip. The fitting algorithm can be, but is not limited to, the distribution fitting algorithm corresponding to the least squares method in MATLAB.

[0074] Step 104: Based on the data content of the data information, generate digital signals through a preset digital signal generation strategy and obtain the characteristics of the current network environment;

[0075] As an example of this embodiment, based on the data type of the data information, a corresponding digital signal generation strategy is matched; the data content of the data information is generated into a digital signal using the digital signal generation strategy to obtain the data signal corresponding to the data information; based on the data signal corresponding to the data information, current network environment information is collected; the latency influencing factor values ​​of each latency influencing factor corresponding to the current network environment information are obtained to construct the current network environment characteristics. Specifically, one possible implementation involves generating a digital signal corresponding to the data information based on its data content and obtaining the current network environment characteristics transmitted by the chip. The current network environment characteristics refer to the current latency influencing factor values ​​of various latency influencing factors in the current network environment state when the data information is transmitted to the target chip. Specifically, the data type of the data information is identified, and the digital signal generation strategy of the data type is queried in the database. Based on the digital signal generation strategy of the data type and the data content of the data information, the digital signal corresponding to the data information is generated, and the current network environment information transmitted by the chip is collected. The current latency influencing factor values ​​of various latency influencing factors in the current network environment information are identified, and the current latency influencing factor values ​​of each latency influencing factor are used as the current network environment characteristics of the chip transmission. The database stores digital signal generation strategies corresponding to different data types, including but not limited to text, image, video, and audio types.

[0076] Step 105: Based on the current network environment characteristics and the transmission delay distribution information, generate delay calibration information through a preset delay calibration strategy;

[0077] As an example of this embodiment, based on the current network environment characteristics and the transmission delay distribution information, the current delay influencing factor value of each delay influencing factor is queried and matched with the sub-target delay distribution information corresponding to each delay influencing factor to obtain the sub-transmission delay corresponding to the current delay influencing factor value of each delay influencing factor; based on the sub-target delay distribution information corresponding to each delay influencing factor, the transmission delay change information corresponding to each delay influencing factor is normalized to obtain the influence weight value corresponding to each delay influencing factor; based on the influence weight value corresponding to each delay influencing factor and a preset delay calibration strategy, delay calibration information is generated. Specifically, based on the influence weight value corresponding to each delay influencing factor, the sub-transmission delay corresponding to the current delay influencing factor value of each delay influencing factor is weighted and summed to obtain the predicted transmission delay; based on the preset delay calibration strategy, the predicted transmission delay is calibrated to obtain delay calibration information. One possible implementation involves: based on the current latency influencing factor value of each latency influencing factor, querying the sub-transmission latency corresponding to the current latency influencing factor value of each latency influencing factor in the sub-target latency distribution information corresponding to each latency influencing factor; based on the sub-target latency distribution information corresponding to each latency influencing factor, identifying the transmission latency change information corresponding to each latency influencing factor, and normalizing the transmission latency change information corresponding to each latency influencing factor to obtain the influence weight value corresponding to each latency influencing factor; based on the influence weight value corresponding to each latency influencing factor, performing weighted summation on the sub-transmission latency corresponding to the current latency influencing factor value of each latency influencing factor to obtain the predicted transmission latency; and generating latency calibration information corresponding to the predicted transmission latency through a latency calibration generation strategy. Specifically, the method to obtain the influence weight value corresponding to each delay influencing factor can be as follows: Based on the transmission delay change information corresponding to each delay influencing factor, identify the average transmission delay change value corresponding to the unit delay influencing factor value of each delay influencing factor. Then, through the normalization strategy corresponding to the normal distribution technique, normalize the average transmission delay change value corresponding to the unit delay influencing factor value of each delay influencing factor to obtain the influence weight value corresponding to each delay influencing factor.

[0078] Step 106: Based on the calibration communication information corresponding to the time delay calibration information, adjust the content of the time delay calibration information to obtain the target time delay calibration information;

[0079] As an example of this embodiment, the transmission channel corresponding to the delay calibration information and the current network state of the transmission channel are obtained, and calibration communication information corresponding to the delay calibration information is constructed. Based on the calibration communication information corresponding to the delay calibration information, the channel transmission delay of the delay calibration information to the second chip is calculated by using the channel delay influencing factor values, the influence weight values, and the sub-target delay distribution information corresponding to each delay influencing factor in the current network state of the transmission channel, to obtain the adjustment content of the delay calibration information. Based on the channel transmission delay and the predicted transmission delay, the adjustment content of the delay calibration information is generated using a delay calibration generation strategy to obtain the target delay calibration information. In a specific implementation, the adjustment content of the delay calibration information is generated based on the calibration communication information corresponding to the delay calibration information, and the delay calibration information is adjusted based on the adjustment content to obtain the target delay calibration information. The calibration communication information includes the network environment state information corresponding to the network channel through which the delay calibration information needs to be transmitted.

[0080] As another example of this embodiment, the transmission channel corresponding to the delay calibration information and the current network state of the transmission channel are obtained. Based on the channel delay influencing factor value, the influence weight value, and the sub-target delay distribution information corresponding to each delay influencing factor in the current network state of the transmission channel, the channel transmission delay of the delay calibration information to the target chip is calculated. The channel transmission delays of each channel are combined to obtain the adjustment content of the delay calibration information. Then, based on the channel transmission delay and the predicted transmission delay, the target delay calibration information is generated through the delay calibration generation strategy.

[0081] Step 107: Based on the digital signal and the target time delay calibration information, generate the target digital signal and calibrate the chip digital signal.

[0082] As an example of this embodiment, based on the data type corresponding to the target delay calibration information, a calibration digital signal corresponding to the target delay calibration information is generated by matching the corresponding digital signal generation strategy; the digital signal and the calibration digital signal are used to construct the target digital signal of the data information; and the chip digital signal is calibrated based on the target digital signal of the data information. In one possible implementation, based on the target delay calibration information, a calibration digital signal corresponding to the target delay calibration information is generated using a digital signal generation strategy for the data type corresponding to the target delay calibration information; the digital signal and the calibration digital signal are used as the target digital signal of the data information. The chip digital signal is then calibrated using the target digital signal.

[0083] This invention proposes a chip digital signal calibration method. It acquires data information to be transmitted from a first chip, determines a second chip based on the data transmission flow of the data transmission task, and simultaneously determines the accuracy of the second chip. Using historical transmission delay information from the first chip to the second chip, it generates transmission delay distribution information from the first chip to the target chip. It also generates digital signals using a preset digital signal generation strategy and acquires current network environment characteristics. Combining the transmission delay distribution information and current network environment characteristics, it obtains delay calibration information. Finally, by adjusting the content of the delay calibration information, it obtains target delay calibration information and calibrates the chip's digital signal. This reduces interference from delay calibration information on the transmission channel during data transmission, thereby reducing calibration deviations caused by the transmission delay of the time calibration information. This invention comprehensively considers the current network environment characteristics of chip transmission and the transmission delay of delay calibration information before generating target delay calibration information for the target chip, improving the calibration accuracy of the target delay calibration information. Furthermore, by separating the target delay calibration information and the digital signal corresponding to the data information into separate communication methods... Transmission via a single channel avoids network congestion and increased data transmission latency caused by transmission in the same channel, thereby improving the efficiency of chip digital signal calibration. Furthermore, this embodiment of the invention uses a single-variable method to divide the transmission latency of each historical time period into multiple transmission latency groups, improving the accuracy of identifying the impact of each latency-influencing factor on transmission latency. By fitting the transmission latency distribution corresponding to each latency-influencing factor, the transmission latency distribution information from the first chip to the second chip is obtained, avoiding the influence of discrete data on the distribution information and improving the accuracy of the obtained transmission latency distribution information. By acquiring the current network environment information of the chip, the current network environment characteristics of chip transmission are determined, improving the accuracy of subsequent calculations of the predicted transmission latency. By identifying the influence weight values ​​corresponding to each influencing factor, the predicted transmission latency is determined, improving the accuracy of the determined predicted transmission latency. By identifying the transmission latency of the transmission channel corresponding to the latency calibration information, target latency calibration information is generated, reducing calibration deviations caused by the transmission latency of the time calibration information and improving the accuracy of latency calibration.

[0084] Example 2

[0085] See Figure 2 , Figure 2 This is a schematic diagram of the module structure of a chip digital signal calibration system according to a certain embodiment of the present invention. Figure 2As shown, this embodiment of the invention proposes a chip digital signal calibration system, including: a data information and task acquisition module 201, a chip determination module 202, a transmission delay distribution information acquisition module 203, a digital signal generation module 204, a delay calibration information acquisition module 205, a target delay calibration information acquisition module 206, and a digital signal calibration module 207.

[0086] The data information and task acquisition module 201 is used to acquire the data information to be transmitted from the first chip and the data transmission task of the data information.

[0087] The chip determination module 202 is used to determine the second chip based on the data transmission task of the data information by matching the data transmission process;

[0088] The transmission delay distribution information acquisition module 203 is used to query the historical transmission delay information of the first chip transmitting data to the second chip based on a preset historical database, and generate transmission delay distribution information.

[0089] The digital signal generation module 204 is used to generate digital signals and obtain current network environment characteristics based on the data content of the data information and through a preset digital signal generation strategy.

[0090] The latency calibration information acquisition module 205 is used to generate latency calibration information based on the current network environment characteristics and the transmission latency distribution information, through a preset latency calibration strategy.

[0091] The target delay calibration information acquisition module 206 is used to adjust the content of the delay calibration information based on the calibration communication information corresponding to the delay calibration information to obtain the target delay calibration information.

[0092] The digital signal calibration module 207 is used to generate a target digital signal and calibrate the chip digital signal based on the digital signal and the target time delay calibration information.

[0093] This invention proposes a chip digital signal calibration system. The system acquires data information to be transmitted from a first chip via a data information and task acquisition module. A chip determination module determines a second chip based on the data transmission flow of the data transmission task, and simultaneously determines the accuracy of the second chip. A transmission delay distribution information acquisition module generates transmission delay distribution information from the first chip to the target chip based on historical transmission delay information from the first chip to the second chip. A digital signal generation module generates a digital signal according to a preset digital signal generation strategy and acquires current network environment characteristics. A delay calibration information acquisition module combines the transmission delay distribution information and current network environment characteristics to acquire delay calibration information. Finally, a target delay calibration information acquisition module performs calibration on the target chip. The delay calibration information is adjusted to obtain the target delay calibration information, and the chip's digital signal is calibrated through the digital signal calibration module. This reduces the interference of the delay calibration information on the transmission channel during data transmission, thereby reducing calibration deviations caused by the transmission delay of the delay calibration information. This embodiment of the invention comprehensively considers the current network environment characteristics of chip transmission and the transmission delay of the delay calibration information, and then generates the target delay calibration information for the target chip. This improves the calibration accuracy of the target delay calibration information. Furthermore, by transmitting the target delay calibration information and the corresponding digital signals of the data information through separate communication channels, network congestion and increased data transmission delay caused by transmission through the same channel are avoided, thereby improving the efficiency of chip digital signal calibration.

[0094] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

[0095] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of those different embodiments or examples.

[0096] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

Claims

1. A method for calibrating digital signals in a chip, characterized in that, include: Acquire the data information to be transmitted from the first chip and the data transmission task of the data information; Based on the data transmission task, the second chip is determined by matching the data transmission process; Based on a preset historical database, the historical transmission delay information of the first chip transmitting data to the second chip is queried, and transmission delay distribution information is generated. Specifically, based on the preset historical database, the transmission delay of the first chip transmitting data to the second chip in different time periods is queried, and the network operation status of each time period is obtained; by grouping the delay influencing factors corresponding to the network operation status of each time period, several transmission delay groups are obtained; these several transmission delay groups are used as the historical transmission delay information of the first chip transmitting data to the second chip; based on the historical transmission delay information, the values ​​of the delay influencing factors corresponding to each transmission delay group are calculated to obtain several delay influencing factor values; by sorting the distribution of the several delay influencing factor values, sub-transmission delay distribution information corresponding to each delay influencing factor is obtained; based on a preset fitting algorithm, the sub-transmission delay distribution information is fitted and distributed to obtain sub-target delay distribution information corresponding to each delay influencing factor; based on the sub-target delay distribution information corresponding to each sub-transmission delay distribution, the transmission delay distribution information is constructed. Based on the data content of the aforementioned data information, digital signals are generated using a preset digital signal generation strategy, and the characteristics of the current network environment are obtained. Based on the current network environment characteristics and the transmission delay distribution information, delay calibration information is generated through a preset delay calibration strategy. Based on the calibration communication information corresponding to the time delay calibration information, the content of the time delay calibration information is adjusted to obtain the target time delay calibration information; Based on the digital signal and the target time delay calibration information, a target digital signal is generated and the chip digital signal is calibrated.

2. The chip digital signal calibration method as described in claim 1, characterized in that, Based on the data transmission task, the second chip is determined by matching the data transmission process, specifically as follows: Based on the data information, obtain the data transmission task flow; Based on the task flow, each transmission flow node of the data transmission task is determined; Based on the transmission process node corresponding to the first chip, the second chip is obtained by matching the transmission process node corresponding to the first chip with the chip corresponding to the next process node.

3. The chip digital signal calibration method as described in claim 1, characterized in that, Based on the data content of the aforementioned data information, a digital signal is generated through a preset digital signal generation strategy to obtain the characteristics of the current network environment, specifically as follows: Based on the data type, match the corresponding digital signal generation strategy; The digital signal generation strategy is used to generate a digital signal from the data content of the data information to obtain the digital signal corresponding to the data information. Based on the digital signals corresponding to the data information, collect the current network environment information; Obtain the latency impact factor values ​​of each latency impact factor corresponding to the current network environment information, and construct the current network environment characteristics.

4. The chip digital signal calibration method as described in claim 3, characterized in that, Based on the current network environment characteristics and the transmission delay distribution information, delay calibration information is generated through a preset delay calibration strategy, specifically as follows: Based on the current network environment characteristics and the transmission delay distribution information, the current delay influencing factor value of each delay influencing factor is queried and matched with the sub-target delay distribution information corresponding to each delay influencing factor to obtain the sub-transmission delay corresponding to the current delay influencing factor value of each delay influencing factor. Based on the sub-target delay distribution information corresponding to each delay influencing factor, the transmission delay change information corresponding to each delay influencing factor is normalized to obtain the influence weight value corresponding to each delay influencing factor. Based on the influence weight values ​​of each delay factor and the preset delay calibration strategy, delay calibration information is generated.

5. The chip digital signal calibration method as described in claim 4, characterized in that, The generation of delay calibration information based on the influence weight values ​​of each delay influencing factor and a preset delay calibration strategy is as follows: Based on the influence weight values ​​corresponding to each delay influencing factor, the sub-transmission delays corresponding to the current delay influencing factor values ​​of each delay influencing factor are weighted and summed to obtain the predicted transmission delay; Based on a preset delay calibration strategy, the predicted transmission delay is calibrated to obtain delay calibration information.

6. The chip digital signal calibration method as described in claim 5, characterized in that, Based on the calibration communication information corresponding to the time delay calibration information, the time delay calibration information is adjusted to obtain the target time delay calibration information, specifically as follows: Obtain the transmission channel corresponding to the delay calibration information and the current network status of the transmission channel, and construct the calibration communication information corresponding to the delay calibration information; Based on the calibration communication information corresponding to the delay calibration information, the channel transmission delay of the delay calibration information to the second chip is calculated by using the channel delay influencing factor value, the influence weight value, and the sub-target delay distribution information corresponding to each delay influencing factor in the current network state of the transmission channel, and the adjustment content of the delay calibration information is obtained. Based on the channel transmission delay and the predicted transmission delay, a strategy is used to generate adjustment content for the delay calibration information to obtain target delay calibration information.

7. The chip digital signal calibration method as described in claim 3, characterized in that, Based on the digital signal and the target time delay calibration information, a target digital signal is generated and the chip digital signal is calibrated, specifically as follows: Based on the data type corresponding to the target time delay calibration information, a calibration digital signal corresponding to the target time delay calibration information is generated by matching the corresponding digital signal generation strategy. The target digital signal of the data information is constructed by combining the digital signal and the calibration digital signal. Based on the target digital signal of the data information, the chip digital signal is calibrated.

8. A chip digital signal calibration system, characterized in that, include: The module includes a data information and task acquisition module, a chip determination module, a transmission delay distribution information acquisition module, a digital signal generation module, a delay calibration information acquisition module, a target delay calibration information acquisition module, and a digital signal calibration module. The data information and task acquisition module is used to acquire the data information to be transmitted from the first chip and the data transmission task of the data information. The chip determination module is used to determine the second chip based on the data transmission task of the data information by matching the data transmission process; The transmission delay distribution information acquisition module is used to query historical transmission delay information of the first chip transmitting data to the second chip based on a preset historical database, and generate transmission delay distribution information. Specifically, it queries the transmission delay of the first chip transmitting data to the second chip in different time periods based on the preset historical database and obtains the network operation status of each time period; it groups the delay influencing factors corresponding to the network operation status of each time period to obtain several transmission delay groups; it uses the several transmission delay groups as historical transmission delay information of the first chip transmitting data to the second chip; based on the historical transmission delay information, it calculates the values ​​of the delay influencing factors corresponding to each transmission delay group to obtain several delay influencing factor values; it sorts the values ​​of the several delay influencing factors to obtain sub-transmission delay distribution information corresponding to each delay influencing factor; it performs fitting distribution processing on each sub-transmission delay distribution information based on a preset fitting algorithm to obtain sub-target delay distribution information corresponding to each delay influencing factor; and it constructs the transmission delay distribution information based on the sub-target delay distribution information corresponding to each sub-transmission delay distribution. The digital signal generation module is used to generate digital signals and obtain current network environment characteristics based on the data content of the data information and through a preset digital signal generation strategy. The latency calibration information acquisition module is used to generate latency calibration information based on the current network environment characteristics and the transmission latency distribution information, through a preset latency calibration strategy. The target delay calibration information acquisition module is used to adjust the content of the delay calibration information based on the calibration communication information corresponding to the delay calibration information to obtain the target delay calibration information. The digital signal calibration module is used to generate a target digital signal and calibrate the chip digital signal based on the digital signal and the target time delay calibration information.

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