Display device driving circuit and display panel

Abstract

The present application discloses a display device driving circuit and a display panel, wherein the display device driving circuit includes: a first light-emitting unit, a second light-emitting unit and a third light-emitting unit that are partially stacked; a pixel driving circuit connected to the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, and used to drive the first light-emitting unit, the second light-emitting unit and the third light-emitting unit to emit light in a time-sharing manner; the pixel driving circuit includes: a driving circuit connected to the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, and used to provide a driving signal; a switch circuit, respectively arranged between the driving circuit and the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, and used to control the driving circuit to sequentially drive the first light-emitting unit, the second light-emitting unit and the third light-emitting unit to emit light. Through the above circuit, the occupied area of ​​the pixel driving circuit is reduced, and the luminous efficiency of the display panel is improved.

Description

Technical Field

[0001] The present invention relates to the field of display panels, and in particular to a display device driving circuit and a display panel. Background Art

[0002] Tandem OLED (stacked OLED) is a stacked evaporation display technology. It is a device structure that connects multiple light-emitting units in series through a charge generation layer. Tandem OLED is a new type of display technology. Its principle is to use a transparent connecting layer to connect several light-emitting devices in series. Specifically, an OLED pixel consists of an anode, a cathode, and a multilayer organic material sandwiched in the middle. When current passes through, the anode emits holes and the cathode emits electrons. These holes and electrons meet and recombine in the organic layer to generate light. In the tandem OLED, this structure is replicated twice to form two light-emitting layers, which are connected together by a charge generation layer (CGL). When current passes through, some holes and electrons recombine in the first light-emitting layer to emit light, and the remaining holes and electrons pass through the CGL and recombine again in the second light-emitting layer to emit light.

[0003] Compared with traditional single-layer OLED, Tandem OLED has many advantages. First, it can achieve higher brightness, which is more than twice as high. Secondly, Tandem OLED has lower energy consumption. Compared with single-layer OLED, it is more efficient and consumes less energy when displaying pictures of the same brightness. Furthermore, its device life is extended by more than four times, which can effectively alleviate the common "burn-in" problem of OLED screens. In addition, while achieving high brightness, Tandem OLED can also reduce some optical components and simplify circuits, thereby reducing weight and thickness.

[0004] Furthermore, in the relevant technical documents of OLED, there are multi-angle studies on the mixed color stacking: by stacking two or more luminescent materials in the RGB three-color pixels, and utilizing the transparent characteristics of OLED in the non-luminous stage, when only one RGB color OLED emits light, the emitted colored light passes through the transparent OLED luminescent material on the light output path. In the scene where mixed light is required, at different times in the same cycle, RGB or the required optical primary colors of light with different duty cycles are emitted in sequence to achieve the display of different colors by the pixel group. The use of this mixed color stacking OLED structure with time-division multiplexing light output logic can effectively increase the display resolution. However, with the market demand, especially the development of the micro-display field, the display resolution requirements are getting higher and higher, and the miniaturization of pixel drive circuits is difficult. When using mixed color stacking OLED technology, the original RGB corresponding pixel circuit space is further compressed. In view of this, the need to develop a new driving solution is attracting the attention of technicians. Summary of the invention

[0005] The main technical problem solved by the present application is to provide a display device driving circuit and a display panel to improve the resolution of the stacked OLED.

[0006] To solve the above problems, the present application provides a display device driving circuit in the first aspect, wherein the display device driving circuit includes: a first light-emitting unit, a second light-emitting unit and a third light-emitting unit that are partially stacked; a pixel driving circuit connected to the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, and used to time-share drive the first light-emitting unit, the second light-emitting unit and the third light-emitting unit to emit light; the pixel driving circuit includes: a driving circuit connected to the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, and used to provide a driving signal to the first light-emitting unit, the second light-emitting unit and the third light-emitting unit; a switching circuit including a first switching transistor, a second switching transistor and a third switching transistor, which are respectively arranged between the driving circuit and the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, and used to control the driving circuit to sequentially drive the first light-emitting unit to emit light, the second light-emitting unit to emit light and the third light-emitting unit to emit light.

[0007] Wherein, the driving circuit includes: a driving transistor, a first electrode of the driving transistor is connected to the power line, and a second electrode is connected to the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit through the switching circuit; a storage circuit, the storage circuit is connected to the gate of the driving transistor and is used to store the gate voltage charged to the driving transistor; wherein the storage circuit includes a first capacitor storing a first data voltage, a second capacitor storing a second data voltage and a third capacitor storing a third data voltage, so as to respectively drive the first light-emitting unit, the second light-emitting unit and the third light-emitting unit to emit light in the light-emitting stage.

[0008] Among them, the light-emitting stage includes a first light-emitting stage, a second light-emitting stage and a third light-emitting stage; the first plate of the first capacitor is connected to the power line, and the second plate is connected to the first data line, for storing a first data voltage in the storage stage; the first plate of the second capacitor is connected to the power line, and the second plate is connected to the second data line, for storing a second data voltage in the storage stage; the first plate of the third capacitor is connected to the power line, and the second plate is connected to the third data line, for storing a third data voltage in the storage stage.

[0009] Wherein, the storage circuit also includes: a fourth switching transistor, which is arranged between the second plate of the first capacitor and the gate of the driving transistor, and is used to control the second plate of the first capacitor to be connected to the gate of the driving transistor in the first light-emitting stage, so as to transmit the driving voltage containing the first data voltage to the gate of the driving transistor; a fifth switching transistor, which is arranged between the second plate of the second capacitor and the gate of the driving transistor, and is used to control the second plate of the second capacitor to be connected to the gate of the driving transistor in the second light-emitting stage, so as to transmit the driving voltage containing the second data voltage to the gate of the driving transistor; a sixth switching transistor, which is arranged between the third plate of the third capacitor and the gate of the driving transistor, and is used to control the second plate of the third capacitor to be connected to the gate of the driving transistor in the third light-emitting stage, so as to transmit the driving voltage containing the third data voltage to the gate of the driving transistor; wherein, the fourth switching transistor, the fifth switching transistor and the sixth switching transistor are turned on in time-sharing manner in the light-emitting stage.

[0010] Among them, the fourth switching transistor and the gate of the first switching transistor are connected to the first scanning line, and are used to be turned on simultaneously in the first light-emitting stage, driving the first light-emitting unit to emit light under a first driving voltage; the fifth switching transistor and the gate of the second switching transistor are connected to the second scanning line, and are used to be turned on simultaneously in the second light-emitting stage, driving the second light-emitting unit to emit light under a second driving voltage; the sixth switching transistor and the gate of the third switching transistor are connected to the third scanning line, and are used to be turned on simultaneously in the third light-emitting stage, driving the third light-emitting unit to emit light under a third driving voltage.

[0011] Wherein, the storage circuit also includes a storage capacitor; the first plate of the storage capacitor is connected to the power line, and the second plate is respectively connected to the gate of the driving transistor and the second electrode of the driving transistor, so that the storage capacitor stores a voltage including the threshold voltage of the driving transistor during a sampling phase; wherein the second plate of the storage capacitor is also respectively connected to the first plates of the first capacitor, the second capacitor and the third capacitor, and is used to be connected in series with the first capacitor, the second capacitor and the third capacitor during a light-emitting phase to transmit a driving voltage including the threshold voltage of the driving transistor and a data voltage to the gate of the driving transistor; wherein the data voltage includes a first data voltage, a second data voltage and a third data voltage.

[0012] Among them, the storage circuit also includes: a seventh switching transistor, which is arranged between the first plate of the storage capacitor and the power line, the gate of the seventh switching transistor is connected to the first control line, the first electrode is connected to the power line, and the second electrode is connected to the first plate of the storage capacitor, and is used to control the storage capacitor to have a storage function; an eighth switching transistor, which is arranged between the second plate of the storage capacitor and the gate of the driving transistor, the gate of the eighth switching transistor is connected to the second control line, the first electrode is connected to the second plate of the storage capacitor and the second electrode of the driving transistor, and the second electrode is connected to the gate of the driving transistor, and is used to control the power line, the driving transistor and the storage capacitor to form a sampling loop in the sampling stage, so that the storage capacitor stores the threshold voltage of the driving transistor in the sampling stage.

[0013] Wherein, the storage circuit also includes: a ninth switch transistor, which is arranged between the power line and the first plates of the first capacitor, the second capacitor and the third capacitor, and is used to control the first capacitor, the second capacitor and the third capacitor to have a storage function during the storage stage; wherein, the first data line, the second data line and the third data line transmit data signals to the first capacitor, the second capacitor and the third capacitor during the storage stage, so that the first capacitor stores a first data voltage, the second capacitor stores a second data voltage, and the third capacitor stores a third data voltage; the gate of the ninth switch transistor is connected to the first control line, and the ninth switch transistor and the seventh switch transistor are a group of transistors with opposite driving characteristics; wherein, the first control line controls the ninth switch transistor to be turned on and controls the seventh switch transistor to be turned off during the storage stage.

[0014] Among them, the seventh switching transistor is in a conducting state in the light-emitting stage, so that the storage capacitor and the first capacitor can transmit a driving voltage including the threshold voltage of the driving transistor and the first data voltage to the gate of the driving transistor in the first light-emitting stage, so that the storage capacitor and the second capacitor can transmit a driving voltage including the threshold voltage of the driving transistor and the second data voltage to the gate of the driving transistor in the second light-emitting stage, and so that the storage capacitor and the third capacitor can transmit a driving voltage including the threshold voltage of the driving transistor and the third data voltage to the gate of the driving transistor in the third light-emitting stage.

[0015] Wherein, the driving circuit also includes a reset transistor; the gate of the reset transistor is connected to the reset control line, the first electrode is connected to the reset signal line, and the second electrode is connected to the gate of the driving transistor and the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, and is used to charge the reset voltage to the gate of the driving transistor and the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit during the reset stage; wherein the driving transistor is a P-type transistor.

[0016] Wherein, the pixel driving circuit also includes a tenth switching transistor arranged between the driving circuit and the switching circuit; the gate of the tenth switching transistor is connected to the switching signal line, the first electrode is connected to the driving circuit, and the second electrode is connected to the switching circuit; wherein the switching signal is a periodic jump signal, and the tenth switching transistor is used to control the brightness of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit during the light-emitting stage.

[0017] To solve the above-mentioned problem, the present application provides a display panel in the second aspect, wherein the display panel includes a substrate and a display device driving circuit as described in any embodiment of the first aspect and arranged on the substrate; wherein the first light-emitting unit and the second light-emitting unit and / or the third light-emitting unit are stacked in the direction of the substrate.

[0018] The beneficial effect of the present application is that the driving circuit for driving the first light-emitting unit, the driving circuit for driving the second light-emitting unit and the driving circuit for driving the third light-emitting unit are combined into one, and are periodically turned on in the form of time-division multiplexing, so as to provide driving signals to the first light-emitting unit, the second light-emitting unit and the third light-emitting unit for display respectively, and imaging is performed by utilizing the low-pass effect of the human eye, which effectively reduces the backplane area occupied by the driving circuit and improves the resolution, while avoiding the influence of the threshold voltage of the driving transistor or the problem of increased power consumption caused by multiple sampling of the threshold voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 A schematic structural diagram of an embodiment of a display device driving circuit provided in the present application;

[0021] Figure 2 A schematic structural diagram of a first specific embodiment of a display device driving circuit provided in the present application;

[0022] Figure 3 A schematic structural diagram of a second specific embodiment of a display device driving circuit provided in the present application;

[0023] Figure 4 A schematic structural diagram of a third specific embodiment of a display device driving circuit provided in the present application;

[0024] Figure 5 A timing control signal diagram of a third specific embodiment of a display device driving circuit provided by the present application;

[0025] Figure 6 This is an equivalent circuit diagram of the display device driving circuit in the reset stage of this application;

[0026] Figure 7 The equivalent circuit diagram of the display device driving circuit in the sampling stage of this application;

[0027] Figure 8 The equivalent circuit diagram of the display device driving circuit in the storage stage of this application;

[0028] Fig. 9 This is an equivalent circuit diagram of the display device driving circuit of the present application in the first light-emitting stage;

[0029] Fig.10 This is an equivalent circuit diagram of the display device driving circuit of the present application in the second light-emitting stage;

[0030] Fig.11 This is an equivalent circuit diagram of the display device driving circuit of the present application in the third light-emitting stage;

[0031] Fig.12 A schematic diagram of a cross-sectional structure of an embodiment of a display panel provided in the present application;

[0032] Fig.13 This is a schematic structural diagram of an embodiment of an OLED stacking structure of the present application.

[0033] A first light-emitting unit OLED1; a second light-emitting unit OLED2; a third light-emitting unit OLED3; a driving circuit 10; a switching circuit 20; a reset transistor T0; a first switching transistor T1; a second switching transistor T2; a third switching transistor T3; a fourth switching transistor T4; a fifth switching transistor T5; a sixth switching transistor T6; a seventh switching transistor T7; an eighth switching transistor T8; a ninth switching transistor T9; a tenth switching transistor T10; a first capacitor C1; a second capacitor C2; a third capacitor C3; a driving transistor DT; a switching signal line EM; a power line VDD; a reset signal line Vint; a first data line Data1; a second data line Data2; a third data line Data3; a first scanning line Scan1; a second scanning line Scan2; a third scanning line Scan3; a reset control line Scan (n-2); a first control line Scan (n-1); a second control line Scan (n). DETAILED DESCRIPTION

[0034] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0035] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms of "a", "said", and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless otherwise clearly indicated above, and "multiple" generally includes at least two, but does not exclude the inclusion of at least one.

[0036] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the objects associated with each other are in an "or" relationship. The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0037] It should be understood that the terms "include", "comprises" or any other variations used herein are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of more restrictions, the elements defined by the sentence "includes..." do not exclude the presence of other identical elements in the process, method, article or device that includes the elements.

[0038] It should be noted that if the embodiments of the present application involve directional indications (such as up, down, left, right, front, back...), such directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0039] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The presence of the phrase at each location in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0040] The present application provides a display device driving circuit. Figure 1 , Figure 1 This is a schematic diagram of the structure of an embodiment of a display device driving circuit provided by the present application. Figure 1 As shown, the display device driving circuit includes: a first light-emitting unit OLED1, a second light-emitting unit OLED2 and a third light-emitting unit OLED3 which are partially stacked, and a pixel driving circuit 100. The pixel driving circuit 100 is connected to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3, and is used to drive the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 to emit light in a time-sharing manner. That is, different driving signals are provided to the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 respectively, so as to drive the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 to emit light of different brightness.

[0041] The pixel driving circuit 100 includes a driving circuit 10 and a switching circuit 20. The driving circuit 10 is used to generate a driving signal to drive the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 to emit light. Specifically, the driving circuit 10 is connected to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3, and is used to provide a driving signal to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3.

[0042] The switch circuit 20 is arranged between the drive circuit 10 and the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3, and is used to control the drive circuit 10 to be turned on with the first light-emitting unit OLED1 in sequence to drive the first light-emitting unit OLED1 to emit light; control the drive circuit 10 to be turned on with the second light-emitting unit OLED2 to drive the second light-emitting unit OLED2 to emit light; and control the drive circuit 10 to be turned on with the third light-emitting unit OLED3 to drive the third light-emitting unit OLED3 to emit light.

[0043] Specifically, the switch circuit 20 includes a first switch transistor T1, a second switch transistor T2 and a third switch transistor T3. The first switch transistor T1 is arranged between the drive circuit 10 and the first light-emitting unit OLED1, and is used to control the drive circuit 10 to be turned on with the first light-emitting unit OLED1, thereby providing a drive signal to the first light-emitting unit OLED1. The second switch transistor T2 is arranged between the drive circuit 10 and the second light-emitting unit OLED2, and is used to control the drive circuit 10 to be turned on with the second light-emitting unit OLED2, thereby providing a drive signal to the second light-emitting unit OLED2. The third switch transistor T3 is arranged between the drive circuit 10 and the third light-emitting unit OLED3, and is used to control the drive circuit 10 to be turned on with the third light-emitting unit OLED3, thereby providing a drive signal to the third light-emitting unit OLED3.

[0044] The first switch transistor T1 , the second switch transistor T2 and the third switch transistor T3 are not turned on at the same time (ie, they are turned on in time division), thereby respectively controlling the first light emitting unit OLED1 , the second light emitting unit OLED2 and the third light emitting unit OLED3 to emit light.

[0045] In this specific embodiment, the pixel driving circuit includes a reset stage, an energy storage stage, and a light-emitting stage. In the reset stage, a reset signal is provided to the driving circuit 10 to eliminate the influence of the signal of the previous frame. In the energy storage stage, a driving signal is provided to the driving circuit 10, and the driving circuit 10 stores and maintains the driving signal. In the light-emitting stage, the driving circuit 10 transmits the driving signal to the light-emitting unit to drive the light-emitting unit to emit light.

[0046] In this embodiment, the light-emitting stage includes a first light-emitting stage, a second light-emitting stage and a third light-emitting stage. In the first light-emitting stage, the driving circuit 10 provides a driving signal to the first light-emitting unit OLED1. In the second light-emitting stage, the driving circuit 10 provides a driving signal to the second light-emitting unit OLED2. In the third light-emitting stage, the driving circuit 10 provides a driving signal to the third light-emitting unit OLED3. In this embodiment, only one storage is required before the first light-emitting stage, the second light-emitting stage and the third light-emitting stage. Compared with the circuit structure in which storage is performed once before each light-emitting stage, the circuit structure in this embodiment can save energy storage operation steps, improve energy storage efficiency, and also simplify the circuit structure.

[0047] Furthermore, in order to enable the driving circuit 10 to provide different driving signals to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 in the light-emitting stage, the driving circuit 10 includes a first storage circuit, a second storage circuit, and a third storage circuit. In other pixel driving circuits, the same driving signal can also be provided to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3.

[0048] Please refer to Figure 2 , Figure 2 This is a schematic diagram of the structure of the first specific embodiment of the display device driving circuit provided by the present application. Figure 2 As shown, the driving circuit 10 includes a driving transistor DT and a storage circuit.

[0049] The storage circuit is connected to the gate of the driving transistor DT and is used for storing the gate voltage charged into the driving transistor DT.

[0050] In this specific embodiment, the storage circuit includes a first capacitor C1, a second capacitor C2 and a third capacitor C3. The first capacitor C1 stores a first data voltage, the second capacitor C2 stores a second data voltage, and the third capacitor C3 stores a third data voltage. In the first light-emitting stage, the first capacitor C1 works to provide the first data voltage to the gate of the driving transistor DT, thereby providing the first data current to the first light-emitting unit OLED1. In the second light-emitting stage, the second capacitor C2 works to provide the second data voltage to the gate of the driving transistor DT, thereby providing the second data current to the second light-emitting unit OLED1. In the third light-emitting stage, the third capacitor C3 works to provide the third data voltage to the gate of the driving transistor DT, thereby providing the third data current to the third light-emitting unit OLED3. In this embodiment, different driving voltages are transmitted to the driving transistor DT in the first light-emitting stage, the second light-emitting stage and the third light-emitting stage respectively through three storage circuits (three capacitors), so that the driving transistor DT generates different driving currents under different driving voltages, so as to drive the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 to emit different lights.

[0051] Drive current ,in, is the gate-source voltage of the driving transistor DT (the voltage difference between the gate and the source), is the threshold voltage of the driving transistor DT, and K is the dielectric constant of the driving transistor DT. It can be seen that the driving current is related to the gate-source voltage and the threshold voltage of the driving transistor DT. When the gate-source voltage includes the threshold voltage, the influence of the threshold voltage drift of the driving transistor DT can be eliminated.

[0052] Specifically, the first plates of the first capacitor C1, the second capacitor C2, and the third capacitor C3 are connected to the power line VDD, so that the first capacitor C1, the second capacitor C2, and the third capacitor C3 have a storage function. The second plate of the first capacitor C1 is connected to the first data line data1 and the gate of the driving transistor DT, and is used to provide a first data voltage to the gate of the driving transistor DT. The second plate of the second capacitor C2 is connected to the second data line data2 and the gate of the driving transistor DT, and is used to provide a second data voltage to the gate of the driving transistor DT. The second plate of the third capacitor C3 is connected to the third data line data3 and the gate of the driving transistor DT, and is used to provide a third data voltage to the gate of the driving transistor DT. In some embodiments, the driving signal can be transmitted to the gate of the driving transistor DT in a time-sharing manner through the first data line data1, the second data line data2, and the third data line data3.

[0053] In this embodiment, the storage circuit further includes a fourth switch transistor T4, a fifth switch transistor T5, and a sixth switch transistor T6. Among them, the fourth switch transistor T4 is arranged between the first capacitor C1 and the gate of the driving transistor DT, and is used to control the timing of the first capacitor C1 providing a driving voltage to the gate of the driving transistor DT. The fifth switch transistor T5 is arranged between the second capacitor C2 and the gate of the driving transistor DT, and is used to control the timing of the second capacitor C2 providing a driving voltage to the gate of the driving transistor DT. The sixth switch transistor T6 is arranged between the third capacitor C3 and the gate of the driving transistor DT, and is used to control the timing of the third capacitor C3 providing a driving voltage to the gate of the driving transistor DT. In this embodiment, the data voltage is first stored by the first capacitor C1, the second capacitor C2, and the third capacitor C3, and then the driving voltage is provided to the gate of the driving transistor DT in a time-sharing manner by the fourth switch transistor T4, the fifth switch transistor T5, and the sixth switch transistor T6.

[0054] Specifically, the fourth switch transistor T4 is disposed between the second plate of the first capacitor C1 and the gate of the driving transistor DT, and is used to control the second plate of the first capacitor C1 to be connected to the gate of the driving transistor DT in the first light-emitting stage, so as to transmit the driving voltage including the first data voltage to the gate of the driving transistor DT. The fifth switch transistor T5 is disposed between the second plate of the second capacitor C2 and the gate of the driving transistor DT, and is used to control the second plate of the second capacitor C2 to be connected to the gate of the driving transistor DT in the second light-emitting stage, so as to transmit the driving voltage including the second data voltage to the gate of the driving transistor DT. The sixth switch transistor T6 is disposed between the second plate of the third capacitor C3 and the gate of the driving transistor DT, and is used to control the second plate of the third capacitor C3 to be connected to the gate of the driving transistor DT in the third light-emitting stage, so as to transmit the driving voltage including the third data voltage to the gate of the driving transistor DT.

[0055] In this specific embodiment, the fourth switch transistor T4 and the gate of the first switch transistor T1 are connected to the same first scan line Scan1, and are used to be turned on at the same time in the first light-emitting stage, and drive the first light-emitting unit OLED1 to emit light under the drive of the first data voltage Vdata1. The fifth switch transistor T5 and the gate of the second switch transistor T2 are connected to the same second scan line Scan2, and are used to be turned on at the same time in the second light-emitting stage, and drive the second light-emitting unit OLED2 to emit light under the drive of the second data voltage Vdata2. The sixth switch transistor T6 and the gate of the third switch transistor T3 are connected to the same third scan line Scan3, and are used to be turned on at the same time in the third light-emitting stage, and drive the third light-emitting unit OLED3 to emit light under the drive of the third data voltage Vdata3.

[0056] The driving circuit 10 further includes a reset transistor T0 connected to the gate of the driving transistor DT. The gate of the reset transistor T0 is connected to the reset control line Scan (n-2), the first electrode is connected to the reset signal line Vint, and the second electrode is connected to the gate of the driving transistor DT, and is used to provide a reset signal to the gate of the driving transistor DT in the reset phase P1 to eliminate the signal influence of the previous frame. Furthermore, the second electrode of the reset transistor T0 is also connected to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3, and is used to charge the reset voltage to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 in the reset phase P1. The driving transistor DT is a P-type transistor that is turned on at a low potential, so that the driving transistor DT can be in a conducting state after the reset phase, which is convenient for the subsequent charging of the threshold voltage to the gate of the driving transistor DT.

[0057] For further information, see Figure 3 , Figure 3 This is a schematic diagram of the structure of the second specific embodiment of the display device driving circuit provided by the present application. Figure 3 As shown, the storage circuit also includes a storage capacitor Cst, which is used to store a voltage including a threshold voltage Vth of the driving transistor DT, thereby providing a driving voltage including the threshold voltage to the gate of the driving transistor DT during the light-emitting driving stage, thereby eliminating the influence of the threshold voltage drift of the driving transistor DT and improving the driving stability of the driving transistor DT.

[0058] Specifically, the first plate of the storage capacitor Cst is connected to the power line VDD, and the second plate is respectively connected to the gate of the driving transistor DT and the second electrode of the driving transistor DT, so that the storage capacitor Cst stores a voltage including the threshold voltage Vth of the driving transistor DT in the sampling phase.

[0059] In a further embodiment, the second plate of the storage capacitor Cst is also connected to the first plates of the first capacitor C1, the second capacitor C2 and the third capacitor C3, respectively, to form a series circuit with the first capacitor C1, the second capacitor C2 and the third capacitor C3 in the light-emitting stage, so as to transmit a driving voltage including the threshold voltage and the data voltage of the driving transistor DT to the gate of the driving transistor DT. The data voltage includes a first data voltage, a second data voltage and a third data voltage. Specifically, in the first light-emitting stage, a driving voltage including the threshold voltage Vth and the first data voltage Vdata1 is transmitted to the gate of the driving transistor DT; in the second light-emitting stage, a driving voltage including the threshold voltage Vth and the second data voltage Vdata2 is transmitted to the gate of the driving transistor DT; in the third light-emitting stage, a driving voltage including the threshold voltage Vth and the third data voltage Vdata3 is transmitted to the gate of the driving transistor DT.

[0060] It should be noted that, in the first specific embodiment, during the light emitting stage, the gate voltage of the driving transistor DT is a driving voltage including the first data voltage, the second data voltage and the third data voltage. In the second specific embodiment, the gate voltage of the driving transistor DT is a driving voltage including the threshold voltage and the first data voltage, the threshold voltage and the second data voltage, and the threshold voltage and the third data voltage.

[0061] In other embodiments, the storage circuit may also directly provide a driving voltage including a threshold voltage to the gate of the driving transistor DT. In this case, the gate voltage of the driving transistor DT does not have the function of time-sharing control over the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3, which is not limited here.

[0062] For further information, see Figure 4 , Figure 4 This is a schematic structural diagram of a third specific embodiment of a display device driving circuit provided in the present application.

[0063] Specifically, the storage circuit also includes a seventh switch transistor T7, which is arranged between the first plate of the storage capacitor Cst and the power line VDD, and is used to connect the storage capacitor Cst to the working circuit so that the storage capacitor Cst has a storage function. Specifically, the gate of the seventh switch transistor T7 is connected to the first control line Scan (n-1), the first electrode is connected to the power line VDD, and the second electrode is connected to the first plate of the storage capacitor Cst, and is used to connect the first plate of the storage capacitor Cst to the circuit so that the second plate has a storage function. If the first plate of the storage capacitor Cst is suspended, the storage capacitor Cst does not work and does not have a storage function.

[0064] The eighth switch transistor T8 is disposed between the second electrode plate of the storage capacitor Cst and the gate electrode of the driving transistor DT, and is used to connect the gate electrode of the driving transistor DT to the second electrode of the driving transistor DT, so that the storage capacitor Cst can store the threshold voltage of the driving transistor DT in the sampling stage. Specifically, the gate electrode of the eighth switch transistor T8 is connected to the second control line Scan (n), the first electrode is connected to the second electrode plate of the storage capacitor Cst and the second electrode of the driving transistor DT, and the second electrode is connected to the gate electrode of the driving transistor DT, and is used to control the power supply line, the driving transistor and the storage capacitor to form a sampling loop in the sampling stage, so that the storage capacitor Cst stores the threshold voltage of the driving transistor DT in the sampling stage.

[0065] Specifically, the storage circuit further includes a ninth switch transistor T9, which is disposed between the power line VDD and the first plates of the first capacitor C1, the second capacitor C2 and the third capacitor C3, and is used to control the first capacitor C1, the second capacitor C2 and the third capacitor C3 to have a storage function in the storage stage. The gate of the ninth switch transistor T9 is connected to the first control line Scan (n-1), the first electrode is connected to the power line VDD, and the second electrode is connected to the first plates of the first capacitor C1, the second capacitor C2 and the third capacitor C3, so that the first capacitor C1, the second capacitor C2 and the third capacitor C3 are connected to the storage circuit, so that they have a storage function.

[0066] In the storage stage, the first data line data1, the second data line data2 and the third data line data3 store the first data voltage Vdata1, the second data voltage Vdata2 and the third data voltage Vdata3 through the first capacitor C1, the second capacitor C2 and the third capacitor C3, respectively. In a further embodiment, a switch transistor may be respectively arranged between the first data line data1 and the first capacitor C1, the second data line data2 and the second capacitor C2, and the third data line data3 and the third capacitor C3 to control the data line to be turned on with the capacitor in the storage stage, so as to store the data voltage.

[0067] In a specific embodiment, the gate of the ninth switch transistor T9 is also connected to the first control line Scan (n-1), and the ninth switch transistor T9 and the seventh switch transistor T7 are a group of transistors with opposite driving characteristics, thereby saving the number of control lines. In other embodiments, the ninth switch transistor T9 can also be controlled by a single control line, which is not limited here. Among them, the first control line Scan (n-1) is a pulse signal of a normal high potential, the seventh switch transistor T7 is an N-type transistor, the ninth switch transistor T9 is a P-type transistor, and the first control line Scan (n-1) is a low potential in the storage stage, which controls the ninth switch transistor T9 to be turned on and the seventh switch transistor T7 to be turned off. In another embodiment, the first control line Scan (n-1) is a pulse signal of a normal low potential, then the seventh switch transistor T7 is a P-type transistor, the ninth switch transistor T9 is an N-type transistor, and the first control line Scan (n-1) is a high potential in the storage stage, which controls the ninth switch transistor T9 to be turned on and the seventh switch transistor T7 to be turned off, which is not specifically limited here.

[0068] In the light-emitting stage, the seventh switch transistor T7 is in the on state, so that the capacitor in the storage circuit is connected to the working circuit, and the driving voltage is provided to the gate of the driving transistor DT. Specifically, the storage capacitor Cst and the first capacitor C1 can be connected to the gate of the driving transistor DT in the first light-emitting stage, and the driving voltage including the threshold voltage of the driving transistor DT and the first data voltage is transmitted to the gate of the driving transistor DT; the storage capacitor Cst and the second capacitor C2 can be connected to the gate of the driving transistor DT in the second light-emitting stage, so as to transmit the driving voltage including the threshold voltage of the driving transistor DT and the second data voltage to the gate of the driving transistor DT; the storage capacitor Cst and the third capacitor C3 can be connected to the gate of the driving transistor DT in the third light-emitting stage, so as to transmit the driving voltage including the threshold voltage of the driving transistor DT and the third data voltage to the gate of the driving transistor DT.

[0069] It should be noted that if one plate of the capacitor is suspended, the voltage stored therein cannot be connected to the driving circuit, and thus the driving transistor DT cannot be controlled to operate.

[0070] In the above embodiment, the driving circuit 10 further includes a reset transistor T0, the gate of the reset transistor T0 is connected to the reset control line Scan (n-2), the first electrode is connected to the reset signal line Vint, and the second electrode is connected to the gate of the driving transistor DT, which is used to provide a reset signal to the gate of the driving transistor DT in the reset phase P1 to eliminate the signal influence of the previous frame. Furthermore, the second electrode of the reset transistor T0 is also connected to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3, which is used to charge the reset voltage to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 in the reset phase P1. Among them, the driving transistor DT is a P-type transistor that is turned on at a low potential, so that the driving transistor DT can be in a conducting state after the reset phase, which is convenient for the subsequent charging of the threshold voltage to the gate of the driving transistor DT.

[0071] The pixel driving circuit further includes a tenth switch transistor T10 disposed between the driving circuit 10 and the switch circuit 20, wherein the gate of the tenth switch transistor T10 is connected to the switch signal line, the first electrode is connected to the driving circuit 10, and the second electrode is connected to the switch circuit 20, and is used to control the driving circuit 10 to transmit a drive signal to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3. In one embodiment, the switch signal transmitted on the switch signal line EM is a periodic jump signal, which can be a periodic low-potential jump according to PWM. The tenth switch transistor T10 is a P-type transistor that is turned on at a low potential, and is used to control the duty cycle of the drive signal transmitted to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 during the light-emitting stage, thereby adjusting their brightness.

[0072] For further information, see Figure 5 , Figure 5 This is a timing control signal diagram of the third specific embodiment of the display device driving circuit provided by this application. Figure 5 As shown, the pixel driving circuit includes a reset phase, a sampling phase, a storage phase, and a light emitting phase. The light emitting phase includes a first light emitting phase, a second light emitting phase, and a third light emitting phase. Figure 4 as shown in .

[0073] During the reset phase, please refer to Figure 6 , Figure 6This is an equivalent circuit diagram of the display device driving circuit in the reset stage of this application. The reset control line Scan (n-2) controls the reset transistor T0 to turn on, and the reset signal line Vint provides a reset voltage to the gate of the driving transistor DT through the reset transistor T0, and at the same time, a reset voltage can be provided to the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 through the switch circuit 20. Among them, the driving transistor DT is a P-type transistor, so that the driving transistor DT is in a conductive state, which is convenient for collecting the threshold voltage of the driving transistor DT in the sampling stage.

[0074] In the reset phase, the first control line Scan(n-1) also controls the seventh switch transistor T7 to be turned on, so that the first electrode plate of the storage capacitor Cst is connected to the power line VDD, so that it is in a storage state.

[0075] Furthermore, in the reset phase, the second control line Scan(n) also controls the eighth switch transistor T8 to be turned on, so that the second plate of the storage capacitor Cst is connected to the gate of the driving transistor, so that it can store the reset signal charged to the gate of the driving transistor DT in the reset phase.

[0076] It should be noted that, in another preferred embodiment, the eighth switch transistor T8 may also be disposed between the second electrode of the driving transistor DT and the second electrode plate of the storage capacitor Cst, and is used to control the storage capacitor Cst to collect the threshold voltage of the driving transistor DT during the sampling phase. In the reset phase, the eighth switch transistor T8 may not be turned on. In the reset phase, the storage capacitor Cst stores the reset voltage.

[0077] During the sampling phase, please refer to Figure 7 , Figure 7This is an equivalent circuit diagram of the display device driving circuit of the present application in the sampling stage. The reset control line Scan (n-2) controls the reset transistor T0 to be turned off, and stops charging the reset voltage Vint to the gate of the driving transistor DT. At this stage, the first control line Scan (n-1) also controls the seventh switch transistor T7 to be turned on, and the second control line Scan (n) controls the eighth switch transistor T8 to be turned on, connecting the gate of the driving transistor DT to its second electrode, and charging the threshold voltage Vth to the gate of the driving transistor DT. Specifically, at this stage, the storage capacitor Cst is in an open circuit state (that is, a storage state), and the power line VDD, the driving transistor DT and the storage capacitor Cst form a sampling loop, and the voltage of the power line VDD is transmitted through the driving transistor DT to the second plate of the storage capacitor Cst and the gate of the driving transistor. It should be noted that when the gate voltage of the driving transistor DT is equal to the threshold voltage, the driving transistor DT is turned off, that is, the sampling is completed. Therefore, after this stage, the threshold voltage Vth is stored on the second plate (point A) of the storage capacitor Cst, and the potential difference (that is, the stored voltage) on the storage capacitor Cst is Vth-VDD (or VDD-Vth).

[0078] In the storage phase, see further Figure 8 , Figure 8 This is an equivalent circuit diagram of the display device driving circuit in the storage stage of this application. In this stage, the first control line Scan (n-1) controls the seventh switch transistor T7 to be turned off, the ninth switch transistor T9 to be turned on, and the second control line Scan (n) controls the eighth switch transistor T8 to be turned off. At this time, the first capacitor C1, the second capacitor C2 and the third capacitor C3 are connected to the power line VDD through the ninth switch transistor T9, so that they have a storage function. The first data line data1 charges the first data voltage Vdata1 to the second plate of the first capacitor C1, the second data line data2 charges the second data voltage Vdata2 to the second plate of the second capacitor C2, and the third data line data3 charges the third data voltage Vdata3 to the second plate of the third capacitor C3, and stores them.

[0079] It should be noted that, at this stage, the first plate of the storage capacitor Cst is in a floating state, the charge stored inside the storage capacitor Cst has no circuit to exchange and flow, and the potential difference between its two plates does not change. Therefore, the storage voltage on the second plate of the storage capacitor Cst does not change.

[0080] In the light emitting stage, the first control line Scan(n-1) controls the seventh switch transistor T7 to be turned on, so that the storage capacitor Cst sequentially provides a driving signal including the threshold voltage Vth of the driving transistor DT to the first light emitting unit OLED1, the second light emitting unit OLED2 and the third light emitting unit OLED3.

[0081] In the first light stage, please refer to Fig. 9 , Fig. 9 This is an equivalent circuit diagram of the display device driving circuit of the present application in the first light-emitting stage. In this stage, the first scan line Scan1 controls the first switch transistor T1 and the fourth switch transistor T4 to be turned on at the same time, so that the storage capacitor Cst and the first capacitor C1 provide a drive signal including the threshold voltage Vth and the first data voltage Vdata1 to the gate of the drive transistor DT through the fourth switch transistor T4.

[0082] In the second light stage, please refer to Fig.10 , Fig.10 The equivalent circuit diagram of the display device driving circuit of the present application in the second light-emitting stage. In this stage, the second scan line Scan2 controls the second switch transistor T2 and the fifth switch transistor T5 to be turned on at the same time, so that the storage capacitor Cst and the second capacitor C2 provide a drive signal including the threshold voltage Vth and the second data voltage Vdata2 to the gate of the drive transistor DT through the fifth switch transistor T5.

[0083] In the third lighting stage, please refer to Fig.11 , Fig.11 : This is an equivalent circuit diagram of the display device driving circuit of the present application in the third light-emitting stage. In this stage, the third scan line Scan3 controls the third switch transistor T3 and the sixth switch transistor T6 to be turned on at the same time, so that the storage capacitor Cst and the third capacitor C3 provide a drive signal including the threshold voltage Vth and the third data voltage Vdata3 to the gate of the drive transistor DT through the sixth switch transistor T6.

[0084] Among them, in the light-emitting stage, the switching signal EM is a periodic low-voltage jump signal. By controlling the duty cycle of the switching signal EM, the charging time of the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 can be controlled, thereby controlling the light-emitting brightness of the light-emitting unit.

[0085] It should be noted that grayscale is the data of the image itself and is controlled by data; brightness is the overall light and dark state of the display and can be controlled interactively, that is, by the charging duty cycle.

[0086] It should be noted that, in the above embodiment, except for the seventh switch transistor T7 which is an N-type transistor, the other switch transistors are P-type transistors.

[0087] The present application also provides a display panel, the display panel comprising a substrate and a display device driving circuit disposed on the substrate, wherein the circuit structure of the display device driving circuit is as shown in any of the above embodiments. Fig.12 , Fig.12 This is a schematic diagram of the cross-sectional structure of an embodiment of a display panel provided in the present application. Fig.12 As shown, the display panel includes a substrate 11, a pixel driving circuit layer disposed on the substrate 11, a pixel driving circuit 100 is disposed in the pixel driving circuit layer, and the display panel further includes a display device 30 disposed on a side of the pixel driving circuit layer away from the substrate 11. The display device 30 includes a first light emitting unit OLED1, a second light emitting unit OLED2, and a third light emitting unit OLED3.

[0088] The first light-emitting unit OLED1 is overlapped with the second light-emitting unit OLED2 and the third light-emitting unit OLED3. Specifically, the first light-emitting unit OLED1 and the second light-emitting unit OLED2 are stacked, and the third light-emitting unit OLED3 is separately arranged; or, the first light-emitting unit OLED1 and the third light-emitting unit OLED3 are stacked, and the second light-emitting unit OLED2 is separately arranged; or, the third light-emitting unit OLED3 and the second light-emitting unit OLED2 are stacked, and the first light-emitting unit OLED1 is separately arranged; or, the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 are all stacked.

[0089] For details, please refer to Fig.12 The first light-emitting unit OLED1 and the second light-emitting unit OLED2 are stacked in the direction of the substrate 11, and the third light-emitting unit OLED3 is separately arranged. The first light-emitting unit OLED1 and the second light-emitting unit OLED2 share a cathode, the light-emitting layers are stacked, and the anodes are arranged on opposite sides of the stacked light-emitting layers, wherein the anode of the second light-emitting unit OLED2 is arranged on a side away from the substrate 11, and is connected to the lower pixel driving circuit 100 through a via hole on the pixel definition layer.

[0090] For further information, please refer to Fig.13 , Fig.13 This is a schematic diagram of the structure of an embodiment of the OLED stacking structure of the present application. Fig.13As shown, the OLED stacking structure includes an anode (Anode), a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting layer (EM), an electron transport layer (ETL), an electron injection layer (EIL), a cathode (cathode), an electron injection layer (EIL), an electron transport layer (ETL), a light-emitting layer (EM), a hole transport layer (HTL), a hole injection layer (HIL), and an anode (Anode) in a direction perpendicular to the substrate 11, respectively forming a stacked first light-emitting unit OLED1 and a second light-emitting unit OLED2. The anode away from the substrate 11 side is connected to the lower pixel driving circuit through a via on the pixel definition layer. Among them, the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 are respectively one of the R pixel, the G pixel, and the B pixel, which are not specifically limited here.

[0091] The beneficial effects of the present application are as follows: a driving circuit for driving the first light-emitting unit, a driving circuit for driving the second light-emitting unit, and a driving circuit for driving the third light-emitting unit are combined into one, and are periodically turned on in the form of time-division multiplexing, thereby providing driving signals to the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit for display, respectively, and imaging is performed using the low-pass effect of the human eye, which effectively reduces the backplane area occupied by the driving circuit and improves the resolution, while avoiding the influence of the threshold voltage of the driving transistor or the problem of increased power consumption caused by multiple sampling of the threshold voltage.

[0092] The above are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A display device driving circuit, characterized in that: include: A first light emitting unit, a second light emitting unit and a third light emitting unit that are partially stacked; a pixel driving circuit, connected to the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, and used for driving the first light-emitting unit, the second light-emitting unit and the third light-emitting unit to emit light in a time-sharing manner; The pixel driving circuit comprises: a driving transistor, wherein a first electrode of the driving transistor is connected to a power line, and a second electrode of the driving transistor is connected to anodes of the first light emitting unit, the second light emitting unit, and the third light emitting unit; A storage circuit, the storage circuit is connected to the gate of the driving transistor and is used to store the gate voltage charged to the driving transistor; wherein the storage circuit includes a first capacitor storing a first data voltage, a second capacitor storing a second data voltage, a third capacitor storing a third data voltage and a storage capacitor storing a threshold voltage including the driving transistor; the first plate of the storage capacitor is connected to the power line through a seventh switching transistor, and the second plate of the storage capacitor is also connected to the gate of the driving transistor through an eighth switching transistor, so as to control the storage capacitor to store the threshold voltage of the driving transistor in the sampling phase through the seventh switching transistor and the eighth switching transistor; the first plates of the first capacitor, the second capacitor and the third capacitor are connected to the power line through a ninth switching transistor, the second plate of the first capacitor is connected to the first data line, and the second plate of the second capacitor is connected to the gate of the driving transistor through an eighth switching transistor. The second electrode plate is connected to the second data line, and the second electrode plate of the third capacitor is connected to the third data line, and is used to store the first data voltage in the first capacitor, store the second data voltage in the second capacitor, and store the third data voltage in the third capacitor in the storage stage; the second electrode plate of the storage capacitor is also connected to the first electrode plates of the first capacitor, the second capacitor, and the third capacitor, and the second electrodes of the first capacitor, the second capacitor, and the third capacitor are respectively connected to the gate of the driving transistor through different switching transistors, and are used to transmit a driving voltage including the threshold voltage and the data voltage of the driving transistor to the gate of the driving transistor in the light-emitting stage, so that the driving transistor provides different driving signals to the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit respectively; wherein the data voltage includes the first data voltage, the second data voltage, and the third data voltage; The switching circuit includes a first switching transistor, a second switching transistor and a third switching transistor, which are respectively arranged between the second electrode of the driving transistor and the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, and are used to control the driving transistor to sequentially drive the first light-emitting unit to emit light, the second light-emitting unit to emit light and the third light-emitting unit to emit light.

2. The display device driving circuit according to claim 1, characterized in that: The light-emitting stages include a first light-emitting stage, a second light-emitting stage and a third light-emitting stage; The storage circuit further includes: a fourth switch transistor, disposed between the second electrode plate of the first capacitor and the gate of the driving transistor, and configured to control the storage capacitor to be connected to the gate of the driving transistor through the first capacitor in a first light-emitting stage, so as to transmit a driving voltage including a threshold voltage of the driving transistor and the first data voltage to the gate of the driving transistor; a fifth switch transistor, disposed between the second electrode plate of the second capacitor and the gate of the driving transistor, and configured to control the storage capacitor to be connected to the gate of the driving transistor through the second capacitor in the second light-emitting stage, so as to transmit a driving voltage including a threshold voltage of the driving transistor and the second data voltage to the gate of the driving transistor; a sixth switch transistor, disposed between the third electrode plate of the third capacitor and the gate of the driving transistor, and configured to control the storage capacitor to be connected to the gate of the driving transistor through the third capacitor in a third light-emitting stage, so as to transmit a driving voltage including a threshold voltage of the driving transistor and the third data voltage to the gate of the driving transistor; The fourth switch transistor, the fifth switch transistor and the sixth switch transistor are turned on in a time-sharing manner during the light emitting stage.

3. The display device driving circuit according to claim 2, characterized in that: The fourth switch transistor and the gate of the first switch transistor are connected to the first scan line, and are used to be turned on simultaneously in the first light-emitting phase to drive the first light-emitting unit to emit light under the first driving voltage; The gates of the fifth switch transistor and the second switch transistor are connected to the second scan line, and are used to be turned on simultaneously in the second light-emitting phase to drive the second light-emitting unit to emit light at a second driving voltage; The gates of the sixth switch transistor and the third switch transistor are connected to the third scan line, and are used to be turned on simultaneously in the third light-emitting phase to drive the third light-emitting unit to emit light under a third driving voltage.

4. The display device driving circuit according to claim 1, characterized in that: The seventh switch transistor is arranged between the first plate of the storage capacitor and the power line, the gate of the seventh switch transistor is connected to the first control line, the first electrode of the seventh switch transistor is connected to the power line, and the second electrode of the seventh switch transistor is connected to the first plate of the storage capacitor, so as to control the storage capacitor to have a storage function in the sampling stage; The eighth switch transistor is arranged between the second electrode plate of the storage capacitor and the gate of the driving transistor, the gate of the eighth switch transistor is connected to the second control line, the first electrode of the eighth switch transistor is connected to the second electrode plate of the storage capacitor and the second electrode of the driving transistor, and the second electrode is connected to the gate of the driving transistor, and is used to control the power line, the driving transistor and the storage capacitor to form a sampling loop in the sampling stage, so that the storage capacitor can store the threshold voltage of the driving transistor in the sampling stage; The ninth switching transistor is arranged between the power line and the first plates of the first capacitor, the second capacitor and the third capacitor, the first electrode of the ninth switching transistor is connected to the power line, and the second electrode of the ninth switching transistor is connected to the first plates of the first capacitor, the second capacitor and the third capacitor, and is used to control the first capacitor, the second capacitor and the third capacitor to have a storage function in the storage stage.

5. The display device driving circuit according to claim 4, characterized in that: The gate of the ninth switch transistor is connected to the first control line, and the ninth switch transistor and the seventh switch transistor are a group of transistors with opposite driving characteristics; wherein, the first control line controls the ninth switch transistor to be turned on and controls the seventh switch transistor to be turned off in the storage stage.

6. The display device driving circuit according to claim 4, characterized in that: The seventh switching transistor is in a conducting state during the light-emitting stage, so that the storage capacitor and the first capacitor can transmit a driving voltage including the threshold voltage of the driving transistor and the first data voltage to the gate of the driving transistor in the first light-emitting stage, so that the storage capacitor and the second capacitor can transmit a driving voltage including the threshold voltage of the driving transistor and the second data voltage to the gate of the driving transistor in the second light-emitting stage, and so that the storage capacitor and the third capacitor can transmit a driving voltage including the threshold voltage of the driving transistor and the third data voltage to the gate of the driving transistor in the third light-emitting stage.

7. The display device driving circuit according to any one of claims 1 to 6, characterized in that: The driving circuit also includes a reset transistor; The gate of the reset transistor is connected to the reset control line, the first electrode of the reset transistor is connected to the reset signal line, and the second electrode of the reset transistor is connected to the gate of the drive transistor and the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit, so as to charge the reset voltage to the gate of the drive transistor and the anodes of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit in the reset stage; Wherein, the driving transistor is a P-type transistor.

8. The display device driving circuit according to any one of claims 1 to 6, characterized in that: The pixel driving circuit further includes a tenth switching transistor disposed between the driving circuit and the switching circuit; The gate of the tenth switch transistor is connected to the switch signal line, the first electrode of the tenth switch transistor is connected to the drive circuit, and the second electrode of the tenth switch transistor is connected to the switch circuit; The switch signal is a periodic jump signal, and the tenth switch transistor is used to control the brightness of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit in the light-emitting stage.

9. A display panel, characterized in that: The display panel comprises: a substrate and a display device driving circuit according to any one of claims 1 to 8 arranged on the substrate; Wherein, the first light emitting unit and the second light emitting unit and / or the third light emitting unit are stacked in the direction of the substrate.

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