Driving circuit of display panel and display device

Abstract

The application provides a display panel driving circuit and a display device. The display panel driving circuit comprises a data driving circuit, a timing controller and a signal conversion circuit. In a compensation stage, the signal conversion circuit converts a light emission signal into a second voltage signal, and the second voltage signal is converted into a data signal by the timing controller and the data driving circuit, and is output to a corresponding node of a pixel circuit. In a light emission stage of the pixel circuit, the timing controller outputs the light emission signal to the pixel circuit, and triggers the pixel driving circuit to drive a light emitting element to emit light. In the display panel driving circuit, a single light emission signal is output by the timing controller, and an external integrated management circuit is not required, so that the structure of the display panel driving circuit is simplified. When light adjustment is performed, the size of the data signal and the light emission duration of the light emission stage can be adjusted by adjusting the light emission signal, so that the brightness of the light emitting element is adjusted, and the light adjustment mode is simplified.

Description

Technical Field

[0001] This application belongs to the field of display panel technology, and in particular relates to a driving circuit and display device for a display panel. Background Technology

[0002] OLED (Organic Light-Emitting Diode) has advantages such as self-illumination, high contrast and wide color gamut. It also has advantages such as simple manufacturing process, low cost, low power consumption and easy implementation of flexible display. As a current-driven light-emitting device, it has been increasingly used in next-generation display devices and has broad application prospects.

[0003] OLEDs are current-driven devices; when current flows through them, the light-emitting element emits light, and the brightness is determined by the current flowing through the element itself. Therefore, the pixel driving circuit needs to convert voltage signals into current signals.

[0004] The pixel driving circuit can be composed of multiple thin-film transistors and capacitors. The light emission process of the pixel circuit includes at least a reset stage, a compensation stage, and a light emission stage. In the compensation stage, data signals are written into the corresponding nodes in the pixel driving circuit. In the light emission stage, light emission signals control the thin-film transistors connected to the light-emitting units to conduct, and the light-emitting units emit light.

[0005] The luminous brightness of the light-emitting unit is related to two factors: 1. The magnitude of the current passing through the light-emitting element, which is related to the magnitude of the voltage of the data signal; 2. The duration of light emission. When switching to the light emission stage, the light emission signal switches the level state, and the light-emitting element conducts light. The duration of light emission is positively correlated with the duration of the level after the light emission signal switches.

[0006] In the current driving method, a fixed voltage needs to be generated by an external power management integrated circuit, and the corresponding data signal is converted and output by a timing controller and a data driving circuit. The timing controller also outputs a light emission signal. At the same time, during dimming, the fixed voltage value and the duty cycle of the light emission signal need to be changed by the external power management integrated circuit and the timing controller, respectively. This results in a complex structure and dimming method. Summary of the Invention

[0007] The purpose of this application is to provide a driving circuit for a display panel, which aims to solve the problems of complex structure and dimming method in traditional driving dimming.

[0008] A first aspect of this application provides a driving circuit for a display panel. The display panel includes an array of pixel circuits, each pixel circuit including a light-emitting element and a pixel driving circuit connected to each other. The driving circuit for the display panel includes:

[0009] A data driving circuit, connected to each of the pixel circuits, is used to convert the received first voltage signal into a data signal and output it to the pixel circuit so as to write the corresponding node of the pixel driving circuit during the compensation phase of the pixel circuit.

[0010] A timing controller, connected to the data driving circuit, is used to output a light emission signal to the pixel circuit to trigger the pixel driving circuit to drive the light-emitting element to emit light during the light-emitting phase of the pixel circuit, and to convert the received second voltage signal into the first voltage signal and output it to the data driving circuit.

[0011] A signal conversion circuit, connected to the timing controller, is used to convert the optical emission signal into the second voltage signal.

[0012] Optionally, the driving circuit of the display panel further includes:

[0013] A row scanning drive circuit, connected to each of the pixel circuits, is used to output row scanning signals to each of the pixel circuits line by line according to the row scanning control signal, so as to turn on each row of the pixel circuits line by line.

[0014] The timing controller is also used for:

[0015] The row scan control signal is output to the row scan drive circuit.

[0016] Optionally, the timing controller is further configured to:

[0017] The amplitude of the light emission signal is adjusted during the compensation phase of the pixel circuit, and the output duration of the light emission signal is adjusted during the light emission phase, so as to adjust the light emission brightness and light emission duration of the light-emitting element.

[0018] Optionally, the signal conversion circuit includes an operational amplifier, a first impedance circuit, a second impedance circuit, and a third impedance circuit;

[0019] The inverting input terminal of the operational amplifier, the first terminal of the first impedance circuit, and the first terminal of the second impedance circuit are connected. The non-inverting input terminal of the operational amplifier is connected to the first terminal of the third impedance circuit. The output terminal of the operational amplifier and the second terminal of the second impedance circuit are connected together to form the output terminal of the signal conversion circuit.

[0020] The second terminal of the first impedance circuit is grounded, and the second terminal of the third impedance circuit is used to input the third voltage signal; or, the second terminal of the first impedance circuit is used to input the third voltage signal, and the second terminal of the third impedance circuit is grounded.

[0021] The first impedance circuit and / or the second impedance circuit are triggered by the light emission signal to output an impedance of a corresponding magnitude, so as to adjust the amplification factor of the signal conversion circuit and the magnitude of the second voltage signal.

[0022] Optionally, the first impedance circuit includes a first resistor, and the third impedance circuit includes a second resistor;

[0023] The second impedance circuit includes an adjustable resistor circuit, which, when triggered by the optical emission signal, outputs an impedance of a corresponding magnitude between the inverting input and output of the operational amplifier.

[0024] Optionally, the adjustable resistor circuit includes a third resistor, a fourth resistor, a fifth resistor, and a MOSFET;

[0025] The first end of the third resistor is connected to the inverting input of the operational amplifier. The second end of the third resistor, the drain of the MOS transistor, and the first end of the fifth resistor are connected. The second end of the fifth resistor is connected to the output of the operational amplifier. The gate of the MOS transistor is used to receive the optical emission signal. The source of the MOS transistor is connected to the first end of the fourth resistor. The second end of the fourth resistor is grounded.

[0026] Optionally, the signal conversion circuit further includes:

[0027] A signal amplification circuit is connected to the timing controller. The signal amplification circuit is used to amplify the optical emission signal and output the amplified optical emission signal.

[0028] A filtering circuit, connected to the signal amplification circuit and the adjustable resistor circuit, is used to filter the amplified optical emission signal and output the filtered optical emission signal to the adjustable resistor circuit.

[0029] Optionally, the signal amplification circuit includes a first transistor and a second transistor;

[0030] The collector of the first transistor is used to input a fourth voltage signal. The bases of the first transistor and the second transistor are connected together and used to receive the light emission signal. The emitters of the first transistor and the second transistor are connected together to form the signal output terminal of the signal amplification circuit. The collector of the second transistor is used to input a fifth voltage signal.

[0031] Optionally, the filter circuit includes a sixth resistor and a second capacitor;

[0032] The first end of the sixth resistor and the first end of the second capacitor are connected together to form the signal input terminal of the filter circuit, the second end of the sixth resistor forms the output terminal of the filter circuit, and the second end of the second capacitor is grounded.

[0033] A second aspect of this application provides a display device including a display panel and a driving circuit for the display panel as described above, wherein the display panel is connected to the driving circuit for the display panel.

[0034] The beneficial effects of this application embodiment compared with the prior art are as follows: The driving circuit of the above-mentioned display panel includes a data driving circuit, a timing controller and a signal conversion circuit. In the compensation stage of the pixel circuit, the signal conversion circuit converts the light emission signal into a second voltage signal. The second voltage signal is converted into a data signal by the timing controller and the data driving circuit and output to the corresponding node of the pixel circuit. In the light emission stage of the pixel circuit, the timing controller outputs the light emission signal to the pixel circuit and triggers the pixel driving circuit to drive the light-emitting element to emit light. In the display panel driving circuit, the timing controller outputs a single light emission signal, which eliminates the need for an external integrated management circuit, simplifying the structure of the display panel driving circuit. Furthermore, during dimming, only the light emission signal needs to be adjusted to complete the adjustment of the data signal magnitude and the light emission duration of the light emission stage, thereby adjusting the brightness of the light-emitting element and simplifying the dimming method. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a schematic diagram of the display panel provided in Embodiment 1 of this application;

[0037] Figure 2 This is a schematic diagram of the pixel circuit provided in Embodiment 1 of this application;

[0038] Figure 3 This is an example circuit diagram of the pixel driving circuit provided in Embodiment 1 of this application;

[0039] Figure 4 This is a schematic diagram of the display device provided in Embodiments 1 and 5 of this application;

[0040] Figure 5 This is a schematic diagram of a first module of the signal conversion circuit provided in Embodiment 3 of this application;

[0041] Figure 6 This is a schematic diagram of a second module of the signal conversion circuit provided in Embodiment 3 of this application;

[0042] Figure 7 This is a schematic diagram of a first type of signal conversion circuit provided in Embodiment 3 of this application;

[0043] Figure 8 This is a second circuit diagram of the signal conversion circuit provided in Embodiment 3 of this application;

[0044] Figure 9 This is a schematic diagram of a first module of the signal conversion circuit provided in Embodiment 4 of this application;

[0045] Figure 10 This is a schematic diagram of a second module of the signal conversion circuit provided in Embodiment 4 of this application;

[0046] Figure 11 This is a schematic diagram of a first type of signal conversion circuit provided in Embodiment 4 of this application;

[0047] Figure 12 This is a second circuit diagram of the signal conversion circuit provided in Embodiment 4 of this application.

[0048] The figures in the diagram are labeled as follows:

[0049] 100. Display panel driving circuit; 200. Display panel; 110. Data driving circuit; 120. Timing controller; 130. Signal conversion circuit; 140. Horizontal scan driving circuit; 131. First impedance circuit; 132. Second impedance circuit; 133. Third impedance circuit; 134. Signal amplification circuit; 135. Filtering circuit; 210. Pixel circuit; 211. Pixel driving circuit; 212. Light-emitting unit;

[0050] Vint, Reset signal; Gn-1, Gn-1th row scan signal; Gn, Gnth row scan signal; T1, First thin-film transistor; T2, Second thin-film transistor; T3, Third thin-film transistor; T4, Fourth thin-film transistor; T5, Fifth thin-film transistor; T6, Sixth thin-film transistor; T7, Seventh thin-film transistor; C1, First capacitor; C2, Second capacitor; OLED, Light-emitting diode; Vdata, Data signal; EM, Light emission signal; V1, First voltage signal; V2, Second voltage signal; V3, Third voltage signal; Gate, Row scan signal; OP, Operational amplifier; R1, First resistor; R2, Second resistor; R3, Third resistor; R4, Fourth resistor; R5, Fifth resistor; Q1, MOSFET; Q2, First transistor; Q3, Second transistor. Detailed Implementation

[0051] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0052] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0053] Example 1

[0054] The first aspect of this application provides a driving circuit 100 for a display panel. The driving circuit 100 is connected to the display panel 200 and outputs control signals, voltage signals, etc. required for the display panel 200 to emit light.

[0055] like Figure 1 and Figure 2 As shown, the display panel 200 includes an array of pixel circuits 210. The pixel circuit 210 includes a light-emitting element 212 and a pixel driving circuit 211 connected to each other. The pixel driving circuit 211 is used to output a current signal to the light-emitting element 212. The light-emitting element 212 can be a corresponding light-emitting diode (OLED).

[0056] The pixel driving circuit 211 can be composed of multiple thin-film transistors and capacitors; the number of thin-film transistors and capacitors is unlimited, for example... Figure 3 As shown, the pixel driving circuit 211 includes seven thin-film transistors and a first capacitor C1, forming a 7T1C structure. The pixel driving circuit 211 includes at least three operating stages, namely, a reset stage, a compensation stage, and a light-emitting stage. Figure 3 For example, during the reset phase, Gn-1 is at a low level, the fourth thin-film transistor T4 and the seventh thin-film transistor T7 are turned on, Gn and the light emission signal EM are at a high level, the first thin-film transistor T1, the second thin-film transistor T2, the fifth thin-film transistor T5 and the sixth thin-film transistor T6 are turned off, the reset voltage Vint is charged to point N1 and the anode of the light-emitting diode OLED, the light-emitting diode OLED is turned off, and the N1 node is reset.

[0057] During the compensation phase, Gn is at a low level, the second thin-film transistor T2 and the fifth thin-film transistor T5 are turned on, Gn-1 and the light emission signal EM are at a low level, the data signal Vdata is charged to node N1, and the critical condition for the third thin-film transistor T3 to turn off is Vgs=Vn1-Vdata=Vth, Vn1=Vdata+Vth.

[0058] During the light emission stage: When the light emission signal EM is low, the first thin-film transistor T1 and the sixth thin-film transistor T6 are turned on, Gn-1 and Gn are low, and the second thin-film transistor T2, the fourth thin-film transistor T4, the fifth thin-film transistor T5 and the seventh thin-film transistor T7 are turned off. At this time, ELVDD is output to the light-emitting diode OLED, and the light-emitting diode OLED emits light.

[0059] The light emission signal EM has corresponding level signals in the compensation stage and the light emission stage. Based on different pixel driving circuits 211, the light emission signal EM can be high level in the compensation stage and low level in the light emission stage, or low level in the compensation stage and high level in the light emission stage.

[0060] by Figure 3 For example, during the light-emitting stage, the current of an OLED is 1 / 2unCox (W / L) (Vdata - ELVDD). 2 ;

[0061] The luminous brightness of the light-emitting element 212 is related to two factors: 1. The magnitude of the current passing through the light-emitting element 212, which is related to the magnitude of the voltage of the data signal Vdata; 2. The luminous duration. When switching to the luminous stage, the light emission signal EM switches the level state, and the light-emitting element 212 turns on to emit light. The luminous duration is positively correlated with the duration of the level after the light emission signal EM switches.

[0062] To address the issues of complex structures and dimming methods in existing driver-based dimming systems, this embodiment, as follows: Figure 4 As shown, the driving circuit 100 for the display panel includes:

[0063] The data driving circuit 110 is connected to each pixel circuit 210 and is used to convert the received first voltage signal V1 into a data signal Vdata and output it to the pixel circuit 210 so as to write the corresponding node of the pixel driving circuit 211 during the compensation stage of the pixel circuit 210.

[0064] The timing controller 120 is connected to the data driving circuit 110 and is used to output the light emission signal EM to the pixel circuit 210 to trigger the pixel driving circuit 211 to drive the light-emitting element 212 to emit light during the light emission stage of the pixel circuit 210, and to convert the received second voltage signal V2 into a first voltage signal V1 and output it to the data driving circuit 110.

[0065] The signal conversion circuit 130, connected to the timing controller 120, is used to convert the optical emission signal EM into a second voltage signal V2.

[0066] In this embodiment, the display panel 200's pixel circuit 210 includes at least a reset stage, a compensation stage, and a light emission stage. During the compensation stage, the light emission signal EM output by the timing controller 120 is a first-level signal. This first-level signal is output to the matched thin-film transistor in the pixel driving circuit 211, for example... Figure 3 The sixth thin-film transistor T6 in the display panel 200 is switched off, and simultaneously, a first-level signal is output to the signal conversion circuit 130. The signal conversion circuit 130 performs voltage conversion and outputs a second voltage signal V2. The second voltage signal V2 is converted into a first voltage signal V1 by the timing controller 120. The first voltage signal V1 is processed and called by the data driving circuit 110, and then outputs a data signal Vdata to the pixel driving circuit 211 of the display panel 200, for example, output to... Figure 3 The second thin-film transistor T2 is shown, and the data signal Vdata is written to the corresponding node in the pixel driving circuit 211 via the corresponding thin-film transistor, for example, the data signal Vdata is charged to the N1 node.

[0067] During the light emission stage, the light emission signal EM output by the timing controller 120 is switched to a second-level signal. This second-level signal and the first-level signal are correlated level signals, meaning they are high and low level signals respectively. The second-level signal is output to the matched thin-film transistor in the pixel driving circuit 211, for example... Figure 3 The sixth thin-film transistor T6 in the pixel drive circuit is turned on, and the matching thin-film transistor is turned on. At the same time, due to the switching level of the corresponding row scan signal, the data signal Vdata stops being input to the corresponding node in the pixel drive circuit 211. At this time, ELVDD is output to the light-emitting diode OLED, and the light-emitting diode OLED emits light.

[0068] By converting the light emission signal EM output by the timing controller 120 into a corresponding voltage value during the compensation phase, and processing it into a data signal Vdata of the corresponding size by the timing controller 120 and the data driving circuit 110, and controlling the pixel driving circuit 211 to drive the light-emitting diode OLED to emit light during the light emission phase after the timing controller 120 switches the level state of the light emission signal EM, there is no need to set an additional power management integrated circuit to generate a fixed voltage. At the same time, during dimming, only the level state of the light emission signal EM needs to be changed to change the brightness of the light-emitting diode OLED and the display panel 200, thereby achieving a single brightness variable, saving the cost of the power management integrated circuit, and reducing the energy consumption of digital-to-analog conversion on the external circuit.

[0069] Furthermore, in order to match the line scan drive in the pixel driving circuit 211, in an optional embodiment, such as Figure 1 As shown, the driving circuit 100 of the display panel also includes:

[0070] The row scanning drive circuit 140 is connected to each pixel circuit 210 and is used to output row scanning signals to each pixel circuit 210 line by line according to the row scanning control signal, so as to turn on each row pixel circuit 210 line by line.

[0071] The timing controller 120 is also used for:

[0072] Output the row scan control signal Gate to the row scan drive circuit 140.

[0073] In this embodiment, the timing controller 120 outputs different row scanning control signals to the row scanning drive circuit 140 at different stages. The row scanning drive circuit 140 correspondingly changes the level state of the row scanning signals, for example, changing the level state of the (n-1)th row scanning signal Gn-1 and the nth row scanning signal Gn, thereby turning on the pixel circuit 210 of each row one by one, and driving the light-emitting diode OLED to emit light in combination with the data signal Vdata and the light emission signal EM.

[0074] by Figure 3 For example, during the reset phase, the (n-1)th row scan signal Gn-1 switches to a low level, the fourth thin-film transistor T4 and the seventh thin-film transistor T7 are turned on, the nth row scan signal Gn and the light emission signal EM are at a high level, the first thin-film transistor T1, the second thin-film transistor T2, the fifth thin-film transistor T5 and the sixth thin-film transistor T6 are turned off, the reset voltage Vint is charged to point N1 and the anode of the light-emitting diode OLED, the light-emitting diode OLED is turned off, and the N1 node is reset.

[0075] During the compensation phase, the nth row scan signal Gn switches to a low level, the second thin-film transistor T2 and the fifth thin-film transistor T5 turn on, the (n-1)th row scan signal Gn-1 and the light emission signal EM switch to a low level, and the data signal Vdata is charged to node N1.

[0076] During the light emission stage: When the light emission signal EM is low, the first thin-film transistor T1 and the sixth thin-film transistor T6 are turned on, the (n-1)th row scan signal Gn-1 and the nth row scan signal Gn are low, and the second thin-film transistor T2, the fourth thin-film transistor T4, the fifth thin-film transistor T5 and the seventh thin-film transistor T7 are turned off. At this time, ELVDD is output to the light-emitting diode OLED, and the light-emitting diode OLED emits light.

[0077] Example 2

[0078] Based on Embodiment 1, in this embodiment, the timing controller 120 is further configured to:

[0079] The amplitude of the light emission signal EM is adjusted during the compensation phase of the pixel circuit 210, and the output duration of the light emission signal EM is adjusted during the light emission phase, so as to adjust the light emission brightness and light emission duration of the light emission element 212.

[0080] In this embodiment, during dimming control, in the compensation phase, the timing controller 120 adjusts the amplitude of the output first-level signal. The first-level signal is output to the matched thin-film transistor in the pixel driving circuit 211, for example... Figure 3 The sixth thin-film transistor T6 in the display panel 200 is matched with the thin-film transistor and is turned off. At the same time, the first level signal is output to the signal conversion circuit 130. The signal conversion circuit 130 performs voltage conversion and outputs the second voltage signal V2. The second voltage signal V2 is converted into the first voltage signal V1 by the timing controller 120. The first voltage signal V1 is processed and called by the data driving circuit 110 and outputs the data signal Vdata to the corresponding node in the pixel driving circuit 211 of the display panel 200. When the amplitude of the first level signal changes, the voltage magnitudes of the converted second voltage signal V2, the first voltage signal V1 and the data signal Vdata change positively or negatively.

[0081] During the light emission stage, the light emission signal EM output by the timing controller 120 is switched to the second level signal. The timing controller 120 adjusts the duration of the second level signal, thereby changing the light emission duration of the light-emitting diode OLED. By simultaneously changing the amplitude of the first level signal and the duration of the second level signal, the brightness of the light-emitting diode OLED is changed together.

[0082] During dimming, the brightness of the OLED and display panel 200 can be changed simply by changing the level of the light emission signal EM, thus simplifying the adjustment of brightness variables and reducing the complexity of dimming.

[0083] Example 3

[0084] Based on the level switching state of the optical emission signal EM, the signal conversion circuit 130 can employ a corresponding voltage conversion circuit, amplification circuit, etc. In an optional embodiment, during the compensation stage, the first level signal is high and the second level signal is low. Correspondingly, such as Figure 5 As shown, the signal conversion circuit 130 includes an operational amplifier OP, a first impedance circuit 131, a second impedance circuit 132, and a third impedance circuit 133.

[0085] The inverting input terminal of the operational amplifier OP is connected to the first terminal of the first impedance circuit 131 and the first terminal of the second impedance circuit 132. The non-inverting input terminal of the operational amplifier OP is connected to the first terminal of the third impedance circuit 133. The output terminal of the operational amplifier OP and the second terminal of the second impedance circuit 132 are connected together to form the output terminal of the signal conversion circuit 130.

[0086] The second terminal of the first impedance circuit 131 is grounded, and the second terminal of the third impedance circuit 133 is used to input the third voltage signal V3.

[0087] The first impedance circuit 131 and / or the second impedance circuit 132 are triggered by the light emission signal EM to output an impedance of a corresponding magnitude, so as to adjust the amplification factor of the signal conversion circuit 130 and the magnitude of the second voltage signal V2.

[0088] In this embodiment, the signal conversion circuit 130 is a positive proportional amplifier circuit with an amplification factor of K1 = (Rx1 + Rx2) / Rx1, where Rx1 is the output impedance of the first impedance circuit 131 and Rx2 is the output impedance of the second impedance circuit 132.

[0089] During dimming control, in the compensation phase, the timing controller 120 adjusts the amplitude of the output first-level signal. The high-level first-level signal is output to the matched thin-film transistor in the pixel driving circuit 211, for example... Figure 3 The sixth thin-film transistor T6 in the display panel 200 is turned off when the matched thin-film transistor is turned off. At the same time, the first level signal is output to the first impedance circuit 131 and / or the second impedance circuit 132. The output impedance of the first impedance circuit 131 and / or the second impedance circuit 132 changes accordingly. Correspondingly, the amplification factor K1 increases or decreases accordingly, and the output second voltage signal V2 increases or decreases accordingly. The second voltage signal V2 is converted into the first voltage signal V1 by the timing controller 120. The first voltage signal V1 is processed and called by the data driving circuit 110 and then output as a data signal Vdata to the corresponding node in the pixel driving circuit 211 of the display panel 200. When the amplitude of the first level signal changes, the voltage magnitudes of the converted second voltage signal V2, the first voltage signal V1, and the data signal Vdata change positively or negatively.

[0090] During the light-emitting stage, since the converted output data signal Vdata is not input to the corresponding node in the pixel driving circuit 211, the amplitude change of the second level signal does not affect the data signal Vdata. However, the duration of the second level signal affects the light-emitting duration. Therefore, the timing controller 120 changes the light-emitting duration of the OLED by adjusting the duration of the second level signal. By simultaneously changing the amplitude of the first level signal and the duration of the second level signal, the brightness of the OLED is changed.

[0091] In another alternative embodiment, during the compensation phase, the first level signal is low and the second level signal is high, correspondingly, as shown below. Figure 6 As shown, the signal conversion circuit 130 includes an operational amplifier OP, a first impedance circuit 131, a second impedance circuit 132, and a third impedance circuit 133.

[0092] The inverting input terminal of the operational amplifier OP is connected to the first terminal of the first impedance circuit 131 and the first terminal of the second impedance circuit 132. The non-inverting input terminal of the operational amplifier OP is connected to the first terminal of the third impedance circuit 133. The output terminal of the operational amplifier OP and the second terminal of the second impedance circuit 132 are connected together to form the output terminal of the signal conversion circuit 130.

[0093] The second terminal of the first impedance circuit 131 is used to input the third voltage signal V3, and the second terminal of the third impedance circuit 133 is grounded.

[0094] The first impedance circuit 131 and / or the second impedance circuit 132 are triggered by the light emission signal EM to output an impedance of a corresponding magnitude, so as to adjust the amplification factor of the signal conversion circuit 130 and the magnitude of the second voltage signal V2.

[0095] In this embodiment, the signal conversion circuit 130 is a positive proportional amplifier circuit with an amplification factor of K1 = -Rx2 / Rx1, where Rx1 is the output impedance of the first impedance circuit 131 and Rx2 is the output impedance of the second impedance circuit 132.

[0096] During dimming control, in the compensation phase, the timing controller 120 adjusts the amplitude of the output first-level signal, causing the first-level signal to change towards a negative voltage. The negative voltage first-level signal is output to the matched thin-film transistor in the pixel driving circuit 211. Simultaneously, the first-level signal is output to the first impedance circuit 131 and / or the second impedance circuit 132, causing the output impedance of the first impedance circuit 131 and / or the second impedance circuit 132 to change accordingly. Correspondingly, the amplification factor K1 increases or decreases, and the output second voltage signal V2 increases or decreases and becomes a negative voltage. The second voltage signal V2 is converted into a first voltage signal V1 by the timing controller 120. The negative voltage first voltage signal V1 is processed and called by the data driving circuit 110, and then outputs a data signal Vdata to the corresponding node in the pixel driving circuit 211 of the display panel 200. When the amplitude of the negative voltage first-level signal changes, the voltage magnitudes of the converted second voltage signal V2, the first voltage signal V1, and the data signal Vdata are all negative voltages, and they change with positive or negative correlation.

[0097] During the light-emitting stage, since the converted output data signal Vdata is not input to the corresponding node in the pixel driving circuit 211, the amplitude change of the high-level second-level signal does not affect the data signal Vdata. However, the duration of the high-level second-level signal affects the light-emitting duration. Therefore, the timing controller 120 changes the light-emitting duration of the light-emitting diode OLED by adjusting the duration of the high-level second-level signal. By simultaneously changing the amplitude of the first-level signal and the duration of the second-level signal, the brightness of the light-emitting diode OLED is changed.

[0098] In this embodiment, the output impedance of the third impedance circuit 133 does not affect the amplification factor. The output impedance of at least one of the first impedance circuit 131 and the second impedance circuit 132 follows the amplitude change of the first level signal of the light emission signal EM. In an optional embodiment, to simplify the dimming method, such as... Figure 7 or Figure 8 As shown, the first impedance circuit 131 includes a first resistor R1, and the third impedance circuit 133 includes a second resistor R2. That is, the output impedances of the first impedance circuit 131 and the third impedance circuit 133 are fixed values.

[0099] The second impedance circuit 132 includes an adjustable resistor circuit, which, when triggered by the light emission signal EM, outputs an impedance of a corresponding magnitude between the inverting input and output terminals of the operational amplifier OP.

[0100] During dimming control, in the compensation phase, the timing controller 120 adjusts the amplitude of the output first level signal. The first level signal is output to the matched thin-film transistor in the pixel driving circuit 211. At the same time, the first level signal is output to the second impedance circuit 132. The output impedance of the second impedance circuit 132 changes accordingly. Correspondingly, the amplification factor K1 increases or decreases, and the output second voltage signal V2 increases or decreases. The second voltage signal V2 is converted into a first voltage signal V1 by the timing controller 120. The first voltage signal V1 is processed and called by the data driving circuit 110 and output as a data signal Vdata to the corresponding node in the pixel driving circuit 211 of the display panel 200. When the amplitude of the first level signal changes, the voltage magnitudes of the converted second voltage signal V2, the first voltage signal V1, and the data signal Vdata change positively or negatively.

[0101] The second impedance circuit 132 can be selected from structures such as adjustable resistors and resistor arrays. In one optional embodiment, such as... Figure 7 or Figure 8 As shown, the adjustable resistor circuit includes a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a MOSFET Q1;

[0102] The first end of the third resistor R3 is connected to the inverting input of the operational amplifier OP. The second end of the third resistor R3, the drain of the MOSFET Q1, and the first end of the fifth resistor R5 are connected. The second end of the fifth resistor R5 is connected to the output of the operational amplifier OP. The gate of the MOSFET Q1 is used to receive the optical emission signal EM. The source of the MOSFET Q1 is connected to the first end of the fourth resistor R4. The second end of the fourth resistor R4 is grounded.

[0103] In this embodiment, as Figure 7 As shown, when the first level signal of the optical emission signal EM is high and the second level signal is low, MOS transistor Q1 is an NMOS transistor Q1. When the gate voltage of MOS transistor Q1 changes, the source-drain resistance of MOS transistor Q1 changes accordingly.

[0104] During dimming control, in the compensation phase, the timing controller 120 adjusts the amplitude of the output first-level signal. The first-level signal is output to the matched thin-film transistor in the pixel driving circuit 211. At the same time, the first-level signal is output to the second impedance circuit 132. The source-drain resistance of the MOS transistor Q1 changes positively, and the output impedance Rx2 of the second impedance circuit 132 changes negatively. Correspondingly, the amplification factor K1 changes negatively, and the output second voltage signal V2 changes negatively. The second voltage signal V2 is converted into a first voltage signal V1 by the timing controller 120. After the first voltage signal V1 is processed and called by the data driving circuit 110, the data signal Vdata is output to the corresponding node in the pixel driving circuit 211 of the display panel 200. When the amplitude of the first-level signal changes, the voltage magnitudes of the converted second voltage signal V2, the first voltage signal V1, and the data signal Vdata change negatively.

[0105] Or such as Figure 8 As shown, when the first level signal of the optical emission signal EM is low and the second level signal is high, MOS transistor Q1 is a PMOS transistor Q1. When the gate voltage of MOS transistor Q1 changes, the source-drain resistance of MOS transistor Q1 changes accordingly.

[0106] During dimming control, in the compensation phase, the timing controller 120 adjusts the amplitude of the output first-level signal. The first-level signal is output to the matched thin-film transistor in the pixel driving circuit 211. Simultaneously, the first-level signal is output to the second impedance circuit 132. The source-drain resistance of the MOS transistor Q1 changes positively, and the output impedance Rx2 of the second impedance circuit 132 changes negatively. Correspondingly, the amplification factor K1 changes negatively, and the output second voltage signal V2 changes positively. The second voltage signal V2 is converted into a first voltage signal V1 by the timing controller 120. After the first voltage signal V1 is processed and called by the data driving circuit 110, the data signal Vdata is output to the corresponding node in the pixel driving circuit 211 of the display panel 200. When the amplitude of the first-level signal changes, the voltage magnitudes of the converted second voltage signal V2, the first voltage signal V1, and the data signal Vdata change positively.

[0107] Example 4

[0108] To ensure that the output optical emission signal EM reaches the on / off requirements of the MOSFET Q1, thereby outputting a source-drain resistor of a corresponding value, in an optional embodiment, such as... Figure 9 and Figure 10 As shown, in an optional embodiment, the signal conversion circuit 130 further includes:

[0109] The signal amplification circuit 134 is connected to the timing controller 120. The signal amplification circuit 134 is used to amplify the optical emission signal EM and output the amplified optical emission signal EM.

[0110] The filter circuit 135 is connected to the signal amplifier circuit 134 and the adjustable resistor circuit. It is used to filter the amplified optical emission signal EM and output the filtered optical emission signal EM to the adjustable resistor circuit.

[0111] In this embodiment, the optical emission signal EM is amplified by the signal amplification circuit 134, and then the amplified optical emission signal EM is processed by the filter circuit 135 and output to the MOS transistor Q1. This controls the switching of the MOS transistor Q1 and changes its drain-source resistance value. By changing the resistance value of the MOS transistor Q1, the automatic amplification factor switching is achieved.

[0112] The signal amplification circuit 134 can be a signal amplifier, a transistor amplifier circuit, etc., and the filter circuit 135 can be a filter capacitor, etc. In an optional embodiment, such as Figure 11 and Figure 12 As shown, in an optional embodiment, the signal amplification circuit 134 includes a first transistor Q2 and a second transistor Q3;

[0113] The collector of the first transistor Q2 is used to input the fourth voltage signal. The base of the first transistor Q2 and the base of the second transistor Q3 are connected together and used to receive the optical emission signal EM. The emitter of the first transistor Q2 and the emitter of the second transistor Q3 are connected together to form the signal output terminal of the signal amplifier circuit 134. The collector of the second transistor Q3 is used to input the fifth voltage signal.

[0114] Optionally, the filter circuit 135 includes a sixth resistor R6 and a second capacitor C2;

[0115] The first end of the sixth resistor R6 and the first end of the second capacitor C2 are connected together to form the signal input terminal of the filter circuit 135. The second end of the sixth resistor R6 forms the output terminal of the filter circuit 135, and the second end of the second capacitor C2 is grounded.

[0116] In this embodiment, when the first level signal of the optical emission signal EM is high and the second level signal is low, such as Figure 11 As shown, the fourth voltage signal is a high voltage, the fifth voltage signal is a low voltage, and the collector of the second transistor Q3 can be grounded. During the compensation stage, the first level signal triggers the first transistor Q2 to conduct. The first transistor Q2 amplifies the first level signal and outputs a first level signal with a larger amplitude to the filter circuit 135. The fifth resistor R5 and the second capacitor C2 form a first-order low-pass filter, which performs low-pass filtering on the amplified first level signal and outputs the filtered first level signal to the MOSFET Q1, thereby controlling the on / off state of the MOSFET Q1 and changing its drain-source resistance value. By changing the resistance value of the MOSFET Q1, the automatic amplification factor switching is achieved.

[0117] When the first level signal of the optical emission signal EM is low and the second level signal is high, such as Figure 12 As shown, the fourth voltage signal is a low voltage, and the collector of the first transistor Q2 can be grounded. The fifth voltage signal is a negative voltage. During the compensation stage, the first level signal triggers the second transistor Q3 to conduct. The second transistor Q3 amplifies the first level signal and outputs a first level signal with a larger negative voltage to the filter circuit 135. The fifth resistor R5 and the second capacitor C2 form a first-order low-pass filter, which performs low-pass filtering on the amplified first level signal and outputs the filtered first level signal to the MOSFET Q1, thereby controlling the on / off state of the MOSFET Q1 and changing its drain-source resistance value. By changing the resistance value of the MOSFET Q1, the automatic amplification factor switching is achieved.

[0118] The beneficial effects of this application embodiment compared with the prior art are as follows: The above-mentioned display panel driving circuit 100 includes a data driving circuit 110, a timing controller 120 and a signal conversion circuit 130. In the compensation stage of the pixel circuit 210, the signal conversion circuit 130 converts the light emission signal EM into a second voltage signal V2. The second voltage signal V2 is converted into a data signal Vdata by the timing controller 120 and the data driving circuit 110 and output to the corresponding node of the pixel circuit 210. In the light emission stage of the pixel circuit 210, the timing controller 120 outputs the light emission signal EM to the pixel circuit 210 and triggers the pixel driving circuit 211 to drive the light-emitting element 212 to emit light. In the driving circuit of the display panel 200, the timing controller 120 outputs a single light emission signal EM, which does not require the setting of an external integrated management circuit, simplifying the structure of the display panel driving circuit 100. Furthermore, during dimming, only the light emission signal EM needs to be adjusted to complete the adjustment of the magnitude of the data signal Vdata and the light emission duration of the light emission stage, thereby adjusting the brightness of the light-emitting element 212, simplifying the dimming method.

[0119] Example 5

[0120] This application also proposes a display device, such as Figure 4 As shown, the display device includes a display panel 200 and a driving circuit 100 for the display panel. The specific structure of the driving circuit 100 for the display panel is as described in the above embodiments. Since this display device adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be described in detail here. The display panel 200 is connected to the driving circuit 100 for the display panel.

[0121] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A driving circuit for a display panel, the display panel comprising an array of pixel circuits, each pixel circuit including a light-emitting element and a pixel driving circuit connected to each other, the light-emitting process of the pixel circuit including at least a reset stage, a compensation stage, and a light-emitting stage, characterized in that, The driving circuit of the display panel includes: A data driving circuit, connected to each of the pixel circuits, is used to convert the received first voltage signal into a data signal and output it to the pixel circuit during the compensation phase, so as to write the corresponding node of the pixel driving circuit during the compensation phase of the pixel circuit, and to stop inputting the data signal to the pixel driving circuit during the light emission phase. A timing controller, connected to the data driving circuit, is used to output a light emission signal of a first level to the pixel circuit during the compensation phase, and to output a light emission signal of a second level to the pixel circuit during the light emission phase, so as to trigger the pixel driving circuit to drive the light-emitting element to emit light during the light emission phase of the pixel circuit, and to convert the received second voltage signal into the first voltage signal and output it to the data driving circuit during the compensation phase. A signal conversion circuit, connected to the timing controller, is used to convert the optical emission signal of the first level signal into the second voltage signal during the compensation phase, wherein the first level signal and the second level signal are high and low level signals to each other.

2. The driving circuit for the display panel as described in claim 1, characterized in that, The driving circuit of the display panel also includes: A row scanning drive circuit, connected to each of the pixel circuits, is used to output row scanning signals to each of the pixel circuits line by line according to the row scanning control signal, so as to turn on each row of the pixel circuits line by line. The timing controller is also used for: The row scan control signal is output to the row scan drive circuit.

3. The driving circuit for the display panel as described in claim 1, characterized in that, The timing controller is further configured to: The amplitude of the light emission signal is adjusted during the compensation phase of the pixel circuit, and the output duration of the light emission signal is adjusted during the light emission phase, so as to adjust the light emission brightness and light emission duration of the light-emitting element.

4. The driving circuit for the display panel as described in claim 3, characterized in that, The signal conversion circuit includes an operational amplifier, a first impedance circuit, a second impedance circuit, and a third impedance circuit; The inverting input terminal of the operational amplifier, the first terminal of the first impedance circuit, and the first terminal of the second impedance circuit are connected. The non-inverting input terminal of the operational amplifier is connected to the first terminal of the third impedance circuit. The output terminal of the operational amplifier and the second terminal of the second impedance circuit are connected together to form the output terminal of the signal conversion circuit. The second terminal of the first impedance circuit is grounded, and the second terminal of the third impedance circuit is used to input the third voltage signal; or, the second terminal of the first impedance circuit is used to input the third voltage signal, and the second terminal of the third impedance circuit is grounded. The first impedance circuit and / or the second impedance circuit are triggered by the light emission signal to output an impedance of a corresponding magnitude, so as to adjust the amplification factor of the signal conversion circuit and the magnitude of the second voltage signal.

5. The driving circuit for the display panel as described in claim 4, characterized in that, The first impedance circuit includes a first resistor, and the third impedance circuit includes a second resistor; The second impedance circuit includes an adjustable resistor circuit, which, when triggered by the optical emission signal, outputs an impedance of a corresponding magnitude between the inverting input and output of the operational amplifier.

6. The driving circuit for the display panel as described in claim 5, characterized in that, The adjustable resistor circuit includes a third resistor, a fourth resistor, a fifth resistor, and a MOSFET; The first end of the third resistor is connected to the inverting input of the operational amplifier. The second end of the third resistor, the drain of the MOS transistor, and the first end of the fifth resistor are connected. The second end of the fifth resistor is connected to the output of the operational amplifier. The gate of the MOS transistor is used to receive the optical emission signal. The source of the MOS transistor is connected to the first end of the fourth resistor. The second end of the fourth resistor is grounded.

7. The driving circuit for the display panel as described in claim 5, characterized in that, The signal conversion circuit further includes: A signal amplification circuit is connected to the timing controller. The signal amplification circuit is used to amplify the optical emission signal and output the amplified optical emission signal. A filtering circuit, connected to the signal amplification circuit and the adjustable resistor circuit, is used to filter the amplified optical emission signal and output the filtered optical emission signal to the adjustable resistor circuit.

8. The driving circuit for the display panel as described in claim 7, characterized in that, The signal amplification circuit includes a first transistor and a second transistor; The collector of the first transistor is used to input a fourth voltage signal. The bases of the first transistor and the second transistor are connected together and used to receive the light emission signal. The emitters of the first transistor and the second transistor are connected together to form the signal output terminal of the signal amplification circuit. The collector of the second transistor is used to input a fifth voltage signal.

9. The driving circuit for the display panel as described in claim 7, characterized in that, The filter circuit includes a sixth resistor and a second capacitor; The first end of the sixth resistor and the first end of the second capacitor are connected together to form the signal input terminal of the filter circuit, the second end of the sixth resistor forms the output terminal of the filter circuit, and the second end of the second capacitor is grounded.

10. A display device, characterized in that, It includes a display panel and a driving circuit for the display panel as described in any one of claims 1 to 9, wherein the display panel is connected to the driving circuit of the display panel.

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