Embedded Ceramic Microfilter Based on Multilayer Films

Through multi-layer film structure and cross-coupling technology, the microstrip line resonator is improved, which solves the problem of large volume of high-frequency filters in ceramic modules, realizes miniaturization and efficient signal transmission, and reduces processing costs and process difficulty.

CN119108778BActive Publication Date: 2025-07-22石家庄烽瓷电子技术有限公司
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Patent Information

Application Number
CN202411402119.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-09
Publication Date
2025-07-22
Estimated Expiration
2044-10-09

AI Technical Summary

Technical Problem

The high-frequency filters in existing ceramic modules are large in size and cannot be miniaturized.

Method used

The multi-layer thin film structure design is adopted, including a single-layer DPC ceramic dielectric layer and a four-layer PI film dielectric layer. Combined with the principle of 1/4 wavelength step impedance resonator and cross-coupling technology, the microstrip linear resonator is improved as a strip linear resonator, and tap feed is used instead of gold wire bonding.

Benefits of technology

The filter is miniaturized, which reduces processing costs and process difficulty, improves signal transmission efficiency, and can be directly connected to other substrates, which has high flexibility.

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Abstract

The present invention discloses an embedded ceramic microfilter based on a multi-layer thin film, which includes a resonator. The resonator includes a multi-layer dielectric structure and a metal structure, and two taps are respectively connected to both ends of the resonator through microstrip lines. The 1 / 4 wavelength stepped impedance resonator principle is adopted to miniaturize the filter resonator, cross-coupling is introduced, the 1 / 4 wavelength short-circuit microstrip line filter is improved, the microstrip line resonator is improved into a strip line resonator, the grounding distance becomes larger, and the planar size of the resonator can be indirectly reduced, making it further miniaturized. Compared with the filter chip, tap feeding replaces wire bonding, reducing the process difficulty and processing cost, and improving the signal transmission efficiency. The design and production cycle of this filter is short, and the module can be directly connected to other substrates for use, with high flexibility.
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Description

Technical Field

[0001] The present invention relates to the technical field of filters, and in particular to an embedded ceramic micro-filter based on multi-layer thin films. Background Art

[0002] The ceramic DPC (Dielectric Polymer Composite) thin film process is an advanced technology that combines the advantages of ceramic materials and polymer materials, and is used to prepare system modules that require low dielectric constant and good mechanical properties. The low dielectric constant, due to the low dielectric constant of the dielectric PI, can effectively enhance the uniform distribution of the electric field and reduce the phenomenon of excessive local electric field concentration, thereby improving the stability of the thin film under high voltage. The ceramic material itself has good thermal stability, while the polymer provides a certain thermal buffering effect in the composite material, enabling the DPC thin film to still maintain excellent electrical and mechanical properties at higher temperatures. Its advantages of high reliability and compact design are often used in the design of modules such as antennas, radio frequencies, and passive devices.

[0003] RF microwave components and modules that can be designed and produced based on the ceramic DPC thin film technology include filters, power dividers, antennas, couplers, receive front-end modules, etc. When used for multi-layer integrated design, they have many advantages in terms of wiring line width and line spacing, low-impedance metallization, diversity of design changes, and high-frequency performance.

[0004] With the continuous development of modern electronic devices towards miniaturization and high-frequency, the application of miniaturized electronic devices has become a future trend. In the field of radio frequency communication, as the functions of communication products become more and more, the available spectrum resources are particularly important. At this time, various frequency band filters are needed to separate different signals. Therefore, designing broadband miniaturized filter modules in the high-frequency band has certain practical significance.

[0005] Currently, most of the high-frequency filters used in ceramic modules use chips to achieve the band-pass filtering function, resulting in a relatively large volume of the filter and being unable to achieve miniaturization. Summary of the Invention

[0006] The technical problem to be solved by the present invention is how to provide an embedded ceramic micro-filter based on multi-layer thin films with simple manufacturing process, high signal transmission efficiency, and small volume.

[0007] To solve the above technical problem, the technical solution adopted by the present invention is: an embedded ceramic micro-filter based on multi-layer thin films, including two taps and a resonator. The resonator includes a multi-layer dielectric structure and a metal structure. The two taps are respectively connected to the corresponding microstrip lines on the resonator, so that the taps and the resonator are combined together to form the filter.

[0008] A further technical solution lies in that: the multi-layer dielectric structure includes a first PI dielectric layer at the bottommost layer, a layer of DPC ceramic dielectric layer is formed on the upper side of the first PI dielectric layer, a second PI dielectric layer, a third PI dielectric layer and a fourth PI dielectric layer are sequentially arranged on the upper surface of the DPC ceramic dielectric layer from bottom to top, the lower surface of the first PI dielectric layer is covered by a metal layer, a first rectangular ring metal layer is formed between the first PI dielectric layer and the DPC ceramic dielectric layer, a second rectangular ring metal layer is formed between the second PI dielectric layer and the DPC ceramic dielectric layer, the first rectangular ring metal layer and the second rectangular ring metal layer are arranged overlappingly in the vertical direction, rectangular metal layers are respectively formed on the left and right sides between the second PI dielectric layer and the third PI dielectric layer, rectangular metal layers are respectively formed on the left and right sides between the third PI dielectric layer and the fourth PI dielectric layer, rectangular metal layers are respectively formed on the left and right sides of the upper surface of the fourth PI dielectric layer, and the rectangular metal layers are arranged overlappingly with the left and right sides of the second rectangular ring metal layer in the vertical direction.

[0009] A further technical solution lies in that: the left end of the first microstrip line is connected to the first resonant metal line through a first signal metallization via hole, the first resonant metal line is located on the upper surface of the first PI dielectric layer enclosed by the first rectangular ring metal layer, and the right end of the first microstrip line is connected to the metal layer at the bottom layer of the first PI dielectric layer through a second signal metallization via hole;

[0010] The right end of the second microstrip line is connected to the second resonant metal line through a third signal metallization via hole, the second resonant metal line is located on the upper surface of the first PI dielectric layer enclosed by the first rectangular ring metal layer, and the left end of the second microstrip line is connected to the metal layer at the bottom layer of the first PI dielectric layer through a fourth signal metallization via hole;

[0011] The right end of the third microstrip line is connected to the third resonant metal line through a fifth signal metallization via hole, the third resonant metal line is located on the upper surface of the first PI dielectric layer enclosed by the first rectangular ring metal layer, and the left end of the third microstrip line is connected to the metal layer at the bottom layer of the first PI dielectric layer through a sixth signal metallization via hole;

[0012] The left end of the fourth microstrip line is connected to the fourth resonant metal line through a seventh signal metallization via hole, the fourth resonant metal line is located on the upper surface of the first PI dielectric layer enclosed by the first rectangular ring metal layer, and the right end of the fourth microstrip line is connected to the metal layer at the bottom layer of the first PI dielectric layer through an eighth signal metallization via hole;

[0013] The left end of the fifth microstrip line is connected to the fifth resonant metal line through the ninth signal metallized via. The fifth resonant metal line is located on the upper surface of the first PI dielectric layer enclosed by the first rectangular ring metal layer. The right end of the fifth microstrip line is connected to the metal layer at the bottom of the first PI dielectric layer through the tenth signal metallized via.

[0014] The right end of the sixth microstrip line is connected to the sixth resonant metal line through the eleventh signal metallized via. The sixth resonant metal line is located on the upper surface of the first PI dielectric layer enclosed by the first rectangular ring metal layer. The left end of the sixth microstrip line is connected to the metal layer at the bottom of the first PI dielectric layer through the twelfth signal metallized via.

[0015] The beneficial effects of adopting the above technical solution are as follows: The filter includes a multi-layer dielectric structure and a metal structure. The multi-layer dielectric structure includes a single-layer DPC ceramic dielectric layer and four layers of PI thin film dielectric layers. The 1 / 4 wavelength stepped impedance resonator principle is used to miniaturize the filter resonator. Cross-coupling is introduced to improve the 1 / 4 wavelength short-circuit microstrip line filter. The microstrip line resonator is improved into a stripline resonator, and the grounding distance becomes larger, which can indirectly reduce the planar size of the resonator and make it further miniaturized. Compared with the filter chip, tap feeding replaces wire bonding, which reduces the process difficulty and processing cost, and improves the signal transmission efficiency. The design and production cycle of this filter is short, and the module can be directly connected to other substrates for use, with high flexibility. Description of the Drawings

[0016] The present invention will be further described in detail below with reference to the drawings and specific embodiments.

[0017] Figure 1 is a schematic structural diagram of the filter according to the embodiment of the present invention;

[0018] Figure 2 is a schematic structural diagram of the filter according to the embodiment of the present invention after removing the DPC ceramic dielectric layer;

[0019] Figure 3 is a schematic structural diagram of the filter according to the embodiment of the present invention after removing the DPC ceramic dielectric layer;

[0020] Figures 4-5 is a schematic structural diagram of the filter according to the embodiment of the present invention after removing the DPC ceramic dielectric layer and the second to fourth PI dielectric layers;

[0021] Figure 6 is a top view structural diagram of the filter according to the embodiment of the present invention after removing the DPC ceramic dielectric layer and the second to fourth PI dielectric layers;

[0022] Figure 7It is the schematic diagram of a 1 / 4 wavelength stepped impedance resonator;

[0023] Figure 8 It is the schematic diagram of the filter simulation result in the embodiment of the present invention;

[0024] Wherein: 1. The first PI dielectric layer; 2. The DPC ceramic dielectric layer; 3. The second PI dielectric layer; 4. The third PI dielectric layer; 5. The fourth PI dielectric layer; 6. The first rectangular ring metal layer; 7. The second rectangular ring metal layer; 8. The ground metallization hole; 9. The first microstrip line; 10. The sixth microstrip line; 11. The first tap; 12. The second tap; 13. The first signal metallization through hole; 14. The first resonant metal wire; 15. The second signal metallization through hole; 16. The second microstrip line; 17. The third signal metallization through hole; 18. The second resonant metal wire; 19. The fourth signal metallization through hole; 20. The third microstrip line; 21. The fifth signal metallization through hole; 22. The third resonant metal wire; 23. The sixth signal metallization through hole; 24. The fourth microstrip line; 25. The seventh signal metallization through hole; 26. The fourth resonant metal wire; 27. The eighth signal metallization through hole; 28. The fifth microstrip line; 29. The ninth signal metallization through hole; 30. The fifth resonant metal wire; 31. The tenth signal metallization through hole; 32. The eleventh signal metallization through hole; 33. The sixth resonant metal wire; 34. The twelfth signal metallization through hole; 35. The metallization hole interlayer pad. Detailed implementation manners

[0025] Next, with reference to the accompanying drawings in the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0026] In the following description, many specific details are set forth in order to fully understand the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed below.

[0027] As Figures 1-6 shown, the embodiment of the present invention discloses an embedded ceramic microfilter based on a multi-layer thin film, including two taps and a resonator. The resonator includes a multi-layer dielectric structure and a metal structure. The two taps are respectively connected to the corresponding microstrip lines on the resonator, so that the taps and the resonator are combined together to form the filter.

[0028] Furthermore, as Figures 1-3As shown in the figure, the multi-layer dielectric structure includes a first PI dielectric layer 1 located at the bottom layer. A layer of DPC ceramic dielectric layer 2 is formed on the upper side of the first PI dielectric layer 1. On the upper surface of the DPC ceramic dielectric layer 2, a second PI dielectric layer 3, a third PI dielectric layer 4, and a fourth PI dielectric layer 5 are sequentially formed from bottom to top. The lower surface of the first PI dielectric layer 1 is covered by a metal layer. A first rectangular ring metal layer 6 is formed between the first PI dielectric layer 1 and the DPC ceramic dielectric layer 2. A second rectangular ring metal layer 7 is formed between the second PI dielectric layer 3 and the DPC ceramic dielectric layer 2. The first rectangular ring metal layer 6 and the second rectangular ring metal layer 7 are overlapped vertically. On the left and right sides between the second PI dielectric layer 3 and the third PI dielectric layer 4, a layer of rectangular metal layer is respectively formed. On the left and right sides between the third PI dielectric layer 4 and the fourth PI dielectric layer 5, a layer of rectangular metal layer is respectively formed. On the left and right sides of the upper surface of the fourth PI dielectric layer 5, a layer of rectangular metal layer is respectively formed. The rectangular metal layer overlaps with the left and right parts of the second rectangular ring metal layer 7 vertically. The part enclosed by the first rectangular ring metal layer 6 in the vertical direction constitutes the installation space of the metal structure in the resonator.

[0029] Further, as Figures 4-5 shown, the multi-layer dielectric structure further includes a plurality of ground metallization holes 8. The ground metallization holes 8 are arranged vertically and penetrate through the first rectangular ring metal layer 6 and the second rectangular ring metal layer 7 and are in contact with the metal layer at the bottom layer of the first PI dielectric layer 1 and the rectangular metal layers on the left and right sides of the upper surface of the fourth PI dielectric layer 5. By arranging the ground metallization holes 8 around the device, the stability of the filter signal transmission can be effectively improved.

[0030] Further, as Figure 1 、 Figures 3-6 shown, the metal structure includes a first microstrip line 9 to a sixth microstrip line 10 on the upper surface of the fourth PI dielectric layer 5 located in the installation space. The first microstrip line 9 to the sixth microstrip line 10 are arranged along the left and right directions of the filter and do not contact each other. One end of the first tap 11 is connected to the middle of the first microstrip line 9. One end of the second tap 12 is connected to the middle of the sixth microstrip line 10. Further, the first tap 11 and the second tap 12 include a first rectangular portion and a second rectangular portion. The second rectangular portion is connected to the first microstrip line 9 and the sixth microstrip line 10. The width of the first rectangular portion is greater than the width of the second rectangular portion.

[0031] Further, as Figures 3-6As shown, the left end of the first microstrip line 9 is connected to the first resonant metal line 14 through the first signal metallized via 13. The first resonant metal line 14 is located on the upper surface of the first PI dielectric layer 1 enclosed by the first rectangular ring metal layer 6 (viewed from the vertical direction). The right end of the first microstrip line 9 is connected to the metal layer at the bottom of the first PI dielectric layer 1 through the second signal metallized via 15;

[0032] The right end of the second microstrip line 16 is connected to the second resonant metal line 18 through the third signal metallized via 17. The second resonant metal line 18 is located on the upper surface of the first PI dielectric layer 1 enclosed by the first rectangular ring metal layer 6 (viewed from the vertical direction). The left end of the second microstrip line 16 is connected to the metal layer at the bottom of the first PI dielectric layer 1 through the fourth signal metallized via 19;

[0033] The right end of the third microstrip line 20 is connected to the third resonant metal line 22 through the fifth signal metallized via 21. The third resonant metal line 22 is located on the upper surface of the first PI dielectric layer 1 enclosed by the first rectangular ring metal layer 6 (viewed from the vertical direction). The left end of the third microstrip line 20 is connected to the metal layer at the bottom of the first PI dielectric layer 1 through the sixth signal metallized via 23;

[0034] The left end of the fourth microstrip line 24 is connected to the fourth resonant metal line 26 through the seventh signal metallized via 25. The fourth resonant metal line 26 is located on the upper surface of the first PI dielectric layer 1 enclosed by the first rectangular ring metal layer 6 (viewed from the vertical direction). The right end of the fourth microstrip line 24 is connected to the metal layer at the bottom of the first PI dielectric layer 1 through the eighth signal metallized via 27;

[0035] The left end of the fifth microstrip line 28 is connected to the fifth resonant metal line 30 through the ninth signal metallized via 29. The fifth resonant metal line 30 is located on the upper surface of the first PI dielectric layer 1 enclosed by the first rectangular ring metal layer 6 (viewed from the vertical direction). The right end of the fifth microstrip line 28 is connected to the metal layer at the bottom of the first PI dielectric layer 1 through the tenth signal metallized via 31;

[0036] The right end of the sixth microstrip line 10 is connected to the sixth resonant metal line 33 through the eleventh signal metallized via 32. The sixth resonant metal line 33 is located on the upper surface of the first PI dielectric layer 1 enclosed by the first rectangular ring metal layer 6 (viewed from the vertical direction). The left end of the sixth microstrip line 10 is connected to the metal layer at the bottom of the first PI dielectric layer 1 through the twelfth signal metallized via 34.

[0037] The first resonant metal wire 14 and the fourth resonant metal wire 26 are oppositely arranged, and the fourth resonant metal wire 26 and the fifth resonant metal wire 30 are oppositely arranged; the second resonant metal wire 18 and the third resonant metal wire 22 are oppositely arranged, and the third resonant metal wire 22 and the sixth resonant metal wire 33 are oppositely arranged.

[0038] Further, as Figures 3-5 shown, metallized via hole interlayer pads 35 are formed at the portions where the upper ends of the first signal metallized via hole 13 to the twelfth signal metallized via hole 34 are in contact with the second PI dielectric layer 3, the third PI dielectric layer 4, and the fourth PI dielectric layer 5.

[0039] Working principle: After being fed by the first tap 11, the signal is transmitted to the first microstrip line 9. The first microstrip line 9 transmits the signal to the first resonant metal wire 14 via the first signal metallized via hole 13. The first resonant metal wire 14 couples the signal to another resonant metal wire in a coupling manner, and the signal is coupled and propagated in sequence to achieve cross-coupling, introducing a transmission zero on one side of the high-frequency stopband to improve the high-frequency stopband response. After the resonator undergoes cross-coupling, finally, the signal is transmitted out by the second tap 12.

[0040] Compared with the filter chip, in the case of similar frequency bands, the filter of the present application has better performance and great progress in miniaturization, with a smaller size. The specific comparison is shown in Table 1:

[0041] Table 1 - Device comparison table

[0042]

[0043]

[0044] The present application adopts the 1 / 4 wavelength stepped impedance resonator principle to miniaturize the filter resonator, introduces cross-coupling, introduces a transmission zero on one side of the high-frequency stopband to improve the high-frequency stopband response. By improving the 1 / 4 wavelength short-circuited microstrip line filter, the microstrip line resonator is improved into a stripline resonator. The advantage is that the grounding distance becomes larger, which can indirectly reduce the planar size of the resonator and make it further miniaturized.

[0045] The schematic diagram of the 1 / 4 wavelength stepped impedance resonator is as Figure 7 shown. It is composed of two transmission lines with different impedance characteristics Z1 and Z2. L1 and L2 respectively represent the electrical lengths of the two segments. Ignoring the discontinuity of the transmission line, the input admittance at the open end is expressed as:

[0046]

[0047] In the formula, Y1 = 1 / Z1, Y2 = 1 / Z2. From the resonance condition of the resonator, let Yi = 0, and by solving, we get:

[0048] tanL1·tan L2 = R z (2)

[0049] In the formula, R Z = Y1 / Y2 = Z2 / Z1. The total length of the resonator can be expressed as:

[0050] L t = L1 + L2 (3)

[0051] For the external quality factor, the specific expression is:

[0052]

[0053] For the coupling coefficient, the specific expression is:

[0054]

[0055] Design a sixth-order 1 / 4-wavelength short-circuited Chebyshev band-pass filter with a center frequency of 11.3 GHz and a relative bandwidth (FBW) of 21%. According to formulas (1), (2), and (3), initially calculate the size of the resonator. Look up the g values of the low-pass prototype in Table 1 and substitute them into formulas (4) and (5) to calculate Q e1 = Q e6 = 4.82, M 1,2 = M 5,6 = 0.174, M 2,3 = M 4,5 = 0.126, M 3,4 = 0.174, and the tap position and the spacing between the resonators can be obtained.

[0056] Table 2 In-band ripple: 0.04321 dB

[0057]

[0058] In this application, when the electrical length of the 1 / 4 wavelength is fixed, by extending the distance of the grounding holes in three-dimensional directions, the size of the resonator is reduced, making the size of the resonator plane smaller, thus achieving miniaturization. The length of the designed filter can be 2 mm, the width can be 1.85 mm, and the height can be 0.3 mm.

[0059] Figure 8 This is the simulation result of the filter of this application. It can be seen that the return loss in the passband is better than that of the same type of filter chip, the center insertion loss is less than that of the same type of filter chip, and there is a slight disadvantage in out-of-band rejection.

[0060] The filter described in this application proposes to extend the distance of the grounding holes in three-dimensional directions for the 1 / 4 short-circuit wavelength transmission line, reduce the planar size of the resonator, and further miniaturize it. Compared with filter chips of the same performance, it has a smaller size. Compared with the bare core, it does not require wire bonding, cavity digging, or buried cavity placement, and is simpler to use in terms of process and lower in cost. By adopting the tap feeding method, the signal transmission efficiency is better than that of wire bonding of the chip, can be directly connected to other substrates for use, has high flexibility, and the time period for producing and designing this kind of filter is short.

Claims

1. An embedded ceramic micro-filter based on a multi-layer thin film, characterized in that: It includes two taps and a resonator. The resonator includes a multi-layer dielectric structure and a metal structure. The two taps are respectively connected to corresponding microstrip lines on the resonator, so that the taps and the resonator are combined together to form the filter; The multi-layer dielectric structure includes a first PI dielectric layer (1) located at the bottom layer. A layer of DPC ceramic dielectric layer (2) is formed on the upper side of the first PI dielectric layer (1). A second PI dielectric layer (3), a third PI dielectric layer (4) and a fourth PI dielectric layer (5) are sequentially formed on the upper surface of the DPC ceramic dielectric layer (2) from bottom to top. The lower surface of the first PI dielectric layer (1) is covered by a metal layer. A first rectangular ring metal layer (6) is formed between the first PI dielectric layer (1) and the DPC ceramic dielectric layer (2). A second rectangular ring metal layer (7) is formed between the second PI dielectric layer (3) and the DPC ceramic dielectric layer (2). The first rectangular ring metal layer (6) and the second rectangular ring metal layer (7) are overlapped in the vertical direction. Rectangular metal layers are respectively formed on the left and right sides between the second PI dielectric layer (3) and the third PI dielectric layer (4). Rectangular metal layers are respectively formed on the left and right sides between the third PI dielectric layer (4) and the fourth PI dielectric layer (5). Rectangular metal layers are respectively formed on the left and right sides of the upper surface of the fourth PI dielectric layer (5). The rectangular metal layers are overlapped with the left and right parts of the second rectangular ring metal layer (7) in the vertical direction.

2. The embedded ceramic microfilter based on a multi-layer thin film according to claim 1, wherein: The part enclosed by the first rectangular ring metal layer (6) in the vertical direction constitutes the installation space of the metal structure in the resonator.

3. The embedded ceramic microfilter based on a multi-layer thin film according to claim 1, wherein: The multi-layer dielectric structure further includes a plurality of grounded metallization holes (8). The grounded metallization holes (8) are vertically arranged and penetrate through the first rectangular ring metal layer (6), the second rectangular ring metal layer (7) and are in contact with the metal layer at the bottom of the first PI dielectric layer (1) and the rectangular metal layers on the left and right sides of the upper surface of the fourth PI dielectric layer (5).

4. The embedded ceramic microfilter based on a multi-layer thin film according to claim 2, wherein: The metal structure includes the first microstrip line (9) to the sixth microstrip line (10) on the upper surface of the fourth PI dielectric layer (5) located in the installation space. The first microstrip line (9) to the sixth microstrip line (10) extend horizontally and do not contact each other. One end of the first tap (11) is connected to the middle of the first microstrip line (9). One end of the second tap (12) is connected to the middle of the sixth microstrip line (10).

5. The embedded ceramic micro-filter based on a multi-layer thin film according to claim 4, wherein: The first tap (11) and the second tap (12) include a first rectangular portion and a second rectangular portion, and are connected to the first microstrip line (9) and the sixth microstrip line (10) through the second rectangular portion. The width of the first rectangular portion is greater than the width of the second rectangular portion.

6. The embedded ceramic microfilter based on a multilayer thin film according to claim 4, wherein: The left end of the first microstrip line (9) is connected to the first resonant metal line (14) through the first signal metallized via (13). The first resonant metal line (14) is located on the upper surface of the first PI dielectric layer (1) enclosed by the first rectangular ring metal layer (6). The right end of the first microstrip line (9) is connected to the metal layer at the bottom of the first PI dielectric layer (1) through the second signal metallized via (15). The right end of the second microstrip line (16) is connected to the second resonant metal line (18) through the third signal metallized via (17). The second resonant metal line (18) is located on the upper surface of the first PI dielectric layer (1) enclosed by the first rectangular ring metal layer (6). The left end of the second microstrip line (16) is connected to the metal layer at the bottom of the first PI dielectric layer (1) through the fourth signal metallized via (19). The right end of the third microstrip line (20) is connected to the third resonant metal line (22) through the fifth signal metallized via (21). The third resonant metal line (22) is located on the upper surface of the first PI dielectric layer (1) enclosed by the first rectangular ring metal layer (6). The left end of the third microstrip line (20) is connected to the metal layer at the bottom of the first PI dielectric layer (1) through the sixth signal metallized via (23). The left end of the fourth microstrip line (24) is connected to the fourth resonant metal line (26) through the seventh signal metallized via (25). The fourth resonant metal line (26) is located on the upper surface of the first PI dielectric layer (1) enclosed by the first rectangular ring metal layer (6). The right end of the fourth microstrip line (24) is connected to the metal layer at the bottom of the first PI dielectric layer (1) through the eighth signal metallized via (27). The left end of the fifth microstrip line (28) is connected to the fifth resonant metal line (30) through the ninth signal metallized via (29). The fifth resonant metal line (30) is located on the upper surface of the first PI dielectric layer (1) enclosed by the first rectangular ring metal layer (6). The right end of the fifth microstrip line (28) is connected to the metal layer at the bottom of the first PI dielectric layer (1) through the tenth signal metallized via (31). The right end of the sixth microstrip line (10) is connected to the sixth resonant metal line (33) through the eleventh signal metallized via (32). The sixth resonant metal line (33) is located on the upper surface of the first PI dielectric layer (1) enclosed by the first rectangular ring metal layer (6). The left end of the sixth microstrip line (10) is connected to the metal layer at the bottom of the first PI dielectric layer (1) through the twelfth signal metallized via (34).

7. The embedded ceramic microfilter based on a multi-layer thin film according to claim 6, wherein: Metalized hole interlayer pads (35) are formed at the portions where the upper ends of the first signal metallized via (13) to the twelfth signal metallized via (34) are in contact with the second PI dielectric layer (3), the third PI dielectric layer (4), and the fourth PI dielectric layer (5).

8. The embedded ceramic micro-filter based on a multi-layer thin film according to claim 6, wherein: The first resonant metal wire (14) is disposed opposite to the fourth resonant metal wire (26), and the fourth resonant metal wire (26) is disposed opposite to the fifth resonant metal wire (30); the second resonant metal wire (18) is disposed opposite to the third resonant metal wire (22), and the third resonant metal wire (22) is disposed opposite to the sixth resonant metal wire (33).

9. The embedded ceramic microfilter based on a multi-layer thin film according to claim 1, characterized in that: The filter has a length of 2 mm, a width of 1.85 mm, and a height of 0.295 mm.

Citation Information

Patent Citations

  • Multi-layer thin-film electrode, high-frequency transmission line, high-frequency resonator, and high-frequency filter

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