Storage device RAID data write-in intermediate parity system
By generating and storing intermediate parity data in the storage subsystem and erasing the main data subset, the problems of degraded write performance and increased cost in the prior art are solved, and more efficient data writing and reduction are achieved. Power requirements for storage devices.
Patent Information
- Application Number
- CN202380029132.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-04-08
- Filing Date
- 2023-01-13
- Publication Date
- 2024-12-10
AI Technical Summary
When writing data, existing storage devices need to write both primary data and parity data to the storage subsystem, resources of the volatile memory system cannot be released, resulting in a decrease in writing performance and an increase in cost, and in the power supply. A larger power backup system is required when lost.
Reduce volatile by generating intermediate parity data in the storage subsystem and storing it in a volatile memory system and then erasing the corresponding subset of the main data, thereby reconstructing its parts when the main data cannot be restored, reducing volatile Requirements for sexual memory systems and power backup systems.
Reduces write performance issues such as offset and QoS reduction, reduces the cost of storage devices, and improves consistency and smoothness of data writes.
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Figure CN119110942A_ABST
Abstract
Description
Background Art
[0001] The present disclosure relates generally to information handling systems, and more particularly to redundant array of independent disks (RAID) data writing in storage devices used in information handling systems with intermediate parity data.
[0002] As the value and use of information continue to increase, individuals and businesses seek alternative ways to process and store information. One option available to users is an information handling system. Information handling systems typically process, compile, store and / or communicate information or data for commercial, personal or other purposes, allowing users to exploit the value of information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary in the following aspects: what information to handle, how to handle information, how much information is processed, stored or communicated, and the speed and efficiency of processing, storing or communicating information. Changes in information handling systems allow information handling systems to be general or configured for specific users or specific purposes (such as financial transaction processing, flight reservations, enterprise data storage or global communications). In addition, information handling systems may include a variety of hardware and software components that can be configured to process, store and communicate information, and may include one or more computer systems, data storage systems and networking systems.
[0003] Storage devices, such as solid-state drive (SSD) storage devices used, for example, in server devices and / or other computing devices known in the art, often utilize redundant array of independent disks (RAID) technology to protect data written to storage subsystems in those storage devices. For example, RAID5 technology provides for generating and storing parity data together with "primary" data (e.g., which includes data provided by a host for storage) written to a storage subsystem in a storage device, and those skilled in the art who have mastered the present disclosure will understand how to use recoverable portions of the primary data and their corresponding parity data to reconstruct multiple unrecoverable portions of the primary data in the event that a portion of the primary data written to a storage subsystem in a storage device is unrecoverable. However, due to the possibility of write errors, power loss, or other problems that may occur during the writing of primary data to a storage subsystem in a storage device, conventional storage devices operate to store primary data (and any associated data / metadata) in their volatile memory systems (e.g., in buffers) until all primary data and their corresponding parity data have been successfully written to a storage subsystem in the storage device, which may cause some problems.
[0004] For example, the need for the storage subsystem to store primary data (and any associated data / metadata) in a volatile memory system until all primary data and its corresponding parity data have been successfully written to the storage device may prevent the acceptance of new primary data (e.g., from the host discussed above) until the volatile memory system is available to receive the new primary data, which may result in the storage device accepting new primary data in a "burst" when the resources of the volatile memory system are "released" at the end of the storage subsystem writing the current primary data to the storage device. As will be appreciated by those skilled in the art having the present disclosure, such operations may introduce performance issues (e.g., "skew", quality of service (QoS) degradation, etc.) in terms of storage device write performance, which will increase with the increase in the size of the primary data writes. In addition, the need for a storage subsystem to store primary data (and any associated data / metadata) in a volatile memory system until all primary data and its corresponding parity data have been successfully written to the storage device may also require a larger volatile memory system, which increases the cost of the storage device, and since the primary data (and any associated data / metadata) stored in the volatile memory system can be transferred to a non-volatile memory system with a power backup subsystem in the event of a loss of system power, a larger power backup system may also be required, which increases cost.
[0005] Therefore, it would be desirable to provide a storage device RAID data writing system that solves the problems discussed above. Summary of the invention
[0006] According to one embodiment, an information handling system (IHS) includes a processing system; and a memory system, the memory system being coupled to the processing system and including instructions that, when executed by the processing system, cause the processing system to provide a storage engine, the storage engine being configured to: receive first primary data from a host system; store the first primary data in a volatile memory system; store a first subset of the first primary data in the storage system; generate first intermediate parity data using the first subset of the first primary data; store the first intermediate parity data in the volatile memory system; and in response to storing the first subset of the first primary data in the storage system and storing the first intermediate parity data in the volatile memory system, erase the first subset of the first primary data from the volatile memory system. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Figure 1 is a schematic diagram illustrating an embodiment of an information handling system (IHS).
[0008] Figure 2is a schematic diagram showing an embodiment of a storage device that can utilize the storage device RAID data writing intermediate parity system of the present disclosure.
[0009] Figure 3 is shown to be included in Figure 2 Schematic diagram of an implementation scheme of a storage subsystem in a storage device.
[0010] Figure 4 It is shown Figure 3 Schematic diagram of an implementation scheme of a storage subsystem.
[0011] Figure 5 It is shown by Figure 4 A schematic diagram of an implementation of a superblock is provided for a portion of a storage subsystem.
[0012] Figure 6 is a flow chart illustrating an embodiment of a method for performing intermediate parity RAID data writes in a storage device.
[0013] FIG. 7A is a diagram showing a conventional operation. Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0014] FIG. 7B is a diagram showing the execution of a conventional operation Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0015] 7C is a schematic diagram illustrating an embodiment of a normal operation of the storage device in FIG. 7B , which provides main data and parity data in a super block.
[0016] FIG. 7D is a diagram showing the execution of a conventional operation. Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0017] Fig. 8A It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0018] Figure 8B It shows that according to Figure 6 Method to operate Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0019] Fig. 9 It shows that according to Figure 6 Method to operate Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0020] Fig. 10A It shows that according to Figure 6 The method operates Fig. 9Schematic diagram of an embodiment of the operation of a storage device.
[0021] Fig. 10B It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0022] Fig. 10C It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0023] Fig.11A It shows that according to Figure 6 The method operates Fig. 9 Schematic diagram of an embodiment of the operation of a storage device.
[0024] Fig. 11B It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0025] Fig. 11C It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0026] Fig.11D It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0027] Fig. 12A It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an embodiment of the operation of a storage device.
[0028] Fig. 12B It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an embodiment of the operation of a storage device.
[0029] Fig. 12C It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an embodiment of the operation of a storage device.
[0030] Fig.13 It shows that according to Figure 6 The method operates Figure 2 Schematic diagram of an implementation scheme of a storage device.
[0031] Fig.14 It is shown Figure 2 Schematic diagram of an embodiment of the operation of a storage device using Figure 6 The method stores the main data and the intermediate parity data.
[0032] Fig.15 It is shown Figure 2 Schematic diagram of an embodiment of the operation of a storage device using Figure 6 The method stores the main data and the intermediate parity data.
[0033] Fig.16 It is shown Figure 2 Schematic diagram of an embodiment of the operation of a storage device using Figure 6 The method stores the main data and the intermediate parity data.
[0034] Fig.17 It is shown Figure 2 Schematic diagram of an embodiment of the operation of a storage device using Figure 6 The method stores the main data and the intermediate parity data. DETAILED DESCRIPTION
[0035] For purposes of this disclosure, an information handling system may include any tool or collection of tools operable to compute, calculate, determine, classify, process, transmit, receive, retrieve, initiate, switch, store, display, communicate, represent, detect, record, copy, dispose of, or utilize any form of information, intelligence, or data for commercial, scientific, control, or other purposes. For example, an information handling system may be a personal computer (e.g., a desktop computer or laptop), a tablet computer, a mobile device (e.g., a personal digital assistant (PDA) or a smart phone), a server (e.g., a blade server or a rack-mount server), a network storage device, or any other suitable device, and may vary in size, shape, performance, functionality, and price. An information handling system may include random access memory (RAM), one or more processing resources (such as a central processing unit (CPU) or hardware or software control logic), ROM, and / or other types of non-volatile memory. Additional components of an information handling system may include one or more disk drives, one or more network ports for communicating with external devices, and various input and output (I / O) devices, such as a keyboard, mouse, touch screen, and / or video display. The information handling system may also include one or more buses operable to transmit communications between the various hardware components.
[0036] In one embodiment, Figure 1The IHS 100 includes a processor 102 connected to a bus 104. The bus 104 serves as a connection between the processor 102 and other components of the IHS 100. An input device 106 is coupled to the processor 102 to provide input to the processor 102. Examples of input devices may include a keyboard, a touch screen, a pointing device (such as a mouse, a trackball, and a trackpad), and / or a variety of other input devices known in the art. Programs and data are stored on a mass storage device 108, which is coupled to the processor 102. Examples of mass storage devices may include a hard disk, an optical disk, a magneto-optical disk, a solid-state storage device, and / or a variety of other mass storage devices known in the art. The IHS 100 also includes a display 110, which is coupled to the processor 102 by a video controller 112. A system memory 114 is coupled to the processor 102 to provide fast storage to the processor to facilitate the processor 102 to execute computer programs. Examples of system memory may include a random access memory (RAM) device (such as a dynamic RAM (DRAM), a synchronous DRAM (SDRAM)), a solid-state memory device, and / or a variety of other memory devices known in the art. In an embodiment, chassis 116 houses some or all of the components of IHS 100. It should be understood that other buses and intermediate circuits may be deployed between the above-mentioned components and processor 102 to facilitate interconnection between these components and processor 102.
[0037] Now refer to Figure 2 , shows an embodiment of a storage device 200 that may include a storage device RAID data write intermediate parity check system of the present disclosure. In the embodiment, the storage system 200 may be composed of the above reference Figure 1 The IHS 100 discussed is provided, may be provided as a component in the IHS 100, and / or may include some or all of the components of the IHS 100. In the specific example provided below, the storage device 200 is described as being provided by a solid state drive (SSD) storage device. In addition, although shown and discussed as being provided by a specific storage device, those skilled in the art having mastery of the present disclosure will recognize that the functionality of the storage device 200 discussed below may be provided by other storage devices configured to operate similarly to the storage device 200 discussed below. In the illustrated embodiment, the storage device 200 includes a chassis 202 that houses the components of the storage device 200, only some of which are shown and discussed below. For example, the chassis 202 may house a processing system (not shown, but which may include the processing system described above with reference to the SSD). Figure 1 The processor 102 discussed above) and the memory system (not shown, but which may include the above reference Figure 1The memory 114 discussed above) is coupled to the processing system and includes instructions that, when executed by the processing system, cause the processing system to provide a storage engine 204 that is configured to perform the functionality of the storage engine and / or storage device discussed below.
[0038] In the illustrated embodiment, the chassis 202 also houses a volatile memory system 206 that is coupled to the storage engine 204 (e.g., via a coupling between the volatile memory system 206 and the processing system), which may provide at least a portion of the memory system discussed above that provides the storage engine 204, or may be separate from the memory system discussed above that provides the storage engine 204. In a specific example, the volatile memory system 206 may be provided by a dual in-line memory module (DIMM) memory device, but those skilled in the art having the present disclosure will understand how other volatile memory devices would also fall within the scope of the present disclosure. In the illustrated embodiment, the chassis 202 also houses a non-volatile memory system 206, which is coupled to the storage engine 204 (e.g., via a coupling between the volatile memory system 206 and the processing system) and, in the specific example provided below, is coupled to a power backup system 210, which may include batteries, capacitors, and / or other power backup devices that will be recognized by those skilled in the art having mastered the present disclosure, which are operable to configure the non-volatile memory system 208 to provide non-volatile data storage discussed below.
[0039] The chassis 202 may also house a storage subsystem 212, which is coupled to the storage engine 204 (e.g., via a coupling between the storage subsystem 212 and the processing system) and is discussed in more detail below. The chassis 302 may also house a communication system 214, which is coupled to the storage engine 304 (e.g., via a coupling between the communication system 214 and the processing system) and may be provided by any of a variety of storage device communication components that will be recognized by those skilled in the art having the present disclosure as allowing for the reception of primary data discussed below (e.g., from a host system). However, although a particular storage device 200 has been shown and described, those skilled in the art having the present disclosure will recognize that a storage device (or other device that operates in a manner similar to that described below for the storage device 200 in accordance with the teachings of the present disclosure) may include a variety of components and / or component configurations for providing conventional storage device functionality as well as the functionality discussed below, while also remaining within the scope of the present disclosure.
[0040] Now refer to Figure 3 , showing a storage subsystem 300, the storage subsystem provides the above reference Figure 2The specific example of the storage subsystem 212 discussed, and those skilled in the art who have mastered the present disclosure will understand how the storage subsystem 300 is described as being provided by an SSD storage subsystem utilizing NAND technology, but other storage devices utilizing other storage technologies may benefit from the teachings of the present disclosure and are therefore contemplated to also fall within the scope of the present disclosure. In the illustrated embodiment, the storage subsystem 300 includes a NAND package 302 having a plurality of NAND dies 304 (hereinafter referred to as "dies"), wherein each NAND die includes a plurality of NAND planes. As shown, each NAND plane 306 includes a plurality of NAND blocks 308 (hereinafter referred to as "blocks"), wherein each NAND block 308 includes a plurality of NAND word lines 310 (hereinafter referred to as "word lines" or "WLs"), and each NAND word line 310 includes a plurality of NAND pages. As will be appreciated by those skilled in the art having possession of the present disclosure, the number of NAND dies per NAND package, the number of NAND planes per NAND die, the number of NAND blocks per NAND plane, the number of NAND word lines per NAND block, and / or the number of NAND pages per NAND word line may vary between NAND devices, and the teachings of the present disclosure may be applicable to any of those NAND devices while remaining within the scope of the present disclosure.
[0041] Now refer to Figure 4, an embodiment of a NAND device 400 is shown to provide a simplified example of how the NAND blocks discussed above may be configured. As will be appreciated by those skilled in the art having the present disclosure, the NAND device 400 includes a plurality of die / channel combinations, each die / channel combination including a plurality of blocks, wherein the die0 / channel0 combination includes blocks 400a, 400b through 400c; the die0 / channel1 combination includes blocks 402a, 402b through 402c; the die0 / channel2 combination includes blocks 404a, 404b through 404c; the die0 / channel3 combination includes blocks 406a, 406b through 406c; the die1 / channel0 combination includes blocks 408a, 408b through 408c; the die1 / channel1 combination includes blocks 410a, 410b through 410c; the die1 / channel2 combination includes blocks 412a, 412b through 412c; The die 1 / channel 3 combination includes blocks 414a, 414b through 414c; the die 2 / channel 0 combination includes blocks 416a, 416b through 416c; the die 2 / channel 1 combination includes blocks 418a, 418b through 418c; the die 2 / channel 2 combination includes blocks 420a, 420b through 420c; the die 2 / channel 3 combination includes blocks 422a, 422b through 422c; the die 3 / channel 0 combination includes blocks 424a, 424b through 424c; the die 3 / channel 1 combination includes blocks 426a, 426b through 426c; the die 3 / channel 2 combination includes blocks 428a, 428b through 428c; and the die 3 / channel 3 combination includes blocks 430a, 430b through 430c.
[0042] Reference Figure 5 , which can be seen from the above reference Figure 4 The embodiments of the super block 500 provided by the NAND device 400 discussed above and those skilled in the art having mastered the present disclosure will appreciate that Figure 5 500 shown in , provides an example of how only one Super Block may be provided from individual blocks included in each of the die / channel combinations discussed above. For example, a Super Block may be provided by a collection of Physical Blocks, where a fixed number of blocks from each die (e.g., each die / channel combination) are provided in each Super Block. As will be appreciated by those skilled in the art having the present disclosure, providing Physical Blocks from each die / channel combination in a Super Block operates to achieve the highest die parallelism during programming or erasing of a Super Block (i.e., since data writing occurs on a Super Block basis at the Firmware Translation Layer (FTL) level / application layer of the storage device firmware, where a particular Super Block is selected, erased, and written in its entirety).
[0043] Thus, superblock 500 includes block 400a having word lines ("WL") 500a, 500b through 500c; block 402a having word lines ("WL") 502a, 502b through 502c; block 404a having word lines ("WL") 504a, 504b through 504c; block 406a having word lines ("WL") 506a, 506b through 506c; block 408a having word lines ("WL") 508a, 508b through 508c; block 410a having word lines ("WL") 510a, 510b through 510c; block 412a having word lines ("WL") 512a, 512b through 512c; block 414a having word lines ("WL") 514a, 514b through 514c 414a; block 416a with word lines ("WL") 516a, 516b through 516c; block 418a with word lines ("WL") 518a, 518b through 518c; block 420a with word lines ("WL") 520a, 520b through 520c; block 422a with word lines ("WL") 522a, 522b through 522c a; block 424a with word lines ("WL") 524a, 524b through 524c; block 426a with word lines ("WL") 526a, 526b through 526c; block 428a with word lines ("WL") 528a, 528b through 528c; and block 430a with word lines ("WL") 530a, 530b through 530c. However, although superblock 500 is shown using Figure 4 However, those skilled in the art having grasped the present disclosure will recognize how two blocks from each die / channel combination are often used to create a Super Block (for example, when dual NAND plane storage devices are used), and how such and other Super Block configurations are also within the scope of the present disclosure.
[0044] Furthermore, those skilled in the art having mastered the present disclosure will recognize how the superblock 500 and the examples based on the superblock 500 discussed below provide a "15+1" RAID data frame including 15 primary data segments and 1 parity data segment. However, those skilled in the art having mastered the present disclosure will also understand how the superblock can be configured to provide a "31+1" RAID data frame including 31 primary data segments and 1 parity data segment, a "63+1" RAID data frame including 63 primary data segments and 1 parity data segment, and other RAID data frame configurations while also remaining within the scope of the present disclosure.
[0045] As discussed in more detail below, when performing conventional RAID data writes discussed in more detail below, before writing to the Super Block 500, the storage device firmware in the storage device may collect the primary data that will be appropriate for each of the channels (e.g., Figure 4 channels 0-3 in the die (e.g. Figure 4 For example, in a first data write window, storage device firmware in the storage device may collect primary data that will fit into word lines 500a, 502a, 504a, and 506a in blocks 400a, 402a, 404a, and 406a, and write the primary data to those word lines in the first data write window. Similarly, in a subsequent data write window, the storage device firmware in the storage device may collect primary data and write the primary data in word lines 508a, 510a, 512a, and 514a in blocks 408a, 410a, 412a, and 414a; collect primary data and write primary data in word lines 516a, 518a, 520a, and 522a in blocks 416a, 418a, 420a, and 422a; collect primary data and write primary data in word lines 524a, 526a, and 528a in blocks 424a, 426a, and 428a; and then write parity data (generated from the primary data written as discussed above) in word line 530a in block 430a. This process may then be repeated (e.g., where row "b" begins with word line 500b in block 400a and ends with word line 530b in block 430a, until row "c," which begins with word line 500c in block 400a and ends with word line 530c in block 430a), such that primary data is written in blocks 400a-428a and parity data is written in block 430a.
[0046] Now refer to Figure 6, showing an embodiment of a method 600 for performing intermediate parity redundant array of independent disks (RAID) data writes in a storage device. As discussed below, the systems and methods of the present disclosure provide for generating corresponding intermediate parity data for a subset of primary data stored in a storage subsystem, and erasing the corresponding subset from a volatile memory system after storing the corresponding intermediate parity data of the corresponding subset of the primary data in a volatile memory system, wherein the corresponding intermediate parity data is used to reconstruct multiple portions of the corresponding subset in the event that the corresponding subset of the primary data becomes unrecoverable. For example, the storage device RAID data write intermediate parity system includes a storage device that is coupled to a host system and includes a storage subsystem and a volatile memory system. The storage device RAID data write intermediate parity system receives first primary data from the host system and stores the first primary data in the volatile memory system. The storage device RAID data write intermediate parity system then stores a first subset of the first primary data in the storage system, generates first intermediate parity data using the first subset of the first primary data, stores the first intermediate parity data in the volatile memory system, and in response, erases the first subset of the first primary data from the volatile memory system. As discussed below, freeing up volatile memory system resources while primary data is being written to the storage subsystem reduces performance issues that can create "drift," reduced QoS, and / or other storage device write performance issues, and reduces storage device costs by reducing the need for larger volatile memory systems and associated power backup subsystems that are needed for non-volatile memory systems that back up those volatile memory systems.
[0047] 7A, 7B, 7C and 7D, a conventional RAID data write operation is described as follows: Figure 2 , for the purpose of comparison with the operation of the storage device 200 using the storage device RAID data write intermediate parity system discussed below. As shown in Figure 7A, the storage engine 204 can perform: a data receiving operation 700, the operation includes receiving data via the communication system 214; and a volatile memory data storage operation 702, the operation includes storing the data 703 (for example, the "primary" data discussed above) in the volatile memory system 206. Referring to Figure 7B, the storage engine 204 can then perform a storage subsystem data write operation 704, the operation includes retrieving data 703 from the volatile memory system 206 and writing the data to the storage subsystem 212, and those skilled in the art who have mastered the present disclosure will understand how it can be compared with the above referenced Figure 5 Those storage subsystem data write operations 704 are performed similarly as discussed.
[0048] For example, referring to FIG. 7C , a method for writing a portion of data 703 to the reference 703 is shown. Figure 5 7C shows each die / channel combination as including four fragments 1, 2, 3, and 4, wherein data is only written to fragment 1 in the die / channel combination. However, those skilled in the art having mastered the present disclosure will recognize how data writing to the super block 500 will include writing data to all fragments 1, 2, 3, and 4 in each of the die / channel combinations, and how fragments 2, 3, and 4 in each of the die / channel combinations are written in a manner similar to that shown and described for fragment 1 in FIG. 7C.
[0049] Refer to above Figure 4 and Figure 5 Similarly as discussed, in the first data write window and as part of the storage subsystem data write operation 704, the storage device firmware in the storage device 200 may collect a certain amount of data 703 that will fit into the word lines 500a, 502a, 504a, and 506a in the blocks 400a, 402a, 404a, and 406a, and write some of the data 703 to those word lines in the first data write window. Thus, the storage subsystem data write operation 704 may include: in the first data write window, writing some of the data 703 to segment 1 in the die 0 / channel 0 combination, writing some of the data 703 to segment 1 in the die 0 / channel 1 combination, writing some of the data 703 to segment 1 in the die 0 / channel 2 combination, and writing some of the data 703 to segment 1 in the die 0 / channel 3 combination.
[0050] Similarly, the storage subsystem data write operation 704 may include: in the second data write window, writing some of the data 703 to the segment 1 in the die 1 / channel 0 combination, writing some of the data 703 to the segment 1 in the die 1 / channel 1 combination, writing some of the data 703 to the segment 1 in the die 1 / channel 2 combination, and writing some of the data 703 to the segment 1 in the die 1 / channel 3 combination. Similarly, the storage subsystem data write operation 704 may include: in the third data write window, writing some of the data 703 to the segment 1 in the die 2 / channel 0 combination, writing some of the data 703 to the segment 1 in the die 2 / channel 1 combination, writing some of the data 703 to the segment 1 in the die 2 / channel 2 combination, and writing some of the data 703 to the segment 1 in the die 2 / channel 3 combination. Finally, the storage subsystem data write operation 704 may include: in the fourth data write window, writing some of the data 703 to fragment 1 in the die 3 / channel 0 combination, writing some of the data 703 to fragment 1 in the die 3 / channel 1 combination, and writing some of the data 703 to fragment 1 in the die 3 / channel 2 combination.
[0051] 7C shows how, as part of a storage subsystem data write operation 704, storage device firmware in storage device 200 may perform a parity generation operation (shown by parity generation operation element 704a in FIG. 7C) to generate parity data for data 703 written to segment 1 in a die / channel combination as discussed above, and then write the parity data to segment 1 in a die 3 / channel 3 combination. P . Therefore, a “15+1” RAID5 data write may be provided in the super block 500. Referring to FIG. 7D , and after writing the data 703 and the corresponding parity data to the super block 500 provided by the storage subsystem 212, the storage engine 204 may then perform a volatile memory system data erase operation 706, which includes erasing the data 703 from the volatile memory system 206.
[0052] As discussed above, due to the possibility of write errors, power loss, or other problems that may occur during the writing of data 703 to the super block 500 provided by the storage subsystem 212, the data 703 will remain stored in the volatile memory system 206 until all of the data 703 and its corresponding parity data have been successfully written to the storage subsystem 212, and the need to store the data 703 in the volatile memory system 206 until all of the data 703 and its corresponding parity data have been successfully written to the storage subsystem 212 may prevent the acceptance of new data until the volatile memory system 206 is available to receive the new data (e.g., after the data 703 is erased from the volatile memory system 206), which may cause the storage device 200 to accept new data in a "burst" manner when the resources of the volatile memory system 206 are "released" (e.g., after the data 703 is erased from the volatile memory system 206). As will be appreciated by those skilled in the art having the present disclosure, such operations may introduce performance issues (e.g., "skew," QoS degradation, etc.) in data write performance in the storage device 200, which will increase as the size of the data write increases. In addition, such operations require a larger volatile memory system 206, which increases the cost of the storage device 200, and because the data 703 stored in the volatile memory system 206 may be transferred to the non-volatile memory system 208 with the power backup system 210 in the event of a loss of system power, a larger power backup system 210 may also be required, which increases the cost.
[0053] As will be appreciated by those skilled in the art having mastered the present disclosure, the problems discussed above regarding conventional storage device RAID data writing may lead to specific problems for specific storage devices. For example, a high-speed non-volatile memory (NVMe) partition namespace system (ZNS) SSD storage device may be configured to group its storage capacity into partitions that can be read in any order, which allows the NVMe ZNS SSD storage device to improve internal data layout and provide improved performance via increased write throughput, increased QoS, and increased capacity. However, since the NVMe ZNS SSD storage device may allow each partition namespace to create a superblock and write the superblock in parallel, for each superblock, the primary data may be kept in the buffer of the volatile memory system until parity data is generated and written for the primary data. As will be appreciated by those skilled in the art having mastered the present disclosure, the data writing concept of keeping the primary data in the buffer of the volatile memory system discussed above until the corresponding parity data is generated and written to the storage subsystem will introduce scaling difficulties in the NVMe ZNS SSD storage device that accumulates primary data for multiple different RAID frames at the same time.
[0054] As discussed in more detail below, the storage device RAID data write intermediate parity system of the present disclosure operates to free up resources of the volatile memory system 206 by erasing those subsets of primary data from the volatile memory system 206 as those subsets of primary data are written to the storage subsystem 212, while also generating and storing intermediate parity data for those subsets of primary data so that those subsets can be reconstructed in the event that those subsets cannot be recovered from the storage subsystem 212. As discussed below, such operations reduce performance issues, such as those that create "drift" and QoS degradation in storage device write performance discussed above, and reduce storage device costs by reducing the need for larger volatile memory systems and associated power backup subsystems that are required for non-volatile memory systems used to back up the volatile memory system. Furthermore, those skilled in the art having mastered the present disclosure will understand how the RAID data write operation discussed above in the specific example is a RAID5 data write that generates parity data for the primary data so as to allow reconstruction of a single fragment of the primary data in the event that the primary data becomes unrecoverable, and that the following teachings can be extended to RAID6 data writes that generate both parity data and "Q" data for the primary data so as to allow reconstruction of two fragments of the primary data in the event that the primary data becomes unrecoverable, while also remaining within the scope of the present disclosure.
[0055] As will be appreciated by those skilled in the art having mastered the present disclosure, method 600 describes storing a “first” primary data in the storage subsystem 212 of the storage device 200, and may be repeated for other primary data (e.g., “second” primary data, “third” primary data, etc., which may be received from the host system over time). Therefore, those skilled in the art having mastered the present disclosure will recognize that during execution of method 600 to store the “first” primary data, the storage device 200 may receive the “second” primary data, the “third” primary data, etc., and the “second” primary data may be stored in the storage subsystem 212 according to method 600 similarly as described below for the “first” primary data, the “third” primary data may be stored in the storage subsystem 212 according to method 600 similarly as described below for the “first” primary data, and so on.
[0056] Method 600 begins at block 602, where a storage device receives primary data and stores the primary data in a volatile memory system. Fig. 8AIn an embodiment of block 602, the storage engine 204 in the storage device 200 may perform a data receiving operation 800, which includes receiving data via the communication system 214. For example, the storage device 200 may be arranged in the above reference Figure 1 The IHS 100 discussed (e.g., as the mass storage device 108), and the host system (e.g., provided by the processor 102, the system memory 114, and / or other components in the IHS 100) may generate and / or transmit data for storage in the storage device 200. In response to receiving the data, the storage engine 204 in the storage device 200 may perform a volatile memory data storage operation 802, which includes writing or otherwise storing the data 804 in the volatile memory system 206.
[0057] As will be appreciated by those skilled in the art having possession of the present disclosure, the data 804 stored in the volatile storage system 206 (also referred to hereinafter as "primary" data) may include data provided for storage (e.g., provided by a host system as described above), metadata generated for the data (e.g., error correction code (ECC) data, which may provide for secondary error correction operations in addition to any of the RAID error correction operations discussed below), command context data (e.g., per NAND block), and any other data that would be apparent to those skilled in the art having possession of the present disclosure. Figure 8B In some embodiments, the storage engine 204 in the storage device 200 may perform a data segmentation operation 806 to logically segment the data 804 to provide data subsets 804a, 804b, up to 804c, and a person skilled in the art who has mastered the present disclosure will understand how a variety of data segmentation techniques can be performed at box 602, and the data segmentation techniques will fall within the scope of the present disclosure.
[0058] Then, the method 600 proceeds to block 604, where the storage device stores the subset of the primary data in the storage subsystem. Fig. 9 In an embodiment of a first iteration of block 604, a storage engine 204 in a storage device 200 may perform a storage subsystem data storage operation 900, the operation including retrieving a subset of primary data stored in the volatile memory system 206 (e.g., data subset 804a of data 804 in the first iteration of block 604), and writing or otherwise storing the subset of primary data in the storage subsystem 212. For example, referring to Fig. 10A , showing a method for writing the data subset 804a to the above reference Figure 5Implementation of a storage subsystem data storage operation 900 for a superblock 500 discussed. As will be appreciated by those skilled in the art having the present disclosure, the superblock 500 in the example provided below shows that each die / channel combination includes four fragments 1, 2, 3, and 4, wherein data is only written to fragment 1 in the die / channel combination. However, those skilled in the art having the present disclosure will recognize how data writing to the superblock 500 will include writing data to all fragments 1, 2, 3, and 4 in each of the die / channel combinations, and how fragments 2, 3, and 4 in each of the die / channel combinations can be written in a manner similar to that shown for fragment 1 in the example provided below.
[0059] Reference Figure 4 and Figure 5 In the first iteration of block 604 of method 600 and as part of storage subsystem data storage operation 900, storage engine 204 in storage device 200 may have logically segmented data 804 so that data segment 804a will fit in word lines 500a, 502a, 504a, and 506a in blocks 400a, 402a, 404a, and 406a and may have written data segment 804a to those word lines in the first iteration of block 604 of method 600. Thus, referring to Fig. 10A , the storage subsystem data storage operation 900 may include: in a first iteration of box 604 of method 600, writing a first portion of the data subset 804a to segment 1 in the die 0 / channel 0 combination, writing a second portion of the data subset 804a to segment 1 in the die 0 / channel 1 combination, writing a third portion of the data subset 804a to segment 1 in the die 0 / channel 2 combination, and writing a fourth portion of the data subset 804a to segment 1 in the die 0 / channel 3 combination.
[0060] The method 600 then proceeds to decision block 606, where the method 600 proceeds based on whether all of the primary data has been stored in the storage subsystem. As discussed in more detail below, the storage engine 204 in the storage device 200 is configured to generate intermediate parity data for a subset of the primary data stored in the storage subsystem 212 and store the intermediate parity data in the volatile memory system 206 until all of the primary data has been stored in the storage subsystem 212, after which final parity data may be generated and stored in the storage subsystem 212. Thus, the operation of the storage engine 204 in the storage device 200 will depend on whether the storage subsystem data storage operation 900 performed at block 604 has completed storing the primary data from the volatile memory system 206 in the storage subsystem 212.
[0061] If at decision block 606, not all of the primary data has been stored in the storage subsystem, the method 600 proceeds to block 608, where the storage device generates intermediate parity data and stores the intermediate parity data in the volatile memory system. Fig. 10A and Fig. 10B In an embodiment of block 608 and following the first iteration of block 604 of method 600 discussed above, storage engine 204 in storage device 200 may also perform intermediate parity data generation and storage operations 1000, which may include: generating intermediate parity data (by 804a) for the data subset 804a of fragment 1 written to the die 0 / channel 0-3 combination as discussed above. Fig. 10A ), and then the intermediate parity data 1004 (e.g., Fig. 10A As "Fragment 1 iP1 ”) is written into the volatile memory system 206.
[0062] The method 600 then proceeds to block 610 where the storage device erases the subset of primary data from the volatile memory system. Fig. 10C In an embodiment of block 610, a storage engine 204 in a storage device 200 may perform a data subset erase operation 1006, which includes erasing a data subset 804a from a volatile memory system 206. As will be appreciated by one of ordinary skill in the art having the present disclosure, erasing a data subset 804a from a volatile memory system 206 frees up resources of the volatile memory system 206, which may be utilized to store other data. Thus, the host system discussed above may have provided a first primary data including a data subset 804a, and erasing the data subset 804a from the volatile memory system 206 may allow a second primary data provided by the host system (which is different from the first primary data) to be stored in the volatile memory system 206 along with data subsets 804b, through 804c of the first primary data.
[0063] Those skilled in the art having mastered the present disclosure will recognize how releasing the resources of the volatile memory system before all current / first primary data and its corresponding parity data have been successfully written to the storage subsystem 212 in the storage device 200 reduces the need for the storage device to accept new / second primary data in a "burst" manner, thereby reducing "drift", QoS degradation and other problems in the data write performance of the storage device 200, providing more consistent / smoother write performance, reducing write latency, and providing other benefits that will be apparent to those skilled in the art having mastered the present disclosure. In addition, as discussed below, the generation and storage of intermediate parity data as discussed above solves the problem associated with the possibility that a portion / fragment of the primary data cannot be recovered from the storage system 212, because the intermediate parity data can be used to reconstruct multiple portions of the primary data that have become unrecoverable.
[0064] Method 600 then returns to block 604. Fig.11A In an implementation of a second iteration of box 604, the storage engine 204 in the storage device 200 may perform a storage subsystem data storage operation 1100, which includes: retrieving a subset of the main data stored in the volatile memory system 206 (for example, in the second iteration of box 604, data subset 804b of data 804), and writing or otherwise storing the subset of the main data in the storage subsystem 212.
[0065] For example, refer to Fig. 11B , illustrates an embodiment of a storage subsystem data storage operation 1100 for writing the data subset 804b to the super block 500 discussed above. Figure 4 and Figure 5 , in the second iteration of block 604 of method 600 and as part of storage subsystem data storage operation 1100, storage engine 204 in storage device 200 may have logically segmented data 804 so that data segment 804b will fit into word lines 508a, 510a, 512a, and 514a in blocks 408a, 410a, 412a, and 414a and may write the data segment to those word lines in the second iteration of block 604 of method 600. Thus, referring to Fig. 11B , the storage subsystem data storage operation 1100 may include: in a second iteration of box 604 of method 600, writing a first portion of the data subset 804b to fragment 1 in the die 1 / channel 0 combination, writing a second portion of the data subset 804b to fragment 1 in the die 1 / channel 1 combination, writing a third portion of the data subset 804b to fragment 1 in the die 1 / channel 2 combination, and writing a fourth portion of the data subset 804b to fragment 1 in the die 1 / channel 3 combination.
[0066] The method 600 then proceeds to decision block 606, where the method 600 again proceeds based on whether all primary data has been stored in the storage subsystem. As will be appreciated by those skilled in the art having the present disclosure, in this example and at decision block 606, not all primary data has been stored in the storage subsystem, and the method 600 proceeds to block 608, where the storage device generates intermediate parity data and stores the intermediate parity data in the volatile memory system. Fig. 11B and Fig. 11C In an embodiment of block 608 and following the second iteration of block 604 of method 600 discussed above, storage engine 204 in storage device 200 may also perform intermediate parity data generation and storage operations 1102, which may include: generating intermediate parity data (by 804b) for the data subset 804b of fragment 1 written to the die 1 / channel 0-3 combination as discussed above. Fig. 11B ), and then the intermediate parity data 1104 (e.g., in Fig. 11B As "Fragment 1 iP2 ”) is written into the volatile memory system 206. As will be appreciated by those skilled in the art having mastered the present disclosure, the intermediate parity data generated for the data subset 804b may be based on the intermediate parity data 1004 (eg, as “segment 1 iP1 ” is written to the volatile memory system 206) and a data subset 804b of fragment 1 written to the die 1 / channel 0-3 combination is generated.
[0067] The method 600 then proceeds to block 610 where the storage device erases the subset of primary data from the volatile memory system. Fig.11D In an embodiment of block 610, the storage engine 204 in the storage device 200 may perform a data subset erase operation 1006, which includes erasing the data subset 804b from the volatile memory system 206. As will be appreciated by one of ordinary skill in the art having the present disclosure, erasing the data subset 804b from the volatile memory system 206 will free up resources of the volatile memory system 206, which may be utilized to store other data. Thus, the host system discussed above may provide a first primary data including the data subsets 804a and 804b, and erasing the data subsets 804a and 804b from the volatile memory system 206 may allow a second primary data provided by the host system (which is different from the first primary data) to be stored in the volatile memory system 206 along with the data subset(s) (up to 804c) of the first primary data.
[0068] Therefore, those skilled in the art having the present disclosure in hand will understand how the method 600 loops through blocks 604, 606, 608, and 610, so that subsets of the primary data are stored in the storage subsystem, intermediate parity data is generated for those subsets of the primary data and stored in the volatile memory system 206, and those subsets of the primary data are erased from the volatile memory system 206, as long as not all of the primary data (e.g., data 804 in the above example) has been stored in the storage subsystem 212. For example, Fig. 12A Showing how a third iteration of box 604 of method 600 may include writing a first portion of a data subset of data 804 to fragment 1 in the die 2 / channel 0 combination, writing a second portion of the data subset of data 804 to fragment 1 in the die 2 / channel 1 combination, writing a third portion of the data subset of data 804 to fragment 1 in the die 2 / channel 2 combination, and writing a fourth portion of the data subset of data 804 to fragment 1 in the die 2 / channel 3 combination.
[0069] Fig. 12A and Fig. 12B Also shown is how, after the third iteration of block 604 of method 600 discussed above, storage engine 204 in storage device 200 may also perform intermediate parity data generation and storage operations 1200, which may include: generating intermediate parity data (by 1200) for a subset of data 804 of fragment 1 written to die 2 / channel 0-3 combination as discussed above. Fig. 12A ), and then the intermediate parity data 1202 (e.g., in Fig. 12A As "Fragment 1 iP3 ”) is written to the volatile memory system 206. As will be appreciated by those skilled in the art having the present disclosure, the intermediate parity data 1202 generated for the data subset of the fragment 1 data 804 written to the die 2 / channel 0-3 combination may be based on the intermediate parity data 1104 (e.g., which is used as “Fragment 1 iP2 ” is written to volatile memory system 206) and a data subset of data 804 of fragment 1 written to the die 2 / channel 0-3 combination is generated.
[0070] Although not explicitly shown, those skilled in the art having grasped the present disclosure will understand how, after the intermediate parity data 1202 is stored in the volatile memory system 206, a data subset of the data 804 on which the intermediate parity data 1202 is based can be erased from the volatile memory system 206 to free up resources of the volatile memory system 206 similarly as described above. Similarly, Fig. 12AAlso shown is how a fourth iteration of block 604 of method 600 may include writing a first portion of data subset 804c to fragment 1 in the die 3 / channel 0 combination, writing a second portion of data subset 804c to fragment 1 in the die 3 / channel 1 combination, and writing a third portion of data subset 804c to fragment 1 in the die 3 / channel 2 combination.
[0071] As will be appreciated by those skilled in the art having possession of the present disclosure, in the example provided above, and after the fourth iteration of box 604 of method 600 and at decision box 606, all primary data 804 have been stored in the storage subsystem, and method 600 proceeds to box 612, where the storage device generates final parity data and stores the final parity data in the storage subsystem. Fig. 12A and Fig. 12C 6 shows how, in an embodiment of block 612, storage engine 204 in storage device 200 may perform a final parity data generation operation, which may include generating final parity data (written by 804a of data of segment 1) for the data subset 804a written to the die 3 / channel 0-2 combination as discussed above. Fig. 12A ), and then performing a final parity data storage operation, the operation including storing the final parity data (e.g., Fig. 12A As "Fragment 1 P ”) is written to the storage system 212. As will be appreciated by those skilled in the art having mastered the present disclosure, the final parity data generated for the data subset 804c may be based on the intermediate parity data 1202 (e.g., which is “Segment 1 iP3 ” is written to the volatile memory system 206) and a subset of data 804c of fragment 1 written to the die 3 / channel 0-2 combination is generated.
[0072] The method 600 then proceeds to block 614 where the storage device erases the subset of primary data and the intermediate parity data from the volatile memory system. Fig.13In the embodiment of block 614, the storage engine 204 in the storage device 200 may perform a primary data and intermediate parity data erase operation 1300, which includes erasing the data subset 804c and the intermediate parity data 1004, 1104, and 1202 from the volatile memory system 206. As discussed above, although the method 600 has been described as providing an example of receiving a "first" primary data and storing it in a storage subsystem, similar operations may be performed to store "second" primary data, "third" primary data, and additional primary data received after receiving the "first" primary data. In addition, as also described above, because the resources of the volatile memory system 206 are released (e.g., due to erasing the subset of the "first" primary data and ultimately erasing the intermediate parity data), at least some of the "second" primary data, "third" primary data, and / or additional primary data may be stored in the volatile memory system 206 along with any portion of the "first" primary data that may still be stored in the volatile memory system 206.
[0073] As discussed above, in the event that a portion of a data subset cannot be recovered from its storage location, any of the intermediate parity data generated for the data subset may be utilized to reconstruct the portion of the data subset. Fig.14 The following scenario is shown: various portions of a first subset of primary data have been written to the Die0 / Channel0-3 combination and corresponding first intermediate parity data 1400 have been written to the volatile storage system 206, various portions of a second subset of primary data have been written to the Die1 / Channel0-3 combination and corresponding second intermediate parity data 1402 have been written to the volatile storage system 206, and various portions of a third subset of primary data have been written to the Die2 / Channel0-3 combination and corresponding third intermediate parity data 1404 have been written to the volatile storage system 206. Furthermore, in this scenario and during the writing of various portions of a fourth subset of primary data to the Die3 / Channel0-2 combination, a data write failure occurs when writing fragment 3 in the Die3 / Channel2 combination (caused by Fig.14 1400 in FIG. 1 ) (eg, such that the final parity data cannot be written to the die 3 / channel 3 combination, as shown in FIG. 1400 in FIG. 1 ). Fig.14 ).
[0074] As will be appreciated by those skilled in the art having the present disclosure, in the scenario discussed above, the first, second, and third subsets of primary data are stored in the storage subsystem 212, while the fourth subset of primary data, which is written to the Die 3 / Channel 0-2 combination when a data write failure occurs, is stored in the volatile memory system 206. Thus, the first, second, third, and fourth subsets of primary data may be read from those storage locations and written to different locations (e.g., different Super Blocks) in the storage subsystem 212. However, in the event that a portion of the first, second, or third subset of primary data cannot be recovered from its storage location, the intermediate parity data 1400, 1402, and / or 1404 may be used to reconstruct the portion.
[0075] For example, Fig.15 Show the above for Fig.14 1404 (e.g., Segment 2 of Die 2 / Channel 0) combination cannot be recovered from storage subsystem 212. As will be appreciated by those skilled in the art having the present disclosure, in such a scenario, storage engine 204 in storage device 200 may utilize intermediate parity data 1402 and 1404 (e.g., Segment 2 of Die 2 / Channel 0) to recover the primary data. ip2 and 2 ip3 ) and storing fragment 2 of a third subset of primary data written to the Die 2 Channel 1-3 combination in order to reconstruct the portion of primary data that could not be recovered from fragment 2 of the Die 2 / Channel 0 combination.
[0076] In another example, Fig.16 The following scenario is shown: various portions of a first subset of primary data have been written to the Die0 / Channel0-3 combination and the corresponding first intermediate parity data 1600 have been written to the volatile storage system 206, and various portions of a second subset of primary data have been written to the Die1 / Channel0-3 combination and the corresponding second intermediate parity data 1602 have been written to the volatile storage system 206. Furthermore, in this scenario, and during the writing of various portions of a third subset of primary data to the Die2 / Channel0-3 combination, a power failure occurs such that the third subset of primary data cannot be written to the Die2 / Channel0-3 combination, and the fourth subset of primary data cannot be written to the Die3 / Channel0-2 combination (e.g., Fig.16). In this scenario, the intermediate parity data 1600 and 1602 stored in the volatile memory system 206 and the third and fourth subsets of the primary data stored in the volatile memory system 206 will be copied to the non-volatile memory system 208 with the power backup system 210. Therefore, when the power failure is remedied and power is available again, the intermediate parity data 1600 and 1602 stored in the non-volatile memory system 208 and the third and fourth subsets of the primary data can be copied back to the volatile memory system 206, and operations can be restarted on the primary data in a new / different super block in the storage subsystem 212. However, in the event that a portion of the first or second subset of the primary data cannot be recovered from its storage location, the intermediate parity data 1600 and / or 1602 can be used to reconstruct the portion.
[0077] For example, Fig.17 Show the above for Fig.16 1 and 2. The scenario described above occurs when a portion of the primary data stored in Segment 4 of the Die 0 / Channel 2 combination cannot be recovered from the storage subsystem 212. As will be appreciated by those skilled in the art having mastered the present disclosure, in such a scenario, the storage engine 204 in the storage device 200 may utilize the intermediate parity data 1600 (e.g., Segment 1 ip1 ) and Segment 4 in the first subset of primary data written to the Die 0 Channels 0, 1, and 3 combination to reconstruct Segment 4 of the Die 0 / Channel 2 combination. However, while a few specific intermediate parity unrecoverable data reconstruction scenarios have been shown and described, those skilled in the art having the present disclosure in hand will understand how the intermediate parity data of the present disclosure may be utilized to reconstruct unrecoverable data in a variety of scenarios that will also fall within the scope of the present disclosure.
[0078] Thus, systems and methods have been described that provide for generating corresponding intermediate parity data for a subset of primary data stored in a storage subsystem, and erasing the corresponding subset from a volatile memory system after storing the corresponding intermediate parity data for the corresponding subset of the primary data in a volatile memory system, wherein the corresponding intermediate parity data is used to reconstruct multiple portions of the corresponding subset in the event that the corresponding subset of the primary data becomes unrecoverable. For example, a storage device RAID data write intermediate parity system includes a storage device that is coupled to a host system and includes a storage subsystem and a volatile memory system. The storage device RAID data write intermediate parity system receives first primary data from the host system and stores the first primary data in the volatile memory system. Then, the storage device RAID data write intermediate parity system stores a first subset of the first primary data in the storage system, generates first intermediate parity data using the first subset of the first primary data, stores the first intermediate parity data in the volatile memory system, and in response, erases the first subset of the first primary data from the volatile memory system.
[0079] As will be appreciated by those skilled in the art having mastered the present disclosure, freeing up volatile memory system resources when primary data is written to the storage subsystem will reduce performance issues, such as those that produce "drift", QoS degradation, and other issues in the storage device write performance discussed above, and reduce storage device costs by reducing the need for larger volatile memory systems and associated power backup subsystems, and reducing the frequency of charging the power backup subsystem to reduce power consumption of the storage device, which is required for non-volatile memory systems used to back up the volatile memory system. Those skilled in the art having mastered the present disclosure will appreciate how such advantages discussed above can be particularly beneficial in storage devices that can process primary data for multiple RAID frames in parallel, such as the NVMe ZNS SSD storage devices discussed above.
[0080] While illustrative embodiments have been shown and described, a wide range of modifications, changes, and substitutions are contemplated in the foregoing disclosure, and in some cases, some features of the embodiments may be employed without the corresponding use of other features. It is appropriate, therefore, that the appended claims be interpreted broadly and in a manner consistent with the scope of the embodiments disclosed herein.
Claims
1. A storage device redundant array of independent disks (RAID) data writing intermediate parity check system, comprising: Host system; as well as A storage device, coupled to the host system, includes a storage subsystem and a volatile memory system, and is configured to: receiving first primary data from the host system; storing the first primary data in the volatile memory system; storing a first subset of the first primary data in the storage system; generating first intermediate parity data using the first subset of the first primary data; storing the first intermediate parity data in the volatile memory system; and In response to storing the first subset of the first primary data in the storage system and storing the first intermediate parity data in the volatile memory system, erasing the first subset of the first primary data from the volatile memory system.
2. The system of claim 1, wherein the storage device is configured to: After erasing the first subset of the first main data from the volatile memory system, storing a plurality of second subsets of the first main data in the storage system, and for each second subset of the first main data stored in the storage subsystem: generating second intermediate parity data using said second subset of said first primary data; storing in the volatile memory system the second intermediate parity data generated using the second subset of the first primary data; and In response to storing the second subset of the first main data in the storage system and storing the second intermediate parity data generated using the second subset of the first main data in the volatile memory system, erasing the second subset of the first main data from the volatile memory system.
3. The system of claim 2, wherein the storage device is configured to: storing a final subset of the first primary data in the memory system after erasing each second subset of the first primary data from the volatile memory system; generating final parity data using the final subset of the first primary data; storing the final parity data in the storage system; and In response to storing the final subset of the first main data and the final parity data in the memory system, erasing the final subset of the first main data, the first intermediate parity data, and each second intermediate parity data from the volatile memory system.
4. The system of claim 1, wherein the storage device is configured to: receiving second primary data from the host system; and After erasing the first subset of the first primary data from the volatile memory system, at least a portion of the second primary data is stored in the volatile memory system along with a second subset of the first primary data.
5. The system of claim 1, wherein the storage device is configured to: determining that a storage operation for storing a second subset of the first primary data in the storage subsystem has failed; determining that a first portion of the first subset of the first primary data stored in the storage subsystem is unrecoverable; and The first portion of the first subset of the first primary data is recovered using the first intermediate parity data stored in the volatile memory system.
6. The system of claim 1, wherein the storage device is configured to: detecting a loss of power during a storage operation for storing a second subset of the first primary data in the storage subsystem; responsive to detecting the power loss, storing the first intermediate parity data in a non-volatile memory system; In response to power becoming available after detecting the power loss, determining that a first portion of the first subset of the first primary data stored in the storage subsystem is unrecoverable; and The first portion of the first subset of the first primary data is recovered using the first intermediate parity data stored in the non-volatile memory system.
7. An information handling system (IHS), comprising: Processing systems; as well as a memory system coupled to the processing system and comprising instructions that, when executed by the processing system, cause the processing system to provide a storage engine configured to: receiving first primary data from a host system; storing the first primary data in a volatile memory system; storing a first subset of the first primary data in a storage system; generating first intermediate parity data using the first subset of the first primary data; storing the first intermediate parity data in the volatile memory system; and In response to storing the first subset of the first primary data in the storage system and storing the first intermediate parity data in the volatile memory system, erasing the first subset of the first primary data from the volatile memory system.
8. The IHS of claim 7, wherein the storage engine is configured to: After erasing the first subset of the first main data from the volatile memory system, storing a plurality of second subsets of the first main data in the storage system, and for each second subset of the first main data stored in the storage subsystem: generating second intermediate parity data using said second subset of said first primary data; storing in the volatile memory system the second intermediate parity data generated using the second subset of the first primary data; and In response to storing the second subset of the first main data in the storage system and storing the second intermediate parity data generated using the second subset of the first main data in the volatile memory system, erasing the second subset of the first main data from the volatile memory system.
9. The IHS of claim 8, wherein the storage engine is configured to: storing a final subset of the first primary data in the memory system after erasing each second subset of the first primary data from the volatile memory system; generating final parity data using the final subset of the first primary data; storing the final parity data in the storage system; and In response to storing the final subset of the first main data and the final parity data in the memory system, erasing the final subset of the first main data, the first intermediate parity data, and each second intermediate parity data from the volatile memory system.
10. The IHS of claim 7, wherein the storage engine is configured to: receiving second primary data from the host system; and After erasing the first subset of the first primary data from the volatile memory system, at least a portion of the second primary data is stored in the volatile memory system along with a second subset of the first primary data.
11. The IHS of claim 7, wherein the storage engine is configured to: determining that a storage operation for storing a second subset of the first primary data in the storage subsystem has failed; determining that a first portion of the first subset of the first primary data stored in the storage subsystem is unrecoverable; and The first portion of the first subset of the first primary data is recovered using the first intermediate parity data stored in the volatile memory system.
12. The IHS of claim 7, wherein the storage engine is configured to: detecting a loss of power during a storage operation for storing a second subset of the first primary data in the storage subsystem; and In response to detecting the power loss, the first intermediate parity data is stored in a non-volatile memory system.
13. The IHS of claim 12, wherein the storage engine is configured to: In response to power becoming available after detecting the power loss, determining that a first portion of the first subset of the first primary data stored in the storage subsystem is unrecoverable; and The first portion of the first subset of the first primary data is recovered using the first intermediate parity data stored in the non-volatile memory system.
14. A method for performing intermediate parity redundant array of independent disks (RAID) data writes in a storage device, comprising: Receiving, by the storage device, first main data from the host system; storing, by the storage device, the first primary data in a volatile memory system; storing, by the storage device, a first subset of the first main data in a storage system; generating, by the storage device, first intermediate parity data using the first subset of the first primary data; storing, by the storage device, the first intermediate parity data in the volatile memory system; as well as In response to storing the first subset of the first primary data in the storage system and storing the first intermediate parity data in the volatile memory system, erasing, by the storage device, the first subset of the first primary data from the volatile memory system.
15. The method of claim 14, further comprising: After erasing the first subset of the first main data from the volatile memory system, storing, by the storage device, a plurality of second subsets of the first main data in the storage system, and for each second subset of the first main data stored in the storage subsystem: generating, by the storage device, second intermediate parity data using the second subset of the first primary data; storing, by the storage device, the second intermediate parity data generated using the second subset of the first primary data in the volatile memory system; and In response to storing the second subset of the first main data in the storage system and storing the second intermediate parity data generated using the second subset of the first main data in the volatile memory system, the second subset of the first main data is erased from the volatile memory system by the storage device.
16. The method of claim 15, further comprising: storing, by the storage device, a final subset of the first primary data in the storage system after erasing each second subset of the first primary data from the volatile memory system; generating, by the storage device, final parity data using the final subset of the first primary data; The storage device stores the final parity data in the storage system; as well as In response to storing the final subset of the first main data and the final parity data in the storage system, erasing, by the storage device, the final subset of the first main data, the first intermediate parity data and each second intermediate parity data from the volatile memory system.
17. The method of claim 14, further comprising: receiving, by the storage device, second main data from the host system; as well as After erasing the first subset of the first primary data from the volatile memory system, at least a portion of the second primary data is stored by the storage device in the volatile memory system together with a second subset of the first primary data.
18. The method of claim 14, further comprising: determining, by the storage device, that a storage operation for storing a second subset of the first primary data in the storage subsystem has failed; determining, by the storage device, that a first portion of the first subset of the first primary data stored in the storage subsystem is unrecoverable; as well as The first portion of the first subset of the first primary data is restored by the storage device using the first intermediate parity data stored in the volatile memory system.
19. The method of claim 14, further comprising: detecting, by the storage device, a loss of power during a storage operation for storing a second subset of the first primary data in the storage subsystem; as well as In response to detecting the power loss, the first intermediate parity data is stored by the storage device in a non-volatile memory system.
20. The method of claim 19, further comprising: In response to power becoming available after detecting the power loss, determining, by the storage device, that a first portion of the first subset of the first primary data stored in the storage subsystem is unrecoverable; as well as The first portion of the first subset of the first primary data is restored by the storage device using the first intermediate parity data stored in the non-volatile memory system.
