Server startup method and device, storage medium and electronic device

Abstract

The present application discloses a method and device for starting up a server, a storage medium and an electronic device. A processor, a channel controller, a memory and a display are deployed on the server. A basic input and output system is installed on the processor. The method is applied to the basic input and output system, and includes: receiving a startup instruction; responding to the startup instruction, and executing a startup operation for guiding the server to start up; generating a target interface of a target interface type when the startup operation is executed to a target startup phase; in the target startup phase, calling the target interface to obtain target startup information from the memory through a target channel of a channel controller; and controlling the display to display the target startup information. The above technical solution is adopted to solve the problem of low stability of displaying startup information of the server during the startup process in the related technology, thereby achieving the technical effect of improving the stability of displaying startup information of the server during the startup process.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computers, and in particular, to a method and device for starting up a server, a storage medium, and an electronic device. Background Art

[0002] In today's information age, servers are the core equipment of data centers, and their stability and reliability are crucial to business operations.

[0003] In the prior art, the process of obtaining special price information before the server is turned on is usually that the CPU (Central Processing Unit) sends an IPMI (Intelligent Platform Management Interface) command to the EEPROM (Electrically Erasable Programmable Read-Only Memory) through the BMC (Baseboard Management Controller), and the BMC reads the special price information from the EEPROM and passes it to the CPU, which then displays the special price information on the server screen. However, the feasibility of this method is highly dependent on the stability of the link between the CPU and the BMC. Once the link is abnormal or the IPMI command cannot be transmitted normally, the CPU cannot obtain the special price information from the EEPROM, resulting in the inability to correctly display this information on the server screen. At the same time, the interdependence between the CPU and the BMC will also affect the stability of the server.

[0004] In the related art, there is no effective solution to the problem of low stability in displaying startup information during the startup process of the server. Summary of the invention

[0005] The embodiments of the present application provide a method and device for starting up a server, a storage medium, and an electronic device, so as to at least solve the problem in the related art that the stability of displaying startup information during the startup process of the server is low.

[0006] According to an embodiment of the present application, a method for starting up a server is provided, wherein a processor, a channel controller, a memory, and a display are deployed on the server, the processor is connected to the memory through the channel controller, the processor is also connected to the display, a basic input and output system is installed on the processor, and the method is applied to the basic input and output system, including:

[0007] Receive power-on command;

[0008] In response to the power-on instruction, executing a startup operation for guiding the server to start up;

[0009] In the case where the startup operation is executed to the target startup phase, generating a target interface of a target interface type, wherein the target interface type is an interface type allowed to be called by the basic input and output system in the target startup phase;

[0010] In the target startup phase, calling the target interface to obtain target startup information from the memory through the target channel of the channel controller, wherein the target channel is used to provide communication between the processor and the memory;

[0011] Control the display to display the target startup information.

[0012] Optionally, generating a target interface of a target interface type includes:

[0013] Constructing a target interface program in the basic input and output system, wherein the target interface program is used to generate an interface of the target interface type;

[0014] The target interface program is executed to obtain the target interface of the target interface type.

[0015] Optionally, the calling the target interface to obtain target boot information from the memory through the target channel of the channel controller includes:

[0016] Filtering the target channel from a plurality of channels on the channel controller;

[0017] Calling the target channel to obtain the target startup information from the memory;

[0018] A temporary storage operation is performed on the target startup information.

[0019] Optionally, performing a temporary storage operation on the target boot information includes:

[0020] Constructing an initial data structure of the target data type in the basic input and output system, wherein the data structure of the target data type is a data structure that allows being recorded during the target startup phase;

[0021] The target startup information is stored in the initial data structure to obtain a target data structure.

[0022] Optionally, before controlling the display to display the target startup information, the method further includes:

[0023] When the startup operation is executed to the reference startup stage, acquiring the target data structure in the basic input and output system, wherein the basic input and output system in the reference startup stage is used to load the operating system of the server before the server is powered on;

[0024] The target startup information is read from the target data structure.

[0025] Optionally, before receiving the power-on instruction, the method further includes:

[0026] receiving a reference storage instruction, wherein the reference storage instruction is used to instruct to store the startup information of the server;

[0027] In response to the reference storage instruction, acquiring storage location information of the memory from the target channel, wherein the storage location information is used to indicate a location in the memory where information is currently allowed to be stored;

[0028] Constructing a target storage instruction carrying the storage location information and the target startup information, wherein the target storage instruction is used to instruct the memory to store the target startup information at the location indicated by the storage location information;

[0029] The target storage instruction is sent to the memory through the target channel, wherein the target startup information stored in the memory is used to be displayed on the display when the server is restarted.

[0030] Optionally, before acquiring the storage location information of the memory from the target channel, the method further includes:

[0031] generating a target switching instruction, wherein the target switching instruction is used to instruct to switch the target channel in the channel controller to an on state;

[0032] Execute the target switching instruction.

[0033] Optionally, the generating a target switching instruction includes:

[0034] Obtaining a controller address of the channel controller and a channel address of the target channel in the channel controller;

[0035] The controller address and the channel address are added to the initial switching instruction to obtain the target switching instruction.

[0036] Optionally, obtaining the controller address of the channel controller includes:

[0037] Generate a target acquisition instruction, wherein the target acquisition instruction is used to acquire an address of a device connected to the processor;

[0038] Execute the target acquisition instruction.

[0039] Optionally, the acquiring storage location information of the memory from the target channel includes:

[0040] Generate a target search instruction, wherein the target search instruction is used to search for an address of a device connected to the target channel of the channel controller;

[0041] The target search instruction is executed, and the searched address is determined as the storage location information.

[0042] Optionally, constructing a target storage instruction carrying the storage location information and the target boot information includes:

[0043] Get initial storage instructions;

[0044] collecting a memory address of the memory;

[0045] Locate a first adding position from the initial storage instruction, wherein the first adding position is a position before an operation type character in the initial storage instruction, wherein the operation type character is a character used to indicate that a write operation is to be performed;

[0046] Adding the memory address to the first adding position in the initial storage instruction to obtain a first storage instruction, wherein the first storage instruction is used to instruct writing information to the memory;

[0047] Locating a second adding position from the first storage instruction, wherein the second adding position is a position between the operation type character and the memory address in the first storage instruction;

[0048] Adding the storage location information to the second adding position in the first storage instruction to obtain a second storage instruction, wherein the second storage instruction is used to instruct to write information to the position indicated by the storage location information in the memory;

[0049] Locating a third adding position from the second storage instruction, wherein the third adding position is a position between the operation type character and the storage position information in the second storage instruction;

[0050] The target power-on information is added to the third adding position in the second storage instruction to obtain the target storage instruction, wherein the target storage instruction is used to instruct to write the target power-on information to the position indicated by the storage position information in the memory.

[0051] According to another embodiment of the embodiment of the present application, a server startup device is further provided, wherein a processor, a channel controller, a memory and a display are deployed on the server, the processor is connected to the memory through the channel controller, the processor is also connected to the display, a basic input and output system is installed on the processor, and the device is applied to the basic input and output system, including:

[0052] A first receiving module, used for receiving a power-on instruction;

[0053] A first response module, used for responding to the startup instruction and executing a startup operation for guiding the server to start up;

[0054] A first generating module, configured to generate a target interface of a target interface type when the startup operation is executed to a target startup phase, wherein the target interface type is an interface type allowed to be called by the basic input and output system in the target startup phase;

[0055] a calling module, configured to call the target interface to obtain target startup information from the memory through the target channel of the channel controller during the target startup phase, wherein the target channel is used to provide communication between the processor and the memory;

[0056] A control module is used to control the display to display the target startup information.

[0057] According to another embodiment of the present application, a computer program product is provided, including a computer program, wherein the computer program is executed by a processor to perform the steps in any of the above method embodiments.

[0058] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.

[0059] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0060] In an embodiment of the present application, a method for starting up a server is proposed. A processor, a channel controller, a memory and a display are deployed on the server. The processor is connected to the memory through the channel controller, and the processor is also connected to the display. A basic input / output system is installed on the processor. The basic input / output system first receives a startup instruction, and then responds to the startup instruction to execute a startup operation for guiding the server to start up. Then, when the startup operation is executed to a target startup phase, a target interface of a target interface type is generated. The target interface type can be an interface type allowed to be called by the basic input / output system in the target startup phase. Afterwards, the target interface is called in the target startup phase to obtain the target startup information from the memory through the target channel of the channel controller. The target channel can provide communication between the processor and the memory; finally, the target boot information is displayed on the control display, that is, by generating a target interface of the target interface type allowed to be called by the basic input and output system in the target startup phase, and calling the target interface to obtain the target boot information from the memory through the target channel of the channel controller, the basic input and output system is realized to directly access the memory through the channel controller, which does not rely on the stability of the link between the CPU and the BMC. Even if the link is abnormal, or the IPMI command cannot be transmitted normally, the target boot information can be obtained normally, avoiding the delay and failure that may occur when the target boot information stored in the memory is indirectly read through the BMC in the related technology. The above technical solution solves the problem of low stability of the server displaying the boot information during the boot process in the related technology, and achieves the technical effect of improving the stability of the server displaying the boot information during the boot process. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 It is a hardware structure block diagram of a computer device of a method for starting up a server in an embodiment of the present application;

[0062] Figure 2 is a flow chart of a method for starting up a server according to an embodiment of the present application;

[0063] Figure 3 is a deployment structure diagram of hardware devices on a server according to an embodiment of the present application;

[0064] Figure 4 is a schematic diagram of a server startup operation according to an embodiment of the present application;

[0065] Figure 5 It is a flow chart of a method for implementing a method of reading target startup information before a server is started according to an embodiment of the present application;

[0066] Figure 6 It is a flow chart of a method for implementing a method of writing target startup information before a server is started according to an embodiment of the present application;

[0067] Figure 7 is a schematic diagram of a server startup method flow according to an embodiment of the present application;

[0068] Figure 8 is a structural block diagram of a server startup device according to an embodiment of the present application;

[0069] Fig. 9 is a schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0070] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0071] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0072] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 1 is a hardware structure block diagram of a computer device of a server startup method according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the above-mentioned server device may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations shown.

[0073] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the server startup method in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories can be connected to the server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0074] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the server device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0075] In this embodiment, a method for starting up a server is provided. Figure 2 is a flow chart of a method for starting up a server according to an embodiment of the present application, such as Figure 2 As shown, a processor, a channel controller, a memory and a display are deployed on the server, the processor is connected to the memory through the channel controller, the processor is also connected to the display, a basic input and output system is installed on the processor, the method is applied to the basic input and output system, and the process includes the following steps:

[0076] Step S12, receiving a power-on instruction;

[0077] Step S14, responding to the power-on instruction, executing a startup operation for guiding the server to start up;

[0078] Step S16, when the startup operation is executed to the target startup stage, generating a target interface of a target interface type, wherein the target interface type is an interface type allowed to be called by the basic input and output system in the target startup stage;

[0079] Step S18, in the target startup phase, calling the target interface to obtain target startup information from the memory through the target channel of the channel controller, wherein the target channel is used to provide communication between the processor and the memory;

[0080] Step S110, controlling the display to display the target startup information.

[0081] Optionally, in this embodiment, Figure 3 is a deployment structure diagram of hardware devices on a server according to an embodiment of the present application, such as Figure 3 As shown, the processor is connected to the memory and the display through a channel controller, and a basic input and output system is installed on the processor, wherein the processor may be but is not limited to a CPU (Central Processing Unit); the channel controller may be but is not limited to a hardware device that can provide data transmission and communication services for devices connected on both sides of its channel, and supports the SMBus (System Management Bus) protocol, such as CA9548; the memory may be but is not limited to a non-volatile memory, such as EEPROM (Electrically Erasable Programmable Read-Only Memory), and the display may be but is not limited to a device that can display boot information; the basic input and output system may be but is not limited to a BIOS (Basic Input Output System) or a UEFI (Unified Extensible Firmware Interface).

[0082] Optionally, in this embodiment, after receiving the power-on command, the basic input / output system responds to the command and executes the startup operation of the server. The startup operation mainly includes the following four stages: SEC (Security) stage, PEI (Pre-EFI Initialization) stage, DXE (Driver Execution Environment) stage and BDS (Boot Device Selection) stage.

[0083] Optionally, in this embodiment, when the startup operation is executed to the target startup stage, a target interface of the target interface type is generated, wherein the target interface type may be but is not limited to an interface type that the basic input / output system allows to call during the target startup stage; the target startup stage may be but is not limited to a stage where an operation of obtaining target startup information needs to be performed. For example, assuming that an operation of obtaining target startup information needs to be performed during the PEI stage, then the target startup stage is the PEI stage, and accordingly, during the PEI stage, the interface type that the basic input / output system allows to call is PEI, then the target interface type is PEI, and the target interface is a PEI interface.

[0084] Optionally, in this embodiment, Figure 4 is a schematic diagram of a server startup operation according to an embodiment of the present application, such as Figure 4 As shown, the channel controller CA9548 includes multiple channels, including CA9548 channel 1, CA9548 channel 2 and CA9548 channel 3, etc. Each channel is responsible for managing and controlling the data transmission and communication between the devices connected on both sides thereof. Assuming that there is a vacant channel CA9548 channel 5 that can be used to provide data transmission and communication for the basic input and output system and the memory, that is, the target channel is CA9548 channel 5, then when the target startup phase is the PEI phase, the method of calling the target interface to obtain the target startup information from the memory through the target channel of the channel controller may include but is not limited to the following steps: when the startup operation performed by the basic input and output system reaches the PEI phase, calling the PEI (target interface type) interface, and obtaining the target startup information from the EEPROM (memory) through CA9548 channel 5 (target channel), wherein the target startup information may be information required before the server is started, such as special offer information, etc. The special offer information may indicate information of the customer to which the server belongs.

[0085] Optionally, in this embodiment, after the basic input and output system obtains the target startup information, it completes the startup operation of the server, enters the operating system, and displays the target startup information on the display.

[0086] Optionally, in this embodiment, if Figure 3As shown, the basic input and output system is connected to the memory through a channel controller, wherein the channel controller can be composed of multiple channel controllers (such as CA9548) connected in parallel, each CA9548 has multiple channels, wherein the vacant channel CA9548 channel 5 can be specifically used for data transmission and communication between the basic input and output system and the memory, and channel 5 of one CA9548 is selected as the target channel, and channel 5 of other CA9548 is selected as the candidate channel. When the target channel fails to work normally, a CA9548 channel 5 that can work normally can be selected from the candidate channels as a new target channel. Through this redundant mechanism of multiple channel controllers connected in parallel, higher stability can be provided for data transmission and communication between the basic input and output system and the memory.

[0087] As an optional solution, the generating of the target interface of the target interface type includes:

[0088] S21, constructing a target interface program in the basic input and output system, wherein the target interface program is used to generate an interface of the target interface type;

[0089] S22, executing the target interface program to obtain the target interface of the target interface type.

[0090] Optionally, in this embodiment, Figure 5 1 is a flow chart of a method for implementing a method of reading target startup information before a server is started according to an embodiment of the present application, such as Figure 5 As shown, the target startup phase is set to the PEI phase, then the method for generating a PEI interface (target interface) of type PEI (target interface type) may include but is not limited to the following steps: constructing a PEI type module (target interface program) of a program that can generate a PEI interface in the basic input and output system, and the PEI type interface can be obtained by running the program.

[0091] As an optional solution, the calling of the target interface to obtain the target startup information from the memory through the target channel of the channel controller includes:

[0092] S31, selecting the target channel from a plurality of channels on the channel controller;

[0093] S32, calling the target channel to obtain the target startup information from the memory;

[0094] S33, performing a temporary storage operation on the target startup information.

[0095] Optionally, in this embodiment, if Figure 5As shown, the method of calling the target interface (PEI interface) to obtain the target power-on information (special offer information) from the memory (EEPROM) through the target channel (CA9548 channel 5) of the channel controller (CA9548) can include but is not limited to the following steps: when the CPU passes CA9548 through the SMBus protocol, it is detected whether the accessed channel is CA9548 channel 5. If the detected channel is CA9548 channel 5, the EEPROM area is accessed through CA9548 channel 5 to read the special offer information, and the read information is temporarily stored for subsequent use; if the detected channel is not CA9548 channel 5, this process is terminated and no subsequent reading operation is performed.

[0096] As an optional solution, performing a temporary storage operation on the target boot information includes:

[0097] S41, constructing an initial data structure of a target data type in the basic input / output system, wherein the data structure of the target data type is a data structure that is allowed to be recorded during the target startup phase;

[0098] S42, storing the target startup information into the initial data structure to obtain a target data structure.

[0099] Optionally, in this embodiment, if Figure 5 As shown, the target power-on information, i.e., the information read from the EEPROM area by the CPU through the CA9548 channel 5 via the SMBus protocol, can be temporarily stored in a manner that includes but is not limited to the following steps: first, an empty data structure (initial data structure) of the target data type is constructed in the basic input and output system, wherein the data structure of the target data type is a data structure that can be recorded in the PEI stage, such as a HOB (Hand-Off Block); then, the target power-on information is stored in the above-mentioned empty HOB to obtain the target data structure.

[0100] As an optional solution, before controlling the display to display the target startup information, the method further includes:

[0101] S51, when the startup operation is executed to a reference startup stage, acquiring the target data structure in the basic input and output system, wherein the basic input and output system in the reference startup stage is used to load the operating system of the server before the server is powered on;

[0102] S52, reading the target startup information from the target data structure.

[0103] Optionally, in this embodiment, the reference startup phase may be but is not limited to the last phase of the startup operation of the server startup in the basic input and output system, namely, the BDS phase. At the same time, the basic input and output system in this phase may load the operating system of the server before the server is started, such as Figure 5 As shown, before the power-on information is displayed on the display, the target data structure is acquired when the startup operation is executed to the BDS stage, the target power-on information (special offer information) stored in the target data structure (HOB) is read, and the read target power-on information is displayed on the display.

[0104] As an optional solution, before receiving the power-on instruction, the method further includes:

[0105] S61, receiving a reference storage instruction, wherein the reference storage instruction is used to instruct to store the startup information of the server;

[0106] S62, in response to the reference storage instruction, obtaining storage location information of the memory from the target channel, wherein the storage location information is used to indicate a location in the memory where information is currently allowed to be stored;

[0107] S63, constructing a target storage instruction carrying the storage location information and the target startup information, wherein the target storage instruction is used to instruct the memory to store the target startup information at the location indicated by the storage location information;

[0108] S64, sending the target storage instruction to the memory through the target channel, wherein the target startup information stored in the memory is used to be displayed on the display when the server is started again.

[0109] Optionally, in this embodiment, if Figure 4 As shown, before receiving the power-on instruction, the target power-on information needs to be stored in the memory, and the method of storing the target power-on information to the corresponding position in the memory area may include but is not limited to the following steps: first, the processor (CPU) receives the reference storage instruction and responds to the instruction, and executes the storage operation for the power-on information of the server; then, the storage location information in the EEPROM area (the location information where the target power-on information can be stored) is obtained, and then a target storage instruction carrying the storage location information and the target power-on information is constructed, and the target storage instruction is sent to the EEPROM through the target channel (CA9548 channel 5).

[0110] Optionally, in this embodiment, the above S61-S64 may be, but is not limited to, executed under the operating system through an I2C tool.

[0111] As an optional solution, before acquiring the storage location information of the memory from the target channel, the method further includes:

[0112] S71, generating a target switching instruction, wherein the target switching instruction is used to instruct to switch the target channel in the channel controller to an open state;

[0113] S72, executing the target switching instruction.

[0114] Optionally, in this embodiment, Figure 6 1 is a flow chart of a method for implementing a method of writing target startup information before a server is started according to an embodiment of the present application. Figure 6 As shown, before obtaining the storage location information in the EEPROM area, it is necessary to ensure that the target channel is in the on state. The method of setting the target channel to the on state can be but is not limited to sending a target switching instruction by using an I2C tool.

[0115] As an optional solution, the generating the target switching instruction includes:

[0116] S81, acquiring a controller address of the channel controller and a channel address of the target channel in the channel controller;

[0117] S82, adding the controller address and the channel address to the initial switching instruction to obtain the target switching instruction.

[0118] Optionally, in this embodiment, if Figure 6 As shown, first, the CPU uses the I2C (Inter-Integrated Circuit, a serial communication protocol for communication between integrated circuits) tool to access CA9548 through the SMBus protocol, and obtains the controller address of the channel controller (that is, the address of CA9548) and the channel address of the target channel (that is, the address of CA9548 channel 5). Assuming that the address of CA9548 and the address of CA9548 channel 5 are 0x70 and 0x20 respectively, the address of CA9548 and the address of CA9548 channel 5 are added to the initial switching instruction ". / i2cset -y 0", and the target switching instruction ". / i2cset -y 0 0x70 0x20" is obtained and executed, so as to switch CA9548 to CA9548 channel 5, that is, to set CA9548 channel 5 to the on state.

[0119] As an optional solution, the acquiring the controller address of the channel controller includes:

[0120] S91, generating a target acquisition instruction, wherein the target acquisition instruction is used to acquire the address of the device connected to the processor;

[0121] S92, executing the target acquisition instruction.

[0122] Optionally, in this embodiment, if Figure 6 As shown, the target acquisition instruction ". / i2cdetect –y 0" is used to acquire the controller address of the channel controller connected to the CPU (that is, the address of CA9548), and at the same time, it is detected whether CA9548 is successfully accessed. If the return value after executing the target acquisition instruction is 0x70, it means that CA9548 is successfully accessed and the address of CA9548 is 0x70, and the subsequent operations are continued. If not detected, this process is terminated and no subsequent operations are performed.

[0123] As an optional solution, the acquiring the storage location information of the memory from the target channel includes:

[0124] S101, generating a target search instruction, wherein the target search instruction is used to search for an address of a device connected to the target channel of the channel controller;

[0125] S102, executing the target search instruction, and determining the searched address as the storage location information.

[0126] Optionally, in this embodiment, if Figure 6 As shown, after switching to the target channel CA9548 channel 5, the target search instruction ". / i2cdetect –y 0" is used to search for the address of the target power-on information area in the memory area connected to CA9548 channel 5 (i.e., the storage location information), and at the same time, it is detected whether the EEPROM is successfully accessed. If the return value after executing the target search instruction is 0x01 0x02, it means that the EEPROM is successfully accessed and the address of the target power-on information area in the memory area is 0x01 0x02. This address is determined as the storage location information, and subsequent operations are continued. If it is not detected, this process is terminated and no subsequent operations are performed.

[0127] As an optional solution, the constructing of the target storage instruction carrying the storage location information and the target boot information includes:

[0128] S111, obtaining an initial storage instruction;

[0129] S112, collecting the memory address of the memory;

[0130] S113, locating a first adding position from the initial storage instruction, wherein the first adding position is a position before an operation type character in the initial storage instruction, wherein the operation type character is a character used to indicate that a write operation is to be performed;

[0131] S114, adding the memory address to the first adding position in the initial storage instruction to obtain a first storage instruction, wherein the first storage instruction is used to instruct to write information to the memory;

[0132] S115, locating a second adding position from the first storage instruction, wherein the second adding position is a position between the operation type character and the memory address in the first storage instruction;

[0133] S116, adding the storage location information to the second adding location in the first storage instruction to obtain a second storage instruction, wherein the second storage instruction is used to instruct to write information to the location indicated by the storage location information in the memory;

[0134] S117, locating a third adding position from the second storage instruction, wherein the third adding position is a position between the operation type character and the storage position information in the second storage instruction;

[0135] S118, adding the target power-on information to the third adding position in the second storage instruction to obtain the target storage instruction, wherein the target storage instruction is used to instruct to write the target power-on information to the position indicated by the storage position information in the memory.

[0136] Optionally, in this embodiment, if Figure 6 As shown, the method of constructing the target storage instruction carrying the storage location information and the target boot information may include but is not limited to:

[0137] Step 1: Get the initial storage instruction ". / i2cset –y 0 i", where the last digit "i" in the initial storage instruction ". / i2cset –y0 i" is an operation character representing input (using the first letter of "input");

[0138] Step 2: Get the EPPROM address (assuming it is 0x50) through the target search instruction ". / i2cdetect –y 0" and collect the address 0x50;

[0139] Step 3: determine the position before the operation type character ("i") in the initial storage instruction ". / i2cset -y 0 i" as the first adding position;

[0140] Step 4: Add the memory address (0x50) to the first add position in the initial storage instruction to obtain the first storage instruction ". / i2cset –y 0 0x50 i", which means writing information to the memory;

[0141] Step 5: Determine the position between the operation type character ("i") and the memory address (0x50) in the first storage instruction ". / i2cset -y 0 0x50 i" as the second adding position;

[0142] Step 6: Add the storage location information (0x01 0x02) to the second adding position in the first storage instruction to obtain the second storage instruction ". / i2cset –y 0 0x50 0x01 0x02 i". The second storage instruction can instruct to write the target boot information to the position indicated by the storage location information in the EEPROM area;

[0143] Step 7: Determine the position between the operation type character ("i") and the storage location information (0x01 0x02) in the second storage instruction ". / i2cset -y 0 0x50 0x01 0x02 i" as the third adding position;

[0144] Step 8: Add the target boot information (special offer information, for example, 0x66) to the third adding position in the second storage instruction “. / i2cset –y 0 0x50 0x01 0x02 i” to obtain the target storage instruction “. / i2cset –y 00x50 0x01 0x02 0x66 i”, wherein the target storage instruction can indicate to write the target boot information (0x66) to the position (0x01 0x02) indicated by the storage position information in the memory (0x50).

[0145] Optionally, in this embodiment, if Figure 6 As shown, the instruction for reading the location (0x01 0x02) indicated by the storage location information in the memory (0x50) and writing the target boot information (0x66) can be “. / i2cset –y 0 0x50 0x010x02; . / i2cget –y 0 0x50”.

[0146] In this embodiment, a method for starting up a server is provided. Figure 7 is a schematic diagram of a server startup method flow according to an embodiment of the present application, such as Figure 7 As shown, it mainly includes the following steps:

[0147] First, write the special price information required by the customer into the EEPROM through the I2C tool under the OS system. The optional method is: the CPU accesses CA9548 through the SMBus protocol and executes the ". / i2cdetect –y 0" command to check that the I2C address of CA9548 is 0x70, and then executes ". / i2cset –y 0 0x70 0x20". This command switches CA9548 to CA9548 channel 5, where 0x20 represents switching to CA9548 channel 5, that is, setting CA9548 channel 5 to the on state. After switching to CA9548 channel 5, execute the ". / i2cdetect –y 0" command to check whether there is a value in the specified address at this time. If detected, the address of the EEPROM detected at this time is 0x50. Fill in the special offer information in the EEPROM with the command “. / i2cset –y 0 0x500x01 0x02 0x66 i”. This command means writing 0x66 to the 0x01 0x02 position in the EEPROM.

[0148] Then, the BIOS accesses the special offer information of the EEPROM through the HOB in the PEI stage. The optional method is: create a PEI type module that reads the EEPROM from the CPU through the SMBus, and determine whether the CPU accesses the CA9548 channel 5 through the CA9548 through the SMBus protocol. If it is not the CA9548 channel 5, the process ends directly. If it is the CA9548 channel 5. After accessing the EEPROM area through the CA9548 channel 5, read the special offer information. Create the HOB in the PEI stage and store the special offer information in the HOB.

[0149] Finally, the BIOS grabs the special offer information stored in the HOB during the BDS phase and displays it on the post screen. An optional method is to read the special offer information in the HOB during the BDS phase of the BIOS and display it on the post screen.

[0150] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0151] In this embodiment, a server startup device is also provided, which is used to implement the above embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0152] Figure 8 is a structural block diagram of a server startup device according to an embodiment of the present application; Figure 8 As shown, a processor, a channel controller, a memory and a display are deployed on the server, the processor is connected to the memory through the channel controller, the processor is also connected to the display, a basic input and output system is installed on the processor, and the device is applied to the basic input and output system, including:

[0153] The first receiving module 802 is used to receive a power-on instruction;

[0154] A first response module 804 is used to respond to the startup instruction and execute a startup operation for guiding the server to start up;

[0155] A first generating module 806 is used to generate a target interface of a target interface type when the startup operation is executed to a target startup phase, wherein the target interface type is an interface type allowed to be called by the basic input and output system in the target startup phase;

[0156] A calling module 808 is used to call the target interface to obtain target startup information from the memory through the target channel of the channel controller during the target startup phase, wherein the target channel is used to provide communication between the processor and the memory;

[0157] The control module 810 is used to control the display to display the target startup information.

[0158] In an exemplary embodiment, the first generating module includes:

[0159] A construction unit, used for constructing a target interface program in the basic input and output system, wherein the target interface program is used for generating an interface of the target interface type;

[0160] A first execution unit is configured to execute the target interface program to obtain the target interface of the target interface type.

[0161] In an exemplary embodiment, the module comprises:

[0162] A screening unit, used for screening the target channel from a plurality of channels on the channel controller;

[0163] A calling unit, used for calling the target channel to obtain the target startup information from the memory;

[0164] The second execution unit is used to perform a temporary storage operation on the target startup information.

[0165] In an exemplary embodiment, the second execution unit is configured to:

[0166] Constructing an initial data structure of the target data type in the basic input and output system, wherein the data structure of the target data type is a data structure that allows being recorded during the target startup phase;

[0167] The target startup information is stored in the initial data structure to obtain a target data structure.

[0168] In an exemplary embodiment, the apparatus further comprises:

[0169] an acquisition module, used for acquiring the target data structure in the basic input and output system when the startup operation is executed to a reference startup stage before the target startup information is displayed on the display, wherein the basic input and output system in the reference startup stage is used to load the operating system of the server before the server is started;

[0170] The reading module is used to read the target startup information from the target data structure.

[0171] In an exemplary embodiment, the apparatus further comprises:

[0172] A second receiving module, configured to receive a reference storage instruction before receiving the power-on instruction, wherein the reference storage instruction is used to instruct to store the power-on information of the server;

[0173] a second response module, configured to respond to the reference storage instruction and obtain storage location information of the memory from the target channel, wherein the storage location information is used to indicate a location in the memory where information is currently allowed to be stored;

[0174] A construction module, configured to construct a target storage instruction carrying the storage location information and the target startup information, wherein the target storage instruction is configured to instruct the memory to store the target startup information at a location indicated by the storage location information;

[0175] A sending module is used to send the target storage instruction to the memory through the target channel, wherein the target startup information stored in the memory is used to be displayed on the display when the server is started again.

[0176] In an exemplary embodiment, the apparatus further comprises:

[0177] A second generating module, configured to generate a target switching instruction before acquiring the storage location information of the memory from the target channel, wherein the target switching instruction is used to instruct to switch the target channel in the channel controller to an on state;

[0178] An execution module is used to execute the target switching instruction.

[0179] In an exemplary embodiment, the second generating module includes:

[0180] A first acquisition unit, configured to acquire a controller address of the channel controller and a channel address of the target channel in the channel controller;

[0181] The first adding unit is used to add the controller address and the channel address to the initial switching instruction to obtain the target switching instruction.

[0182] In an exemplary embodiment, the first acquiring unit is used to:

[0183] Generate a target acquisition instruction, wherein the target acquisition instruction is used to acquire an address of a device connected to the processor;

[0184] Execute the target acquisition instruction.

[0185] In an exemplary embodiment, the second generating module includes:

[0186] A generating unit, used for generating a target search instruction, wherein the target search instruction is used for searching the address of the device connected to the target channel of the channel controller;

[0187] The third execution unit is used to execute the target search instruction and determine the found address as the storage location information.

[0188] In an exemplary embodiment, the building block comprises:

[0189] A second acquisition unit, used for acquiring an initial storage instruction;

[0190] A collection unit, used for collecting the memory address of the memory;

[0191] A first positioning unit, used to locate a first adding position from the initial storage instruction, wherein the first adding position is a position before an operation type character in the initial storage instruction, wherein the operation type character is a character used to indicate that a write operation is to be performed;

[0192] A second adding unit, configured to add the memory address to the first adding position in the initial storage instruction to obtain a first storage instruction, wherein the first storage instruction is used to instruct to write information to the memory;

[0193] A second positioning unit, used for positioning a second adding position from the first storage instruction, wherein the second adding position is a position between the operation type character and the memory address in the first storage instruction;

[0194] A third adding unit, used for adding the storage location information to the second adding location in the first storage instruction to obtain a second storage instruction, wherein the second storage instruction is used for instructing to write information to the location indicated by the storage location information in the memory;

[0195] a third locating unit, configured to locate a third adding position from the second storage instruction, wherein the third adding position is a position between the operation type character and the storage position information in the second storage instruction;

[0196] A fourth adding unit is used to add the target power-on information to the third adding position in the second storage instruction to obtain the target storage instruction, wherein the target storage instruction is used to instruct to write the target power-on information to the position indicated by the storage position information in the memory.

[0197] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0198] An embodiment of the present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the method described in each embodiment of the present application; the computer program product also includes a non-volatile computer-readable storage medium, which stores the computer program, and when executed by a processor, implements the steps of the method described in each embodiment of the present application.

[0199] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0200] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0201] An embodiment of the present application further provides an electronic device, Fig. 9 is a schematic diagram of an electronic device according to an embodiment of the present application, such as Fig. 9 As shown, the electronic device includes a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0202] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0203] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0204] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0205] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for starting up a server, characterized in that: A processor, a channel controller, a memory and a display are deployed on the server. The processor is connected to the memory through the channel controller. The processor is also connected to the display. A basic input and output system is installed on the processor. The method is applied to the basic input and output system, including: Receive power-on command; In response to the power-on instruction, executing a startup operation for guiding the server to start up; In the case where the startup operation is executed to the target startup phase, generating a target interface of a target interface type, wherein the target interface type is an interface type allowed to be called by the basic input and output system in the target startup phase; In the target startup phase, calling the target interface to obtain target startup information from the memory through the target channel of the channel controller, wherein the target channel is used to provide communication between the processor and the memory; Controlling the display to display the target startup information; Wherein, generating a target interface of a target interface type comprises: constructing a target interface program in the basic input and output system, wherein the target interface program is used to generate an interface of the target interface type; executing the target interface program to obtain the target interface of the target interface type; The calling of the target interface to obtain the target startup information from the memory through the target channel of the channel controller includes: selecting the target channel from multiple channels on the channel controller; calling the target channel to obtain the target startup information from the memory; and performing a temporary storage operation on the target startup information; The channel controller includes a plurality of sub-channel controllers connected in parallel, and each of the plurality of channels of the sub-channel controller includes at least one candidate channel. The selecting the target channel from the plurality of channels on the channel controller includes: selecting one candidate channel from the plurality of candidate channels corresponding to the plurality of sub-channel controllers as the target channel, and each of the remaining plurality of candidate channels is used to replace the target channel to obtain the target startup information from the memory when the target channel fails to work normally; Before receiving the power-on instruction, the method further includes: receiving a reference storage instruction, wherein the reference storage instruction is used to instruct to store the power-on information of the server; in response to the reference storage instruction, obtaining storage location information of the memory from the target channel, wherein the storage location information is used to indicate the location in the memory where information is currently allowed to be stored; constructing a target storage instruction carrying the storage location information and the target power-on information, wherein the target storage instruction is used to instruct the memory to store the target power-on information at the location indicated by the storage location information; sending the target storage instruction to the memory through the target channel, wherein the target power-on information stored in the memory is used to be displayed on the display when the server is powered on again; Wherein, the acquiring the storage location information of the memory from the target channel comprises: generating a target search instruction, wherein the target search instruction is used to search for the address of the device connected to the target channel of the channel controller; executing the target search instruction, and determining the searched address as the storage location information; Wherein, executing the target search instruction and determining the found address as the storage location information comprises: executing the target search instruction to search for an address of a memory area of ​​the memory connected to the target channel for storing the target boot information area, and detecting whether the memory is successfully accessed; if it is detected that the memory is successfully accessed, determining the address found by the target search instruction as the storage location information; Wherein, before acquiring the storage location information of the memory from the target channel, the method further includes: generating a target switching instruction, wherein the target switching instruction is used to instruct to switch the target channel in the channel controller to an on state; Execute the target switching instruction.

2. The method according to claim 1, characterized in that The temporarily storing the target startup information includes: Constructing an initial data structure of the target data type in the basic input and output system, wherein the data structure of the target data type is a data structure that allows being recorded during the target startup phase; The target startup information is stored in the initial data structure to obtain a target data structure.

3. The method according to claim 2, characterized in that Before controlling the display to display the target startup information, the method further includes: When the startup operation is executed to the reference startup stage, acquiring the target data structure in the basic input and output system, wherein the basic input and output system in the reference startup stage is used to load the operating system of the server before the server is powered on; The target startup information is read from the target data structure.

4. The method according to claim 1, characterized in that: The generating of the target switching instruction comprises: Obtaining a controller address of the channel controller and a channel address of the target channel in the channel controller; The controller address and the channel address are added to the initial switching instruction to obtain the target switching instruction.

5. The method according to claim 4, characterized in that The obtaining the controller address of the channel controller includes: Generate a target acquisition instruction, wherein the target acquisition instruction is used to acquire an address of a device connected to the processor; Execute the target acquisition instruction.

6. The method according to claim 1, characterized in that The constructing of the target storage instruction carrying the storage location information and the target boot information includes: Get initial storage instructions; collecting a memory address of the memory; Locate a first adding position from the initial storage instruction, wherein the first adding position is a position before an operation type character in the initial storage instruction, wherein the operation type character is a character used to indicate that a write operation is to be performed; Adding the memory address to the first adding position in the initial storage instruction to obtain a first storage instruction, wherein the first storage instruction is used to instruct writing information to the memory; Locating a second adding position from the first storage instruction, wherein the second adding position is a position between the operation type character and the memory address in the first storage instruction; Adding the storage location information to the second adding position in the first storage instruction to obtain a second storage instruction, wherein the second storage instruction is used to instruct to write information to the position indicated by the storage location information in the memory; Locating a third adding position from the second storage instruction, wherein the third adding position is a position between the operation type character and the storage position information in the second storage instruction; The target power-on information is added to the third adding position in the second storage instruction to obtain the target storage instruction, wherein the target storage instruction is used to instruct to write the target power-on information to the position indicated by the storage position information in the memory.

7. A server startup device, characterized in that: A processor, a channel controller, a memory and a display are deployed on the server. The processor is connected to the memory through the channel controller. The processor is also connected to the display. A basic input and output system is installed on the processor. The device is applied to the basic input and output system, including: A first receiving module, used for receiving a power-on instruction; a first response module, configured to respond to the boot instruction and execute a boot operation for guiding the server to boot; a first generation module, configured to generate a target interface of a target interface type when the boot operation is executed to a target boot phase, wherein the target interface type is an interface type allowed to be called by the basic input / output system in the target boot phase; a calling module, configured to call the target interface to obtain target startup information from the memory through the target channel of the channel controller during the target startup phase, wherein the target channel is used to provide communication between the processor and the memory; A control module, used for controlling the display to display the target startup information; The first generation module includes: a construction unit, used to construct a target interface program in the basic input and output system, wherein the target interface program is used to generate an interface of the target interface type; a first execution unit, used to execute the target interface program to obtain the target interface of the target interface type; The module includes: a screening unit, used to screen out the target channel from multiple channels on the channel controller; a calling unit, used to call the target channel to obtain the target startup information from the memory; a second execution unit, used to perform a temporary storage operation on the target startup information; The channel controller includes a plurality of sub-channel controllers connected in parallel, and each of the plurality of channels of the sub-channel controller includes at least one candidate channel. The screening unit is further used to screen out one candidate channel from the plurality of candidate channels corresponding to the plurality of sub-channel controllers as the target channel, and each of the remaining plurality of candidate channels is used to replace the target channel to obtain the target startup information from the memory when the target channel fails to work normally. The device further comprises: a second receiving module, configured to receive a reference storage instruction before receiving the power-on instruction, wherein the reference storage instruction is used to instruct to store the power-on information of the server; a second responding module, configured to respond to the reference storage instruction and obtain storage location information of the memory from the target channel, wherein the storage location information is used to indicate the location in the memory where information is currently allowed to be stored; a constructing module, configured to construct a target storage instruction carrying the storage location information and the target power-on information, wherein the target storage instruction is used to instruct the memory to store the target power-on information at the location indicated by the storage location information; a sending module, configured to send the target storage instruction to the memory through the target channel, wherein the target power-on information stored in the memory is used to be displayed on the display when the server is powered on again; The second response module includes: a generating unit, which is used to generate a target search instruction, wherein the target search instruction is used to search for the address of the device connected to the target channel of the channel controller; a third executing unit, which is used to execute the target search instruction and determine the found address as the storage location information; The third execution unit is further used for: executing the target search instruction to search for an address for storing the target boot information area in a memory area of ​​the memory connected to the target channel, and detecting whether the memory is successfully accessed; if it is detected that the memory is successfully accessed, determining the address found by the target search instruction as the storage location information; Wherein, the device further comprises: A second generating module, configured to generate a target switching instruction before acquiring the storage location information of the memory from the target channel, wherein the target switching instruction is used to instruct to switch the target channel in the channel controller to an on state; An execution module is used to execute the target switching instruction.

8. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method described in any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 6 when executed by a processor.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 6 are implemented.

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