Register extension method

Abstract

The present application relates to a register extension method, which is applied to a slave in a serial peripheral interface communication, wherein the slave includes a normal register and an extended register; the method includes: when a first write command sent by a host is received, according to the first write command, writing the starting address of the extended register to a first preset register, wherein the first preset register is a normal register; when a second write command is received after the first write command, according to the second write command, writing a first quantity to a second preset register, wherein the first quantity is used to indicate the number of extended registers to be written, wherein the second preset register is a normal register; and according to the starting address and the first quantity, writing the data to be written in the second write command to the extended register. The embodiments of the present application can add a large number of available registers without changing the content and format of the SPI communication protocol.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a register extension method. Background Art

[0002] Serial Peripheral Interface (SPI) is a synchronous serial interface, usually used for communication between a host and a peripheral device. Peripheral devices are usually equipped with registers for storing data. However, the number of registers in peripheral devices is limited and often insufficient.

[0003] In the related art, the number of registers is increased by extending the address bits. For example, assuming that the register address bit width is 6 bits, there are 64 register addresses, each register address corresponds to a register, and the number of registers is 64; if the register address bit width is increased to 7 bits, the number of registers increases to 128.

[0004] However, the SPI communication protocol has strict requirements on the data format. It can use 8-bit data stream or 16-bit data stream. If the register address is expanded to 16-bit because the 8-bit width is not enough, on the one hand, it will increase the single communication time and reduce the communication rate. On the other hand, if there are too many registers, a large number of unused registers will appear, causing waste. In addition, a host usually connects to multiple slaves. If the data formats between the slaves are different, it may cause unpredictable consequences. Therefore, a new register expansion method is urgently needed. Summary of the invention

[0005] In view of this, a register extension method is proposed.

[0006] In a first aspect, an embodiment of the present application provides a register extension method, characterized in that it is applied to a slave in a serial peripheral interface communication, and the slave includes a normal register and an extended register; the method includes: when a first write command sent by a host is received, according to the first write command, writing the starting address of the extended register to a first preset register, and the first preset register is a normal register; when a second write command is received after the first write command, according to the second write command, writing a first quantity to a second preset register, the first quantity is used to indicate the number of extended registers to be written, and the second preset register is a normal register; according to the starting address and the first quantity, writing the data to be written in the second write command into the extended register.

[0007] In some possible implementations, the address of the second preset register is greater than the address of the first preset register.

[0008] In some possible implementations, the address of the second preset register is adjacent to the address of the first preset register.

[0009] In some possible implementations, the method further includes: sorting the ordinary registers of the slave machine in ascending order of address; determining the second to last register among the ordinary registers of the slave machine as the first preset register; and determining the first to last register among the ordinary registers of the slave machine as the second preset register.

[0010] In some possible implementations, the first write command includes three bytes; the first byte of the first write command is used to indicate writing data to the first preset register; the second byte of the first write command is used to indicate the amount of data written to the first preset register; and the third byte of the first write command is used to indicate the starting address.

[0011] In some possible implementations, the second write command includes multiple bytes, the first byte of the second write command is used to indicate writing data to the second preset register, the second byte of the second write command is used to indicate the first quantity, and the third byte and subsequent bytes of the second write command are used to indicate the data to be written.

[0012] In some possible implementations, the first number is M, M is an integer and M≥0, the number of extended registers to be written is M+1, and the number of data to be written is M+1; writing the data to be written in the second write command into the extended register according to the starting address and the first number includes: writing the first data to be written in the second write command into the extended register corresponding to the starting address; writing the i+1th data to be written in the second write command into the extended register corresponding to the address of the starting address+i, i is an integer and 0≤i≤M; writing the M+1th data to be written in the second write command into the extended register corresponding to the address of the starting address+M.

[0013] In some possible implementations, the method further includes: when a preset read command is received after the first write command, writing a second quantity to the second preset register according to the preset read command, the second quantity being used to indicate the number of extended registers to be read; reading data from the extended register according to the starting address and the second quantity, and sending the read data to the host.

[0014] In some possible implementations, the preset read command includes two bytes, a first byte of the preset read command is used to indicate reading data from the second preset register, and a second byte of the preset read command is used to indicate the second quantity.

[0015] In some possible implementations, the second number is K, K is an integer and K≥0, the number of extended registers to be read is K+1, and the number of data to be read is K+1; reading data from the extended register according to the starting address and the second number, and sending the read data to the host, includes: reading the first data from the extended register corresponding to the starting address, and sending the first data to the host; reading the j+1th data from the extended register corresponding to the address of the starting address+j, and sending the j+1th data to the host, j is an integer and 0≤j≤K; reading the K+1th data from the extended register corresponding to the address of the starting address+K, and sending the K+1th data to the host.

[0016] According to the register extension method of the embodiment of the present application, when receiving the first write command sent by the host, the slave writes the starting address of the extended register to the first preset register; if the second write command is received after the first write command, the slave writes the first quantity (the number of extended registers to be written) to the second preset register, and then writes the data in the second write command to the extended register according to the starting address and the first quantity, so that the designated ordinary register (the first preset register and the second preset register) can be used as a bridge to access the extended register, thereby realizing the writing of data in the extended register. In this way, a large number of available registers can be added without changing the content and format of the SPI communication protocol, thereby improving the convenience of register use.

[0017] These and other aspects of the present application will become more apparent from the following description of the embodiment(s). BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the present application and, together with the description, serve to explain the principles of the present application.

[0019] Figure 1 A schematic diagram showing an application scenario of a register extension method according to an embodiment of the present application.

[0020] Figure 2 A flowchart of a register extension method according to an embodiment of the present application is shown.

[0021] Figure 3A flowchart of a register extension method according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0022] Various exemplary embodiments, features and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0023] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0024] In addition, in order to better illustrate the present application, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present application can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present application.

[0025] In order to solve the above technical problems, an embodiment of the present application provides a register extension method, which is applied to a slave in a serial peripheral interface communication, and the slave includes a normal register and an extended register; the method includes: when a first write command sent by a host is received, according to the first write command, the starting address of the extended register is written to a first preset register, and the first preset register is a normal register; when a second write command is received after the first write command, according to the second write command, a first quantity is written to a second preset register, and the first quantity is used to indicate the number of extended registers to be written, and the second preset register is a normal register; according to the starting address and the first quantity, the data to be written in the second write command is written into the extended register.

[0026] According to the register extension method of the embodiment of the present application, when receiving the first write command sent by the host, the slave writes the starting address of the extended register to the first preset register; if the second write command is received after the first write command, the slave writes the first quantity (the number of extended registers to be written) to the second preset register, and then writes the data in the second write command to the extended register according to the starting address and the first quantity, so that the designated ordinary register (the first preset register and the second preset register) can be used as a bridge to access the extended register, thereby realizing the writing of data in the extended register. In this way, a large number of available registers can be added without changing the content and format of the SPI communication protocol, thereby improving the convenience of register use.

[0027] The register extension method of the embodiment of the present application is applied to a slave in a serial peripheral interface communication, where the slave refers to a peripheral device connected to the host. The host may be, for example, a microcontroller unit (MCU), and the slave may be, for example, a flash memory, an analog-to-digital converter, a network controller, etc. The present application does not limit the specific device types of the host and the slave.

[0028] Figure 1 A schematic diagram showing an application scenario of a register extension method according to an embodiment of the present application is shown. Figure 1 As shown, the host 110 is connected to the slave 120 via SPI. The slave 120 includes a normal register 121 and an extended register 122. The data exchange between the host 110 and the slave 120 uses the address of the normal register 121.

[0029] The host 110 sends a write command to the slave 120. The slave 120 responds to the write command and writes the data sent by the host into the normal register 121 or the extended register 122. The host 110 sends a read command to the slave. The slave 120 responds to the read command and reads data from the normal register 121 or the extended register 122 and sends the read data to the host 110.

[0030] Figure 2 FIG. 2 is a flow chart showing a register extension method according to an embodiment of the present application. Figure 2 As shown, the method includes:

[0031] Step S210: upon receiving a first write command sent by the host, write the starting address of the extended register into a first preset register according to the first write command, where the first preset register is a common register.

[0032] The first preset register is one of the common registers of the slave. Those skilled in the art may specify the first preset register according to actual conditions, and this application does not limit this.

[0033] In some possible implementations, the common registers of the slave may be sorted from small to large according to the address, and then the penultimate register may be set as the first preset register. For example, assuming there are 32 common registers, namely the 1st common register, the 2nd common register, ..., the 31st register, the 32nd register, and their addresses are 0x00, 0x01, ..., Ox1e, 0x1f, respectively, then the penultimate register (i.e. the 31st register, with the address Ox1e) may be designated as the first preset register.

[0034] During the communication process between the host and the slave, the host may send multiple write commands to the slave, and the write command for writing data to the first preset register may be regarded as the first write command.

[0035] The first write command includes three bytes, the first two bytes are operation codes, and the third byte is data. The first byte of the first write command (i.e., the first operation code) is used to indicate writing data to the first preset register. The second byte of the first write command (i.e., the second operation code) is used to indicate the number of data written to the first preset register. In the first write command, the data written to the first preset register is the starting address of the first extended register, that is, the number of data written to the first preset register is 1, and the value in the second byte is represented by "the number of data - 1", so the value of the second byte of the first write command is 0x00. The third byte of the first write command is used to indicate the data to be written, where the data to be written is the starting address of the extended register.

[0036] The first write command can be exemplified as follows:

[0037] OPCODE1 OPCODE2 REG ADDR1 {3'b010, 5'h1e} 0x00 0x54

[0038] The first write command includes 3 bytes (2 bytes of operation code and 1 byte of data). The first byte OPCODE1 of the first write command is the first operation code of the first write command, and its corresponding value is {3'b010, 5'h1e}, which means: the value of the upper 3 bits is 010 in binary, and the value of the lower 5 bits is 1e in hexadecimal, where the upper 3 bits 010 are the code of the write command, and the lower 5 bits 1e represent the address of the first preset register.

[0039] The second byte OPCODE2 of the first write command is the second operation code of the first write command, and its corresponding value is 0x00.

[0040] The third byte REG ADDR1 of the first write command is the data to be written in the first write command, specifically the starting address of the extension register, and its corresponding value is 0x54 (only as an example).

[0041] After receiving the first write command, the slave obtains the starting address of the extended register to be written from the third byte of the first write command, and then writes the starting address into the first preset register.

[0042] Step S220: When a second write command is received after the first write command, write a first quantity into a second preset register according to the second write command, where the first quantity is used to indicate the quantity of registers to be written.

[0043] Among them, the second preset register is a register whose address is greater than the address of the first preset register in the ordinary register of the slave. The second preset register can be adjacent to the first preset register. For example, assuming that there are 32 ordinary registers, namely the first ordinary register, the second ordinary register, ..., the 31st register, and the 32nd register, whose addresses are 0x00, 0x01, ..., Ox1e, 0x1f, respectively, then the second to last register (i.e., the 31st register, with an address of Ox1e) can be determined as the first preset register, and the first to last register (i.e., the 32nd register, with an address of Ox1f) can be determined as the second preset register.

[0044] The second preset register may also be non-adjacent to the first preset register. For example, the third to last register (i.e., the 30th register, with an address of Ox1d) in the above example may be determined as the first preset register, and the first to last register (i.e., the 32nd register, with an address of Ox1f) may be determined as the second preset register.

[0045] It should be noted that those skilled in the art can set the first preset register and the second preset register according to actual conditions, as long as the address of the second preset register is greater than the address of the first preset register, which makes it convenient to write the address first and then the data.

[0046] The second write command is used to instruct to write a first quantity to the second preset register, where the first quantity is used to indicate the number of extended registers to be written. A first quantity of 0 indicates that the number of extended registers to be written is 1, a first quantity of 1 indicates that the number of extended registers to be written is 2, and so on, the number of extended registers to be written = the first quantity + 1. The second write command also includes data to be written. Each data is written into an extended register. The number of data to be written = the first quantity + 1.

[0047] The second write command includes multiple bytes, the first two bytes are operation codes, and the following bytes are data. The first byte (i.e., the first operation code) of the second write command is used to indicate writing data to the second preset register. The second byte (i.e., the second operation code) of the second command is used to indicate the first quantity. The third byte and subsequent bytes of the second command are used to indicate the data to be written.

[0048] The second write command can be exemplified as follows:

[0049] OPCODE1 OPCODE2 REG DATA1 REG DATA2 REG DATA3 {3'b010, 5'h1f} 0x02 0x23 0x28 0x79

[0050] The second write command includes 5 bytes (2 bytes of operation code and 3 bytes of data). The first byte OPCODE1 of the second write command is the first operation code in the second write command, and its corresponding value is {3'b010, 5'h1f}, which means: the value of the upper 3 bits is 010 in binary, and the value of the lower 5 bits is 1f in hexadecimal, where the upper 3 bits 010 are the code of the write command, and the lower 5 bits 1f represent the address of the second preset register.

[0051] The second byte OPCODE2 of the second write command is the second operation code in the second write command, and its corresponding value is 0x02, which means that the first quantity is 2, and is used to indicate that the number of extended registers to be written is 3 (2+1=3).

[0052] The third byte REG DATA1 of the second write command is the data of the first byte to be written, and its corresponding value is 0x23, which will be stored in the extension register corresponding to the start address.

[0053] The fourth byte REG DATA2 of the second write command is the data of the second byte to be written, and its corresponding value is 0x28, which will be stored in the extended register corresponding to the address of the start address+1.

[0054] The fifth byte REG DATA3 of the second write command is the data of the third byte to be written, and its corresponding value is 0x79, which will be stored in the extended register corresponding to the address of the start address+2.

[0055] After the host sends the first write command to the slave, it will immediately send the second write command or the preset read command. When the slave receives the second write command after the first write command, it obtains the first quantity from the second byte of the second write command and then writes the first quantity into the second preset register.

[0056] Step S230: Write the data to be written in the second write command into the extended register according to the starting address and the first quantity.

[0057] The slave may read the starting address from the first preset register, read the first quantity from the second preset register, and then write the data to be written in the second write command into the extended register according to the starting address and the first quantity.

[0058] In some possible implementations, the first number is M, M is an integer and M≥0, the number of the extended registers to be written is M+1, and the number of the data to be written is also M+1. Step S230 may include: writing the first data to be written in the second write command into the extended register corresponding to the start address; writing the i+1th data to be written in the second write command into the extended register corresponding to the address of the start address+i, i is an integer and 0≤i≤M; writing the M+1th data to be written in the second write command into the extended register corresponding to the address of the start address+M.

[0059] The first number is M, so the number of extended registers to be written is M+1. Since each extended register stores one data, the number of data to be written is also M+1. When the slave writes the data in the second write command into the extended register, the first data to be written in the second write command (i.e., the data in the third byte in the second write command) can be written into the extended register corresponding to the starting address; the second data to be written in the second write command (i.e., the data in the fourth byte in the second write command) can be written into the extended register corresponding to the starting address+1; and so on, the i+1th data to be written in the second write command (i.e., the data in the i+3th byte in the second write command) can be written into the extended register corresponding to the address of the starting address+i, until the last data is written into the extended register, that is, the M+1th data to be written in the second write command (i.e., the data in the M+3th byte in the second write command) can be written into the extended register corresponding to the address of the starting address+M.

[0060] The above embodiment exemplarily illustrates the process of writing data from the slave to the extended register. Figure 3 , the process of a slave reading data from an extended register is illustrated by way of example.

[0061] Figure 3 FIG. 2 is a flow chart showing a register extension method according to an embodiment of the present application. Figure 3 As shown, the method includes:

[0062] Step S310: upon receiving a first write command sent by a host, writing a starting address of an extended register into a first preset register according to the first write command, where the first preset register is a common register.

[0063] It should be noted that step S310 here is the same as the above step S210 and will not be repeated here.

[0064] Step S320: When a preset read command is received after the first write command, a second quantity is written into the second preset register according to the preset read command, where the second quantity is used to indicate the quantity of the extended registers to be read.

[0065] Among them, the preset read command is used to indicate that the number of extended registers to be read (i.e., the second number) is written to the second preset register. In other words, the preset read command can be regarded as a write read command. The second number of 0 indicates that the number of extended registers to be read is 1, and the second number of 1 indicates that the number of extended registers to be read is 2, and so on, the number of extended registers to be read = the second number + 1. Each extended register stores one data, so the number of data to be read = the second number + 1. The preset read command includes two bytes, both of which are operation codes. The first byte of the preset read command (i.e., the first operation code) is used to indicate reading data from the second preset register. The second byte of the preset read command (i.e., the second operation code) is used to indicate the second number.

[0066] The preset read command can be exemplified as follows:

[0067] OPCODE1 OPCODE2 {3'b001, 5'h1f} 0x03

[0068] The above preset read command includes 2 bytes, both of which are operation codes. The first byte OPCODE1 of the preset read command is the first operation code of the preset read command, and its corresponding value is {3'b001, 5'h1f}, which means: the value of the upper 3 bits is represented by binary as 001, and the value of the lower 5 bits is represented by hexadecimal as 1f, wherein the upper 3 bits 001 are the code of the read command, and the lower 5 bits 1f represent the address of the second preset register.

[0069] The second byte OPCODE2 of the preset read command is the second operation code of the preset read command, and its corresponding value is 0x03, indicating that the second quantity is 3.

[0070] When the slave receives a preset read command after the first write command, the slave obtains the second quantity from the second byte of the preset read command, and then writes the second quantity into the second preset register.

[0071] Step S330, reading data from the extended register according to the starting address and the second number, and sending the read data to the host.

[0072] The slave can read the starting address from the first preset register, read the second quantity from the second preset register, and then read data from the extended register according to the starting address and the second quantity, and send the read data to the host.

[0073] In some possible implementations, the second number is K, K is an integer and K≥0, the number of extended registers to be read is K+1, and the number of data to be read is also K+1. Step S330 may include: reading the first data from the extended register corresponding to the starting address, and sending the first data to the host; reading the j+1th data from the extended register corresponding to the address of the starting address+j, and sending the j+1th data to the host, j is an integer and 0≤j≤K; reading the K+1th data from the extended register corresponding to the address of the starting address+K, and sending the K+1th data to the host.

[0074] The second number is K, then the number of extended registers to be read is K+1. Since each extended register stores one data, the number of data to be read is K+1. When the slave reads data from the extended register, it can read the first data from the extended register corresponding to the starting address, and send the first data to the host; read the second data from the extended register corresponding to the address of the starting address+1, and send the second data to the host; and so on, read the j+1th data from the extended register corresponding to the address of the starting address+j, and send the j+1th data to the host, until the last data is read, that is, read the K+1th data from the extended register corresponding to the address of the starting address+K, and send the K+1th data to the host.

[0075] According to the register extension method of the embodiment of the present application, when receiving the first write command sent by the host, the slave writes the starting address of the extended register to the first preset register; if a preset read command is received after the first write command, the slave writes the second quantity (the number of extended registers to be read) to the second preset register, and then reads data from the extended register according to the starting address and the second quantity, and sends the read data to the host, so that the designated common register (the first preset register and the second preset register) can be used as a bridge to access the extended register, and the reading of data in the extended register is realized. In this way, a large number of available registers can be added without changing the content and format of the SPI communication protocol, thereby improving the convenience of register use.

[0076] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the device, system, method and computer program product according to multiple embodiments of the present application. In this regard, each square frame in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the logical function of the specification. In some alternative implementations, the functions marked in the square frame can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square frames can actually be executed substantially in parallel, and they can also be executed in reverse order sometimes, depending on the functions involved.

[0077] It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart, can be implemented by hardware (such as a circuit or ASIC (Application Specific Integrated Circuit)) that performs the corresponding function or action, or can be implemented by a combination of hardware and software, such as firmware.

[0078] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple situations. A single processor or other unit may implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0079] The embodiments of the present application have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes are obvious to those of ordinary skill in the art without departing from the scope of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A register extension method, characterized in that: A slave device used in serial peripheral interface communication, the slave device comprising a common register and an extended register; The method comprises: When receiving a first write command sent by the host, writing the starting address of the extended register into a first preset register according to the first write command, where the first preset register is a common register; In the case where a second write command is received after the first write command, a first quantity is written into a second preset register according to the second write command, wherein the first quantity is used to indicate the quantity of the extended registers to be written, and the second preset register is a common register; Writing the data to be written in the second write command into the extension register according to the starting address and the first quantity; Wherein, the address of the second preset register is greater than the address of the first preset register; The first write command includes three bytes; the first byte of the first write command is used to indicate writing data to the first preset register; the second byte of the first write command is used to indicate the amount of data written to the first preset register; the third byte of the first write command is used to indicate the starting address; The second write command includes multiple bytes, the first byte of the second write command is used to indicate writing data to the second preset register, the second byte of the second write command is used to indicate the first quantity, and the third byte and subsequent bytes of the second write command are used to indicate the data to be written.

2. The method according to claim 1, characterized in that The address of the second preset register is adjacent to the address of the first preset register.

3. The method according to claim 1 or 2, characterized in that: The method further comprises: Sorting the common registers of the slave machine in order of address from small to large; Determine the second to last register in the common register of the slave as the first preset register; The last register among the common registers of the slave is determined as the second preset register.

4. The method according to claim 1, characterized in that The first number is M, M is an integer and M≥0, the number of the extended registers to be written is M+1, and the number of the data to be written is M+1; The step of writing the data to be written in the second write command into the extension register according to the starting address and the first quantity includes: Writing the first data to be written in the second write command into the extension register corresponding to the start address; Write the i+1th data to be written in the second write command into the extended register corresponding to the address of the starting address+i, where i is an integer and 0≤i≤M; The M+1th data to be written in the second write command is written into the extended register corresponding to the address of the starting address+M.

5. The method according to claim 1, characterized in that The method further comprises: When a preset read command is received after the first write command, write a second quantity to the second preset register according to the preset read command, wherein the second quantity is used to indicate the quantity of the extended registers to be read; Data is read from the extension register according to the start address and the second number, and the read data is sent to the host.

6. The method according to claim 5, characterized in that The preset read command includes two bytes, a first byte of the preset read command is used to indicate reading data from the second preset register, and a second byte of the preset read command is used to indicate the second quantity.

7. The method according to claim 5, characterized in that The second number is K, K is an integer and K≥0, the number of the extended registers to be read is K+1, and the number of the data to be read is K+1; The step of reading data from the extension register according to the starting address and the second number, and sending the read data to the host includes: Reading first data from the extended register corresponding to the start address, and sending the first data to the host; Reading j+1th data from the extended register corresponding to the address of the starting address+j, and sending the j+1th data to the host, where j is an integer and 0≤j≤K; Read the K+1th data from the extended register corresponding to the address of the starting address+K, and send the K+1th data to the host.

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