Daisy chain defect detection method, device, storage medium and electronic device
By extracting the line network path information in the daisy chain design layout and performing hash mapping and clustering calculations, the connection errors of the daisy chain can be identified in a timely manner after the wiring is completed, solving the problem that traditional methods cannot identify errors in a timely manner, and improving the timeliness and efficiency of detection.
Patent Information
- Application Number
- CN202411616552.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-13
- Publication Date
- 2025-04-04
- Estimated Expiration
- 2044-11-13
AI Technical Summary
In the design and manufacturing process of daisy chains, due to human factors or technical limitations, daisy chain connection errors may occur. Traditional layout and schematic inspection methods cannot identify these errors in time, resulting in errors that can only be discovered in later functional tests, especially in 2.5D packages, which are more complex in functional tests.
Provide a daisy chain defect detection method, including obtaining the daisy chain design layout after wiring is completed, extracting the line network path information, converting it into a pixel matrix to generate a path image, performing hash mapping to generate a hash list, and determining the line network path with defects through clustering calculation.
This method can promptly identify connection errors or unreasonable design of the daisy chain after wiring is completed, avoiding the complexity and cost of later functional testing, and improving the timeliness of daisy chain defect detection.
Smart Images

Figure CN119150795B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of communication technology, and specifically to a daisy chain defect detection method, device, storage medium and electronic device. Background Art
[0002] Daisy Chain is a signal transmission method that connects multiple devices in series through a series of unidirectional or bidirectional connections to form a chain structure. In 2.5D packaging, the application of daisy chain is reflected in connecting multiple chips on multiple adapters in series and connecting them to the substrate through a silicon adapter. With the increasing demand for 2.5D packaging design, daisy chain design has gradually received attention.
[0003] However, during the design and manufacturing of the daisy chain, daisy chain connection errors may occur due to human factors or technical limitations. After the wiring is completed, the traditional daisy chain layout and schematic (Layout Versus Schematics, LVS) inspection method cannot find the problem of daisy chain design connection errors due to the consistent connectivity of the netlist and layout files. This means that many errors can only be discovered in later functional tests, especially in 2.5D packaging, whose functional testing complexity is much higher than that of 2D packaging.
[0004] In view of this, a method is urgently needed to promptly identify connection errors or unreasonable designs of daisy chains after wiring. Summary of the invention
[0005] The embodiments of the present application provide a daisy chain defect detection method, device, storage medium and electronic device, which can improve the timeliness of daisy chain defect detection.
[0006] In a first aspect, an embodiment of the present application provides a daisy chain defect detection method, comprising:
[0007] After the routing is complete, obtain the daisy chain design layout;
[0008] Extracting all line network path information of the daisy chain design in the daisy chain design layout;
[0009] Convert each of the wire mesh path information into a pixel matrix to generate a path image;
[0010] Performing hash mapping on each of the path images respectively to convert them into a hash list;
[0011] Clustering calculation is performed on all the hash lists, and defective network paths are determined according to the clustering results.
[0012] In the daisy chain defect detection method provided in the embodiment of the present application, the hash mapping is performed on each of the path images to convert them into a hash list, including:
[0013] Using a perceptual hashing algorithm to perform discrete cosine transform (DCT) on each of the path images to obtain a DCT matrix;
[0014] Convert each of the DCT matrices into a hash matrix;
[0015] Each of the hash matrices is flattened in a preset order to obtain a hash list.
[0016] In the daisy chain defect detection method provided in the embodiment of the present application, converting each of the DCT matrices into a hash matrix includes:
[0017] Calculating the average value of all elements in each of the DCT matrices respectively;
[0018] The corresponding DCT matrix is converted into a hash matrix based on the average value.
[0019] In the daisy chain defect detection method provided in the embodiment of the present application, clustering calculation is performed on all the hash lists, and a defective line network path is determined according to the clustering result, including:
[0020] Using K-modes clustering algorithm to perform clustering calculation on all the hash lists to obtain clustering results;
[0021] Determine a hash list that is individually clustered among all the hash lists according to the clustering result;
[0022] The wire net path corresponding to the hash list that is separately clustered is determined as a wire net path with defects.
[0023] In the daisy chain defect detection method provided in the embodiment of the present application, converting each of the wire mesh path information into a pixel matrix to generate a path image includes:
[0024] Convert each of the wire mesh path information into a pixel matrix respectively;
[0025] Each pixel matrix is normalized according to a preset image size to generate a path image.
[0026] In the daisy chain defect detection method provided in the embodiment of the present application, normalizing each pixel matrix according to a preset image size to generate a path image includes:
[0027] Determining a proportional relationship between each of the pixel matrices and the preset image size;
[0028] Setting a corresponding convolution kernel according to the proportional relationship;
[0029] The convolution kernel is used to traverse and scale the corresponding pixel matrix respectively to generate a path image.
[0030] In the daisy chain defect detection method provided in the embodiment of the present application, the converting of the DCT matrix corresponding to the average value into a hash matrix based on the average value includes:
[0031] Initialize a blank hash matrix having the same size as the DCT matrix;
[0032] Traversing each element of the DCT matrix;
[0033] If the value of the element is greater than the average value, the corresponding position of the blank hash matrix is set to 1; if the value of the element is less than or equal to the average value, the corresponding position of the blank hash matrix is set to 0;
[0034] When the traversal is completed, it represents that the DCT matrix corresponding to the average value has been converted into a hash matrix.
[0035] In a second aspect, an embodiment of the present application provides a daisy chain defect detection device, comprising:
[0036] An acquisition unit, used to acquire a daisy chain design layout after the wiring is completed;
[0037] An extraction unit, used to extract all line network path information of the daisy chain design in the daisy chain design layout;
[0038] A conversion unit, used for converting each of the wire mesh path information into a pixel matrix to generate a path image;
[0039] A mapping unit, used for performing hash mapping on each of the path images respectively to convert them into a hash list;
[0040] The clustering unit is used to perform clustering calculation on all the hash lists and determine the defective wire network paths according to the clustering results.
[0041] In a third aspect, the present application provides a storage medium storing a plurality of instructions, wherein the instructions are suitable for loading by a processor to execute any of the above-mentioned daisy chain defect detection methods.
[0042] In a fourth aspect, the present application provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements any of the above-mentioned daisy chain defect detection methods when executing the computer program.
[0043] In summary, the daisy chain defect detection method provided by the embodiment of the present application includes obtaining a daisy chain design layout after wiring is completed; extracting all wire mesh path information of the daisy chain design in the daisy chain design layout; converting each of the wire mesh path information into a pixel matrix to generate a path image; performing hash mapping on each of the path images to convert them into a hash list; performing clustering calculations on all the hash lists, and determining defective wire mesh paths based on the clustering results. This solution can extract the wire mesh path information of the daisy chain design after wiring is completed, and then form a path image for each wire mesh path information and hash map it into a hash list, and then perform clustering calculations on all hash lists, so as to determine defective wire mesh paths based on the clustering results, without the need to wait until the later functional test to detect defective wire mesh paths as in the prior art, that is, through this solution, defective wire mesh paths can be determined in time after wiring is completed. BRIEF DESCRIPTION OF THE DRAWINGS
[0044] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0045] Figure 1 It is a schematic diagram of an application scenario of the daisy chain defect detection method provided in an embodiment of the present application.
[0046] Figure 2 It is a flow chart of the daisy chain defect detection method provided in an embodiment of the present application.
[0047] Figure 3 It is a schematic diagram of a daisy chain design in a 2.5D package provided in an embodiment of the present application.
[0048] Figure 4 This is a defective daisy chain design layout provided in the embodiment of the present application.
[0049] Figure 5 It is a schematic diagram of individually clustered wire network paths provided in an embodiment of the present application.
[0050] Figure 6 This is a modified daisy chain design layout provided in an embodiment of the present application.
[0051] Figure 7 It is a structural schematic diagram of a daisy chain defect detection device provided in an embodiment of the present application.
[0052] Figure 8It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0053] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.
[0054] It should be noted that, in this article, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.
[0055] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0056] In the subsequent description, the suffixes such as "module", "component" or "unit" used to represent elements are only used to facilitate the description of the present application, and have no specific meanings. Therefore, "module", "component" or "unit" can be used in a mixed manner.
[0057] In the description of the present application, it should be noted that the terms "upper", "lower", "left", "right", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, terms such as "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.
[0058] However, during the design and manufacturing process of the daisy chain, due to human error or technical limitations, the daisy chain may have connection errors. After the wiring is completed, the traditional LVS inspection method cannot find out the connection errors of the daisy chain design caused by human factors because the connectivity of the netlist and layout files is consistent. This means that many errors can only be discovered in the later functional testing, especially in 2.5D packaging, whose functional testing complexity is much higher than that of 2D packaging.
[0059] In view of this, there is an urgent need for a method that can promptly identify connection errors or unreasonable designs of daisy chains after wiring.
[0060] Based on this, an embodiment of the present application provides a daisy chain defect detection method, device, storage medium and electronic device. Specifically, the daisy chain defect detection device can be integrated in an electronic device, and the electronic device can be a server or a terminal or other device; wherein the terminal can include a mobile phone, a wearable smart device, a tablet computer, a laptop computer, and a personal computer (PC), etc.; the server can be a single server or a server cluster composed of multiple servers, and can be a physical server or a virtual server.
[0061] For example, Figure 1 As shown, after obtaining the daisy chain design layout, the electronic device can extract all the wire mesh path information of the daisy chain design from the daisy chain design layout, and then convert each wire mesh path information into a path image and hash map it into a hash list, and then perform clustering calculations on all hash lists, so as to determine the defective wire mesh paths according to the clustering results.
[0062] The technical solutions shown in the present application will be described in detail below through specific embodiments. It should be noted that the description order of the following embodiments is not intended to limit the priority order of the embodiments.
[0063] See also Figure 2 , Figure 2 A schematic diagram of a process flow of a daisy chain defect detection method provided in an embodiment of the present application. The specific process flow of the daisy chain defect detection method may be as follows:
[0064] 101. After the wiring is completed, obtain the daisy chain design layout.
[0065] In some embodiments, after routing is completed, the daisy chain design layout may be obtained through an electronic design automation (EDA) tool.
[0066] In 2.5D packaging, the daisy chain design can be Figure 3The defective daisy chain design layout (partial) can be shown as Figure 4 shown.
[0067] 102. Extract all the net path information of the daisy chain design in the daisy chain design layout.
[0068] Specifically, data corresponding to the daisy chain design layout may be determined from a chip layout database, and then all wire network path information of the daisy chain design may be extracted from the data corresponding to the daisy chain design layout.
[0069] All the wire net path information of the daisy chain design layout is stored in the chip layout database. In the embodiment of the present application, the ports that the daisy chain passes through in the daisy chain design are stored in the chip layout database as the path coordinate information formed between the two ports. It can be understood that the path coordinate information is the wire net path information.
[0070] It should be noted that the port refers to the interface or connection point of each chip (module layer) or device that the daisy chain passes through. The port can be a physical connection point, such as an electrical interface for signal transmission on a chip, adapter board or other component. The port can also be a logical connection point, such as a logical connection point in the design that defines the input and output relationship of the signal.
[0071] In some embodiments, the ports that the daisy chain passes through can be paired in order to form port pairs. Afterwards, the path coordinates from one port to another are recorded to obtain the wire network path information between each port pair. For example, when the daisy chain passes through port A, port B, and port C in sequence, two port pairs of port A and port B, and port B and port C can be formed. Afterwards, the path coordinates from port A to port B and the path coordinates from port B to port C are recorded respectively to obtain the wire network path information between port A and port B and the wire network path information between port B and port C.
[0072] 103. Convert each wire mesh path information into a pixel matrix to generate a path image.
[0073] In some embodiments, the maximum coordinate and the minimum coordinate in the wire mesh path information can be determined first, and then the width and height of the pixel matrix can be determined based on the maximum coordinate and the minimum coordinate. Then, an empty pixel matrix is created based on the width and the height. Finally, the coordinate information in the wire mesh path information is filled into the empty pixel matrix to obtain a pixel matrix corresponding to the wire mesh path information.
[0074] It should be noted that the maximum coordinate refers to the maximum horizontal coordinate and the maximum vertical coordinate, and the minimum coordinate refers to the minimum horizontal coordinate and the minimum vertical coordinate.
[0075] It is understandable that in order to determine the uniformity of a plurality of path images, each pixel matrix needs to be normalized. In some embodiments, an image size may be preset, and then each pixel matrix is normalized according to the preset image size.
[0076] That is, in some embodiments, step 103 may be to convert each wire mesh path information into a pixel matrix respectively; normalize each pixel matrix according to a preset image size to generate a path image.
[0077] Specifically, the proportional relationship between each pixel matrix and the preset image size can be determined first; then, the corresponding convolution kernel is set according to the proportional relationship; finally, the convolution kernel is used to traverse and scale the corresponding pixel matrix respectively to generate a path image.
[0078] For example, the preset image size can be set to 1024x1024. For each pixel matrix, its ratio to the preset image size can be calculated. Width ratio = preset width / original width, height ratio = preset height / original height. The size of the convolution kernel is usually directly related to the above ratio. For example, if the width and height ratios are both 2, the convolution kernel can be set to 2x2.
[0079] After determining the convolution kernel, you can create a blank pixel matrix with a preset image size (such as 1024x1024) (each element in the matrix is initialized to 0), and then use the convolution kernel to traverse and scale the corresponding pixel matrix respectively.
[0080] Specifically, when using the convolution kernel to traverse the corresponding pixel matrix, the step size can be set to 1 so that the convolution kernel moves pixel by pixel to cover every possible position. Then, in the area covered by the convolution kernel, the average value of all pixel values in the area is calculated. Finally, the calculated average value is assigned to the corresponding position of the blank pixel matrix. Repeat the above steps until the entire pixel matrix is traversed, and finally a pixel matrix with a preset image size can be obtained. It can be understood that the pixel matrix with a preset image size is the path image.
[0081] In another embodiment, normalization processing may be performed in the process of converting each wire mesh path information into a pixel matrix to generate a plurality of path images.
[0082] Specifically, the preset image size of the path image (for example, 1024x1024) is first determined, and the preset image size is used as the size of the pixel matrix. Then, a blank pixel matrix is created according to the preset image size. After that, the coordinate information in the wire mesh path information is mapped to the blank pixel matrix to obtain the path image.
[0083] It should be noted that, in the process of mapping the coordinate information to the blank pixel matrix, if the coordinate range exceeds the range of 0 to 1023, scaling and offset are required to adapt it to the preset image size.
[0084] 104. Perform hash mapping on each path image respectively to convert it into a hash list.
[0085] In some embodiments, a perceptual hashing algorithm may be used to perform hash mapping on the path image. The perceptual hashing algorithm is indeed a method for generating hash values based on discrete cosine transform (DCT).
[0086] In the specific implementation process, the perceptual hashing algorithm can be used to perform discrete cosine transform on each path image to obtain a DCT matrix; then each DCT matrix is converted into a hash matrix; finally, each hash matrix is flattened in a preset order to obtain a hash list.
[0087] For example, each 1024*1024 pixel matrix may be first subjected to discrete cosine transform to calculate the corresponding 1024*1024 DCT matrix, and then the average value of all elements of each DCT matrix may be calculated, and then each DCT matrix may be converted into a hash matrix based on the average value, and finally each hash matrix may be flattened in a preset order to obtain a hash list (for example, the elements may be flattened into a one-dimensional list in order from left to right and from top to bottom). That is, in some embodiments, the step of "converting each DCT matrix into a hash matrix" may include: respectively calculating the average value of all elements in each DCT matrix; and converting the corresponding DCT matrix into a hash matrix based on the average value.
[0088] It can be understood that the hash matrix is a 01 matrix. In the specific implementation process, a blank hash matrix with the same size as the DCT matrix can be initialized first, and then each element of the DCT matrix is traversed. If the value of the element is greater than the average value, the corresponding position of the blank hash matrix is set to 1; if the value of the element is less than or equal to the average value, the corresponding position of the blank hash matrix is set to 0; when the traversal is completed, it indicates that the DCT matrix corresponding to the average value has been converted into a hash matrix. It should be noted that the corresponding position of the blank hash matrix refers to the position with the same row and column index in the DCT matrix.
[0089] 105. Perform clustering calculation on all hash lists, and determine defective network paths based on the clustering results.
[0090] In the embodiment of the present application, the K-modes clustering algorithm is used to perform clustering calculations on all hash lists. The K-modes clustering algorithm is a clustering method specifically used to process discrete data. Its core idea is to update the cluster center by the mode and use a simple matching distance (such as the Hamming distance) to measure the similarity between samples.
[0091] In the embodiment of the present application, most of the wire net path information of the daisy chain design is almost the same and the length of the hash list is equal. Therefore, the Hamming distance can be used to reflect the similarity between the paths, which helps to cluster similar paths into the same cluster. In the daisy chain design, especially in the 2.5D packaging scenario, the wire net path information corresponding to most of the hash lists that are individually clustered can be determined as defective (daisy chain connection errors or unreasonable) wire net path information. In some embodiments, the wire net paths corresponding to most of the hash lists that are individually clustered can be as follows Figure 5 shown.
[0092] That is, step 105 may specifically be: performing clustering calculations on all hash lists using the K-modes clustering algorithm to obtain clustering results; determining the hash lists that are individually clustered among all hash lists based on the clustering results; and determining the network paths corresponding to the hash lists that are individually clustered as defective network paths.
[0093] The specific process of using the K-modes clustering algorithm to perform clustering calculations on all hash lists may include the following steps:
[0094] Step 1. Select the number of clusters K: You can select an appropriate number of clusters K based on actual needs or through empirical rules (such as the elbow rule).
[0095] Step 2: Initialize cluster centers: Randomly select K hash lists from all hash lists as initial cluster centers.
[0096] Step 3: Calculate the Hamming distance: For each hash list, calculate its Hamming distance with all K cluster centers.
[0097] Step 4: Assign clusters: Assign each hash list to the cluster center closest to it (i.e., select the cluster center with the smallest Hamming distance).
[0098] Step 5. Update the cluster center: For each cluster, find the mode of all hash lists in the cluster (that is, the hash list with the most occurrences) and use it as the new cluster center.
[0099] Step 6, Iteration: Check whether the cluster center has changed. If there is no change, or the preset maximum number of iterations is reached, the algorithm converges. If the cluster center has changed, return to step 3 to continue iterating.
[0100] Step 7: Output clustering results: Each hash list will be assigned to a cluster, and the clustering results of each sample will be output.
[0101] The clustering results are usually stored in an array form, and each element corresponds to a clustering label of a hash list. In some embodiments, the clustering results can also be visualized (such as a scatter plot, a hierarchical clustering diagram, etc.) as needed to better understand the clustering results.
[0102] It is understandable that in the scenario of 2.5D packaging, most of the network path information corresponding to the hash list that is individually clustered can be determined as a network path with defects. Therefore, there may also be network paths that are individually clustered but do not have defects. Therefore, in some embodiments, after step 105, the network path with defects can also be reviewed and verified. When the review and verification result is consistent with the detection result obtained by the defect detection method of the present application, it is confirmed that the network path is actually defective, and the defective network path is corrected. In some embodiments, the corrected daisy chain design layout (part) can be as follows Figure 6 shown.
[0103] In summary, the daisy chain defect detection method provided by the embodiment of the present application includes obtaining a daisy chain design layout after wiring is completed; extracting all wire mesh path information of the daisy chain design in the daisy chain design layout; converting each wire mesh path information into a pixel matrix to generate a path image; performing hash mapping on each path image respectively to convert it into a hash list; performing clustering calculations on all hash lists, and determining defective wire mesh paths based on the clustering results. This solution can promptly determine defective wire mesh paths after wiring is completed, and then these defective wire mesh paths can be reviewed and corrected separately to finally obtain the correct daisy chain design layout. There is no need to wait until the later functional test to detect the defective wire mesh path as in the prior art, that is, this solution can improve the timeliness of daisy chain defect detection, thereby reducing the huge time and money costs in the later stage.
[0104] In order to better implement the daisy chain defect detection method provided in the embodiment of the present application, the embodiment of the present application also provides a daisy chain defect detection device, wherein the meanings of the terms are the same as those in the above-mentioned daisy chain defect detection method, and the specific implementation details can refer to the description in the method embodiment.
[0105] See also Figure 7 , Figure 7 2 is a schematic diagram of the structure of a daisy chain defect detection device provided in an embodiment of the present application. The daisy chain defect detection device may include an acquisition unit 201, an extraction unit 202, a conversion unit 203, a mapping unit 204 and a clustering unit 205.
[0106] An acquisition unit 201 is used to acquire a daisy chain design layout after the wiring is completed;
[0107] An extraction unit 202, used to extract all the line net path information of the daisy chain design in the daisy chain design layout;
[0108] The conversion unit 203 is used to convert each wire mesh path information into a pixel matrix to generate a path image.
[0109] A mapping unit 204, configured to perform hash mapping on each path image to convert it into a hash list;
[0110] The clustering unit 205 is used to perform clustering calculation on all hash lists and determine defective network paths according to the clustering results.
[0111] The specific implementation of each of the above units can refer to the above-mentioned embodiment of the daisy chain defect detection method, which will not be described one by one here.
[0112] In summary, the daisy chain defect detection device provided in the embodiment of the present application can obtain the daisy chain design layout through the acquisition unit 201 after the wiring is completed; the extraction unit 202 extracts all the wire mesh path information of the daisy chain design in the daisy chain design layout; the conversion unit 203 converts each wire mesh path information into a pixel matrix to generate a path image. The mapping unit 204 performs hash mapping on each path image respectively to convert it into a hash list; the clustering unit 205 performs clustering calculations on all hash lists, and determines the wire mesh path with defects based on the clustering results. This solution can improve the timeliness of daisy chain defect detection, thereby reducing the huge time and money costs brought later.
[0113] The present application also provides an electronic device, in which the daisy chain defect detection device of the present application can be integrated, such as Figure 8 As shown, it shows a schematic diagram of the structure of the electronic device involved in the embodiment of the present application, specifically:
[0114] The electronic device may include one or more processors 301 of processing cores and one or more computer-readable storage media memories 302 and other components. Those skilled in the art will appreciate that Figure 8 The electronic device structure shown in the figure does not constitute a limitation on the electronic device, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.
[0115] The processor 301 is the control center of the electronic device, which uses various interfaces and lines to connect various parts of the entire electronic device, and executes various functions of the electronic device and processes data by running or executing the software program and / or the present application stored in the memory 302, and calling the data stored in the memory 302, so as to monitor the electronic device as a whole. Optionally, the processor 301 may include one or more processing cores; preferably, the processor 301 may integrate an application processor and a modem processor, wherein the application processor mainly processes the operation storage medium, user interface and application program, etc., and the modem processor mainly processes wireless communication. It is understandable that the above-mentioned modem processor may not be integrated into the processor 301.
[0116] The memory 302 can be used to store software programs and the present application. The processor 301 executes various functional applications and data processing by running the software programs and the present application stored in the memory 302. The memory 302 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating storage medium, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc.; the data storage area may store data created according to the use of the electronic device, etc. In addition, the memory 302 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage devices. Accordingly, the memory 302 may also include a memory controller to provide the processor 301 with access to the memory 302.
[0117] Although not shown, the electronic device may further include a display unit, an input unit, a power supply, etc., which will not be described in detail herein. Specifically in this embodiment, the processor 301 in the electronic device will load the executable files corresponding to the processes of one or more application programs into the memory 302 according to the following instructions, and the processor 301 will run the application programs stored in the memory 302, thereby realizing various functions, as follows:
[0118] After the routing is complete, obtain the daisy chain design layout;
[0119] Extract all the net path information of the daisy chain design in the daisy chain design layout;
[0120] Convert each wire mesh path information into a pixel matrix to generate a path image;
[0121] Perform hash mapping on each path image separately to convert it into a hash list;
[0122] Perform clustering calculations on all hash lists and determine defective network paths based on the clustering results.
[0123] A person of ordinary skill in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be completed by instructions, or by controlling related hardware through instructions. The instructions may be stored in a computer-readable storage medium and loaded and executed by a processor.
[0124] To this end, an embodiment of the present application provides a storage medium in which a plurality of instructions are stored, and the instructions can be loaded by a processor to execute the steps in any one of the generation methods provided in the embodiments of the present application. For example, the instructions can execute the following steps:
[0125] After the routing is complete, obtain the daisy chain design layout;
[0126] Extract all the net path information of the daisy chain design in the daisy chain design layout;
[0127] Convert each wire mesh path information into a pixel matrix to generate a path image;
[0128] Perform hash mapping on each path image separately to convert it into a hash list;
[0129] Perform clustering calculation on all hash lists, and determine defective network paths according to the clustering results. The specific implementation of each of the above operations can be found in the previous embodiments, and will not be repeated here.
[0130] The storage medium may include: a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.
[0131] Since the instructions stored in the storage medium can execute the steps in any method provided in the embodiments of the present application, the beneficial effects that can be achieved by any method provided in the embodiments of the present application can be achieved. Please refer to the previous embodiments for details and will not be repeated here.
[0132] The daisy chain defect detection method, device, storage medium and electronic device provided by the present application are respectively introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the core idea of the present application; at the same time, for technical personnel in this field, according to the idea of the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.
Claims
1. A daisy chain defect detection method, characterized in that: include: After the 2.5D package routing is completed, the daisy chain design layout is obtained through EDA tools; Extracting all wire net path information of the daisy chain design in the daisy chain design layout, wherein the wire net path information is path coordinate information formed between two ports among the ports passed by the daisy chain in the daisy chain design, wherein the ports are physical connection points and / or logical connection points; Convert each of the wire mesh path information into a pixel matrix respectively; Determining a proportional relationship between each of the pixel matrices and a preset image size; Setting a corresponding convolution kernel according to the proportional relationship; The convolution kernel is used to traverse and scale the corresponding pixel matrix respectively to generate a path image; Using a perceptual hashing algorithm to perform discrete cosine transform on each of the path images to obtain a corresponding DCT matrix; Convert each of the DCT matrices into a hash matrix respectively; Flatten each of the hash matrices according to a preset order to obtain a corresponding hash list; Using K-modes clustering algorithm to perform clustering calculation on all the hash lists to obtain clustering results; Determine a hash list that is individually clustered among all the hash lists according to the clustering result; The wire net path corresponding to the hash list that is separately clustered is determined as a wire net path with defects.
2. The daisy chain defect detection method according to claim 1, characterized in that: The converting each of the DCT matrices into a hash matrix comprises: Calculating the average value of all elements in each of the DCT matrices respectively; The corresponding DCT matrix is converted into a hash matrix based on the average value.
3. The daisy chain defect detection method according to claim 2, characterized in that: The converting the DCT matrix corresponding to the average value into a hash matrix based on the average value includes: Initialize a blank hash matrix having the same size as the DCT matrix; Traversing each element of the DCT matrix; If the value of the element is greater than the average value, the corresponding position of the blank hash matrix is set to 1; if the value of the element is less than or equal to the average value, the corresponding position of the blank hash matrix is set to 0; When the traversal is completed, it represents that the DCT matrix corresponding to the average value has been converted into a hash matrix.
4. A daisy chain defect detection device, characterized in that: include: An acquisition unit, used to acquire the daisy chain design layout through an EDA tool after the wiring is completed; An extraction unit, configured to extract all wire net path information of the daisy chain design in the daisy chain design layout, wherein the wire net path information is path coordinate information formed between two ports among the ports passed by the daisy chain in the daisy chain design, wherein the ports are physical connection points and / or logical connection points; A conversion unit, used to convert each of the line grid path information into a pixel matrix respectively; Determining a proportional relationship between each of the pixel matrices and a preset image size; and setting a corresponding convolution kernel according to the proportional relationship; The convolution kernel is used to traverse and scale the corresponding pixel matrix respectively to generate a path image; A mapping unit is used to perform discrete cosine transform on each of the path images using a perceptual hash algorithm to obtain a corresponding DCT matrix; convert each of the DCT matrices into a hash matrix; and flatten each of the hash matrices in a preset order to obtain a corresponding hash list; A clustering unit, used for performing clustering calculation on all the hash lists by using a K-modes clustering algorithm to obtain a clustering result; Determine a hash list that is individually clustered among all the hash lists according to the clustering result; The wire net path corresponding to the hash list that is separately clustered is determined as a wire net path with defects.
5. A storage medium, characterized in that: The storage medium stores a plurality of instructions, and the instructions are suitable for being loaded by a processor to execute the daisy chain defect detection method according to any one of claims 1 to 3.
6. An electronic device, characterized in that: The invention comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the daisy chain defect detection method according to any one of claims 1 to 3 is implemented.
Citation Information
Patent Citations
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CN109741325A
Method, system and equipment for detecting copy-paste tampered image
CN115965581A