Display device

Abstract

The present disclosure provides an electronic device having a first region, a second region, and a third region disposed between the first region and the second region. The electronic device comprises a substrate, a first signal line and a second signal line. The first signal line is arranged on the substrate, at least one part of the first signal line is arranged in the third area and extends in the first direction, at least the other part of the first signal line is arranged in the third area and extends in the second direction, and the first direction is different from the second direction. The second signal line is arranged on the substrate, at least one part of the second signal line is arranged in the third area and extends along the first direction, and at least the other part of the second signal line is arranged in the third area and extends along the second direction. Wherein at least another portion of the first signal line overlaps at least a portion of the second signal line.

Description

[0001] This application is a divisional application of the Chinese patent application with application number 202110474326.8 and invention name “Display Device”. The filing date of the original application is April 29, 2021. Technical Field

[0002] The present disclosure relates to an electronic device, and more particularly to a display device. Background Art

[0003] Compared to digging a hole in the display panel to accommodate the camera module, placing the camera module under the display panel can effectively reduce the frame or help increase the size of the display area. However, when connecting the pixels of the general display area and the display area with the camera module, the pixels may write the wrong voltage, or the wire design connecting the pixels of the above two areas may affect the display quality. Summary of the invention

[0004] The present disclosure provides an electronic device having a first area, a second area, and a third area disposed between the first area and the second area. The electronic device includes a substrate, a first signal line, and a second signal line. The first signal line is disposed on the substrate, wherein at least a portion of the first signal line is disposed in the third area and extends along a first direction, and at least another portion of the first signal line is disposed in the third area and extends along a second direction, and the first direction is different from the second direction. The second signal line is disposed on the substrate, wherein at least a portion of the second signal line is disposed in the third area and extends along the first direction, and at least another portion of the second signal line is disposed in the third area and extends along the second direction. At least another portion of the first signal line overlaps at least a portion of the second signal line.

[0005] In order to make the above features and advantages of the present disclosure more obvious and understandable, embodiments are given below with reference to the accompanying drawings for detailed description as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1A and Figure 1B They are respectively a top view schematic diagram and a partial enlarged schematic diagram of a display device according to a first embodiment of the present disclosure;

[0007] Figure 2A and Figure 2B They are respectively a top view schematic diagram and a partial enlarged schematic diagram of a display device according to a second embodiment of the present disclosure;

[0008] Figure 3A and Figure 3B are respectively a top view schematic diagram and a partial enlarged schematic diagram of a display device according to a third embodiment of the present disclosure;

[0009] Figure 4is a partial enlarged schematic diagram of a display device according to a fourth embodiment of the present disclosure;

[0010] Figure 5 is a partial enlarged schematic diagram of a display device according to a fifth embodiment of the present disclosure;

[0011] Figure 6 is a schematic top view of a display device according to a sixth embodiment of the present disclosure. DETAILED DESCRIPTION

[0012] The present disclosure may be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, in order to facilitate the reader's understanding and the simplicity of the drawings, the various drawings in the present disclosure only depict a portion of the electronic device / display device, and certain elements in the drawings are not drawn according to actual scale. In addition, the number and size of each element in the drawings are for illustration only and are not intended to limit the scope of the present disclosure. For example, for clarity, the relative size, thickness and position of each film layer, region or structure may be reduced or enlarged.

[0013] Certain words are used throughout this disclosure and in the claims that follow to refer to specific components. It will be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that have the same function but different names. In the following description and claims, the words "having" and "including" are open-ended words and should therefore be interpreted as meaning "including but not limited to..."

[0014] Directional terms mentioned herein, such as "upper", "lower", "front", "back", "left", "right", etc., are only with reference to the directions of the accompanying drawings. Therefore, the directional terms used are for illustration and not for limiting the present disclosure. It should be understood that when an element or a film layer is referred to as being disposed "on" or "connected to" another element or film layer, the element or film layer may be directly on or directly connected to the other element or film layer, or there may be an intervening element or film layer between the two (indirect case). Conversely, when an element or film layer is referred to as being "directly" "on" or "directly connected to" another element or film layer, there may be no intervening element or film layer between the two.

[0015] The terms "approximately", "equal to", "equal", "same", "substantially" or "approximately" mentioned herein generally represent falling within 10% of a given value or range, or represent falling within 5%, 3%, 2%, 1% or 0.5% of a given value or range. In addition, the phrases "a given range is a first value to a second value", "a given range falls within the range of a first value to a second value" indicate that the given range includes the first value, the second value and other values ​​therebetween.

[0016] In some embodiments of the present disclosure, terms such as "connection" and "interconnection" may refer to two structures being in direct contact with each other, or may refer to two structures not being in direct contact with each other, with other structures disposed between the two structures, unless otherwise defined. Terms such as "connection" and "interconnection" may also include situations where both structures are movable or both structures are fixed. In addition, the terms "electrically connected" and "coupled" include any direct and indirect electrical connection means.

[0017] In the following embodiments, the same or similar elements will use the same or similar reference numerals, and their redundant description will be omitted. In addition, the features in different embodiments can be mixed and matched as long as they do not violate the spirit of the invention or conflict with each other, and simple equivalent changes and modifications made in accordance with this specification or claims are still within the scope of this disclosure. In addition, the terms "first", "second", etc. mentioned in this specification or claims are only used to name different elements or distinguish different embodiments or scopes, and are not used to limit the upper or lower limit of the number of elements, nor are they used to limit the manufacturing order or setting order of the elements.

[0018] The electronic device disclosed herein may include a display device, an antenna device, a sensing device, a light-emitting device, a touch display, a curved display, or a free shape display, but is not limited thereto. The electronic device may include a bendable or flexible electronic device. The electronic device may, for example, include a liquid crystal, a light-emitting diode, a quantum dot (QD), fluorescence, phosphorescence, other suitable display media, or a combination of the above materials, but is not limited thereto. The light-emitting diode may, for example, include an organic light-emitting diode (OLED), a sub-millimeter light-emitting diode (miniLED), a micro LED, or a quantum dot light-emitting diode (quantum dot LED, which may include QLED, QDLED), or other suitable materials, or a combination of the above materials, but is not limited thereto. The display device may, for example, include a spliced ​​display device, but is not limited thereto. The antenna device may, for example, be a liquid crystal antenna, but is not limited thereto. The antenna device may, for example, include an antenna splicing device, but is not limited thereto. It should be noted that the electronic device can be any combination of the above, but is not limited thereto. In addition, the appearance of the electronic device can be rectangular, circular, polygonal, a shape with curved edges, or other suitable shapes. The electronic device can have a peripheral system such as a drive system, a control system, a light source system, etc. to support the display device, the antenna device, or the splicing device. The following will use a display device as an electronic device to illustrate the content of this disclosure, but this disclosure is not limited thereto.

[0019] The display device disclosed herein may be any type of display device, such as a self-luminous display device or a non-self-luminous display device. The self-luminous display device may include a light-emitting diode, a light conversion layer or other suitable materials, or a combination thereof, but is not limited thereto. The light-emitting diode may, for example, include an organic light emitting diode (OLED), a sub-millimeter light-emitting diode (mini LED), a micro light-emitting diode (micro LED) or a quantum dot light-emitting diode (quantum dot LED, which may include QLED, QDLED), but is not limited thereto. The light conversion layer may include a wavelength conversion material and / or a light filtering material, and the light conversion layer may, for example, include fluorescence, phosphor, quantum dot (Quantum Dot, QD), other suitable materials or a combination thereof, but is not limited thereto. The non-self-luminous display device may include a liquid crystal display device, but is not limited thereto. The following text will use a display device as an electronic device to illustrate the contents of the present disclosure, but the present disclosure is not limited thereto.

[0020] Figure 1A and Figure 1B They are respectively a top view schematic diagram and a partial enlarged schematic diagram of a display device according to the first embodiment of the present disclosure. Figure 1A and Figure 1B The display device 1 has a first area A1, a second area A2, and a third area A3 disposed between the first area A1 and the second area A2, but is not limited thereto. The display device 1 may increase or decrease one or more areas according to needs. For example, the display device 1 may also have a fourth area A4 located outside the second area A2. The fourth area A4 may be located on one side or multiple sides of the second area A2. Figure 1A The fourth area A4 is schematically shown to surround the second area A2, but the present invention is not limited thereto. Figure 1A and Figure 1B In order to make multiple areas clearly identifiable, the fourth area A4 (please refer to Figure 1A ) is represented by irregularly arranged dots, and the background color of the third area A3 is represented by regularly arranged and sparsely arranged dots (please refer to Figure 1B ), the background color of the second area A2 is represented by regularly arranged dense dots, while the first area A1 is represented by no background color.

[0021] The first area A1 is, for example, a functional display area. In addition to providing a display function, the first area A1 may also provide additional functions, for example, a sensing module (not shown) in the display device 1 may be disposed below a display panel (not shown) in the first area A1 to provide functions such as photographing, photography, or biometric identification (such as fingerprint identification), but is not limited thereto. The second area A2 is, for example, a general display area, that is, the second area A2 provides a display function. The third area A3 is, for example, a wiring area or a circuit turning area S. Through the circuit turning, the correct pixel voltage can be written to the first area A1. The fourth area A4 is, for example, a peripheral area. The peripheral area can be used to set circuits or driving elements, etc., but is not limited thereto. The first area, the second area, the third area, and the fourth area disclosed herein may each include all the stacks and film layers of the display device in the area in the top-down direction, but the disclosure is not limited thereto.

[0022] Please refer to Figure 1A , the display device 1 may include a first driving circuit 11, a second driving circuit 12, and a third driving circuit 13. The first driving circuit 11, the second driving circuit 12, and the third driving circuit 13 are arranged in the fourth area A4, wherein the first driving circuit 11 is arranged on one side of the second area A2, the second driving circuit 12 is arranged on the other side of the second area A2 and opposite to the first driving circuit 11, and the third driving circuit 13 is arranged on one side of the second area A2 adjacent to the first driving circuit 11 and the second driving circuit 12. In other embodiments, the above-mentioned driving circuits may be arranged in the second area A2, but the present disclosure is not limited thereto.

[0023] The first driving circuit 11 and the second driving circuit 12 are, for example, gate driving circuits. The first driving circuit 11 and the second driving circuit 12 can provide gate signals to the pixels located in the first area A1 and the second area A2 through the signal line SL, but the present invention is not limited thereto. The third driving circuit 13, for example, includes an external pin bonding circuit that can be used to bond with an external circuit, but the present invention is not limited thereto.

[0024] Please refer to Figure 1B The display device 1 may include a first sub-pixel P1, and the number of the first sub-pixels P1 in the display device 1 may be multiple. The multiple first sub-pixels P1 are arranged in the first area A1 (refer to Figure 1B The plurality of first sub-pixels P1 may include a plurality of first red sub-pixels R1, a plurality of first green sub-pixels G1, and a plurality of first blue sub-pixels B1, but are not limited thereto. The stacking structure of each color sub-pixel in the normal direction DV of the display device 1 may include a pixel electrode located on the active device array substrate side and a filter pattern located on the color filter substrate side, but are not limited thereto. The active device array substrate and the color filter substrate are known components of the display panel, so they will not be described in detail here.

[0025] In the first zone A1 (ref. Figure 1B In the area without background color in the middle), multiple first sub-pixels P1 of the same color (such as multiple first red sub-pixels R1, multiple first green sub-pixels G1 or multiple first blue sub-pixels B1) can be arranged in the first direction D1, and multiple first sub-pixels P1 of different colors can be arranged alternately in the second direction D2, but are not limited to this. Each first green sub-pixel G1 can form a first pixel unit (or first pixel) U1 with a first red sub-pixel R1 and a first blue sub-pixel B1 adjacent to each other in the second direction D2. In some embodiments, the display device 1 may also include multiple white sub-pixels W. The multiple white sub-pixels W may be arranged in the first area A1 and / or the third area A3 (refer to Figure 1B In the first area A1, each white sub-pixel W may be arranged between two adjacent first pixel units U1 in the first direction D1, but is not limited thereto. Although not shown, the stacked structure of the white sub-pixel W in the normal direction DV of the display device 1 may include a pixel electrode located on the side of the active component array substrate, and the white sub-pixel W may be electrically connected to an additional signal line (not shown), but is not limited thereto. When the display device 1 is in a display mode, the white sub-pixel W may be turned off (making the white sub-pixel W appear in a dark state). When the display device 1 is in a camera mode (or a sensing mode), the white sub-pixel W may be turned on (making the white sub-pixel W appear in a bright state) to increase the overall brightness and utilize the camera module in the first area A1 to acquire an image of the target object.

[0026] The display device 1 may further include a second sub-pixel P2, and the number of the second sub-pixels P2 in the display device 1 may be plural. The plurality of second sub-pixels P2 are arranged in the second area A2 (refer to Figure 1B The plurality of second sub-pixels P2 may include a plurality of second red sub-pixels R2, a plurality of second green sub-pixels G2, and a plurality of second blue sub-pixels B2, but the present invention is not limited thereto. The stacking structure of each color sub-pixel in the normal direction DV of the display device 1 may include a pixel electrode located on the active device array substrate side and a filter pattern located on the color filter substrate side, but the present invention is not limited thereto.

[0027] In the second zone A2 (ref. Figure 1B In the region of dots with dense regular arrangement, a plurality of second sub-pixels P2 of the same color (such as a plurality of second red sub-pixels R2, a plurality of second green sub-pixels G2 or a plurality of second blue sub-pixels B2) may be arranged in the first direction D1, and a plurality of second sub-pixels P2 of different colors may be arranged alternately in the second direction D2, but the present invention is not limited thereto. Each second green sub-pixel G2 may form a second pixel unit (or second pixel) U2 with a second red sub-pixel R2 and a second blue sub-pixel B2 adjacent to each other in the second direction D2.

[0028] In some embodiments, by making the first area A1 (refer to Figure 1B The resolution of the area without background color is lower than that of the second area A2 (refer to Figure 1B The method of making the resolution of the first area A1 lower than the resolution of the second area A2 may include making the area of ​​one of the plurality of first sub-pixels P1 larger than the area of ​​one of the plurality of second sub-pixels P2. In some embodiments, Figure 1B As shown, the area of ​​each first sub-pixel P1 may be larger than the area of ​​each second sub-pixel P2. For example, the area of ​​the first red sub-pixel R1 may be larger than the area of ​​the second red sub-pixel R2, the area of ​​the first green sub-pixel G1 may be larger than the area of ​​the second green sub-pixel G2, and the area of ​​the first blue sub-pixel B1 may be larger than the area of ​​the second blue sub-pixel B2. In some embodiments, the area of ​​the sub-pixel described in the present disclosure may be defined, for example, by the area of ​​the pixel electrode of the sub-pixel, or by the size of the opening of the black matrix layer disposed on the pixel electrode, but the present disclosure is not limited thereto. For example, please refer to Figure 1B , assuming Figure 1B The frame line range of each sub-pixel in is the range enclosed by the black matrix, then the area of ​​the sub-pixel is substantially equal to the maximum length of the opening along the first direction D1 multiplied by the maximum width along the second direction D2, that is, the first red sub-pixel R1 has a first length (or maximum length) L1 and a first width (or maximum width) W1, then the area of ​​R1 of the first red sub-pixel R1 is substantially equal to the first length L1 multiplied by the first width W1; the second red sub-pixel R2 has a second length (or maximum length) L2 and a second width (or maximum width) W2, then the area of ​​R2 of the second red sub-pixel is substantially equal to the second length L2 multiplied by the second width W2, and the areas of other sub-pixels can be calculated according to the above definition, so it is not repeated. In other embodiments, the first sub-pixel P1 and the second sub-pixel P2 can have the same length but different widths, or have the same width but different lengths, but the present disclosure is not limited to this.

[0029] The display device 1 may further include a first signal line SL1, and the number of the first signal lines SL1 in the display device 1 may be plural. The plurality of first signal lines SL1 are disposed in the first area A1 (refer to Figure 1B No background area) and the third area A3 (refer to Figure 1BThe plurality of first signal lines SL1 are, for example, gate lines, and the plurality of first signal lines SL1 extend from the second area A2 through the third area A3 into the first area A1 to provide gate signals to the plurality of first sub-pixels P1 in the first area A1 and the plurality of second sub-pixels P2 in the second area A2. In the plurality of first signal lines SL1, for example, Figure 1B As shown, the first signal line SL11, for example, electrically connects a plurality of second red sub-pixels R2 located in the second area A2 and a plurality of first red sub-pixels R1 located in the first area A1, the first signal line SL12, for example, electrically connects a plurality of second green sub-pixels G2 located in the second area A2 and a plurality of first green sub-pixels G1 located in the first area A1, and the first signal line SL13, for example, electrically connects a plurality of second blue sub-pixels B2 located in the second area A2 and a plurality of first blue sub-pixels B1 located in the first area A1.

[0030] In the third zone A3 (ref. Figure 1B In the region of dots with relatively sparse regular arrangement), a plurality of first signal lines SL1 are respectively connected between a first pixel unit U1 and a corresponding second pixel unit U2, so as to respectively electrically connect the first red sub-pixel R1 of the first pixel unit U1 with the corresponding second red sub-pixel R2 of the second pixel unit U2, the first green sub-pixel G1 of the first pixel unit U1 with the corresponding second green sub-pixel G2 of the second pixel unit U2, and the first blue sub-pixel B1 of the first pixel unit U1 with the corresponding second blue sub-pixel B2 of the second pixel unit U2. The second red sub-pixel R2, the second green sub-pixel G2 and the second blue sub-pixel B2 of each second pixel unit U2 are respectively electrically connected with the first red sub-pixel R1, the first green sub-pixel G1 and the first blue sub-pixel B1 of the corresponding first pixel unit U1 through the plurality of first signal lines SL1, so that the correct voltages can be written into the plurality of first sub-pixels P1 in the first region A1, thereby reducing the probability of screen abnormality and improving display quality.

[0031] Under the above wiring architecture, in the third area A3 (refer to Figure 1B In the region where the dots are arranged sparsely in a regular pattern, the length of one of the plurality of first signal lines SL1 may be different from the length of another of the plurality of first signal lines SL1. For example, in the third region A3, the length of the first signal line SL11 may be greater than the length of the first signal line SL12, and the length of the first signal line SL12 may be greater than the length of the first signal line SL13, but the present invention is not limited thereto. In addition, among the plurality of first signal lines SL1, at least one first signal line SL1 is located in the first region A1 (refer to Figure 1BNo background area) and the third area A3 (refer to Figure 1B For example, at least a portion of the first signal line SL11 (or the first signal line SL12) extends along the first direction D1 in the first area A1, and at least another portion of the first signal line SL11 extends along the second direction D2 in the third area A3. The first direction D1 is different from the second direction D2 and both are perpendicular to the normal direction DV. Figure 1B The first direction D1 is schematically shown to be perpendicular to the second direction D2, but the present invention is not limited thereto. In other embodiments, the angle between the first direction D1 and the second direction D2 may be greater than, equal to, or less than 90 degrees.

[0032] According to different requirements, the display device 1 may further include other elements or film layers. For example, the display device 1 may further include a third sub-pixel P3, and the number of the third sub-pixels P3 in the display device 1 may be multiple. The multiple third sub-pixels P3 are arranged in the second area A2 (refer to Figure 1B The plurality of third sub-pixels P3 may include a plurality of third red sub-pixels R3, a plurality of third green sub-pixels G3, and a plurality of third blue sub-pixels B3, but the present invention is not limited thereto. The stacking structure of each color sub-pixel in the normal direction DV of the display device 1 may include a pixel electrode located on the active device array substrate side and a filter pattern located on the color filter substrate side, but the present invention is not limited thereto.

[0033] In the second zone A2 (ref. Figure 1B In the region of dots with dense regular arrangement in the middle), a plurality of third sub-pixels P3 of the same color (such as a plurality of third red sub-pixels R3, a plurality of third green sub-pixels G3 or a plurality of third blue sub-pixels B3) may be arranged in the first direction D1, and a plurality of second sub-pixels P2 of different colors may be arranged alternately in the second direction D2, but not limited thereto. Each third green sub-pixel G3 may constitute a third pixel unit (or referred to as a third pixel) U3 with a third red sub-pixel R3 and a third blue sub-pixel B3 adjacent to each other in the second direction D2. In addition, the area of ​​one of the plurality of third sub-pixels P3 may be equal to the area of ​​one of the plurality of second sub-pixels P2. In some embodiments, the area of ​​each third sub-pixel P3 may be equal to the area of ​​each second sub-pixel P2.

[0034] The display device 1 may further include a second signal line SL2, and the number of the second signal lines SL2 in the display device 1 may be multiple. The multiple second signal lines SL2 are electrically connected to the multiple third sub-pixels P3, wherein the multiple second signal lines SL2 are electrically insulated from the multiple first sub-pixels P1 and pass through the multiple first sub-pixels P1. For example, the multiple second signal lines SL2 are, for example, gate lines, and the multiple second signal lines SL2 may be arranged in the first area A1 (refer to Figure 1B No background area) and the third area A3 (refer to Figure 1B In the area with sparsely arranged dots. Figure 1B As shown, the plurality of second signal lines SL2 may extend through the first area A1 and the third area A3 located on opposite sides of the first area A1, and connect the second area A2 located on opposite sides of the first area A1 (see Figure 1B A plurality of third sub-pixels P3 arranged in the first direction D1 and in the region of the dots arranged regularly and densely are electrically connected. Figure 1B As shown, the second signal line SL21, for example, electrically connects a plurality of third red sub-pixels R3 located in the second area A2 and arranged in the first direction D1, the second signal line SL22, for example, electrically connects a plurality of third green sub-pixels G3 located in the second area A2 and arranged in the first direction D1, and the second signal line SL23, for example, electrically connects a plurality of third blue sub-pixels B3 located in the second area A2 and arranged in the first direction D1.

[0035] Under the above wiring architecture, in the third area A3 (refer to Figure 1B In the region with sparsely regularly arranged dots), the length of one of the plurality of second signal lines SL2 may be different from the length of another of the plurality of second signal lines SL2. For example, in the third region A3, the length of the second signal line SL23 may be greater than the length of the second signal line SL21, and the length of the second signal line SL21 may be greater than the length of the second signal line SL22, but is not limited thereto. In other embodiments, the length of the second signal line SL21 may also be greater than the length of the second signal line SL22, and the length of the second signal line SL22 may also be greater than the length of the second signal line SL23. Depending on actual design requirements, the lengths of the second signal lines SL21 to SL22 may be the same or different, but the present disclosure is not limited thereto. In addition, among the plurality of second signal lines SL2, at least one second signal line SL2 is in the first region A1 (refer to Figure 1B No background area) and the third area A3 (refer to Figure 1B For example, at least a portion of the second signal line SL21 (or the second signal line SL22, or the second signal line SL23) extends along the first direction D1 in the first area A1, and at least another portion of the second signal line SL21 (or the second signal line SL22, or the second signal line SL23) extends along the third direction D3 in the third area A3. The first direction D1 is different from the third direction D3 and both are perpendicular to the normal direction DV. Figure 1BIt is schematically shown that the first direction D1 is perpendicular to the third direction D3, and the third direction D3 is in the same direction as the second direction D2, but the present invention is not limited thereto. In other embodiments, the angle between the first direction D1 and the third direction D3 may be greater than, equal to, or less than 90 degrees.

[0036] The display device 1 may further include a fourth sub-pixel P4, and the number of the fourth sub-pixels P4 in the display device 1 may be plural. The plurality of fourth sub-pixels P4 are arranged in the second area A2 (refer to Figure 1B The plurality of fourth sub-pixels P4 may include a plurality of fourth red sub-pixels R4, a plurality of fourth green sub-pixels G4, and a plurality of fourth blue sub-pixels B4, but the present invention is not limited thereto. The stacking structure of each color sub-pixel in the normal direction DV of the display device 1 may include a pixel electrode located on the active device array substrate side and a filter pattern located on the color filter substrate side, but the present invention is not limited thereto.

[0037] In the second zone A2 (ref. Figure 1B In the region of dots with dense regular arrangement in the middle), a plurality of fourth sub-pixels P4 of the same color (such as a plurality of fourth red sub-pixels R4, a plurality of fourth green sub-pixels G4 or a plurality of fourth blue sub-pixels B4) may be arranged in the first direction D1, and a plurality of fourth sub-pixels P4 of different colors may be arranged alternately in the second direction D2, but not limited thereto. Each fourth green sub-pixel G4 may constitute a fourth pixel unit (or referred to as fourth pixel) U4 with a fourth red sub-pixel R4 and a fourth blue sub-pixel B4 adjacent to each other in the second direction D2. In addition, the area of ​​one of the plurality of fourth sub-pixels P4 may be equal to the area of ​​one of the plurality of second sub-pixels P2. In some embodiments, the area of ​​each fourth sub-pixel P4 may be equal to the area of ​​each second sub-pixel P2.

[0038] The display device 1 may further include a third signal line SL3, and the number of the third signal lines SL3 in the display device 1 may be multiple. The multiple third signal lines SL3 are electrically connected to the multiple fourth sub-pixels P4. For example, the multiple third signal lines SL3 are gate lines, and the multiple third signal lines SL3 may be arranged in the second area A2 (refer to Figure 1B In the area with densely arranged dots. Figure 1B As shown, the plurality of third signal lines SL3 may extend through the second area A2, and the plurality of third signal lines SL3 do not contact the first area A1 (refer to Figure 1B No background area) and the third area A3 (refer to Figure 1B In the plurality of third signal lines SL3, for example Figure 1BAs shown, the third signal line SL31, for example, electrically connects a plurality of fourth red sub-pixels R4 located in the second area A2 and arranged in the first direction D1, the third signal line SL32, for example, electrically connects a plurality of fourth green sub-pixels G4 located in the second area A2 and arranged in the first direction D1, and the third signal line SL33, for example, electrically connects a plurality of fourth blue sub-pixels B4 located in the second area A2 and arranged in the first direction D1.

[0039] The display device 1 may further include a fourth signal line SL4 and a fifth signal line SL5, and the number of the fourth signal line SL4 and the fifth signal line SL5 in the display device 1 may be multiple. The multiple fourth signal lines SL4 are electrically connected to the multiple sub-pixels arranged in the second direction D2. For example, the multiple fourth signal lines SL4 and the multiple fifth signal lines SL5 are, for example, data lines, and the multiple fourth signal lines SL4 (such as the fourth signal line SL41, the fourth signal line SL42, and the fourth signal line SL43) may be arranged in the first area A1 (refer to Figure 1B No background area) and the second area A2 (refer to Figure 1B In the region of the dots with denser regular arrangement), the plurality of fifth signal lines SL5 may be disposed in the second region A2 and not pass through the first region A1. In some embodiments, the plurality of fifth signal lines SL5 are not electrically connected to the first sub-pixel P1 in the first region A1.

[0040] In this embodiment, if Figure 1B As shown, the first area A1 (refer to Figure 1B The non-background area) is mainly composed of large-area sub-pixels, which may include first sub-pixels P1. In some embodiments, a white sub-pixel W may be provided in the first area A1, and the white sub-pixel W may be provided between two adjacent first pixel units U1 in the first direction D1. Figure 1B The third area A3 (refer to the third area A4) is mainly composed of small-area sub-pixels, which may include the second sub-pixel P2, the third sub-pixel P3 and the fourth sub-pixel P4. Figure 1BThe third area A3 is a region where the dots are arranged regularly and sparsely (the region where the dots are arranged regularly and sparsely) is located between the first area A1 and the second area A2, wherein the width in the first direction D1 from the edge of the pixel electrode (not shown) of the second sub-pixel P2 of the second area A2 to the edge of the pixel electrode of the color sub-pixel of the first sub-pixel P1 of the first area A1 closest to the pixel electrode is the width W3 of the third area A3. In some embodiments, the white sub-pixel W may be located in the third area A3 in addition to the first area A1. The display device 1 may further include a shielding element 10. The shielding element 10 may be arranged corresponding to the third area A3. For example, the shielding element 10 may at least partially overlap or completely overlap with the third area A3 in the normal direction DV to shield the circuit located in the third area A3. The width W10 of the shielding element 10 in the first direction D1 may be greater than or less than the width W3 of the third area A3. In some embodiments, in addition to the third area A3, the shielding element 10 may further shield the first signal line SL1 or other signal lines outside the third area A3, such as shielding the first signal line SL1, the second signal line SL2 and the fourth signal line SL4 in the first area A1 and shielding the first signal line SL1 to the fourth signal line SL4 in the second area A2. The shielding element 10 may include a black matrix or other light-shielding or light-absorbing materials, but is not limited thereto. By setting a portion of the white sub-pixel W in the third area A3, it is helpful to reduce the area of ​​the first sub-pixel P1 of the first area A1 and / or the second sub-pixel P2 of the second area A2 occupied by the line turning area S, thereby helping to reduce the coverage area or width of the shielding element 10 in the area outside the third area A3, so that the sub-pixel (e.g., the first sub-pixel P1 or the second sub-pixel P2) in the area outside the third area A3 remains unchanged. In some embodiments, the width W3' of the shielding element 10 in the second area A2 in the first direction D1 may be less than the width W3 of the shielding element 10 in the third area A3 in the first direction D1.

[0041] For easy identification, Figure 1B The first signal line SL1 is represented by a thick solid line, and the second signal line SL2, the third signal line SL3, and the fourth signal line SL4 are represented by thin solid lines. However, it should be understood that the line width of the first signal line SL1 may be the same as or different from the line width of any one of the second signal line SL2, the third signal line SL3, and the fourth signal line SL4. In addition, the wiring method of the first signal line SL1 to the fourth signal line SL4 and the relative arrangement relationship between the first signal line SL1 to the fourth signal line SL4 and the plurality of sub-pixels, or the area or shape of each sub-pixel, etc. may be changed as required, without being limited to one or more sub-pixels. Figure 1BThe display is limited. For example, although not shown, the plurality of second signal lines SL2 may not extend into the first area A1, but may bypass the first area A1 from one side of the first area A1 (e.g., the side where the first area A1 connects to the second area A2 or the side where the first area A1 is not adjacent to the second region and the side of the second area A2) or multiple sides to electrically connect the plurality of third sub-pixels P3 in the second area A2 located on the opposite side of the first area A1. In addition, although not shown, the second pixel unit U2 may also be swapped with any third pixel unit U3 arranged in the second direction D2. Any embodiment of the present disclosure may be changed as described above, and will not be repeated below.

[0042] exist Figure 1B The right-pointing arrow indicates the Figure 1A The gate signal of the first driving circuit 11 is represented by the left arrow. Figure 1A The gate signal of the second driving circuit 12 is Figure 1B As shown, the gate signals of the plurality of pixel units on the odd-numbered rows RO and the plurality of pixel units on the even-numbered rows RE can be respectively represented by Figure 1A The first driving circuit 11 and the second driving circuit 12 are provided.

[0043] Figure 2A and Figure 2B They are respectively top views of a display device according to a second embodiment of the present disclosure.

[0044] And a partial enlarged diagram. Please refer to Figure 2A and Figure 2B , the display device 1A and Figure 1A and Figure 1B

[0045] The main differences between the display device 1 are described as follows.

[0046] In the display device 1A, the terminal portion EP of the second signal line SL2 is arranged in the third area A3 (refer to Figure 2B In other words, the second signal line SL2 does not extend into the first area A1 (refer to Figure 2B In the area without background color in the middle), that is, the second signal line SL2 does not overlap with the first area A1 in the normal direction DV. This design helps to reduce the width W3 of the third area A3, thereby reducing the width W10 of the shielding element 10 in the third area A3 in the first direction D1. In addition, this design also helps to reduce the influence of the second signal line SL2 on the aperture ratio of the white sub-pixel W at the boundary of the first area A1, which helps to improve the display quality or improve the aperture ratio of the first sub-pixel P1 and the white sub-pixel W in the first area A1, thereby improving the light transmittance of the first area A1.

[0047] exist Figure 2BThe right-pointing arrow indicates the Figure 2A The gate signal of the first driving circuit 11 is represented by the left arrow. Figure 2A The gate signal of the second driving circuit 12 is Figure 2B As shown, the gate signals of the plurality of third pixel units U3 located on the left and right sides of the first area A1 can be respectively Figure 2A The gate signals of the second pixel units U2 located on the left and right sides of the first area A1 and the first pixel units U1 located in the first area A1 can be provided by the first driving circuit 11 and the second driving circuit 12. Figure 2A The gate signals of the plurality of fourth pixel units U4 can be provided by the first driving circuit 11 and the second driving circuit 12. Figure 2A The first driving circuit 11 and the second driving circuit 12 are provided together. By providing gate signals bidirectionally to the plurality of sub-pixels in the first area A1 and the second area A2, the number of signal lines in the third area A3 can be reduced, thereby reducing dark lines at the junction and improving display quality.

[0048] Figure 3A and Figure 3B They are respectively top views of a display device according to a third embodiment of the present disclosure.

[0049] And a partial enlarged diagram. Please refer to Figure 3A and Figure 3B , the display device 1B and Figure 2A and Figure 2B

[0050] The main differences between the display device 1A are described as follows.

[0051] In the display device 1B, a plurality of first signal lines SL1 are connected to the first area A1 (see Figure 3B The third signal lines SL3 are disconnected in the second area A2 (refer to Figure 3B The gate signals of the plurality of second pixel units U2 located on the left side of the first area A1 and the plurality of first pixel units U1 located on the left half of the first area A1 can be obtained by Figure 2A The gate signals of the plurality of second pixel units U2 located on the right side of the first area A1 and the plurality of first pixel units U1 located on the right half of the first area A1 can be provided by the first driving circuit 11. Figure 2A The gate signals of the plurality of fourth pixel units U4 located in the left half of the second area A2 can be provided by Figure 2A The gate signal of the fourth pixel unit U4 located in the right half of the second area A2 can be provided by the first driving circuit 11. Figure 2AThe second driving circuit 12 is provided. By bidirectionally providing gate signals to a plurality of sub-pixels located in the first area A1 and the second area A2, uneven gate load can be improved, thereby improving display quality. In addition, the terminal portion EP of the second signal line SL2 in the display device 1B is arranged in the third area A3, so the number of signal line windings in the third area A3 can be reduced, thereby reducing dark lines at the junction.

[0052] Figure 4 is a partial enlarged schematic diagram of a display device according to the fourth embodiment of the present disclosure. Figure 4 , the display device 1C and Figure 1A and Figure 1B The main differences between the display device 1 are described as follows.

[0053] In the display device 1C, the third area A3 (see Figure 4 The area with densely arranged dots in the regular pattern is located in the first area A1 (refer to Figure 4 The plurality of sub-pixels of the same color are arranged in the second direction D2, and the plurality of sub-pixels of different colors are alternately arranged in the first direction D1. In addition, the first signal line SL1, the second signal line SL2, and the third signal line SL3 are, for example, gate lines, and the fourth signal line SL4 and the fifth signal line SL5 are, for example, data lines. The first signal line SL1 is located in the first area A1 (refer to Figure 4 The second signal line SL2 electrically connects a plurality of first pixel units U1 arranged in the first direction D1 and a plurality of second pixel units U2 arranged in the first direction D1 and located on the opposite side of the first area A1. The second signal line SL2 electrically connects a plurality of third pixel units U3 arranged in the first direction D1 and located on the opposite side of the first area A1 and not electrically connected to the first pixel units U1. The third signal line SL3 electrically connects a plurality of third pixel units U3 arranged in the first direction D1 and located on the opposite side of the first area A1 and not electrically connected to the first pixel units U1. Figure 4The plurality of fourth pixel units U4 arranged in the first direction D1 and in the region of the dots (in the region of the dots arranged more regularly) are electrically connected. The odd number of signal lines SLO arranged in the second direction D2 are, for example, electrically connected to a driving circuit (not shown) located on the left side of the first area A1 to provide a gate signal from the driving circuit to the corresponding plurality of sub-pixels. The even number of signal lines SLE arranged in the second direction D2 are, for example, connected to a driving circuit (not shown) located on the right side of the first area A1 to provide a gate signal from the driving circuit to the corresponding plurality of sub-pixels. Data signals are provided bidirectionally to the plurality of sub-pixels located in the first area A1 and the second area A2. The fourth signal line SL4 may have a line turn in the third area A3, and the fourth signal line SL4 electrically connects a plurality of fourth sub-pixels P4 (e.g., red sub-pixels R4) arranged in the second direction D2 of the second area A2 and a plurality of first sub-pixels P1 (e.g., red sub-pixels R1) arranged in the second direction D2 of the first area A1. The wiring design allows the first sub-pixels P1 of the first area A1 to be written with the correct signal to reduce the probability of screen abnormality. The terminal portion EP of the fifth signal line SL5 is disposed in the third area A3. In other words, the fifth signal line SL5 does not extend into the first area A1 and does not pass through the first area A1.

[0054] Figure 5 is a partial enlarged schematic diagram of a display device according to the fifth embodiment of the present disclosure. Figure 5 , the display device 1D and Figure 4 The main differences between the display device 1C are described as follows.

[0055] In the display device 1D, the terminal portion EP of the second signal line SL2 is arranged in the third area A3 (refer to Figure 5 In other words, the second signal line SL2 does not extend into the first area A1 (refer to Figure 5 In the area without background color in the middle), that is, the second signal line SL2 does not overlap with the first area A1 in the normal direction DV. This design helps to reduce the width W3 of the third area A3, thereby reducing the width W10 of the shielding element 10 in the third area A3 in the first direction D1. In addition, this design also helps to reduce the impact of the second signal line SL2 on the aperture ratio of the first area A1, thereby helping to improve the display quality or improve the pixel aperture ratio or light transmittance of the first area A1.

[0056] exist Figure 5In the embodiment, the data signals of the plurality of third pixel units U3 located on the left and right sides of the first area A1 can be provided by the driving circuit (not shown) located on the left side and the driving circuit (not shown) located on the right side of the first area A1, respectively. The data signals of the plurality of second pixel units U2 located on the left and right sides of the first area A1 and the plurality of first pixel units U1 located in the first area A1 can be provided jointly by the driving circuit (not shown) located on the left side and the driving circuit (not shown) located on the right side of the first area A1. The data signals of the plurality of fourth pixel units U4 can be provided jointly by the driving circuit (not shown) located on the left side and the driving circuit (not shown) located on the right side of the first area A1.

[0057] In other embodiments, although not shown, the plurality of first signal lines SL1 are connected to the first area A1 (see Figure 5 The third signal lines SL3 can be disconnected in the second area A2 (refer to Figure 5 The dots in the area with dense regular arrangement can be disconnected, such as Figure 3A Embodiment. The data signals of the plurality of second pixel units U2 located on the left side of the first area A1 and the plurality of first pixel units U1 located in the left half of the first area A1 can be provided by a driving circuit (not shown) located on the left side of the first area A1, and the data signals of the plurality of second pixel units U2 located on the right side of the first area A1 and the plurality of first pixel units U1 located in the right half of the first area A1 can be provided by a driving circuit (not shown) located on the right side of the first area A1. The data signals of the plurality of fourth pixel units U4 located in the left half of the second area A2 can be provided by a driving circuit (not shown) located on the left side of the first area A1, and the data signals of the fourth pixel units U4 located in the right half of the second area A2 can be provided by a driving circuit (not shown) located on the right side of the first area A1. By providing data signals bidirectionally to the plurality of sub-pixels located in the first area A1 and the second area A2, the uneven gate load can be improved, thereby improving the display quality. And the terminal portion EP of the second signal line SL2 is arranged in the third area A3, so the number of signal line windings in the third area A3 can be reduced, thereby reducing the dark lines at the junction.

[0058] Figure 6 is a schematic top view of a display device according to a sixth embodiment of the present disclosure. Figure 6In the display device 1E, the first driving circuit 11 is disposed on one side of the second area A2, and is electrically connected to a portion of the plurality of first signal lines SL1, a portion of the plurality of second signal lines SL2, and a portion of the plurality of third signal lines SL3. The second driving circuit 12 is disposed on the other side of the second area A2, and is electrically connected to another portion of the plurality of first signal lines SL1, another portion of the plurality of second signal lines SL2, and another portion of the plurality of third signal lines SL3. In addition, the first driving circuit 11 is electrically connected to the second driving circuit 12 via a conductor CL. In some embodiments, opposite ends of the conductor CL may be electrically connected to the third driving circuit 13. By electrically connecting the first driving circuit 11 and the second driving circuit 12 via the conductor CL, poor display caused by different output signals or voltages of the first driving circuit 11 and the second driving circuit 12 can be reduced.

[0059] In summary, in the embodiments disclosed herein, by making the area of ​​the first sub-pixel larger than the area of ​​the second sub-pixel, the effect of the diffraction phenomenon on the camera module disposed in the first area can be reduced, thereby improving the imaging quality of the camera module. In addition, by electrically connecting the second sub-pixel to the corresponding first sub-pixel through the first signal line, the probability of writing the wrong voltage can be reduced, thereby improving the display quality. Alternatively, the dark lines at the junction can be reduced through the wiring design of the second signal line. Alternatively, through the bilateral driving method, the uneven gate load can be improved, thereby improving the display quality.

[0060] The above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some or all of the technical features can be replaced by equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present disclosure.

[0061] Although the embodiments and advantages of the present disclosure have been disclosed as above, it should be understood that any person skilled in the art can make changes, substitutions and modifications without departing from the spirit and scope of the present disclosure, and the features between the embodiments can be arbitrarily mixed and replaced with each other to form other new embodiments. In addition, the scope of protection of the present disclosure is not limited to the processes, machines, manufacturing, material compositions, devices, methods and steps in the specific embodiments described in the specification. Any person skilled in the art can understand the current or future developed processes, machines, manufacturing, material compositions, devices, methods and steps from the disclosure content of the present disclosure, as long as they can implement substantially the same functions or obtain substantially the same results in the embodiments described herein, they can all be used according to the present disclosure. Therefore, the scope of protection of the present disclosure includes the above-mentioned processes, machines, manufacturing, material compositions, devices, methods and steps. In addition, each claim constitutes a separate embodiment, and the scope of protection of the present disclosure also includes the combination of each claim and embodiment. The scope of protection of the present disclosure shall be determined by the attached claims.

Claims

1. An electronic device, characterized in that: The electronic device has a first area, a second area, and a third area disposed between the first area and the second area, and the electronic device includes: substrate; A first signal line is disposed on the substrate, wherein at least a portion of the first signal line is disposed in the third region and extends along a first direction, and at least another portion of the first signal line is disposed in the third region and extends along a second direction, and the first direction is different from the second direction; and A second signal line is disposed on the substrate, wherein at least a portion of the second signal line is disposed in the third region and extends along the first direction, and at least another portion of the second signal line is disposed in the third region and extends along the second direction, The at least another portion of the first signal line overlaps with the at least portion of the second signal line.

2. The electronic device according to claim 1, characterized in that: Also includes: The sensing module is arranged in the first area.

3. The electronic device according to claim 2, characterized in that: The sensing module is a camera module.

4. The electronic device according to claim 1, characterized in that: Also includes: Another first signal line is disposed on the substrate, wherein in the third region, a length of the first signal line is different from a length of the another first signal line.

5. The electronic device according to claim 4, characterized in that: At least a portion of the other first signal line is disposed in the third region to extend along the first direction, and at least another portion of the other first signal line is disposed in the third region to extend along the second direction.

6. The electronic device according to claim 1, characterized in that: It also includes: a first sub-pixel is arranged in the first area, a second sub-pixel is arranged in the second area, and an area of ​​the first sub-pixel is larger than an area of ​​the second sub-pixel.

7. The electronic device according to claim 6, characterized in that: Also includes: The sensing module is disposed in the first area, and the sensing module partially overlaps with the first sub-pixel.

8. The electronic device according to claim 7, characterized in that: The first sub-pixel and the second sub-pixel are arranged along the second direction, and the at least another portion of the first signal line is between the first sub-pixel and the second sub-pixel.

9. The electronic device according to claim 1, characterized in that: Also included is a shielding element that at least partially overlaps the third region.

10. The electronic device according to claim 9, characterized in that: The shielding element includes a black matrix or other light shielding or light absorbing materials.

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