Radio frequency front-end circuit and electronic equipment

Abstract

The invention relates to a radio frequency front-end circuit and electronic equipment. The radio frequency front-end circuit comprises a first change-over switch, a frequency divider, a second change-over switch, a third change-over switch, a first multiplexer and a second multiplexer, the common end of the first change-over switch is used for connecting an antenna, and the first throw end of the first change-over switch is connected with the input end of the frequency divider; the first output end of the frequency divider is connected with the first throw end of the second change-over switch, and the second output end of the frequency divider is connected with the first throw end of the third change-over switch; the common end of the second change-over switch is connected with the common end of the first multiplexer, and the output end of the first multiplexer is used for being connected with the transceiver; the common end of the third change-over switch is connected with the common end of the second multiplexer, and the output end of the second multiplexer is used for being connected with the transceiver. The insertion loss of the carrier aggregation radio frequency front-end circuit can be reduced, the cost of the radio frequency front-end circuit is reduced, the influence on the single-frequency signal strength is reduced, and the signal strength of the whole machine is improved, so that the debugging difficulty of the antenna and the radio frequency circuit is reduced.

Description

Technical Field

[0001] The present disclosure relates to the field of radio frequency communication technology, and in particular to a radio frequency front-end circuit and electronic equipment. Background Art

[0002] Carrier aggregation, or CA, is a radio frequency front-end technology used in wireless communications and a key technology for accelerating mobile internet access. It multiplies communication bandwidth by bundling multiple carriers. For example, CA can double or even multiply user internet speeds, delivering a lightning-fast internet experience.

[0003] However, current RF front-end circuit solutions that support triple-carrier aggregation essentially all require the use of a hexaplexer. This solution suffers from high insertion loss and high cost, making RF and antenna debugging more difficult. It also reduces the overall signal strength, particularly in a single-band signal. Summary of the Invention

[0004] To overcome the problems existing in the related art, the embodiments of the present disclosure provide a radio frequency front-end circuit and electronic device, which can reduce the insertion loss of the carrier aggregation radio frequency front-end circuit, reduce the cost of the radio frequency circuit, reduce the impact on the single-frequency signal strength, and improve the signal strength of the entire machine, thereby reducing the difficulty of debugging the antenna and radio frequency circuit.

[0005] According to a first aspect of an embodiment of the present disclosure, there is provided a radio frequency front-end circuit, comprising a first switch, a frequency divider, a second switch, a third switch, a first multiplexer, and a second multiplexer;

[0006] The common end of the first switch is used to connect to the antenna, and the first throw end of the first switch is connected to the input end of the frequency divider;

[0007] The first output terminal of the frequency divider is connected to the first throw terminal of the second switch, and the second output terminal of the frequency divider is connected to the first throw terminal of the third switch;

[0008] The common end of the second switch is connected to the common end of the first multiplexer, and the output end of the first multiplexer is used to connect to the transceiver;

[0009] The common end of the third switch is connected to the common end of the second multiplexer, and the output end of the second multiplexer is used to connect to the transceiver.

[0010] Optionally, the second throw end of the first switch is connected to the second throw end of the second switch;

[0011] The third throw terminal of the first switch is connected to the second throw terminal of the third switch.

[0012] Optionally, the circuit further comprises a power amplifier;

[0013] The output end of the power amplifier is connected to the input end of the first multiplexer and the input end of the second multiplexer respectively, and the input end of the power amplifier is connected to the transceiver.

[0014] Optionally, the frequency divider includes: a binary frequency divider.

[0015] Optionally, the second switch includes a single-pole double-throw switch.

[0016] Optionally, the third switch includes a single-pole double-throw switch.

[0017] Optionally, the first multiplexer includes any one of a quadplexer, a hexaplexer or an octaplexer.

[0018] Optionally, the second multiplexer includes any one of a duplexer, a quadplexer or a hexaplexer.

[0019] Optionally, the power amplifier includes a multi-mode power amplifier.

[0020] According to a second aspect of an embodiment of the present disclosure, an electronic device is provided, comprising the radio frequency front-end circuit described in any one of the first aspects.

[0021] In summary, the embodiment of the present disclosure provides a radio frequency front-end circuit, comprising a first switching switch, a frequency divider, a second switching switch, a third switching switch, a first multiplexer, and a second multiplexer; the common end of the first switching switch is used to connect to an antenna, and the first throw end of the first switching switch is connected to the input end of the frequency divider; the first output end of the frequency divider is connected to the first throw end of the second switching switch, and the second output end of the frequency divider is connected to the first throw end of the third switching switch; the common end of the second switching switch is connected to the common end of the first multiplexer, and the output end of the first multiplexer is used to connect to a transceiver; the common end of the third switching switch is connected to the common end of the second multiplexer, and the output end of the second multiplexer is used to connect to the transceiver. The embodiment of the present disclosure can reduce the insertion loss of the carrier aggregation radio frequency front-end circuit, reduce the cost of the radio frequency front-end circuit, reduce the impact on the single-frequency signal strength, improve the signal strength of the entire machine, and thus reduce the difficulty of debugging the antenna and radio frequency circuit.

[0022] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0024] Figure 1 The figure is a schematic diagram of a traditional carrier aggregation radio frequency front-end circuit according to an exemplary embodiment.

[0025] Figure 2 The figure is a schematic diagram of a carrier aggregation radio frequency front-end circuit according to an exemplary embodiment.

[0026] Figure 3 The figure is a schematic diagram of a carrier aggregation radio frequency front-end circuit according to an exemplary embodiment.

[0027] Figure 4 The figure is a schematic diagram of a carrier aggregation radio frequency front-end circuit according to an exemplary embodiment.

[0028] Figure 5 is a block diagram of an electronic device 500 according to an exemplary embodiment. DETAILED DESCRIPTION

[0029] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all possible embodiments consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.

[0030] It should be noted that all actions of acquiring signals, information or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where they are located and with the authorization given by the owner of the corresponding device.

[0031] It should be understood that the term "including" and its variations as used herein are open-ended, i.e., "including but not limited to." The term "based on" means "based, at least in part, on." The term "one embodiment" means "at least one embodiment," the term "another embodiment" means "at least one additional embodiment," and the term "some embodiments" means "at least some embodiments." Definitions of other terms are provided below.

[0032] It should be noted that the concepts of "first" and "second" mentioned in this disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0033] It should be noted that the modifications of "one" and "multiple" mentioned in the present disclosure are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, they should be understood as "one or more".

[0034] The present disclosure is described below with reference to specific embodiments. First, the application scenario of the present disclosure is described. Carrier aggregation, namely CA (Carrier Aggregation), is a key technology in LTE-A (i.e., LTE-Advanced). It can aggregate 2-5 LTE carriers (Component Carrier, CC) together to achieve a maximum transmission bandwidth of 100MHz, effectively improving the uplink and downlink transmission rates. According to the different functions of uplink and downlink CA, CA can be divided into downlink CA (DL-CA, Down Link CA) and uplink CA (UL-CA, Up Link CA). According to the different carrier frequency bands, CA can be divided into inter-band CA (Inter Band CA) and intra-band CA (Intra Band CA). At the same time, intra-band CA can be divided into continuous and discontinuous.

[0035] Currently, many terminals support dual-carrier aggregation (Cat. 4 and Cat. 6), achieving downlink speeds of up to 150 Mbps and 300 Mbps, respectively. Operators with advanced requirements are even demanding triple carrier aggregation (CA), or even higher. Using three downlink carriers and 256-QAM, it can achieve peak download speeds of up to 600 Mbps, similar to Cat. 12. To meet user demands for increased peak speeds and system capacity, LTE-A (LTE-Advanced) utilizes CA (carrier aggregation) technology to increase system transmission bandwidth.

[0036] Figure 1 FIG. 1 is a schematic diagram showing a conventional carrier aggregation radio frequency front-end circuit according to an exemplary embodiment. Figure 1 As shown, this circuit is a three-carrier aggregation RF front-end circuit. Figure 1 When implementing a 3CA combination, for example, with three-carrier reception (downlink) carrier aggregation (B1+B3+B7), the B1 / B3 / B7 carrier aggregation receive signal (B1 / B3 / B7RX) passes through the antenna to the inside of the switch TXM for port selection, then through the MH2 port to the common end of the hexaplexer. After filtering by the hexaplexer, it exits the three RX output ports of the hexaplexer. The receive signals of the three carrier frequency bands (B1_RX, B3_RX, and B7_RX) are simultaneously sent to the RF transceiver chip of the transceiver (not shown) for demodulation, completing the three-carrier downlink aggregation reception.

[0037] Similarly, if the RF device capabilities permit, the three-carrier transmission (uplink) of B1+B3+B7 is aggregated. The transmission signals of the three carrier frequency bands B1 / B3 / B7, B1_TX, B3_TX, and B7_TX, output by the power amplifier, are simultaneously sent to the three TX input ports of the hexaplexer. The common port of the hexaplexer outputs the aggregated transmission signal of the frequency band B1 / B3 / B7, B1 / B3 / B7 TX, which is sent to the switching switch through the MH2 port of the switching switch and then to the antenna for transmission through the ANT port of the switching switch, completing the uplink aggregation transmission of the three carriers.

[0038] The disadvantages of this solution are high insertion loss (the hexaplexer has a large insertion loss) and high cost (the hexaplexer is expensive). Due to the high insertion loss, the signal loss is also large, which reduces the signal strength of the entire device, especially the signal strength of a single frequency band. This will bring great difficulties to the debugging of the RF and antenna.

[0039] Figure 2 FIG1 is a schematic diagram of a carrier aggregation radio frequency front-end circuit according to an exemplary embodiment. Figure 2 As shown, an embodiment of the present disclosure provides a radio frequency front-end circuit, including: a first switching switch 1, a frequency divider 2, a second switching switch 3, a third switching switch 4, a first multiplexer 5 and a second multiplexer 6.

[0040] The common terminal ANT of the first switch 1 is used to connect to the antenna, and the first throw terminal MH1 of the first switch 1 is connected to the input terminal of the frequency divider 2 .

[0041] The first output terminal of the frequency divider 2 is connected to the first throw terminal of the second switch 3 , and the second output terminal of the frequency divider 2 is connected to the first throw terminal of the third switch 4 .

[0042] The common terminal of the second switch 3 is connected to the common terminal of the first multiplexer 5 , and the output terminal of the first multiplexer 5 is used to connect to a transceiver (not shown in the figure).

[0043] The common terminal of the third switch 4 is connected to the common terminal of the second multiplexer 6 , and the output terminal of the second multiplexer 6 is used to connect to a transceiver (not shown in the figure).

[0044] For example, Figure 2 As shown, the frequency divider 2 may be a binary frequency divider, the second switch 3 may be a single-pole double-throw switch, the third switch 4 may be a single-pole double-throw switch, the first multiplexer 5 may be a quadplexer, and the second multiplexer 6 may be a duplexer. The following takes B1+B3+B7 three-carrier reception (downlink) carrier aggregation as an example to illustrate the circuit operation process:

[0045] The three-carrier aggregation receive signal B1 / B3 / B7_RX in the B1 / B3 / B7 frequency bands passes through the antenna to the common terminal ANT of the first switch 1, and then enters the input terminal of the divider 2 through the first throw terminal MH1 of the first switch 1. After frequency division by the divider 2, it is divided into two signals, B1 / B3_RX and B7_RX. The B1 / B3_RX signal enters the first throw terminal of the second switch 3 through the first output terminal of the divider 2, then exits from the common terminal of the second switch 3, and then enters the first multiplexer 5 through the common terminal. After filtering, the output terminal of the first multiplexer 5 outputs the B1_RX signal and the B3_RX signal, respectively, to be demodulated by the transceiver to obtain the B1 and B3 frequency band receive signals.

[0046] The other B7_RX signal, exiting the second output of divider 2, enters the first throw of third switch 4, then exits the common terminal of third switch 4 and enters the common terminal of second multiplexer 6. After filtering by second multiplexer 6, the B7_RX signal is output from the output of second multiplexer 6 and demodulated by the transceiver as the B7 band receive signal. This completes the B1 / B3 / B7 triple-carrier aggregation reception. This circuit has significantly lower overall link insertion loss than a hexaplexer, is more affordable, and offers flexible components and routing.

[0047] In summary, the embodiment of the present disclosure provides a radio frequency front-end circuit, comprising a first switching switch, a frequency divider, a second switching switch, a third switching switch, a first multiplexer, and a second multiplexer; the common end of the first switching switch is used to connect to an antenna, and the first throw end of the first switching switch is connected to the input end of the frequency divider; the first output end of the frequency divider is connected to the first throw end of the second switching switch, and the second output end of the frequency divider is connected to the first throw end of the third switching switch; the common end of the second switching switch is connected to the common end of the first multiplexer, and the output end of the first multiplexer is used to connect to a transceiver; the common end of the third switching switch is connected to the common end of the second multiplexer, and the output end of the second multiplexer is used to connect to the transceiver. The embodiment of the present disclosure can reduce the insertion loss of the carrier aggregation radio frequency front-end circuit, reduce the cost of the radio frequency front-end circuit, reduce the impact on the single-frequency signal strength, improve the signal strength of the entire machine, and thus reduce the difficulty of debugging the antenna and radio frequency circuit.

[0048] In some implementations, the frequency divider 2 may include a two-frequency divider, and illustratively, may also include a three-frequency divider or a four-frequency divider, which can increase the band and configuration flexibility of carrier aggregation.

[0049] In some embodiments, the second switching switch 3 may include a single-pole double-throw switch. Exemplarily, it may also include a single-pole three-throw switch, a single-pole four-throw switch, a double-pole double-throw switch, or a double-pole four-throw switch, which can increase the band and configuration flexibility of carrier aggregation.

[0050] In some embodiments, the third switching switch 4 may include a single-pole double-throw switch. Exemplarily, it may also include a single-pole three-throw switch, a single-pole four-throw switch, a double-pole double-throw switch, or a double-pole four-throw switch, which can increase the band and configuration flexibility of carrier aggregation.

[0051] In some implementations, the first multiplexer 5 may include any one of a quadplexer, a hexaplexer, or an octaplexer, which can increase the band and configuration flexibility of carrier aggregation.

[0052] In some implementations, the second multiplexer 6 may include any one of a duplexer, a quadplexer, or a hexaplexer, which can increase the band and configuration flexibility of carrier aggregation.

[0053] Figure 3 FIG1 is a schematic diagram of a carrier aggregation radio frequency front-end circuit according to an exemplary embodiment. Figure 3 As shown, the second throw terminal MH2 of the first switch 1 is connected to the second throw terminal of the second switch 3, and the third throw terminal MH3 of the first switch 1 is connected to the second throw terminal of the third switch 4. Figure 3 As shown, the frequency divider 2 can be a binary frequency divider, the second switch 3 can be a single-pole double-throw switch, the third switch 4 can be a single-pole double-throw switch, the first multiplexer 5 can be a quadplexer, and the second multiplexer 6 can be a duplexer. This circuit can be used to achieve B1, B3, and B7 single-band reception. The specific working process is as follows:

[0054] The B1 band receive signal B1_RX passes through the antenna to the common terminal ANT of the first switch 1, then enters the second throw terminal of the second switch 3 via the second throw terminal MH2 of the first switch 1, exits from the common terminal of the second switch 3, and then enters the first multiplexer 5 via the common terminal. After filtering, the signal B1_RX is output from the output terminal of the first multiplexer 5 to a transceiver (not shown) for demodulation to obtain the B1 band receive signal.

[0055] The B3 band receive signal B3_RX passes through the antenna to the common terminal ANT of the first switch 1, then enters the second throw terminal of the second switch 3 via the second throw terminal MH2 of the first switch 1, exits from the common terminal of the second switch 3, and then enters the first multiplexer 5 via the common terminal. After filtering, the signal B3_RX is output from the output terminal of the first multiplexer 5 to a transceiver (not shown) for demodulation to obtain the B3 band receive signal.

[0056] The B7 band receive signal B7_RX passes through the antenna to the common terminal ANT of the first switch 1, enters the second throw terminal of the third switch 4 through the third throw terminal MH3 of the first switch 1, and then exits from the common terminal of the third switch 4. It then passes through the common terminal of the second multiplexer 6 and enters the second multiplexer 6 for filtering. The B7_RX signal is then output from the output terminal of the second multiplexer 6 to a transceiver (not shown) for demodulation to obtain the B7 band receive signal.

[0057] Since the signal does not pass through the frequency divider 2, the insertion loss of the signal path can be further reduced, and the circuit can exert the maximum signal strength when operating in a single-band mode, thereby improving the signal throughput of the entire device.

[0058] Figure 4 FIG1 is a schematic diagram of a carrier aggregation radio frequency front-end circuit according to an exemplary embodiment. Figure 4 As shown, the RF front-end circuit further includes a power amplifier 7, the output end of the power amplifier 7 is connected to the input end of the first multiplexer 5 and the input end of the second multiplexer 6 respectively, and the input end of the power amplifier 7 is connected to the transceiver (not shown in the figure). Figure 4 As shown, the frequency divider 2 may be a binary frequency divider, the second switch 3 may be a single-pole double-throw switch, the third switch 4 may be a single-pole double-throw switch, the first multiplexer 5 may be a quadplexer, and the second multiplexer 6 may be a duplexer. This circuit may be used to implement B1+B3+B7 three-carrier transmission (uplink) carrier aggregation. The specific working process is as follows:

[0059] The transceiver sends the modulated B1, B3, and B7 frequency band transmit signals to the power amplifier 7 for power amplification. After that, the signals are sent through the output of the power amplifier 7 to the inputs (B1_TX and B3_TX) of the first multiplexer 5 and the input (B7_TX) of the second multiplexer 6. The combined signal (B1 / 3_TX) of B1 and B3 is output through the common terminal of the first multiplexer 5, enters the common terminal of the second switch 3, and then outputs through the second throw terminal of the second switch 3 to the second throw terminal MH2 of the first switch 1, and then enters the first switch 1. Simultaneously, the B7 frequency band transmit signal B7_TX is output through the output of the second multiplexer 6 to the common terminal of the third switch 4, and then through the second throw terminal of the third switch 4 to the third throw terminal MH3 of the first switch 1, and then enters the first switch 1. Here, B1 / 3_TX and B7_TX are combined and output to the antenna through the common terminal ANT of the first switch 1. At this point, the B1+B3+B7 three-carrier (uplink) carrier aggregation transmission is completed.

[0060] The overall link insertion loss of this circuit is much smaller than that of a hexaplexer. It is also cheap and has flexible placement and routing.

[0061] In some embodiments, the power amplifier 7 may include a multi-mode power amplifier, which can simultaneously amplify the power of transmission signals in different frequency bands.

[0062] Figure 5 1 is a block diagram of an electronic device 500 according to an exemplary embodiment. For example, the electronic device 500 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0063] Reference Figure 5 , the electronic device 500 may include one or more of the following components: a processing component 502 , a memory 504 , a power component 506 , a multimedia component 508 , an audio component 510 , an input / output interface 512 , a sensor component 514 , and a communication component 516 .

[0064] The processing component 502 generally controls the overall operation of the electronic device 500, such as operations associated with display, phone calls, data communications, camera operation, and recording operations. The processing component 502 may include one or more processors 520 to execute instructions to perform all or part of the steps of the above-described method. In addition, the processing component 502 may include one or more modules to facilitate interaction between the processing component 502 and other components. For example, the processing component 502 may include a multimedia module to facilitate interaction between the multimedia component 508 and the processing component 502.

[0065] The memory 504 is configured to store various types of data to support operations on the electronic device 500. Examples of such data include instructions for any application or method operating on the electronic device 500, contact data, phone book data, messages, pictures, videos, etc. The memory 504 can be implemented by any type of volatile or non-volatile storage device, or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0066] The power supply assembly 506 provides power to the various components of the electronic device 500. The power supply assembly 506 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device 500.

[0067] The multimedia component 508 includes a screen that provides an output interface between the electronic device 500 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, slides, and gestures on the touch panel. The touch sensor can not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 508 includes a front camera and / or a rear camera. When the electronic device 500 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera can receive external multimedia data. Each front camera and rear camera can be a fixed optical lens system or have a focal length and optical zoom capability.

[0068] The audio component 510 is configured to output and / or input audio signals. For example, the audio component 510 includes a microphone (MIC), which is configured to receive external audio signals when the electronic device 500 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal can be further stored in the memory 504 or transmitted via the communication component 516. In some embodiments, the audio component 510 also includes a speaker for outputting audio signals.

[0069] The input / output interface 512 provides an interface between the processing component 502 and peripheral interface modules, such as a keyboard, a click wheel, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0070] The sensor assembly 514 includes one or more sensors for providing various aspects of status assessment for the electronic device 500. For example, the sensor assembly 514 can detect the open / closed state of the electronic device 500, the relative positioning of components, such as the display and keypad of the electronic device 500. The sensor assembly 514 can also detect changes in the position of the electronic device 500 or a component of the electronic device 500, the presence or absence of user contact with the electronic device 500, the orientation or acceleration / deceleration of the electronic device 500, and temperature changes of the electronic device 500. The sensor assembly 514 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 514 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 514 may also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0071] The communication component 516 is configured to facilitate wired or wireless communication between the electronic device 500 and other devices. The communication component 516 may include the aforementioned RF front-end circuit. The electronic device 500 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 516 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 516 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0072] In an exemplary embodiment, the electronic device 500 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components.

[0073] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 504 including instructions, which are executable by a processor 520 of the electronic device 500. For example, the non-transitory computer-readable storage medium may be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.

[0074] In addition to being an independent electronic device, the above-mentioned electronic device can also be a part of an independent electronic device. For example, in one embodiment, the electronic device can be an integrated circuit (IC) or a chip, wherein the integrated circuit can be a single IC or a collection of multiple ICs; the chip can include but is not limited to the following types: GPU (Graphics Processing Unit), CPU (Central Processing Unit), FPGA (Field Programmable Gate Array), DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit), SOC (System on Chip, SoC, system on chip or system-on-chip), etc. The above-mentioned integrated circuit or chip can be used to execute executable instructions (or codes). The executable instructions can be stored in the integrated circuit or chip, or obtained from other electronic devices or devices. For example, the integrated circuit or chip includes a processor, a memory, and an interface for communicating with other electronic devices. The executable instructions can be stored in the memory, and the executable instructions can be executed by the processor; or the integrated circuit or chip can receive the executable instructions through the interface and transmit them to the processor for execution.

[0075] Other embodiments of the present disclosure will readily occur to those skilled in the art after considering the specification and practicing the present disclosure. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the following claims.

[0076] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes can be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A radio frequency front-end circuit, It is characterized in that include: A first switch, a frequency divider, a second switch, a third switch, a first multiplexer and a second multiplexer; The common end of the first switch is used to connect to the antenna, and the first throw end of the first switch is connected to the input end of the frequency divider; The first output end of the frequency divider is connected to the first throw end of the second switch, and the second output end of the frequency divider is connected to the first throw end of the third switch; The common end of the second switch is connected to the common end of the first multiplexer, and the output end of the first multiplexer is used to connect to the transceiver; The common end of the third switch is connected to the common end of the second multiplexer, and the output end of the second multiplexer is used to connect to the transceiver.

2. The radio frequency front-end circuit according to claim 1, It is characterized in that The second throw end of the first switch is connected to the second throw end of the second switch; The third throw terminal of the first switch is connected to the second throw terminal of the third switch.

3. The radio frequency front-end circuit according to claim 2, It is characterized in that The circuit also includes a power amplifier; The output end of the power amplifier is connected to the input end of the first multiplexer and the input end of the second multiplexer respectively, and the input end of the power amplifier is connected to the transceiver.

4. The radio frequency front-end circuit according to any one of claims 1 to 3, It is characterized in that The frequency divider includes: a binary frequency divider.

5. The radio frequency front-end circuit according to any one of claims 1 to 3, It is characterized in that The second switch includes a single-pole double-throw switch.

6. The radio frequency front-end circuit according to any one of claims 1 to 3, It is characterized in that The third switching switch includes: a single-pole double-throw switch.

7. The radio frequency front-end circuit according to any one of claims 1 to 3, It is characterized in that The first multiplexer includes any one of a quadruplexer, a hexaplexer or an octaplexer.

8. The radio frequency front-end circuit according to any one of claims 1 to 3, It is characterized in that The second multiplexer includes any one of a duplexer, a quadplexer or a hexaplexer.

9. The radio frequency front-end circuit according to claim 3, It is characterized in that The power amplifier comprises a multi-mode power amplifier.

10. An electronic device, It is characterized in that The invention comprises the radio frequency front-end circuit according to any one of claims 1 to 9.

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