Communication method, communication device, chip and readable storage medium

Abstract

The application provides a communication method, a communication device, a chip and a readable storage medium. The method comprises the following steps: obtaining a first data sequence subjected to polarization encoding; obtaining a second data sequence to be multiplexed based on a first rule and the first data sequence; and mapping the second data sequence to corresponding time-frequency domain resources according to a second rule. The method can realize fast and efficient rate matching and multiplexing of the data sequence subjected to polarization encoding, fully considers resource multiplexing, effectively improves resource utilization, saves hardware resources, and improves overall performance.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of wireless communication, and in particular to a communication method, a communication device, a chip and a readable storage medium. BACKGROUND

[0002] Polar code is a coding method that can approach the Shannon limit under the binary erasure channel (BEC) and binary discrete memoryless channel (B-DMC).

[0003] The encoding and decoding complexity of the Polar code is high, and a large amount of hardware resource consumption is required in the implementation process. Therefore, how to quickly and efficiently implement the Polar code is an important problem to be solved in the engineering implementation with limited hardware resources. SUMMARY

[0004] The present application aims to at least solve one of the technical problems in the related art to some extent.

[0005] To this end, the following technical solutions are proposed:

[0006] The first aspect of the present application provides a communication method, comprising:

[0007] obtaining a first data sequence after polar encoding;

[0008] obtaining a second data sequence to be multiplexed based on a first rule and the first data sequence;

[0009] mapping the second data sequence to a corresponding time-frequency domain resource according to a second rule.

[0010] Optionally, the first data sequence after polar encoding is obtained.

[0011] obtaining a second data sequence to be multiplexed based on a first rule and the first data sequence;

[0012] mapping the second data sequence to a corresponding time-frequency domain resource according to a second rule.

[0013] Optionally, the determination of the index corresponding to each bit of data in the second data sequence in the first data sequence based on the first rule comprises:

[0014] determining the index corresponding to each bit of data in the second data sequence in the first data sequence based on inverse mapping of sub-block interleaving and rate matching transformation.

[0015] Optionally, the mapping the second data sequence to corresponding time-frequency domain resources according to a second rule comprises:

[0016] reading, based on a preset parallelism, a data sequence after channel interleaving of the second data sequence from the second data sequence and storing the data sequence in a first queue;

[0017] mapping the data sequence stored in the first queue to corresponding time-frequency domain resources;

[0018] wherein a bit number of the data sequence read each time from the second data sequence does not exceed the preset parallelism, and the data sequence read each time is in a same column of a triangular interleaver.

[0019] Optionally, the mapping the data sequence stored in the first queue to corresponding time-frequency domain resources comprises:

[0020] determining a bit number to be mapped on each time domain symbol;

[0021] reading, based on the preset parallelism, a data sequence mapped to each time domain symbol from the first queue and mapping the data sequence to corresponding time-frequency domain resources;

[0022] wherein a bit number of the data sequence read each time from the first queue does not exceed the preset parallelism.

[0023] Optionally, the method further comprises:

[0024] determining a side length of the triangular interleaver based on a length of the second data sequence.

[0025] The second aspect embodiment of the present application provides a communication device, comprising:

[0026] an encoding module configured to obtain a first data sequence after polarization encoding;

[0027] a matching module configured to obtain a second data sequence to be multiplexed based on a first rule and the first data sequence;

[0028] a multiplexing module configured to map the second data sequence to corresponding time-frequency domain resources according to a second rule.

[0029] Optionally, the matching module is specifically configured to:

[0030] determine, based on the first rule, an index corresponding to each bit of data in the second data sequence in the first data sequence;

[0031] obtain corresponding data of each bit from the first data sequence according to the index to obtain the second data sequence.

[0032] Optionally, the matching module is specifically configured to:

[0033] determine the index corresponding to each bit of data in the second data sequence in the first data sequence based on inverse mapping of the sub-block interleaving and rate matching transformation.

[0034] Optionally, the multiplexing module is specifically configured to:

[0035] read the data sequence after channel interleaving of the second data sequence from the second data sequence based on a preset parallel degree, and store the data sequence in a first queue.

[0036] map the data sequence stored in the first queue to a corresponding time-frequency domain resource.

[0037] wherein the number of bits of the data sequence read each time from the second data sequence does not exceed the preset parallel degree, and the data sequence read each time is in the same column of the triangular interleaver.

[0038] Optionally, the multiplexing module is specifically configured to:

[0039] determine the number of bits to be mapped on each time domain symbol.

[0040] read the data sequence mapped to each time domain symbol from the first queue based on the preset parallel degree, and map the data sequence to a corresponding time-frequency domain resource.

[0041] wherein the number of bits of the data sequence read each time from the first queue does not exceed the preset parallel degree.

[0042] Optionally, the apparatus further comprises:

[0043] a processing module configured to determine the length of the side of the triangular interleaver based on the length of the second data sequence.

[0044] The third aspect embodiment of the present application provides a communication device, which comprises a storage medium, a processor, and a computer program stored in the storage medium and executable on the processor, and the processor implements the communication method provided by the first aspect embodiment of the present application when executing the computer program.

[0045] The fourth aspect embodiment of the present application provides a chip, which comprises at least one processor and a communication interface; the communication interface is configured to receive a signal input into the chip or output from the chip, the processor is in communication with the communication interface and implements the communication method provided by the first aspect embodiment of the present application through a logic circuit or execution of code instructions.

[0046] The fifth aspect of the present application provides a non-transitory computer readable storage medium, when instructions in the storage medium are executed by a processor of a communication device, the communication device is enabled to perform the communication method of the first aspect of the present application.

[0047] The technical solution of the present application comprises the following steps: obtaining a first data sequence after polarization encoding; obtaining a second data sequence to be multiplexed based on a first rule and the first data sequence; and mapping the second data sequence to corresponding time-frequency domain resources according to a second rule. The technical solution can perform fast and efficient rate matching and multiplexing on the data sequence after polarization encoding, fully considers resource multiplexing, effectively improves resource utilization, saves hardware resources, and improves overall performance.

[0048] Additional aspects and advantages of the present application will be in part apparent and in part pointed out hereinafter. BRIEF DESCRIPTION OF DRAWINGS

[0049] The above and / or additional aspects and advantages of the present application will become apparent and be readily appreciated from the following description, including the accompanying drawings.

[0050] Figure 1 A Polar encoding flowchart provided by an embodiment of the present application;

[0051] Figure 2 A communication method flowchart provided by an embodiment of the present application;

[0052] Figure 3 Another communication method flowchart provided by an embodiment of the present application;

[0053] Figure 4 Another communication method flowchart provided by an embodiment of the present application;

[0054] Figure 5 Another communication method flowchart provided by an embodiment of the present application;

[0055] Figure 6 An interleaver for channel interleaving provided by an embodiment of the present application;

[0056] Figure 7 A communication device structure schematic diagram provided by an embodiment of the present application;

[0057] Figure 8 A communication device structure schematic diagram provided by an embodiment of the present application; DETAILED DESCRIPTION

[0058] Embodiments of the present application are described below in the context of example embodiments illustrated in the drawings, which are described below with reference to the drawings. The same numbers are used in different drawings to represent the same or similar elements unless otherwise noted. Embodiments described below are examples for explaining the present application and are not intended to be limiting of the present application unless otherwise specified.

[0059] Various changes, modifications, and equivalents of the methods, devices, and / or systems described herein will become apparent to those skilled in the art after a study of the foregoing descriptions. For example, the order of operations described herein is merely exemplary and not limiting, and changes can be made in the order of operations as will be apparent to those skilled in the art, except where otherwise indicated, such as where a particular order of operations is required. Also, for the sake of brevity and clarity, descriptions of features known to one skilled in the art can be omitted.

[0060] The implementations described in some embodiments of the present application below do not represent all implementations consistent with the present application. Instead, they are merely examples used to describe devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0061] It should be noted that the execution subject of the encoding method of the polar code in the present embodiment can be an encoding device of the polar code, which can be implemented in software and / or hardware. The execution subject of the encoding method of the polar code in the present embodiment is any type of electronic device, such as a mobile phone, a bracelet, a tablet, a notebook, a desktop computer, a vehicle-mounted terminal, a smart home appliance, a wearable device, or an Internet of Things device, or a processing chip inside a terminal, which is not limited herein.

[0062] In the present embodiment, a communication method is executed by a communication device as the execution subject, which is referred to as a device hereinafter, which is not limited herein.

[0063] Embodiments of the present application can be applied to Long Term Evolution (LTE), LTE-Advanced (LTE-A), LTE-Beyond (LTE-B), SUPER 3G, IMT-Advanced, 4th generation mobile communication system (4G), 5th generation mobile communication system (5G), 5G new radio (NR), Future Radio Access (FRA), New-Radio Access Technology (RAT), New Radio (NR), New radio access (NX), Future generation radio access (FX), Global System for Mobile communications (GSM (registered trademark)), CDMA2000, Ultra Mobile Broadband (UMB), IEEE 802.11 (Wi-Fi (registered trademark)), IEEE 802.16 (WiMAX (registered trademark)), IEEE 802.20, Ultra-WideBand (UWB), Bluetooth (Bluetooth (registered trademark)), Public Land Mobile Network (PLMN) network, Device-to-Device (D2D) system, Machine to Machine (M2M) system, Internet of Things (IoT) system, Vehicle-to-Everything (V2X), system using other communication methods, next-generation system expanded based on them, and the like. In addition, a plurality of systems can be combined (for example, combination of LTE or LTE-A and 5G, and the like).

[0064] In some embodiments, Figure 1 A flowchart of a Polar encoding provided for embodiments of the present application.

[0065] As Figure 1As shown, the part in the dashed box is the main process of Polar encoding. Among them, the Polar enc stage includes preprocessing before Polar encoding (Polar_pre) and Polar encoding calculation. Among them, the rate matching stage includes sub-block interleaving, rate matching and channel interleaving. Among them, multiplexing means time-frequency domain resource multiplexing. After that, it also needs to go through the process of modulation and inverse fast Fourier transform (IFFT).

[0066] The embodiments of the present application can be mainly used for the uplink baseband data generation of physical uplink control channel (PUCCH) and physical uplink shared channel (PUSCH) with uplink control information (UCI), and when the configuration meets the Polar encoding condition, the overall Polar encoding can be realized by using the flow shown in the above Figure 1

[0067] Among them, the PUCCH can be used to transmit UCI information, and the PUSCH can carry UCI under some configurations.

[0068] The communication method, electronic device and computer readable storage medium of the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0069] Figure 2 A flowchart of a communication method provided by the embodiments of the present application is shown.

[0070] As Figure 2 shown, the communication method can include the following steps:

[0071] Step 201, obtaining a first data sequence after Polar encoding.

[0072] In the embodiments of the present application, the first data sequence after Polar encoding can be obtained.

[0073] In some embodiments, the first data sequence described above is a data sequence after Polar encoding of input information.

[0074] In some embodiments, the input information is uplink control information (UCI).

[0075] In some embodiments, the input information is the payload part in the UCI.

[0076] ​It should be noted that the UCI is important information sent by the terminal to the network device, which can include Acknowledge (ACK) / non-Acknowledge (NACK) messages, scheduling requests (Scheduling Request, SR), channel state information (Channel State Information, CSI), and the like. The processing of these information involves rate matching, encoding, cyclic redundancy check, and the like, to ensure reliable transmission of information.

[0077] In some embodiments, the length of the first data sequence is denoted as N.

[0078] In some embodiments, the length of the bit stream obtained after performing cyclic redundancy check (Cyclic Redundancy Check, CRC) on the input information in the Polar encoding process is denoted as K.

[0079] In step 202, a second data sequence to be multiplexed is obtained based on the first rule and the first data sequence.

[0080] In the embodiments of the present application, the second data sequence to be multiplexed can be obtained based on the first data sequence after Polar encoding.

[0081] In some embodiments, based on the first rule, the index corresponding to each bit of data in the second data sequence in the first data sequence is determined. Further, the corresponding data of each bit is obtained from the first data sequence according to the index, to obtain the second data sequence to be multiplexed.

[0082] In some embodiments, based on the inverse mapping of the block interleaver (block interleaver, blk itl) and rate matching (rate matching, rm) transformation, the index corresponding to each bit of data in the second data sequence in the first data sequence is determined.

[0083] In some embodiments, the set of block interleaving (blk itl), rate matching (rm), and channel interleaving (channel interleaver, chl itl) can be regarded as a process of randomly and repeatedly taking out a certain number of data from the data source after Polar encoding, and reorganizing the data sequence actually used for multiplexing. Therefore, based on the inverse mapping, the address of each data in the second data sequence to be multiplexed in the data source after Polar encoding can be determined.

[0084] In step 203, the second data sequence is mapped to the corresponding time-frequency domain resource according to the second rule.

[0085] In the embodiments of the present application, the obtained second data sequence to be multiplexed can be mapped onto corresponding time-frequency domain resources according to a second rule.

[0086] In some embodiments, the mapping of the time-frequency domain resources according to the second rule comprises: reading, based on a preset parallelism, a data sequence after channel interleaving of the second data sequence from the second data sequence and storing the data sequence in a first queue. Further, the data sequence stored in the first queue is mapped onto corresponding time-frequency domain resources.

[0087] In some embodiments, the mapping of the data sequence stored in the first queue onto corresponding time-frequency domain resources comprises: determining the number of bits to be mapped on each time domain symbol, reading, based on the preset parallelism, a data sequence mapped onto each time domain symbol from the first queue, and mapping the data sequence onto corresponding time-frequency domain resources.

[0088] In some embodiments, further, the multiplexed data can be modulated and subjected to fast Fourier transform.

[0089] The embodiments of the present application obtain a first data sequence after polarization encoding, obtain a second data sequence to be multiplexed based on a first rule and the first data sequence, and map the second data sequence onto corresponding time-frequency domain resources according to a second rule. This makes it possible to perform fast and efficient rate matching and multiplexing of the data sequence after polarization encoding, fully considers resource multiplexing, effectively improves resource utilization, saves hardware resources, and improves overall performance.

[0090] Figure 3 Another flowchart of a communication method provided by the embodiments of the present application is shown.

[0091] As shown in Figure 3 the communication method can include the following steps:

[0092] Step 301: obtaining a first data sequence after polarization encoding.

[0093] It should be noted that the specific implementation of step 301 can refer to the embodiments of the present application, which will not be described here.

[0094] Step 302: determining the index of each bit of data in the second data sequence in the first data sequence based on inverse mapping of sub-block interleaving and rate matching transformation.

[0095] As mentioned above, the set of the three operations of sub-block interleaving (blk itl), rate matching (rm), and channel interleaving (chl itl) can be regarded as a source of data after Polar encoding, and a specific number of data is repeatedly taken out in disorder and reassembled to form a data sequence actually used for multiplexing.

[0096] In some embodiments, for the convenience of understanding, data with index value i in the second data sequence (denoted as i = chl itl idx) is taken as an object for description. The data with index value i in the second data sequence means that the index is i in the second data sequence, that is, the data is at the i+1th position in the second data sequence.

[0097] For data with index value j in the data sequence after rate matching (denoted as j = rm idx), the relationship between j and i is shown in the following formula:

[0098]

[0099] j = 0, 1, …, E-1

[0100] wherein E is the length of data after rate matching at the code block level (cb-level), N is the length of the first data sequence (Polar encoding), and K is the length of the input bit stream including CRC.

[0101] Optionally, the second data sequence can be divided into at least one code block cb.

[0102] Optionally, in the case of a long payload, the second data sequence can be divided into 2 cbs, and then the length of the second data sequence = 2*E, or it can also be that the cbs are concatenated and then 1 is added. That is, the length of the final second data sequence can be 2*E or 2*E+1 (this value will exactly fill the time-frequency domain resource unit, and optionally, the time-frequency domain resource unit can be a resource element (RE)).

[0103] Optionally, the second data sequence includes 1 cb, and then the length of the second data sequence is E.

[0104] wherein the data with index value j in the data sequence after rate matching means that the index is j in the data sequence after rate matching, that is, the data is at the j+1th position in the data sequence after rate matching.

[0105] Further, for the sub-block interleaving, the following formula should be satisfied:

[0106]

[0107] blk_size = N / 32

[0108] k = tmp[floor(j / blk_size)]·blk_size + j%blk_size

[0109] wherein tmp

[32] is an array (i.e. the data sequence after completing the sub-block interleaving), and 0, 1, 2, 4… are the index values of the sub-blocks corresponding to the first data sequence. blk_size is the size of the sub-block, i.e. the number of bits of data included in each sub-block. An element in tmp

[32] is selected according to floor(j / blk_size), and j is rm_idx in the previous step.

[0110] In step 303, the data corresponding to each bit is obtained from the first data sequence according to the above index, to obtain a second data sequence to be multiplexed.

[0111] In some embodiments, the data corresponding to each bit is obtained from the first data sequence based on the above index value, to form the second data sequence to be multiplexed.

[0112] As an example, for each bit chl_itl_idx[i] of the second data sequence, the corresponding data polar_enc[k] can be obtained from the first data sequence based on the index value k determined in the above steps.

[0113] That is, the corresponding encoding value can be read from the first data sequence with k as the index, i.e.

[0114] chl_itl_idx[i] = polar_enc[k].

[0115] Further, after obtaining the data chl_itl_idx[i] of each bit of the second data sequence, the second data sequence can be directly formed.

[0116] In step 304, the above second data sequence is mapped to the corresponding time-frequency domain resource according to a second rule.

[0117] It should be noted that the specific implementation of step 304 can refer to the embodiments of the present application, and will not be described here.

[0118] The communication method provided by the embodiments of the present application can obtain a first data sequence after polarization encoding, determine the index of each bit of data in the second data sequence corresponding to the first data sequence based on the inverse mapping of the sub-block interleaving and rate matching transformation, obtain the data of each bit corresponding to the index from the first data sequence according to the index, obtain the second data sequence to be multiplexed, map the second data sequence to the corresponding time-frequency domain resource according to the second rule, and store the result of the Polar encoding as the source data. In this way, the source data can be obtained by address mapping and reverse lookup without generating a large number of repeated rate matching data, and the data sequence to be multiplexed can be obtained. The Polar encoded data sequence can be quickly and efficiently rate matched and multiplexed, the resource multiplexing is fully considered, the utilization rate of the resource is effectively improved, the hardware resource is saved, the calculation complexity is effectively reduced, and the overall performance is improved.

[0119] Figure 4 The flowchart of another communication method provided by the embodiments of the present application is shown.

[0120] As shown in Figure 4 , the communication method can include the following steps:

[0121] Step 401: obtaining a first data sequence after polarization encoding.

[0122] Step 402: obtaining a second data sequence to be multiplexed based on a first rule and the first data sequence.

[0123] It should be noted that the specific implementation of steps 401-402 can refer to the embodiments of the present application, which will not be described here.

[0124] Step 403: reading a data sequence after channel interleaving of the second data sequence from the second data sequence based on a preset parallel degree and storing the data sequence in a first queue.

[0125] In some embodiments, the data sequence after channel interleaving of the second data sequence can be read from the second data sequence based on a preset parallel degree, and the read data can be stored in a first queue (First Input First Output, FIFO).

[0126] In some embodiments, the data sequence after channel interleaving of the second data sequence can be read from the second data sequence based on a preset parallel degree, and the read data can be stored in a first queue (First Input First Output, FIFO).

[0127] Optionally, the length E of the second data sequence is determined based on the length E of the second data sequence, and the side length T (i.e., the number of rows and columns) of the triangular interleaver is determined.

[0128] In some embodiments, chl itl (channel interleaving) employs a triangular interleaver whose row and column number T is the smallest integer satisfying T·(T+1) / 2≥E. The input bitstream is written row by row into the triangular interleaver, with NULL bits padded at the last position. The output bitstream is read column by column from the triangular interleaver, skipping NULL bits. Here, E is the data length (cb-level) after rate matching, and E≤8192. Based on E≤8192, the prior information T can be obtained. max =128, meaning the maximum side length of the triangular weaver is no more than 128.

[0129] As an example, taking E=37, we solve for the side length T of the corresponding triangular interleaver. One possible implementation is a binary search method, using 7 comparisons (optionally, to reduce the number of logic levels, multiple comparisons can be used; this solution uses {2, 2, 2, 1}, implemented over 4 clock cycles) to find:

[0130] T0·(T0+1) / 2<E

[0131] (T0+1)·((T0+1)+1) / 2≥E

[0132] Let the size of the interlacing triangle with side length T be S. T =T·(T+1) / 2, hereinafter referred to as S T The following describes how to represent a triangular interlacing device with side length T. The specific comparison steps are as follows:

[0133] 1) Relate E=37 to S 63 (2016), S 31 (496), S 95 (4560) Comparison yields E 31 ;

[0134] 2) Based on 1), compare E=37 with S 15 (120), S7(28), S 23 (276) By comparison, we can obtain S7 <E<S 15 ;

[0135] 3) Based on 2), compare E=37 with S 11 (66), S9(45), S 13 (91) By comparison, we can obtain S7 <E<S9;

[0136] 4) According to 3), comparing E=37 with S8(36), we can get S8<E<S9.

[0137] ​Therefore, it can be concluded that the side length T of the triangular interleaver is 9, and the number of bits of the filled NULL is T·(T+1) / 2-E=8. The triangular interleaver can be seen as Figure 6 Further, the channel interleaved data sequence can be read from the triangular interleaver. Figure 6 Further, the channel interleaved data sequence can be read from the triangular interleaver.

[0138] As an example, for the second data sequence chl itl idx[i] (where i=0, 1, …, 36) with E=37, it can be written into the triangular interleaver as shown in Figure 6 Figure 6 Further, the channel interleaved data sequence can be read from the triangular interleaver.

[0139] Further, the channel interleaved data sequence can be read from the triangular interleaver.

[0140] The first column chl itl idx is {0, 9, 17, 24, 30, 35};

[0141] The second column chl itl idx is {1, 10, 18, 25, 31, 36};

[0142] The third column chl itl idx is {2, 11, 19, 26, 32};

[0143] The fourth column chl itl idx is {3, 12, 20, 27, 33};

[0144] The fifth column chl itl idx is {4, 13, 21, 28, 34};

[0145] The sixth column chl itl idx is {5, 14, 22, 29};

[0146] The seventh column chl itl idx is {6, 15, 23};

[0147] The eighth column chl itl idx is {7, 16};

[0148] The ninth column chl itl idx is {8}.

[0149] Further, a rectangular coordinate system can be established based on the triangular interleaver to obtain the correspondence between the sequence index after channel interleaving and the sequence index before channel interleaving. For the convenience of calculation and description, the origin (0, 0) can be set at the position of chl itl idx[0], the x-axis can be set as the behavior of the triangular interleaver, and the y-axis can be set as the column. As an example, the rectangular coordinate system can be established as shown in Figure 6 ​As shown, a rectangular coordinate system as shown in the figure is established.

[0150] For any element position (x0, y0) in the triangular interleaver with side length T, the chl itl idx corresponding to the position satisfies:

[0151]

[0152] As can be seen, based on the above formula, the index corresponding to any position in the triangular interleaver in the second data sequence and the corresponding data can be obtained. Therefore, the data corresponding to the index can be directly read from the second data sequence without actually performing the operations of writing into the triangular interleaver and reading from the triangular interleaver.

[0153] As an example, for the second data sequence chl itl idx[i], (i = 0, 1, …, 36) with E = 37, the corresponding triangular interleaver side length T = 9 can be determined based on the bisection method. Further, based on the above formula, the chl itl idx corresponding to each position in the first column can be solved: the first row 0; the second row 0 + 1 × 9 - (1 × (1 - 1)) / 2 = 9; the third row 0 + 2 × 9 - (2 × (2 - 1)) / 2 = 17; the fourth row 0 + 3 × 9 - (3 × (3 - 1)) / 2 = 24; the fifth row 0 + 4 × 9 - (4 × (4 - 1)) / 2 = 30; the sixth row 0 + 5 × 9 - (5 × (5 - 1)) / 2 = 35; the index of the element of the seventh row is 0 + 6 × 9 - (6 × (6 - 1)) / 2 = 39 > 36, so the corresponding position should be a NULL bit, and the positions corresponding to the eighth row and the ninth row are NULL bits. Similarly, the chl itl idx corresponding to each position in the second column can be solved: the first row 1; the second row 1 + 1 × 9 - (1 × (1 - 1)) / 2 = 10; the third row 2 + 2 × 9 - (2 × (2 - 1)) / 2 = 18; the fourth row 1 + 3 × 9 - (3 × (3 - 1)) / 2 = 25; the fifth row 1 + 4 × 9 - (4 × (4 - 1)) / 2 = 31; the sixth row 1 + 5 × 9 - (5 × (5 - 1)) / 2 = 36; the index of the element of the seventh row is 1 + 6 × 9 - (6 × (6 - 1)) / 2 = 40 > 36, so the corresponding position should be a NULL bit, and the position corresponding to the eighth row is also a NULL bit. In this way, the output of each column of the triangular interleaver can be obtained based on the above formula, and the channel interleaved sequence can be read.

[0154] Further, the read sequence can be stored in the first queue.

[0155] Optionally, based on the preset parallelism, the channel interleaved sequence is read from the second data sequence and stored in the first queue.

[0156] As an example, taking the preset parallelism degree of 32 as an example, when the number of data remaining in the column is not less than 32, 32 chl itl idxs can be generated according to the above formula, and the corresponding data is stored in the first queue; when the number of data remaining in the column is less than 32, the chl itl idx of the number of remaining data is generated according to the above formula, and the corresponding data is stored in the first queue.

[0157] Optionally, the data corresponding to the 32 chl itl idxs obtained each time can be recorded as rate matching data [0~31].

[0158] Step 404, mapping the data sequence stored in the first queue to the corresponding time-frequency domain resource.

[0159] In some embodiments, the data sequence stored in the first queue can be mapped to the corresponding time-frequency domain resource.

[0160] In some embodiments, the number of bits to be mapped on each time domain symbol can be determined, and further, the data sequence mapped on each time domain symbol can be read from the first queue based on the preset parallelism degree and mapped to the corresponding time-frequency domain resource.

[0161] The communication method of the embodiment of the application, by acquiring the first data sequence after polarization encoding; based on the first rule and the first data sequence, acquiring the second data sequence to be multiplexed; based on the preset parallelism degree, reading the data sequence after channel interleaving of the second data sequence from the second data sequence and storing it in the first queue; mapping the data sequence stored in the first queue to the corresponding time-frequency domain resource; so that fast and efficient rate matching and multiplexing of the data sequence after polarization encoding can be realized, the resource multiplexing is fully considered, the utilization rate of the resource is effectively improved, the hardware resource is saved, the calculation complexity is effectively reduced, and the overall performance is improved.

[0162] Figure 5 Another flowchart of a communication method provided by the embodiment of the application.

[0163] As Figure 5 shown, the communication method can include the following steps:

[0164] Step 501, acquiring the first data sequence after polarization encoding.

[0165] Step 502, based on the first rule and the first data sequence, acquiring the second data sequence to be multiplexed.

[0166] Step 503: Based on a preset parallelism, read the data sequence after channel interleaving the second data sequence from the second data sequence and store it in the first queue.

[0167] It should be noted that the specific implementation of steps 501-503 can be referred to in the various embodiments of this application, and will not be repeated here.

[0168] Step 504: Determine the number of bits to be mapped on each time-domain symbol.

[0169] In some embodiments, the data sequence in the first queue is a sequence obtained after a series of processing of the UCI, which is to be reused and mapped to resources.

[0170] In some embodiments, at least one time-domain symbol corresponding to the UCI and the number of bits to be mapped on each time-domain symbol can be determined based on the rate matching value E of the UCI (i.e., the number of bits included in the second data sequence to be multiplexed) and parameters predefined in the protocol.

[0171] In some embodiments, based on the rate matching value E of the UCI, the number of resource elements (REs) on each time-domain symbol, and the modulation scheme, at least one time-domain symbol corresponding to the UCI, and the number of bits to be mapped on each time-domain symbol, can be determined from a table predefined in the protocol.

[0172] As an example, the corresponding time-domain symbols and the number of bits to be mapped on each time-domain symbol can be determined based on the table shown below:

[0173] Table 1. PUCCH Demodulation Reference Signal (DMRS) and UCI Symbols

[0174]

[0175] In some embodiments, the number of UCI mapping groups (i.e., those in Table 1 above) can be determined from a pre-defined table in the protocol based on the UCI rate matching value E, the number of REs on each time-domain symbol, and the modulation scheme. This includes the number of REs on each time-domain symbol and the time-domain symbol in which each group belongs. Furthermore, the number of bits that can be mapped on each time-domain symbol can be determined based on the number of REs and the modulation scheme on each time-domain symbol. Specifically, during the resource mapping process, for each UCI group... In other words, it is mapped sequentially from the symbol 0 to the largest.

[0176] As an example, the rate matching value of UCI is E=32, based on the number of REs on each time domain symbol, modulation mode, etc., it is determined that the indexes of the time domain symbols where the UCI is mapped are {0, 2} and {3}, and the number of data bits that can be carried on each time domain symbol is 12, wherein {0, 2} is the corresponding time domain symbol index set, and {3} is the corresponding time domain symbol index set, and is the mapping group of the UCI. Therefore, when multiplexing and time-frequency domain resource mapping are performed, it can be determined that 12 bits of data need to be mapped on time domain symbol #0 first, then 12 bits of data are mapped on time domain symbol #2, and finally 8 bits of data are mapped on time domain symbol #3.

[0177] Further, in some embodiments, the number of UCI is multiple, and for the next UCI, it is necessary to start mapping from the remaining position after the mapping of the previous UCI is completed, and it is still sequentially mapped from small to large from symbol 0.

[0178] Step 505, based on the above-mentioned preset parallel degree, reading the data sequence mapped on each time domain symbol from the above-mentioned first queue and mapping to the corresponding time-frequency domain resource.

[0179] In some embodiments, multiplexing is performed at the time domain symbol level, when the data to be mapped on the time domain symbol is not less than the preset parallel degree, the preset parallel degree of bits of data is read for mapping, otherwise the remaining bits of data to be mapped are read for mapping.

[0180] In some embodiments, at the UCI level (that is, for each UCI), the number of bits to be mapped on each time domain symbol can be calculated in advance, and based on the preset implementation rule, multiplexing is performed according to the above-mentioned preset parallel degree.

[0181] In some embodiments, the above-mentioned first queue can select a special synchronous fifo that can write and read multiple data at the same time, which is referred to as efifo hereinafter.

[0182] Optionally, the above-mentioned first queue can realize the shaping of data.

[0183] In some embodiments, based on the preset parallel degree, the obtained channel interleaved data sequence to be multiplexed (rate_matching_data) can be written into the first queue (efifo) according to the number of written data bytes (wr_data_num) (that is, step 504).

[0184] Optionally, the first queue can be opened to a depth large enough by default.

[0185] Optionally, through a series of calculations, the first queue can be opened to a depth of 160 to meet the performance and resource requirements.

[0186] In some embodiments, when it is detected that the number of data (data_cnt) in the first queue is not less than the number of multiplexing mapping data (multiplexing_len), the number of mapping data (multiplexing_len) is read out.

[0187] In some embodiments, the read data can be written into the corresponding storage unit according to the preset address segmentation rule corresponding to the time domain symbol index.

[0188] Optionally, the storage unit can use a single-port random-access memory (SPRAM) to complete multiplexing.

[0189] The communication method of the embodiments of the present application, by obtaining a first data sequence after polarization encoding; based on a first rule and the first data sequence, obtaining a second data sequence to be multiplexed; based on a preset parallelism, reading a data sequence after channel interleaving of the second data sequence from the second data sequence and storing it in a first queue; determining the number of bits to be mapped on each time domain symbol; based on the preset parallelism, reading the data sequence mapped on each time domain symbol from the first queue and mapping it on the corresponding time-frequency domain resource; so that fast and efficient rate matching and multiplexing of the data sequence after polarization encoding can be realized, while fully considering the resource multiplexing, effectively improving the resource utilization, saving hardware resources, effectively reducing the complexity of calculation, and improving the overall performance.

[0190] In order to realize the above-mentioned embodiments, the present application further provides a communication device.

[0191] Figure 7 A structural schematic diagram of a communication device provided by the embodiments of the present application.

[0192] As shown in Figure 7 , the communication device includes an encoding module 710, a matching module 720 and a multiplexing module 730.

[0193] The encoding module 710 is configured to obtain a first data sequence after polarization encoding.

[0194] The matching module 720 is configured to obtain a second data sequence to be multiplexed based on a first rule and the first data sequence.

[0195] The multiplexing module 730 is configured to map the second data sequence to corresponding time-frequency domain resources according to a second rule.

[0196] Optionally, the matching module 720 is specifically configured to:

[0197] determine, based on the first rule, an index corresponding to each bit of data in the second data sequence in the first data sequence;

[0198] obtain, according to the index, the data corresponding to each bit in the first data sequence, to obtain the second data sequence.

[0199] Optionally, the matching module 720 is specifically configured to:

[0200] determine, based on inverse mapping of the sub-block interleaving and rate matching transformation, an index corresponding to each bit of data in the second data sequence in the first data sequence.

[0201] Optionally, the multiplexing module 730 is specifically configured to:

[0202] read, based on a preset parallelism, a data sequence after channel interleaving of the second data sequence from the second data sequence and store the data sequence in a first queue;

[0203] map the data sequence stored in the first queue to corresponding time-frequency domain resources;

[0204] wherein the number of bits of the data sequence read each time from the second data sequence does not exceed the preset parallelism, and the data sequence read each time is in the same column of the triangular interleaver.

[0205] Optionally, the multiplexing module 730 is specifically configured to:

[0206] determine the number of bits to be mapped on each time domain symbol;

[0207] read, based on the preset parallelism, a data sequence mapped to each time domain symbol from the first queue and map the data sequence to corresponding time-frequency domain resources;

[0208] wherein the number of bits of the data sequence read each time from the first queue does not exceed the preset parallelism.

[0209] Optionally, the apparatus further comprises:

[0210] a processing module (not shown in the figure) configured to determine the side length of the triangular interleaver based on the length of the second data sequence.

[0211] The communication device provided in the embodiments of the present application can obtain a first data sequence after polarization encoding, obtain a second data sequence to be multiplexed based on a first rule and the first data sequence, map the second data sequence to corresponding time-frequency domain resources according to a second rule, and thus can perform fast and efficient rate matching and multiplexing on the data sequence after polarization encoding, fully considers resource multiplexing, effectively improves resource utilization, saves hardware resources, and improves overall performance.

[0212] It should be noted that the foregoing explanation of the communication method applied to the communication device also applies to the communication device of the embodiment, which will not be described here.

[0213] To implement the above-mentioned embodiments, the embodiments of the present application also provide a communication device, comprising one or more processors; wherein the communication device is configured to execute the communication method provided in the above-mentioned embodiments. Figures 2-5 To implement the above-mentioned embodiments, the embodiments of the present application also provide a communication device, comprising one or more processors; wherein the communication device is configured to execute the communication method provided in the above-mentioned embodiments.

[0214] To implement the above-mentioned embodiments, the embodiments of the present application also provide a chip, comprising a processor and an interface; the processor is configured to read instructions to execute the communication method provided in the above-mentioned embodiments. Figures 2-5 To implement the above-mentioned embodiments, the embodiments of the present application also provide a chip, comprising a processor and an interface; the processor is configured to read instructions to execute the communication method provided in the above-mentioned embodiments.

[0215] To implement the above-mentioned embodiments, the embodiments of the present application also provide another chip, comprising at least one processor and a communication interface; the communication interface is configured to receive a signal input into the chip or output from the chip, and the processor is in communication with the communication interface and implements the communication method provided in the above-mentioned embodiments through a logic circuit or an execution code instruction. Figures 2-5 To implement the above-mentioned embodiments, the embodiments of the present application also provide another chip, comprising at least one processor and a communication interface; the communication interface is configured to receive a signal input into the chip or output from the chip, and the processor is in communication with the communication interface and implements the communication method provided in the above-mentioned embodiments through a logic circuit or an execution code instruction.

[0216] To implement the above-mentioned embodiments, the embodiments of the present application also provide a non-transitory computer readable storage medium, and instructions in the storage medium are executed by a processor of a communication device, so that the communication device can execute the communication method provided in the above-mentioned embodiments. Figures 2-5 To implement the above-mentioned embodiments, the embodiments of the present application also provide a non-transitory computer readable storage medium, and instructions in the storage medium are executed by a processor of a communication device, so that the communication device can execute the communication method provided in the above-mentioned embodiments.

[0217] Figure 8 is a block diagram of a communication device according to an example embodiment. For example, the communication device 800 can be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, and the like.

[0218] Referring to Figure 8 , the communication device 800 can include one or more of the following components: a processing component 802, a memory component 804, a power supply component 806, a multimedia component 808, an audio component 810, an input / output (I / O) interface 812, a sensor component 814, and a communication component 816.

[0219] The processing component 802 generally controls the overall operation of the communication device 800 such as the operation of the display, telephonic conversations, data communications, camera operations, and recording operations. The processing component 802 can include one or more processors 520 to execute instructions

[0220] The memory 804 is configured to store various types of data to support operations of the communication device 800. Examples of these data include instructions for any application or methods operating on the communication device 800, contact data, phonebook data, messages, pictures, videos, and so on. The memory 804 can be implemented by any type of volatile or non-volatile storage devices or a combination thereof such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable programmable read only memory (EPROM), programmable read only memory (PROM), read only memory (ROM), magnetic memory, flash memory, magnetic disks, or optical disks.

[0221] The power component 806 provides power to the various components of the communication device 800. The power component 806 can include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the communication device 800.

[0222] The multimedia component 808 includes a screen providing an output interface between the communication device 800 and a user. In some embodiments, the screen can include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen can be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors to sense a touch, a slide, and a gesture on the touch panel. The touch sensors can not only sense a boundary of a touching or sliding action, but also detect duration and pressure related to the touching or sliding action. In some embodiments, the multimedia component 808 includes a front-facing camera and / or a rear-facing camera. The front-facing camera and / or the rear-facing camera can receive external multimedia data when the communication device 800 is in an operation mode such as a photographing mode or a video mode. Each of the front-facing camera and the rear-facing camera can be a fixed optical lens system or have a focal length and optical zoom capability.

[0223] Audio component 810 is configured to output and / or input audio signals. For example, audio component 810 includes a microphone (MIC) configured to receive external audio signals when communication device 800 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 804 or transmitted via communication component 816. In some embodiments, audio component 810 also includes a speaker for outputting audio signals.

[0224] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0225] Sensor assembly 814 includes one or more sensors for providing status assessments of various aspects of communication device 800. For example, sensor assembly 814 can detect the on / off state of communication device 800, the relative positioning of components such as the display and keypad of communication device 800, changes in the position of communication device 800 or a component of communication device 800, the presence or absence of user contact with communication device 800, the orientation or acceleration / deceleration of communication device 800, and temperature changes of communication device 800. Sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 814 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 814 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0226] Communication component 816 is configured to facilitate wired or wireless communication between communication device 800 and other devices. Communication device 800 can access wireless networks based on communication standards, such as WiFi, 4G, or 5G, or combinations thereof. In one exemplary embodiment, communication component 816 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 816 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0227] In exemplary embodiments, the communication device 800 can be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, micro-controllers, microprocessors or other electronic components, for performing the above-described methods.

[0228] In exemplary embodiments, a non-transitory computer-readable storage medium including instructions, such as the memory 804 including instructions, is also provided, which can be executed by the processor 520 of the communication device 800 to accomplish the above-described methods. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disc, and an optical data storage device, etc.

[0229] In the description of the specification, the description of the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Also, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples described in the specification and the features of the different embodiments or examples, without contradiction.

[0230] In addition, the terms "first", "second", etc. are used only for the purpose of description and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is at least two, for example, two, three, etc., unless otherwise specifically limited.

[0231] Any process or method descriptions or descriptions of the flow diagrams described herein or otherwise described in the specification can be understood as representing the modules, segments, or portions of code that include executable instructions for performing custom logic functions or processes, and the scope of preferred embodiments of the present application includes additional implementation in which the functions described are performed in a different order, including substantially simultaneously, or in reverse order, or in an order that is different from the order shown or discussed, including according to the functionality involved, which should be understood by those skilled in the art of the embodiments of the present application.

[0232] The logic and / or steps represented in the flowcharts and / or described herein, for example, can be considered as a sequence of executable instructions stored in a computer readable medium, which can be executed by an instruction execution system, apparatus or device, such as a computer-based system, processor- based system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions, or a combination thereof. For the purposes of this specification, a "computer readable medium" can be any apparatus that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer readable medium can specifically include the following, which are non-exhaustive list: electrical connection (electrical device having one or more wires), portable computer diskette (magnetic device), random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or Flash memory), optical fiber device, and portable compact disc read-only memory (CDROM). In addition, the computer readable medium can even be paper or other suitable medium upon which the program is printed, as the program can be electronically captured, for example, by optically scanning the paper or other suitable medium, then electronically converted into a form that can be edited, compiled, or interpreted, or otherwise processed in electronic form into an executable form suitable for use in the instruction execution system, apparatus or device.

[0233] It should be understood that parts of the application can be implemented in hardware, software, firmware or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. As in another embodiment, if implemented in hardware, any of the following technologies known in the art or their combination can be used: discrete logic circuit with logic gates for implementing logic functions on data signals, application specific integrated circuit with suitable combination logic gates, programmable gate array (PGA), field programmable gate array (FPGA), etc.

[0234] Those skilled in the art of the present technology can understand that all or part of the steps carried out by the above-mentioned embodiment methods can be completed by programs instructing relevant hardware, and the programs can be stored in a computer readable storage medium. When the program is executed, it includes one of the steps of the method embodiment or a combination thereof.

[0235] In addition, each of the functional units in the various embodiments of the present application can be integrated in one processing module, or each of the units can be physically present separately, or two or more units can be integrated in one module. The integrated module can be implemented in the form of hardware or in the form of a software functional module. When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer readable storage medium.

[0236] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present application have been shown and described above, it should be understood that the above embodiments are exemplary and should not be construed as limiting the present application, and those skilled in the art can make changes, modifications, replacements and variations to the above embodiments within the scope of the present application.

Claims

1. A communication method, characterized in that, The method includes: Obtain the first data sequence after polar coding; Based on the first rule and the first data sequence, a second data sequence to be reused is obtained, wherein the first rule includes the inverse mapping of sub-block interleaving and rate matching transformation; The second data sequence is mapped to the corresponding time-frequency domain resources according to the second rule; The step of mapping the second data sequence to the corresponding time-frequency domain resources according to the second rule includes: Based on a preset parallelism, the data sequence after channel interleaving the second data sequence is read from the second data sequence and stored in the first queue; Map the data sequence stored in the first queue to the corresponding time-frequency domain resources; In this process, the number of bits of the data sequence read from the second data sequence each time does not exceed the preset parallelism, and the data sequence read each time is in the same column of the triangular interleaver.

2. The method according to claim 1, characterized in that, The step of obtaining the second data to be reused based on the first rule and the first data includes: Based on the first rule, determine the index corresponding to each data point in the second data sequence in the first data sequence; The second data sequence is obtained by retrieving the data corresponding to each bit from the first data sequence according to the index.

3. The method according to claim 1, characterized in that, The step of mapping the data sequence stored in the first queue to the corresponding time-frequency domain resources includes: Determine the number of bits to be mapped on each time-domain symbol; Based on the preset parallelism, the data sequence mapped to each time domain symbol is read from the first queue and mapped to the corresponding time-frequency domain resource; The number of bits in the data sequence read from the first queue each time does not exceed the preset parallelism.

4. The method according to claim 1, characterized in that, The method further includes: The side length of the triangular interleaver is determined based on the length of the second data sequence.

5. A communication device, characterized in that, include: The encoding module is used to obtain the first data sequence after polar coding; The matching module is used to obtain a second data sequence to be reused based on a first rule and the first data sequence, wherein the first rule includes the inverse mapping of sub-block interleaving and rate matching transformation; The multiplexing module is used to map the second data sequence to the corresponding time-frequency domain resources according to the second rule; The multiplexing module is specifically used for: Based on a preset parallelism, the data sequence after channel interleaving the second data sequence is read from the second data sequence and stored in the first queue; Map the data sequence stored in the first queue to the corresponding time-frequency domain resources; In this process, the number of bits of the data sequence read from the second data sequence each time does not exceed the preset parallelism, and the data sequence read each time is in the same column of the triangular interleaver.

6. The apparatus according to claim 5, characterized in that, The matching module is specifically used for: Based on the first rule, determine the index corresponding to each data point in the second data sequence in the first data sequence; The second data sequence is obtained by retrieving the data corresponding to each bit from the first data sequence according to the index.

7. The apparatus according to claim 5, characterized in that, The multiplexing module is specifically used for: Determine the number of bits to be mapped on each time-domain symbol; Based on the preset parallelism, the data sequence mapped to each time domain symbol is read from the first queue and mapped to the corresponding time-frequency domain resource; The number of bits in the data sequence read from the first queue each time does not exceed the preset parallelism.

8. The apparatus according to claim 5, characterized in that, The device further includes: The processing module is used to determine the side length of the triangular interleaver based on the length of the second data sequence.

9. A communication device, comprising: One or more processors; The communication device is used to perform the method according to any one of claims 1-4.

10. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to perform the method according to any one of claims 1-4.

11. A chip, characterized in that, Including processors and interfaces; The processor is used to read instructions to execute the method of any one of claims 1-4.

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