Display device

Abstract

A display device includes: an electronic module; and a display module in which a module area corresponding to the electronic module and a display area adjacent to the module area are defined, and which includes a display panel having a plurality of pixels disposed in the display area and an anti-reflection layer disposed on the display panel. The anti-reflection layer includes: a first light-shielding pattern disposed in the display area and including a light-shielding material, and defining a plurality of openings in the first light-shielding pattern respectively corresponding to the plurality of pixels; a color filter layer having a plurality of color filters respectively overlapping the plurality of openings in a plan view; and a second light shielding pattern disposed in the module area and having a light shielding material.

Description

Technical Field

[0001] The present disclosure herein relates to a display device having improved reliability. Background Art

[0002] Multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, and game consoles include a display device for providing images to a user.

[0003] Due to the recent technological development of display devices, various types of display devices are being developed. In addition, for user convenience and product aesthetics, display devices having a display area (or active area) with a larger area and a non-display area (or frame area) with a narrower area are being developed.

[0004] Meanwhile, the display device may include an electronic module that receives an external signal or provides an output signal to the outside. The electronic module is accommodated in a housing or the like together with the display panel, thereby constituting the display device. Summary of the invention

[0005] The present disclosure provides a display device having improved visibility against external light reflection.

[0006] An embodiment of the present invention provides a display device, comprising: an electronic module; and a display module, in which a module area corresponding to the electronic module and a display area adjacent to the module area are defined, and the display module comprises a display panel having a plurality of pixels arranged in the display area and an anti-reflection layer arranged on the display panel, wherein the anti-reflection layer comprises: a first shading pattern, the first shading pattern is arranged in the display area and comprises a shading material, and a plurality of openings are defined in the first shading pattern corresponding to the plurality of pixels, respectively; a color filter layer, having a plurality of color filters respectively overlapping the plurality of openings in a plan view; and a second shading pattern, which is arranged in the module area and has the shading material.

[0007] In an embodiment, the module region may include a hole region overlapping the electronic module and a peripheral region surrounding the hole region, and the second light shielding pattern may overlap the peripheral region in a plan view.

[0008] In an embodiment, the display module may define a module hole that passes through the display panel and the anti-reflection layer and corresponds to the hole area.

[0009] In an embodiment, the module hole may include a first hole defined by passing through the display panel and a second hole defined by passing through the second light shielding pattern, and a size of the first hole and a size of the second hole in a plan view may be the same.

[0010] In an embodiment, the display module may further include a cover plate disposed under the display panel, and the module hole may further include a third hole defined by penetrating the cover plate.

[0011] In an embodiment, a size of the first hole in plan view may be greater than a size of the third hole.

[0012] In an embodiment, the display device may further include a window disposed on the display module.

[0013] In an embodiment, the window may include: a window base layer; and a light shielding layer disposed on the window base layer.

[0014] In an embodiment, the light shielding layer may not overlap with the module area in a plan view.

[0015] In an embodiment, the display module may further include a non-display area adjacent to the display area, and the light shielding layer may overlap the non-display area.

[0016] In an embodiment, the window may further include a protective layer disposed on the window base layer, and the light shielding layer may be disposed between the window base layer and the protective layer.

[0017] In an embodiment, the display module may further include an input sensing layer disposed between the display panel and the anti-reflection layer, and including a plurality of insulating layers and a plurality of sensing patterns disposed on at least one insulating layer of the plurality of insulating layers.

[0018] In an embodiment, the input sensing layer may further include an alignment mark disposed under the second light shielding pattern and having conductivity.

[0019] In an embodiment, the alignment mark may overlap the peripheral area in a plan view.

[0020] In an embodiment, a pattern hole overlapping the peripheral area in a plan view may be defined in the second light shielding pattern, and the alignment mark may overlap the pattern hole in a plan view.

[0021] In an embodiment, the alignment mark may be disposed in the same layer as a layer in which at least one sensing pattern of the plurality of sensing patterns is disposed.

[0022] In an embodiment, the plurality of insulating layers may include a first insulating layer and a second insulating layer, and the alignment mark may be disposed between the first insulating layer and the second insulating layer.

[0023] In an embodiment, the first light shielding pattern and the second light shielding pattern may be integrally connected to each other.

[0024] In an embodiment, a folding area foldable about a virtual folding axis and a non-folding area that is not folded may be defined in the display module, and the module area may overlap with the non-folding area.

[0025] In an embodiment of the present invention, a display device includes: an electronic module; a display module, in which a module area corresponding to the electronic module and a display area adjacent to the module area are defined, and the display module includes a display panel having a plurality of pixels arranged in the display area, an input sensing layer arranged on the display panel, and a functional layer arranged on the input sensing layer; and a window arranged on the display module. The module area includes: a hole area overlapping the electronic module; and a peripheral area surrounding the hole area. The functional layer includes a module area shading pattern arranged on the input sensing layer, corresponding to the peripheral area and having a shading material.

[0026] In an embodiment, the display module may define a module hole passing through the display panel and the functional layer and corresponding to the hole area.

[0027] In an embodiment, the module hole may include: a first hole defined by passing through the display panel; and a second hole defined by passing through the module area light shielding pattern, and a size of the first hole and a size of the second hole in a plan view may be the same.

[0028] In an embodiment, the display device may further include a cover plate disposed under the display panel, and the module hole may further include a third hole defined by penetrating the cover plate.

[0029] In an embodiment, a size of the first hole in plan view may be greater than a size of the third hole.

[0030] In an embodiment, the window may include a window base layer and a light shielding layer disposed on the window base layer, and the light shielding layer may not overlap with the module area in a plan view.

[0031] In an embodiment, the functional layer may further include: a display area shading pattern, which is arranged in the display area and includes a shading material, and a plurality of openings are defined in the display area shading pattern corresponding to the plurality of pixels respectively; and a color filter layer, including a plurality of color filters respectively overlapping the plurality of openings in a plan view.

[0032] In an embodiment, a folding area foldable about a virtual folding axis and a non-folding area that is not folded may be defined in the display module, and the module area may overlap with the non-folding area. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The accompanying drawings illustrate embodiments of the present invention and together with the description serve to explain the principles of the present invention. In the drawings:

[0034] Figure 1 is a combined perspective view of a display device according to an embodiment of the present invention;

[0035] Figure 2 yes Figure 1 An exploded perspective view of a display device;

[0036] Figure 3 yes Figure 1 A block diagram of a display device shown in FIG.

[0037] Figure 4A is a plan view of a display panel according to an embodiment of the present invention;

[0038] Figure 4B is a plan view of an input sensing layer according to an embodiment of the present invention;

[0039] Figure 5 is a cross-sectional view illustrating a display area of ​​a display device according to an embodiment of the present invention;

[0040] Figure 6 is a plan view of a display device according to an embodiment of the present invention;

[0041] Fig. 7A It is along Figure 6 A cross-sectional view of the display device taken along line II';

[0042] Figure 7B yes Fig. 7A An enlarged view of the region BB' shown in FIG.

[0043] Figure 8 It is along Figure 6 A cross-sectional view of the display device taken along line II-II';

[0044] Fig. 9 yes Figure 6 An enlarged view of the area AA' shown in FIG.

[0045] Fig. 10A is a cross-sectional view illustrating a portion of a display device according to an embodiment of the present invention;

[0046] Fig. 10B yes Fig. 10A An enlarged view of the region CC' shown in FIG.

[0047] Fig.11A is a cross-sectional view illustrating a portion of a display device according to another embodiment of the present invention;

[0048] Fig. 11B It is a graphic Fig.11A A plan view of a portion of the display device shown in FIG.

[0049] Fig.12 is a cross-sectional view illustrating a portion of a display device according to still another embodiment of the present invention; and

[0050] Figures 13 to 15 is a perspective view of a display device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0051] Embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. However, the present invention can be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and these embodiments will fully convey the scope of the present invention to those skilled in the art.

[0052] In this specification, it will be understood that when an element (or region, layer, portion, etc.) is referred to as being "on," "connected to" or "coupled to" another element, it can be directly set on, directly connected to or directly coupled to the other element, or intervening elements can be set between them.

[0053] The same reference numerals or symbols refer to the same elements throughout. In the drawings, in order to effectively describe the technical contents, the thickness, ratio and size of the elements are exaggerated.

[0054] The terms used in this article are only used for the purpose of describing specific embodiments and are not intended to be limiting. As used in this article, "one", "the (said)" and "at least one" do not represent a limit to quantity, and are intended to include both the singular and the plural, unless the context clearly indicates otherwise. For example, "element" has the same meaning as "at least one element", unless the context clearly indicates otherwise. "At least one" should not be interpreted as limiting "one". "Or" means "and / or". As used in this article, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0055] It will be understood that although the terms "first", "second", etc. can be used in this article to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish an element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the scope of the present invention, the first element, component, region, layer or part discussed below can be referred to as the second element, component, region, layer or part. Similarly, the second element, component, region, layer or part can be referred to as the first element, component, region, layer or part. As used in this article, the singular form "one" and "the (described)" are also intended to include plural forms, unless the context clearly indicates otherwise.

[0056] In addition, terms such as "below", "on the lower side", "above", or "on the upper side" may be used to describe the relationship of elements illustrated in the drawings. These terms have relative concepts and are described based on directions indicated in the drawings.

[0057] Unless otherwise defined, all terms (including technical and scientific terms) used in this article have the same meaning as those commonly understood by ordinary technicians in the field to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant field, and will not be interpreted in an idealized or overly formal sense unless explicitly defined in this article.

[0058] It will be further understood that when used in this specification, the terms “including” and / or “having” specify the presence of stated features, integers, steps, operations, elements, parts and / or groups thereof, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups thereof.

[0059] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0060] Figure 1 is an assembled perspective view of a display device according to an embodiment of the present invention. Figure 2 yes Figure 1 An exploded perspective view of a display device. Figure 3 yes Figure 1 In the following, reference is made to Figures 1 to 3 Embodiments of the present invention are described.

[0061] The display device DD may be activated in response to the electrical signal. The display device DD may include various embodiments. In an embodiment, for example, the display device DD may include a tablet computer, a notebook computer, a computer, a smart TV, etc. In this embodiment, the display device DD is exemplarily illustrated as a smart phone.

[0062] like Figure 1 As illustrated in FIG. 1 , the display device DD may display an image IM on the front surface FS. The front surface FS may be defined as being parallel to a plane defined by the first direction DR1 and the second direction DR2. The front surface FS includes a transmission area TA and a bezel area BZA adjacent to the transmission area TA.

[0063] The display device DD displays an image IM in the transmissive area TA. The image IM may include at least one of a static image and a dynamic image. Figure 1 A clock and a plurality of icons are illustrated as examples of the image IM.

[0064] The transmission area TA may have a quadrilateral shape parallel to each of the first direction DR1 and the second direction DR2. However, this is an example, and the transmission area TA may have various shapes and is not limited to any one embodiment of the present invention.

[0065] The frame area BZA is adjacent to the transmission area TA. The frame area BZA may surround the transmission area TA. However, this is illustrated exemplarily, and the frame area BZA may be disposed adjacent to only one side of the transmission area TA, or may also be omitted. The electronic device according to an embodiment of the present invention may include various embodiments and is not limited to any one embodiment of the present invention.

[0066] The normal direction of the front surface may correspond to the thickness direction DR3 (hereinafter, the third direction) of the display device DD. In the present embodiment, the front surface (or upper surface) and the rear surface (or lower surface) of each of the members are defined based on the direction in which the image IM is displayed. The front surface and the rear surface are opposite to each other in the third direction DR3.

[0067] The directions indicated by the first direction to the third direction DR1, DR2 and DR3 may be relative concepts and, therefore, may be changed to other directions. Hereinafter, the first direction to the third direction refers to the directions indicated by the first direction to the third direction DR1, DR2 and DR3, respectively, and are represented by the same figure mark or symbol.

[0068] The display device DD according to an embodiment of the present invention can detect a user's input TC applied from the outside. The user's input TC includes various types of external inputs such as a part of the user's body, light, heat, or pressure. In addition, the display device DD can detect not only an input that contacts the display device DD, but also an input that is close to or adjacent to the display device DD.

[0069] In the present embodiment, the user's input TC is illustrated as the user's hand applied to the front surface. However, this is illustrated exemplarily, and the user's input TC may be provided in various forms as described above. In addition, depending on the structure of the display device DD, the display device DD may also detect the user's input TC applied to the side surface or rear surface of the display device DD, and is not limited to any one embodiment of the present invention.

[0070] The display device DD may include a window WM, a display module DM, a printed circuit board FCB, an electronic module EM, and a housing HU. The window WM is coupled to the housing HU to define an appearance of the display device DD.

[0071] The window WM is disposed on the display module DM to cover the front surface IS of the display module DM. The window WM may include an optically transparent insulating material. In an embodiment, for example, the window WM may include glass or plastic. The window WM may have a multi-layer or single-layer structure. In an embodiment, for example, the window WM may have a stacked structure of a plurality of plastic films bonded to each other by an adhesive, or a stacked structure of a glass substrate and a plastic film bonded to each other by an adhesive.

[0072] The window WM includes a front surface FS exposed to the outside. The front surface FS of the display device DD may be substantially defined by the front surface FS of the window WM.

[0073] In particular, the transmission area TA may be an optically transparent area. The transmission area TA may have a shape corresponding to the display area DA. In an embodiment, for example, the transmission area TA overlaps the entire surface or at least a portion of the display area DA. The image IM displayed in the display area DA of the display module DM can be viewed from the outside through the transmission area TA.

[0074] The bezel area BZA may be an area having a light transmittance relatively lower than that of the transmission area TA. The bezel area BZA defines the shape of the transmission area TA. The bezel area BZA may be adjacent to the transmission area TA and surround the transmission area TA.

[0075] The frame area BZA may have a predetermined color. When the window WM is provided as a glass or plastic substrate, the frame area BZA may be a colored layer printed or deposited on one surface of the glass or plastic substrate. In addition, the frame area BZA may also be defined by coloring the corresponding area of ​​the glass or plastic substrate.

[0076] The bezel area BZA may cover the non-display area NDA of the display module DM, and thus, may block the non-display area NDA from being visible to the outside. Meanwhile, this is illustrated exemplarily, and according to an embodiment of the present invention, the bezel area BZA may also be omitted in the window WM.

[0077] The display module DM may display an image IM and detect an external input TC. The display module DM includes a front surface IS having a display area DA and a non-display area NDA. The display area DA may be activated in response to an electrical signal.

[0078] In the present embodiment, the display area DA may be an area in which the image IM is displayed and at the same time an area in which the external input TC is detected. The transmission area TA at least overlaps with the display area DA. In an embodiment, for example, the transmission area TA overlaps with the entire surface of the display area DA or at least a portion thereof. Accordingly, the user can view the image IM or provide the external input TC through the transmission area TA. However, this is illustrated exemplarily, and in the display area DA, the area in which the image IM is displayed and the area in which the external input TC is detected may also be separated, and the display area DA is not limited to any one embodiment of the present invention.

[0079] The non-display area NDA may be an area covered by the frame area BZA. The non-display area NDA is adjacent to the display area DA. The non-display area NDA may surround the display area DA. In the non-display area NDA, a driving circuit or a driving line for driving the display area DA may be provided.

[0080] Various signal lines or pads PD for supplying electrical signals to the display area DA or electronic elements, etc. may be provided in the non-display area NDA. The non-display area NDA may be covered by the bezel area BZA and thus, may not be visible from the outside.

[0081] In the present embodiment, the display module DM is assembled in a state where the display area DA and the non-display area NDA are flat toward the window WM. However, this is illustrated exemplarily, and a portion of the non-display area NDA of the display module DM may be bent. At this time, the portion of the non-display area NDA may face the rear surface of the display device DD, so that the border area BZA in the front surface of the display device DD may be reduced. Alternatively, the display module DM may be assembled in a state where a portion of the display area DA is also bent. Alternatively, according to an embodiment of the present invention, the non-display area NDA may also be omitted in the display module DM.

[0082] refer to Figure 3 The display module DM may include a display panel DP and an input sensing layer ISL (or sensing unit). The display panel DP may be a component that substantially generates an image IM. The image IM generated from the display panel DP is viewed by an outside user through the transmissive area TA.

[0083] The input sensing layer ISL detects the external input TC applied from the outside. As described above, the input sensing layer ISL may detect the external input TC provided to the window WM.

[0084] A module area MA may be defined in the display module DM. For the same area, the module area MA may have a relatively higher transmittance than the display area DA. The module area MA is defined at a position corresponding to an electronic module EM to be described later.

[0085] At least a portion of the module area MA may be surrounded by the display area DA. In the present embodiment, the module area MA is spaced apart from the non-display area NDA. The module area MA is illustrated as being defined inside the display area DA so that the entire edge of the module area MA is surrounded by the display area DA. In the assembled state of the display device DD according to the present embodiment, the module area MA may be defined at a position overlapping with the transmissive area TA and spaced apart from the bezel area BZA.

[0086] In the present embodiment, the module area MA may include a hole area HA and a peripheral area SA. The hole area HA may be disposed at the center of the module area MA, and the peripheral area SA may surround the edge of the hole area HA. ​​The peripheral area SA may be an area that appears black when viewed from the outside. A detailed description of this will be made later.

[0087] The display module DM may include a module hole MH defined in the hole area HA and passing through the display module DM. The module hole MH may pass through at least one of the display panel DP and the input sensing layer ISL. The peripheral area SA may extend substantially along an edge of the module hole MH. The edge of the hole area HA may have a shape corresponding to the module hole MH in a plan view.

[0088] Although not illustrated in the drawings, the display module DM may further include an anti-reflection layer ARL (see FIG. 1 ) disposed on the input sensing layer ISL. Figure 5 ). The anti-reflection layer ARL may be a layer that selectively transmits light emitted from the display panel DP. The anti-reflection layer ARL may include a pigment or a dye, and may be a layer that reduces the reflectivity of external light incident from the outside of the display device DD. A detailed description of this will be made later.

[0089] The printed circuit board FCB may be connected to the display module DM. The printed circuit board FCB may include a flexible substrate CF and a main substrate MB. The flexible substrate CF may include an insulating film and a wire mounted on the insulating film. The wire is connected to the pad PD to electrically connect the printed circuit board FCB to the display module DM.

[0090] In this embodiment, the flexible substrate CF can be assembled in a bent state. Accordingly, the main substrate MB can be disposed on the rear surface of the display module DM, and thus, can be stably accommodated in the space provided in the housing HU. Meanwhile, in this embodiment, the flexible substrate CF can also be omitted, and in this case, the main substrate MB can also be directly connected to the display module DM.

[0091] The main substrate MB may include signal lines and electronic components not shown in the drawings. The electronic components may be connected to the signal lines and, therefore, may be electrically connected to the display module DM. The electronic components generate various electrical signals such as signals for generating an image IM or signals for detecting an external input TC, or process detected signals. At the same time, the main substrate MB may also be provided in plurality corresponding to each of the electrical signals for generation and processing, and is not limited to any one embodiment of the present invention.

[0092] In the display device DD according to the embodiment of the present invention, the driving circuit for providing the electrical signal to the display area DA may also be directly mounted on the display module DM. In this case, the driving circuit may be mounted in the form of a chip, or may be formed together with the pixel PX. In this case, the printed circuit board FCB may have a reduced area or may be omitted. The display device DD according to the embodiment of the present invention may include various embodiments, and is not limited to any one embodiment of the present invention.

[0093] The electronic module EM is arranged under the window WM. The electronic module EM may overlap with the module hole MH in a plan view and overlap with the hole area HA. ​​The electronic module EM may receive an external input transmitted through the hole area HA or provide an output through the hole area HA. ​​As used herein, a "plan view" is a view in the thickness direction (third direction DR3) of the base layer BL.

[0094] Among the electronic modules EM, a receiving portion for receiving an external input or an output portion for providing an output may overlap with the hole area HA in a plan view. The electronic module EM may be disposed on the rear surface of the display module DM, or at least a portion of the electronic module EM may also be disposed in the module hole MH. According to an embodiment of the present invention, since the electronic module EM is disposed to overlap with the display area DA in a plan view, an increase in the bezel area BZA may be prevented.

[0095] refer to Figure 3 , the display device DD may include a display module DM, a power module PM, a first electronic module EM1, and a second electronic module EM2. The display module DM, the power module PM, the first electronic module EM1, and the second electronic module EM2 may be electrically connected to each other. Figure 3 The display panel DP and the input sensing layer ISL among the components of the display module DM are exemplarily illustrated.

[0096] The first electronic module EM1 and the second electronic module EM2 include various functional modules for driving the display device DD. The first electronic module EM1 may be directly mounted on a motherboard electrically connected to the display panel DP, or mounted on a separate substrate to be electrically connected to the motherboard through a connector (not shown) or the like.

[0097] The first electronic module EM1 may include a control module CM, a wireless communication module TM, an image input module IIM, a sound input module AIM, a memory MM and an external interface IF. Some of the above modules may not be mounted on the motherboard and may also be electrically connected to the motherboard through a flexible circuit board.

[0098] The control module CM controls the overall operation of the display device DD. The control module CM may be a microprocessor. In an embodiment, for example, the control module CM activates or deactivates the display panel DP. The control module CM may control other modules such as the image input module IIM or the sound input module AIM based on a touch signal received from the display panel DP.

[0099] The wireless communication module TM can transmit / receive wireless signals to / from another terminal using a Bluetooth or Wi-Fi circuit. The wireless communication module TM can transmit / receive voice signals using a general communication circuit. The wireless communication module TM includes a transmitting part TM1 that modifies a signal to be transmitted and transmits the signal, and includes a receiving part TM2 that demodulates a received signal.

[0100] The image input module IIM processes the image signal and converts the signal into image data displayable on the display module DM. The sound input module AIM receives an external sound signal input through a microphone in a recording mode, a voice recognition mode, etc., and converts the signal into electronic voice data.

[0101] The external interface IF serves as an interface connected to an external charger, a wired / wireless data port, a card (eg, memory card, SIM / UIM card) slot, and the like.

[0102] The second electronic module EM2 may include an audio output module AOM, a light emitting module LM, a light receiving module LRM, a camera module CMM, etc. The above components may be directly mounted on the motherboard, or mounted on a separate substrate to be electrically connected to the display module DM or the first electronic module EM1 through a connector (not shown) or the like.

[0103] The sound output module AOM converts sound data received from the wireless communication module TM or sound data stored in the memory MM to output to the outside.

[0104] The light emitting module LM generates light and outputs light. The light emitting module LM may output infrared light. In an embodiment, for example, the light emitting module LM may include an LED element. In an embodiment, for example, the light receiving module LRM may detect infrared light. When infrared light of a predetermined level or higher is detected, the light receiving module LRM may be activated. The light receiving module LRM may include a CMOS sensor. After the infrared light generated from the light emitting module LM is output, the infrared light is reflected by an external object (e.g., a finger or face of a user), and the reflected infrared light may be incident on the light receiving module LRM. The camera module CMM captures external images.

[0105] refer to Figure 2 and Figure 3 , the electronic module EM according to an embodiment of the present invention may include at least one of the components of the first electronic module EM1 and the second electronic module EM2. In an embodiment, for example, the electronic module EM may include at least one of a camera, a speaker, a light detection sensor, and a heat detection sensor. The electronic module EM may detect an external object received through the hole area HA, or provide a sound signal such as a voice to the outside through the hole area HA. ​​In addition, the electronic module EM may include a plurality of components and is not limited to any one embodiment of the present invention.

[0106] The electronic module EM arranged to overlap with the hole area HA can easily view an external object through the hole area HA, or transmit an output signal generated in the electronic module EM to the outside. Although not illustrated in the drawings, the display device DD according to an embodiment of the present invention may further include a transparent member arranged between the electronic module EM and the display module DM. The transparent member may be an optically transparent film so that the external input transmitted through the module hole MH can pass through the transparent member to be transmitted to the electronic module EM. The transparent member may be attached to the rear surface of the display module DM, or, in the absence of a separate adhesive layer, be arranged between the display module DM and the electronic module EM. The display device DD according to an embodiment of the present invention may have various structures and is not limited to any one embodiment of the present invention.

[0107] According to an embodiment of the present invention, the electronic module EM can be assembled overlapping with the transmissive area TA in a plan view. Accordingly, the bezel area BZA can be prevented from being enlarged due to accommodating the electronic module EM, and thus, the aesthetics of the display device DD can be improved.

[0108] Figure 4A is a plan view of a display panel according to an embodiment of the present invention. Figure 4B is a plan view of an input sensing layer according to an embodiment of the present invention.

[0109] refer to Figure 4A , the display panel DP includes a base layer BL, a plurality of pixels PX, a plurality of signal lines GL, DL and PL, a power pattern VDD and a plurality of display pads DPD.

[0110] The display area DA and the non-display area NDA may be areas provided by a base layer BL. The base layer BL may include an insulating substrate. In an embodiment, for example, the base layer BL may be composed of a glass substrate, a plastic substrate, or a combination thereof. In addition, the base layer BL may include a metal substrate. The base layer BL may be provided flexibly so as to be folded by a user, or provided rigidly so as not to be deformed. The base layer BL according to an embodiment of the present invention may include various embodiments as long as there are components such as pixels PX or signal lines GL, DL, and PL disposed therein, and is not limited to any one embodiment of the present invention.

[0111] The signal lines GL, DL, and PL are connected to the pixels PX to transmit electrical signals to the pixels PX. The scan lines GL, data lines DL, and power lines PL among the signal lines included in the display panel DP are exemplarily illustrated in the drawings. However, this is exemplarily illustrated, and the signal lines GL, DL, and PL may further include at least one of a power line, an initialization voltage line, and a light emitting control line, and are not limited to any one embodiment of the present invention.

[0112] The pixel PX may be disposed in the display area DA. In this embodiment, an amplified signal circuit diagram of one pixel PX among a plurality of pixels is exemplarily illustrated. The pixel PX may include a first thin film transistor TR1, a capacitor CPP, a second thin film transistor TR2, and a light emitting element ED.

[0113] The first thin film transistor TR1 is connected to the scan line GL and the data line DL. The capacitor CPP is connected to the first thin film transistor TR1 and the power line PL. The second thin film transistor TR2 is connected to the first thin film transistor TR1, the capacitor CPP and the light emitting element ED. The first thin film transistor TR1, the capacitor CPP and the second thin film transistor TR2 can control the operation of the light emitting element ED. The first thin film transistor TR1 and the second thin film transistor TR2 can be PMOS transistors. In an embodiment, for example, the first thin film transistor TR1 and the second thin film transistor TR2 can be LTPS transistors. The configuration of the pixel PX according to an embodiment of the present invention is not limited to Figure 4A The embodiment shown in FIG. Figure 4A The configuration of the pixel PX illustrated in FIG. 1 is only an example, and the configuration of the pixel PX may be provided variously. In an embodiment, for example, the pixel PX may include at least three transistors, and each of the transistors may include an oxide semiconductor.

[0114] The light emitting element ED may emit light at a time and intensity corresponding to a data signal transmitted through the data line DL. In an embodiment, for example, the light emitting element ED may include an organic light emitting element, a quantum dot light emitting element, an electrophoretic element, or an electrowetting element.

[0115] The light emitting element ED is connected to the power supply terminal VSS to receive a power supply signal (hereinafter, a second power supply signal) different from the power supply signal (hereinafter, a first power supply signal) provided through the power supply line PL. The light emitting element ED can generate light corresponding to the difference between the electric signal provided from the second thin film transistor TR2 and the second power supply signal. Meanwhile, this is illustrated exemplarily, and the pixels PX can each include electronic components having various compositions and arrangements, and are not limited to any one embodiment of the present invention.

[0116] The pixels PX may be disposed around the module area MA. In the present embodiment, the boundary between the module area MA and the display area DA may have a closed line shape. In the present embodiment, the boundary between the module area MA and the display area DA is exemplarily illustrated as a circle.

[0117] The power pattern VDD is disposed in the non-display area NDA. In the present embodiment, the power pattern VDD is connected to a plurality of power lines PL. Accordingly, since the display panel DP includes the power pattern VDD, a consistent first power signal can be provided to each pixel PX.

[0118] The display pad DPD may include a first pad P1 and a second pad P2. The first pad P1 may be provided in plurality and connected to the data lines DL, respectively. The second pad P2 may be connected to a power pattern VDD to be electrically connected to the power line PL. The display panel DP may provide an electrical signal provided from the outside to the pixel PX through the display pad DPD. In addition to the first pad P1 and the second pad P2, the display pad DPD may further include a pad for receiving other electrical signals, and is not limited to any one embodiment of the present invention.

[0119] refer to Figure 4B , the input sensing layer ISL is connected to the display panel DP (see Figure 4A ) is illustrated in a shape corresponding to the input sensing layer ISL. In the present embodiment, the input sensing layer ISL may be disposed on the display panel DP. However, this is illustrated exemplarily, and the input sensing layer ISL may be disposed under the display panel DP or embedded in the display panel DP, and is not limited to any one embodiment of the present invention.

[0120] The input sensing layer ISL can detect the external input TC (see Figure 1 ), and acquires information about the position or strength of the external input TC. The input sensing layer ISL includes a plurality of first sensing electrodes TE1, a plurality of second sensing electrodes TE2, a plurality of lines TL1, TL2, and TL3, and a plurality of sensing pads T1, T2, and T3.

[0121] The first sensing electrode TE1 and the second sensing electrode TE2 are disposed in the display area DA. The input sensing layer ISL may acquire information about the external input TC through a change in capacitance between the first sensing electrode TE1 and the second sensing electrode TE2.

[0122] The first sensing electrodes TE1 are arranged in the first direction DR1, and each of the first sensing electrodes TE1 extends along the second direction DR2. The first sensing electrodes TE1 may each include a first sensing pattern SP1, a first adjacent pattern SP1H, and a first connection pattern CP1 (or a first auxiliary pattern).

[0123] The first sensing pattern SP1 is disposed in the display area DA. The first sensing pattern SP1 is disposed separately from the hole area HA. ​​The first sensing pattern SP1 has a predetermined shape and has a first area. In the present embodiment, the first sensing pattern SP1 may have a rhombus shape. However, this is exemplarily illustrated, and the first sensing pattern SP1 may have various shapes and is not limited to any one embodiment of the present invention.

[0124] The first adjacent pattern SP1H is disposed adjacent to the module area MA. The module hole MH according to an embodiment of the present invention passes through the input sensing layer ISL. The first adjacent pattern SP1H has a second area that is smaller than the first area of ​​the first sensing pattern SP1. The first adjacent pattern SP1H may have a shape of a rhombus that is the same as the shape of the first sensing pattern SP1 minus an area overlapping the module area MA in a plan view.

[0125] In the present embodiment, the first connection pattern CP1 extends along the second direction DR2. The first connection pattern CP1 is connected to the first sensing pattern SP1. The first connection pattern CP1 may be disposed between two first sensing patterns SP1 to connect the two first sensing patterns SP1. Alternatively, the first connection pattern CP1 is disposed between the first sensing pattern SP1 and the first adjacent pattern SP1H to connect the first sensing pattern SP1 and the first adjacent pattern SP1H.

[0126] The second sensing electrodes TE2 are arranged along the second direction DR2, and each of the second sensing electrodes TE2 extends along the first direction DR1. The second sensing electrodes TE2 may each include a second sensing pattern SP2, a second adjacent pattern SP2H, and a second connection pattern CP2 (or a second auxiliary pattern).

[0127] The second sensing pattern SP2 is disposed separately from the module area MA. The second sensing pattern SP2 may be spaced apart from the first sensing pattern SP1. The first sensing pattern SP1 and the second sensing pattern SP2 may not contact each other, and thus, may transmit / receive electrical signals independently of each other.

[0128] According to an embodiment of the present invention, the second sensing pattern SP2 may have the same shape as the first sensing pattern SP1. In an embodiment, for example, the second sensing pattern SP2 may have a rhombus shape. However, this is exemplarily illustrated, and the second sensing pattern SP2 may have various shapes and is not limited to any one embodiment of the present invention.

[0129] The second adjacent pattern SP2H is disposed adjacent to the module area MA. The second adjacent pattern SP2H has an area smaller than that of the second sensing pattern SP2 in a plan view. The second adjacent pattern SP2H may have a shape of a rhombus the same as that of the second sensing pattern SP2 in a plan view minus an area overlapping the module area MA.

[0130] The second connection pattern CP2 extends along the first direction DR1. The second connection pattern CP2 is connected to the second sensing pattern SP2. The second connection pattern CP2 may be disposed between two second sensing patterns SP2 to connect the two second sensing patterns SP2. Alternatively, the second connection pattern CP2 is disposed between the second sensing pattern SP2 and the second adjacent pattern SP2H to connect the second sensing pattern SP2 and the second adjacent pattern SP2H.

[0131] The sensing lines TL1, TL2, and TL3 are disposed in the non-display area NDA. The sensing lines TL1, TL2, and TL3 may include a first sensing line TL1, a second sensing line TL2, and a third sensing line TL3.

[0132] The first sensing lines TL1 are connected to the first sensing electrodes TE1, respectively. In the present embodiment, the first sensing lines TL1 are connected to lower ends among opposite ends of the first sensing electrodes TE1, respectively.

[0133] The second sensing lines TL2 are respectively connected to the ends of the second sensing electrodes TE2. In the present embodiment, the second sensing lines TL2 are respectively connected to the left ends among the opposite ends of the second sensing electrodes TE2.

[0134] The third sensing lines TL3 are respectively connected to the upper ends of the opposite ends of the first sensing electrode TE1. According to an embodiment of the present invention, the first sensing electrode TE1 may be connected to each of the first sensing line TL1 and the third sensing line TL3. Accordingly, for the first sensing electrode TE1 which is relatively longer than the second sensing electrode TE2, the sensitivity according to the area may be consistently maintained. Meanwhile, this is illustrated exemplarily, and in the input sensing layer ISL according to an embodiment of the present invention, the third sensing line TL3 may be omitted, and is not limited to any one embodiment of the present invention.

[0135] The sensing pads T1, T2, and T3 are disposed in the non-display area NDA. The sensing pads T1, T2, and T3 may include a first sensing pad T1, a second sensing pad T2, and a third sensing pad T3. The first sensing pads T1 are respectively connected to the first sensing lines TL1, and the third sensing pads T3 are respectively connected to the third sensing lines TL3 to provide an external signal to the first sensing electrode TE1. The second sensing pads T2 are respectively connected to the second sensing lines TL2 to be electrically connected to the second sensing electrode TE2.

[0136] Figure 5 is a cross-sectional view illustrating a display region of a display device according to an embodiment of the present invention. Hereinafter, descriptions overlapping with previously described contents will be omitted.

[0137] refer to Figure 5, the display device DD may include a display module DM and a window WM. The display module DM may include a display panel DP, an input sensing layer ISL and an anti-reflection layer ARL (or a functional layer). The display panel DP may include a base layer BL, a circuit layer DP-CL disposed on the base layer BL, a display element layer DP-ED disposed on the circuit layer DP-CL, and an encapsulation layer TFE disposed on the display element layer DP-ED.

[0138] The base layer BL may be a member that provides a base surface on which the display element layer DP-ED is disposed. The base layer BL may be a glass substrate, a metal substrate, a polymer substrate, etc. However, the embodiments of the present invention are not limited thereto, and in another embodiment, the base layer BL may be an inorganic layer, an organic layer, or a composite material layer.

[0139] The base layer BL may include a single layer or multiple layers. In an embodiment, for example, the base layer BL may include a first synthetic resin layer, a multi-layer or single-layer inorganic layer, and a second synthetic resin layer disposed on the multi-layer or single-layer inorganic layer. The first synthetic resin layer and the second synthetic resin layer may each include a polyimide resin. In addition, the first synthetic resin layer and the second synthetic resin layer may each include at least one of an acrylic resin, a methacrylic resin, a polyisoprene resin, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a siloxane resin, a polyamide resin, and a perylene resin. In this specification, the term "~~-type" resin refers to a functional group including "~~".

[0140] The circuit layer DP-CL may include an insulating layer, a semiconductor pattern, a conductive pattern, a signal line, etc. The circuit layer DP-CL may include a plurality of transistors (not shown). The transistors (not shown) may each include a control electrode, an input electrode, and an output electrode. In an embodiment, for example, the circuit layer DP-CL may include a switching transistor and a driving transistor for driving components (e.g., a first electrode, a light emitting layer, and a second electrode) of the display element layer DP-ED.

[0141] The display element layer DP-ED may include a pixel definition layer PDL in which a pixel opening E_OH is defined, and light emitting elements ED1, ED2, and ED3. The light emitting elements ED1, ED2, and ED3 may be connected to the reference Figure 4A The light emitting elements ED1, ED2 and ED3 may respectively include first electrodes EL1-1, EL1-2 and EL1-3 exposed through the pixel opening E_OH, light emitting layers EML-1, EML-2 and EML-3 disposed on the first electrodes EL1-1, EL1-2 and EL1-3, and second electrodes EL2 disposed on the light emitting layers EML-1, EML-2 and EML-3.

[0142] The display panel DP may be divided into light emitting areas PXA-R, PXA-G, and PXA-B and a non-light emitting area NPXA. Figure 5 The light emitting regions PXA-R, PXA-G, and PXA-B and the non-light emitting region NPXA illustrated in FIG. Figure 4A In the display area DA illustrated in FIG. The light-emitting areas PXA-R, PXA-G, and PXA-B may be spaced apart from each other in a plan view. The light-emitting areas PXA-R, PXA-G, and PXA-B may be areas that emit light generated in the display element layer DP-ED. The light-emitting areas PXA-R, PXA-G, and PXA-B may include a first light-emitting area PXA-R, a second light-emitting area PXA-G, and a third light-emitting area PXA-B that are distinguished from each other. The first light-emitting area PXA-R may correspond to a red light-emitting area, the second light-emitting area PXA-G may correspond to a green light-emitting area, and the third light-emitting area PXA-B may correspond to a blue light-emitting area. The light-emitting areas PXA-R, PXA-G, and PXA-B may be separated from each other by a pixel-defining film PDL. The non-light-emitting area NPXA may be an area disposed between adjacent light-emitting areas PXA-R, PXA-G, and PXA-B and corresponding to the pixel-defining film PDL.

[0143] The pixel defining film PDL may have light absorption characteristics. The pixel defining film PDL may include a black colorant. The black colorant may include a black pigment or a black dye. The black colorant may include carbon black, a metal such as chromium, or an oxide thereof. The pixel defining film PDL may cover a portion of the first electrode EL1-1, EL1-2, or EL1-3. At the same time, in this specification, overlapping of one component with another component is not limited to one component having the same area and the same shape as another component, and also refers to one component having a different area and / or a different shape than another component.

[0144] The first electrode EL1-1, EL1-2 or EL1-3 may be an anode or a cathode. In addition, the first electrode EL1-1, EL1-2 or EL1-3 may be a pixel electrode. The first electrode EL1-1, EL1-2 or EL1-3 may be a transmissive electrode, a semi-transmissive reflective electrode or a reflective electrode. If the first electrode EL1-1, EL1-2 or EL1-3 is a transmissive electrode, the first electrode EL1-1, EL1-2 or EL1-3 may include a transparent metal oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), etc. If the first electrode EL1-1, EL1-2 or EL1-3 is a semi-transmissive reflective electrode or a reflective electrode, the first electrode EL1-1, EL1-2 or EL1-3 may include Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, W or a compound or mixture thereof (e.g., a mixture of Ag and Mg). Alternatively, the first electrode EL1-1, EL1-2 or EL1-3 may have a structure of multiple layers, the multiple layers including a reflective film or a semi-transmissive reflective film formed of or including the above-mentioned materials and a transparent conductive film formed of or including indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), etc. In an embodiment, for example, the first electrode EL1 - 1 , EL1 - 2 , or EL1 - 3 may have a three-layer structure of ITO / Ag / ITO, but the embodiment of the present invention is not limited thereto.

[0145] The display element layer DP-ED may include a plurality of light-emitting layers EML-1, EML-2, and EML-3. The light-emitting layers EML-1, EML-2, and EML-3 may each be provided to be patterned within a pixel opening E_OH defined in a pixel defining film PDL. The light-emitting layers EML-1, EML-2, and EML-3 may overlap with light-emitting regions PXA-R, PXA-G, and PXA-B, respectively. The display element layer DP-ED may include a first light-emitting layer EML-1 corresponding to a first light-emitting region PXA-R, a second light-emitting layer EML-2 corresponding to a second light-emitting region PXA-G, and a third light-emitting layer EML-3 corresponding to a third light-emitting region PXA-B. The light-emitting layers EML-1, EML-2, and EML-3 may emit light in different wavelength regions. In an embodiment, for example, the first light-emitting layer EML-1 may emit red light, the second light-emitting layer EML-2 may emit green light, and the third light-emitting layer EML-3 may emit blue light.

[0146] The light-emitting layers EML-1, EML-2, and EML-3 may each include an organic light-emitting material or an inorganic light-emitting material. In an embodiment, for example, the light-emitting layers EML-1, EML-2, and EML-3 may each include a fluorescent material or a phosphorescent material. The light-emitting layers EML-1, EML-2, and EML-3 may each include an anthracene derivative, a pyrene derivative, a fluoranthene derivative, Derivatives, dihydrobenzanthracene derivatives or triphenylene derivatives. In addition, the light-emitting layers EML-1, EML-2 and EML-3 may include metal organic complexes as light-emitting materials. The light-emitting layers EML-1, EML-2 and EML-3 may also include quantum dots as light-emitting materials.

[0147] The light-emitting layers EML-1, EML-2, and EML-3 may each be provided as a single layer or a plurality of layers. In an embodiment, for example, when the first light-emitting layer EML-1 is provided as a plurality of layers, a charge generation layer (not shown) may be provided between the plurality of first light-emitting layers EML-1. However, this is an example, and embodiments of the present invention are not limited thereto.

[0148] The second electrode EL2 may be a common electrode. The second electrode EL2 may be a cathode or an anode, but the embodiments of the present invention are not limited thereto. For another example, when the first electrode EL1-1, EL1-2 or EL1-3 is an anode, the second electrode EL2 may be a cathode, and when the first electrode EL1-1, EL1-2 or EL1-3 is a cathode, the second electrode EL2 may be an anode.

[0149] The second electrode EL2 may be a transmissive electrode, a semi-transmissive reflective electrode or a reflective electrode. If the second electrode EL2 is a transmissive electrode, the second electrode EL2 may be formed of a transparent metal oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), etc.

[0150] Although not illustrated in the drawings, a hole transport region (not shown) may be provided between the first electrode EL1-1, EL1-2 or EL1-3 and the light emitting layer EML-1, EML-2 or EML-3, and the hole transport region may include at least one of a hole transport layer, a hole injection layer and an electron blocking layer. In addition, an electron transport region (not shown) may be provided between the light emitting layer EML-1, EML-2 or EML-3 and the second electrode EL2, and the electron transport region may include at least one of an electron transport layer, an electron injection layer and a hole blocking layer. The hole transport region and the electron transport region may each be provided as a common layer, or provided to be patterned in the pixel opening E_OH.

[0151] The display element layer DP-ED may further include a capping layer CPL disposed on the second electrode EL2. The capping layer CPL may include a single layer or a plurality of layers. The capping layer CPL may include an organic material or an inorganic material. In an embodiment, the capping layer CPL may be an organic layer or an inorganic layer. In an embodiment, for example, when the capping layer CPL includes an inorganic material, the inorganic material may include an alkali metal compound such as LiF, an alkali metal compound such as MgF 2 In an embodiment, for example, when the capping layer CPL includes an organic material, the organic material may include α-NPD, NPB, TPD, m-MTDATA, Alq 3 , copper phthalocyanine, TPD15 (N4,N4,N4',N4'-tetrakis(biphenyl-4-yl)biphenyl-4,4'-diamine), TCTA (4,4',4"-tris(carbazole-9-yl)triphenylamine), etc., or may include epoxy resin or acrylic acid such as methacrylic acid.

[0152] The capping layer CPL may have a refractive index of about 1.6 or more. In an embodiment, for example, the refractive index of the capping layer CPL for light in a wavelength region of about 550 nm to about 660 nm may be about 1.6 or more. The capping layer CPL may improve light efficiency by the principle of constructive interference. In an embodiment of the present invention, the capping layer CPL may be omitted.

[0153] The encapsulation layer TFE can seal the display element layer DP-ED. The encapsulation layer TFE may include at least one inorganic film (hereinafter, inorganic encapsulation film). In addition, the encapsulation layer TFE may include at least one organic film (hereinafter, organic encapsulation film) and at least one inorganic encapsulation film. The inorganic encapsulation film can protect the display element layer DP-ED from moisture / oxygen, and the organic encapsulation film can protect the display element layer DP-ED from foreign matter such as dust particles. The inorganic encapsulation film may include silicon nitride, silicon oxynitride, silicon oxide, titanium oxide or aluminum oxide, etc., and the material is not particularly limited thereto. The organic encapsulation film may include acrylic compounds, epoxy compounds, etc. The organic encapsulation film may include a photopolymerizable organic material, and the material is not particularly limited thereto.

[0154] The input sensing layer ISL may be disposed on the display panel DP. The input sensing layer ISL may include first to third sensing insulating layers IS-IL1, IS-IL2, and IS-IL3 stacked in sequence. The first sensing insulating layer IS-IL1 may include a single layer or a plurality of layers. The first sensing insulating layer IS-IL1 may include an organic material or an inorganic material. The first sensing insulating layer IS-IL1 may include at least one of silicon nitride, silicon oxynitride, and silicon oxide. The second sensing insulating layer IS-IL2 or the third sensing insulating layer IS-IL3 may each include a conductive layer. The conductive layer included in the second sensing insulating layer IS-IL2 or the third sensing insulating layer IS-IL3 may include a single layer or a plurality of layers. The conductive layer may include at least one metal layer and at least one transparent conductive layer. In an embodiment, for example, the conductive layer may have a three-layer structure of ITO / Ag / ITO. A detailed description of the input sensing layer ISL will be made later.

[0155] The anti-reflection layer ARL may be disposed on the input sensing layer ISL. The anti-reflection layer ARL may include a light shielding pattern CPT, a color filter layer CFL, and an overcoat layer OCL. The light shielding pattern CPT may have a pattern opening P_OH defined therein.

[0156] The material constituting the light shielding pattern CPT is not particularly limited as long as it is a light shielding material. The light shielding pattern CPT may have a black color and include a black colorant. The black colorant may include a black pigment or a black dye. The black colorant may include carbon black, a metal such as chromium, or an oxide thereof.

[0157] The color filter layer CFL may include a plurality of color filters CF1, CF2, and CF3. The plurality of color filters CF1, CF2, and CF3 may include a first color filter CF1, a second color filter CF2, and a third color filter CF3. The first to third color filters CF1, CF2, and CF3 may be arranged corresponding to the light-emitting layers EML-1, EML-2, and EML-3, respectively. The first to third color filters CF1, CF2, and CF3 may each include a pigment or a dye. In an embodiment, for example, the first color filter CF1 may be a red color filter, the second color filter CF2 may be a green color filter, and the third color filter CF3 may be a blue color filter.

[0158] The overcoat layer OCL may cover the light shielding pattern CPT and the first to third color filters CF1, CF2, and CF3. The overcoat layer OCL may include an organic material. The overcoat layer OCL may be a planarization layer.

[0159] The window WM may be disposed on the anti-reflection layer ARL. The window WM may include a window base layer WBL and a protection layer PF. The window WM may further include a window adhesive layer WAL between the window base layer WBL and the protection layer PF, and although not illustrated in the drawings, a light shielding layer BML (see Figure 8 ) may be disposed on the window base layer WBL. Since the window WM is disposed on the overcoat layer OCL, the display module DM may be protected from external impact. The composition of the window WM will be described in detail later.

[0160] Figure 6 is a plan view of a display device according to an embodiment of the present invention. Fig. 7A It is along Figure 6 In particular, Fig. 7A is a cross-sectional view illustrating a module area MA and a display area DA of the display device DD. Figure 7B yes Fig. 7A An enlarged view of region BB' is shown in FIG. Figure 8 It is along Figure 6 In particular, Figure 8 is a cross-sectional view illustrating a non-display area NDA of the display device DD. Fig. 9 yes Figure 6 An enlarged view of the area AA' shown in FIG. Fig. 7A and Figure 8 A more detailed composition of the display panel DP, the input sensing layer ISL, and the window WM is illustrated. A description overlapping with the previously described contents will be omitted.

[0161] refer to Figure 6 and Fig. 7A , the module area MA is surrounded by the display area DA. The display area DA may be formed corresponding to the light emitting element ED, and the module area MA may be formed corresponding to the electronic module EM. The module area MA may include a hole area HA corresponding to the module hole MH and a peripheral area SA adjacent to the hole area HA. ​​The module hole MH may be defined by passing through the display panel DP, the input sensing layer ISL and the anti-reflection layer ARL, and the peripheral area SA adjacent to the hole area HA. ​​In the case where the electronic module EM is a camera module, the hole area HA may be an area overlapping with the lens in the module area MA. The hole area HA may be an area with the highest light transmittance in the module area MA.

[0162] The display panel DP may include a base layer BL, a circuit layer DP-CL, a display element layer DP-ED, and an encapsulation layer TFE, which are sequentially stacked.

[0163] The circuit layer DP-CL may be disposed on the base layer BL. The circuit layer DP-CL may include a plurality of insulating layers 10, 20, 30, and 40, Hall signal lines HSL1 and HSL2, and a thin film transistor TR. The thin film transistor TR may be Figure 4A The first thin film transistor TR1 or the second thin film transistor TR2 is shown in FIG.

[0164] The insulating layers 10, 20, 30 and 40 may include sequentially stacked first to fourth insulating layers 10, 20, 30 and 40. The first to fourth insulating layers 10, 20, 30 and 40 may each include an organic material and / or an inorganic material and may have a single layer or multilayer structure.

[0165] The first insulating layer 10 is disposed on the base layer BL to cover the front surface of the base layer BL. The first insulating layer 10 may include a barrier layer and / or a buffer layer. Accordingly, the first insulating layer 10 may prevent oxygen or moisture introduced through the base layer BL from penetrating the pixel. In the present embodiment, the first insulating layer 10 may be optically transparent. In an embodiment, for example, the first insulating layer 10 may have a visible light transmittance of about 90% or more.

[0166] The thin film transistor TR may be disposed on the first insulating layer 10. The thin film transistor TR and the light emitting element ED constitute a pixel PX (see Figure 4A ). The thin film transistor TR may include a semiconductor pattern SP, a control electrode CE, an input electrode IE, and an output electrode OE.

[0167] The semiconductor pattern SP includes a semiconductor material. In embodiments, for example, the semiconductor pattern SP may include a Group III element, a Group V element, a compound of a Group III element or a Group V element, or an oxide semiconductor.

[0168] The semiconductor pattern SP may be divided into a channel S1 and a source S2 and a drain S3 spaced apart from each other with the channel S1 therebetween. The channel S1, the source S2, and the drain S3 may have an integral shape connected to each other.

[0169] The channel S1 may be a region overlapping the control electrode CE in a plan view. The source S2 and the drain S3 may have relatively higher charge mobility than the channel S1. Charges in the semiconductor pattern SP may move from the source S2 to the drain S3 through the channel S1.

[0170] The control electrode CE is disposed on the second insulating layer 20. The second insulating layer 20 is disposed on the first insulating layer 10 to cover the semiconductor pattern SP. The control electrode CE may be spaced apart from the semiconductor pattern SP in cross section with the second insulating layer 20 therebetween.

[0171] The input electrode IE and the output electrode OE are disposed on the third insulating layer 30. The third insulating layer 30 is disposed on the second insulating layer 20 to cover the control electrode CE.

[0172] The input electrode IE passes through the second insulating layer 20 and the third insulating layer 30 to be connected to the source electrode S2. The output electrode OE is spaced apart from the input electrode IE and connected to the drain electrode S3. The input electrode IE and the output electrode OE may each include a conductive material. The input electrode IE provides charges to the source electrode S2, and the output electrode OE transfers the charges that have moved to the drain electrode S3 to the light emitting element ED.

[0173] The input electrode IE and the output electrode OE may also be omitted in the thin film transistor TR according to the present embodiment. That is, the thin film transistor TR may also be composed only of the control electrode CE and the semiconductor pattern SP. In this case, the source electrode S2 and the drain electrode S3 may function as the input electrode IE and the output electrode OE, and the input electrode IE and the output electrode OE may function as connection electrodes for connecting the thin film transistor TR to other signal lines or other elements. The thin film transistor TR according to the embodiment of the present invention may have various structures and is not limited to any one embodiment of the present invention.

[0174] The display element layer DP-ED may be disposed on the circuit layer DP-CL. The display element layer DP-ED may include a light emitting element ED and a pixel defining layer PDL.

[0175] The light emitting element ED may include a first electrode EL1, a second electrode EL2, and a light emitting layer EML. Figure 5 It corresponds to one of the first light emitting element ED1, the second light emitting element ED2 and the third light emitting element ED3 shown in the figure.

[0176] The first electrode EL1 is disposed on the fourth insulating layer 40. The fourth insulating layer 40 is disposed on the third insulating layer 30 to cover the thin film transistor TR. The first electrode EL1 is connected to the output electrode OE, and is electrically connected to the thin film transistor TR.

[0177] The pixel defining film PDL may be disposed on the fourth insulating layer 40. The pixel defining film PDL may have a pixel opening E_OH defined therein. The pixel opening E_OH may expose at least a portion of the first electrode EL1. The light emitting layer EML may be disposed in the pixel opening E_OH. The light emitting layer EML may include a light emitting material including a fluorescent material or a phosphorescent material. The light emitting material may include an organic light emitting material or an inorganic light emitting material, and the material is not limited to any one embodiment of the present invention.

[0178] The second electrode EL2 may be disposed on the light-emitting layer EML and the pixel defining film PDL. The area of ​​the second electrode EL2 may at least cover the entire surface of the display area DA. Accordingly, a plurality of light-emitting elements may collectively include one second electrode EL2. However, this is illustrated exemplarily, and the second electrode EL2 may be provided for each pixel to correspond to the first electrode EL1, and is not limited to any one embodiment of the present invention.

[0179] Although not illustrated in the drawings, the control layer may be disposed between the light emitting layer EML and the first electrode EL1 or between the light emitting layer EML and the second electrode EL2. The control layer may include an electron transport material, an electron injection material, a hole transport material, or a hole injection material. The capping layer CPL may be disposed on the second electrode EL2. The capping layer CPL may include an organic material or an inorganic material. The capping layer CPL may be disposed on the light emitting element ED and protect the light emitting element ED from external moisture or foreign matter.

[0180] The encapsulation layer TFE may be disposed on the capping layer CPL. The encapsulation layer TFE may be disposed on the capping layer CPL to seal the display element layer DP-ED. The encapsulation layer TFE may include a first encapsulation insulating layer IL1, a second encapsulation insulating layer IL2, and a third encapsulation insulating layer IL3. However, the embodiments of the present invention are not limited thereto, and in another embodiment, the encapsulation layer TFE may further include a plurality of inorganic layers and a plurality of organic layers.

[0181] The first encapsulation insulating layer IL1 may be an inorganic layer. The first encapsulation insulating layer IL1 may prevent external moisture or oxygen from penetrating the light emitting element ED. In an embodiment, for example, the first encapsulation insulating layer IL1 may include silicon nitride, silicon oxide, or a composite thereof. The first encapsulation insulating layer IL1 may be formed by a chemical vapor deposition process.

[0182] The second encapsulation insulating layer IL2 may be an organic layer. The second encapsulation insulating layer IL2 may be disposed on the first encapsulation insulating layer IL1 and may be in contact with the first encapsulation insulating layer IL1. The second encapsulation insulating layer IL2 may provide a flat surface on the first encapsulation insulating layer IL1. A curve formed on the upper surface of the first encapsulation insulating layer IL1 or particles present on the first encapsulation insulating layer IL1, etc. may be covered by the second encapsulation insulating layer IL2, so that the surface finish of the upper surface of the first encapsulation insulating layer IL1 may be prevented from affecting the components to be formed on the second encapsulation insulating layer IL2. In addition, the second encapsulation insulating layer IL2 may relieve stress between layers in contact therewith. The second encapsulation insulating layer IL2 may be formed by spin coating, slit coating, and a solution process such as an inkjet process.

[0183] The third encapsulation insulating layer IL3 may be disposed on the second encapsulation insulating layer IL2 to cover the second encapsulation insulating layer IL2. The third encapsulation insulating layer IL3 may be disposed on a relatively flat surface more stably than being disposed on the first encapsulation insulating layer IL1. The third encapsulation insulating layer IL3 encapsulates moisture or the like released from the second encapsulation insulating layer IL2 to prevent leakage to the outside.

[0184] The third encapsulation insulating layer IL3 may be optically transparent. In an embodiment, for example, the third encapsulation insulating layer IL3 may have a visible light transmittance of about 90% or more. The third encapsulation insulating layer IL3 may have a relatively higher transmittance than the first encapsulation insulating layer IL1. The third encapsulation insulating layer IL3 may be an inorganic layer. The third encapsulation insulating layer IL3 may include silicon oxide (SiO x ) or silicon oxynitride (SiON). The third encapsulation insulating layer IL3 may be formed by a chemical vapor deposition process. The first encapsulation insulating layer IL1, the second encapsulation insulating layer IL2, and the third encapsulation insulating layer IL3 may each include a plurality of layers and are not limited to any one embodiment of the present invention.

[0185] The input sensing layer ISL may be disposed on the display panel DP. As described above, the first sensing pattern SP1, the second sensing pattern SP2, and the second auxiliary pattern CP2 may be some components of the input sensing layer ISL. The first sensing pattern SP1, the second sensing pattern SP2, and the second auxiliary pattern CP2 may constitute the input sensing layer ISL together with the plurality of insulating layers IS-IL1, IS-IL2, and IS-IL3. Each of the first sensing pattern SP1, the second sensing pattern SP2, and the second auxiliary pattern CP2 may be disposed on at least one of the plurality of insulating layers IS-IL1, IS-IL2, and IS-IL3.

[0186] The input sensing layer ISL may include first to third sensing insulating layers IS-IL1, IS-IL2, and IS-IL3 stacked in sequence. The first to third sensing insulating layers IS-IL1, IS-IL2, and IS-IL3 may each be optically transparent. In an embodiment, for example, the first to third sensing insulating layers IS-IL1, IS-IL2, and IS-IL3 may each have a visible light transmittance of approximately 90% or more. The first to third sensing insulating layers IS-IL1, IS-IL2, and IS-IL3 may each have an inorganic film, an organic film, or a stacked structure thereof.

[0187] In the present embodiment, it is illustrated that the first sensing pattern SP1 and the second sensing pattern SP2 are disposed in the same layer, and the second auxiliary pattern CP2 is disposed in a different layer from the second sensing pattern SP2. The first sensing pattern SP1, the second sensing pattern SP2, and the second auxiliary pattern CP2 may each include a transparent conductive oxide. The second auxiliary pattern CP2 may be disposed between the first sensing insulating layer IS-IL1 and the second sensing insulating layer IS-IL2, and the second sensing pattern SP2 may pass through the second sensing insulating layer IS-IL2 to be connected to the second auxiliary pattern CP2. Meanwhile, although not illustrated in the drawings, the first auxiliary pattern CP1 (see Figure 4B ) may be disposed in the same layer as the first sensing patterns SP1 to be directly connected to the first sensing patterns SP1.

[0188] However, this is illustrated exemplarily, and the second auxiliary pattern CP2 may be provided in the same layer as the second sensing pattern SP2, and the first auxiliary pattern CP1 may be provided in a different layer from the first sensing pattern SP1. Alternatively, the first sensing pattern SP1 and the second sensing pattern SP2 may be provided in different layers. The input sensing layer ISL according to an embodiment of the present invention may have various structures and is not limited to any one embodiment of the present invention.

[0189] The Hall signal lines HSL1, HSL2, and HSL3 may be disposed in the module area MA. In particular, the Hall signal lines HSL1, HSL2, and HSL3 may be disposed in the peripheral area SA of the module area MA. The first Hall signal line HSL1 and the second Hall signal line HSL2 may be Figure 4A 2 and 3. The first Hall signal line HSL1 is shown in FIG. 2 and is disposed between the second insulating layer 20 and the third insulating layer 30. The first Hall signal line HSL1 may be a scan line connected to a pixel disposed adjacent to the module area MA. The first Hall signal line HSL1 may provide a consistent scan signal to pixels disposed separately from each other with the module area MA therebetween via the peripheral area SA.

[0190] The second Hall signal line HSL2 is shown to be disposed between the third insulating layer 30 and the fourth insulating layer 40. The second Hall signal line HSL2 may be a data line connected to pixels disposed adjacent to the module area MA. The second Hall signal line HSL2 electrically connects pixels disposed separately from each other with the module area MA therebetween via the peripheral area SA.

[0191] The third Hall signal line HSL3 may be disposed on the first sensing insulating layer IS-IL1 and included in the input sensing layer ISL. It is illustrated that the third Hall signal line HSL3 is disposed between the first sensing insulating layer IS-IL1 and the second sensing insulating layer IS-IL2, but this is illustrated exemplarily, and the third Hall signal line HSL3 may also be disposed between the second sensing insulating layer IS-IL2 and the third sensing insulating layer IS-IL3. The third Hall signal line HSL3 may be a connection line connected to the sensing patterns SP1 and SP2 disposed adjacent to the module area MA.

[0192] The anti-reflection layer ARL may be disposed on the input sensing layer ISL. The anti-reflection layer ARL may include a shading pattern CPT, a color filter CF, and an outer coating layer OCL. According to an embodiment of the present invention, the shading pattern CPT may include a first shading pattern CPT1 (or a display area shading pattern) disposed in the display area DA and a second shading pattern CPT2 (or a module area shading pattern) disposed in the module area MA. The second shading pattern CPT2 may extend from the first shading pattern CPT1 to be formed integrally with the first shading pattern CPT1. The first shading pattern CPT1 may have a pattern opening P_OH defined therein. The color filter CF may overlap with the pattern opening P_OH in a plan view. The color filter CF may overlap with the pattern opening P_OH in a plan view. Figure 5 The first light shielding pattern CPT1 may correspond to one of the first color filter CF1, the second color filter CF2, and the third color filter CF3 illustrated in FIG. Figure 5 It corresponds to the shading pattern CPT shown in the figure.

[0193] The second light-shielding pattern CPT2 may be disposed in the peripheral area SA of the module area MA. The second light-shielding pattern CPT2 may be disposed adjacent to the hole area HA. ​​In an embodiment, for example, the second light-shielding pattern CPT2 may extend to a boundary portion of the hole area HA and the peripheral area SA. However, embodiments of the present invention are not limited thereto, and in another embodiment, the second light-shielding pattern CPT2 may be disposed in the second direction DR2 at a predetermined distance from the hole area HA. ​​According to an embodiment of the present invention, since the second light-shielding pattern CPT2 included in the anti-reflection layer ARL is formed along the periphery of the hole area HA, it is possible to prevent reflected light generated from the lower portion of the electronic module EM from being visible to the outside of the display device DD in the hole area HA. ​​Accordingly, a display device DD with reliability may be provided.

[0194] The window WM may be disposed on the anti-reflection layer ARL. The window WM may include a window base layer WBL and a protection layer PF. The window WM may further include a window adhesive layer WAL between the window base layer WBL and the protection layer PF. In addition, although not shown in the drawings, a light shielding layer BML (see Figure 8) may be disposed on the window base layer WBL. According to an embodiment of the present invention, the light shielding layer BML may not be disposed in the module area MA. Accordingly, the light shielding layer BML may not overlap with the second light shielding pattern CPT2 disposed in the module area MA in a plan view.

[0195] Reference together Fig. 7A and Figure 7B , the display device DD may include a module hole MH defined by passing through a portion of the display device DD. In an embodiment, for example, the module hole MH may be defined by passing through the display panel DP, the input sensing layer ISL, and the anti-reflection layer ARL. However, embodiments of the present invention are not limited thereto, and in another embodiment, the module hole MH may be defined by passing through only a portion of the display panel DP. At least a portion of the electronic module EM may be disposed in the module hole MH.

[0196] A first opening OP1 may be defined in the display panel DP, a second opening OP2 may be defined in the input sensing layer ISL, and a third opening OP3 may be defined in the anti-reflection layer ARL. According to an embodiment of the present invention, the module hole MH may include a first hole H1 defining the first opening OP1, a second hole H2 defining the second opening OP2, and a third hole H3 defining the third opening OP3. The first to third holes H1, H2, and H3 may extend integrally to form the module hole MH together. The first opening OP1, the second opening OP2, and the third opening OP3 may be arranged along the third direction DR3. That is, the width of the module hole MH may be consistent along the third direction DR3.

[0197] The display panel DP may further include a plurality of dams DM1 and DM2 and a planarization pattern OCT, and define a groove portion GV therein. The groove portion GV, the plurality of dams DM1 and DM2, and the planarization pattern OCT may be disposed in the module area MA.

[0198] The groove portion GV may be defined in the peripheral area SA of the module area MA. The groove portion GV may be defined by at least a portion of the base layer BL that is recessed. The groove portion GV is defined at a depth that does not pass through the base layer BL.

[0199] The groove portion GV may be defined relatively adjacent to the display area DA and may be filled with the second encapsulation insulating layer IL2. The groove portion GV may have a closed line shape surrounding the hole area HA or a discontinuous line shape surrounding at least a portion of a boundary of the groove portion GV in a plan view, and the shape is not limited to any one embodiment of the present invention.

[0200] The end of the first insulating layer 10 may have a shape protruding at each of the groove portions GV to have an undercut. The second electrode EL2 is cut off by the groove portion GV. Since the display panel DP according to an embodiment of the present invention may further define the groove portion GV therein, the continuous second electrode EL2 that may become a permeation path of external moisture or oxygen may be cut off, thereby preventing damage to the elements provided in the display area DA.

[0201] Although not illustrated in the drawings, a partial pattern separated from the second electrode EL2 may be disposed inside the groove portion GV and may be covered by at least one of the first encapsulation insulating layer IL1 and the third encapsulation insulating layer IL3. Accordingly, the partial pattern may be prevented from moving to another element during the manufacturing process of the display panel DP and affecting the other element. Therefore, the display panel DP may have improved process reliability. Meanwhile, this is illustrated exemplarily, and in the display panel DP according to an embodiment of the present invention, the groove portion GV may be provided in plurality or omitted, and is not limited to any one embodiment of the present invention.

[0202] The plurality of dams DM1 and DM2 may include a first dam DM1 and a second dam DM2. The first dam DM1 and the second dam DM2 may be disposed in the module area MA. The first dam DM1 may be disposed in the peripheral area SA, and the formation area of ​​the second encapsulation insulating layer IL2 is limited to a predetermined separation area to prevent additional expansion. It is illustrated that the first dam DM1 may include a stacked structure of a plurality of insulating patterns IP1 and IP2, and the second dam DM2 may include a single insulating pattern IP1. However, this is illustrated exemplarily, and the plurality of dams DM1 and DM2 may have a structure of at least three layers, and it is not limited to any one embodiment of the present invention.

[0203] The planarization pattern OCT includes an organic material. The planarization pattern OCT may be disposed in the module area MA. The planarization pattern OCT covers an uneven surface formed in the module area MA by a plurality of dams DM1 and DM2 or a groove portion GV, and provides a flat surface thereon. Accordingly, a flat surface may be stably provided even to an area of ​​the module area MA where the second encapsulation insulating layer IL2 is not disposed. The planarization pattern OCT may be optically transparent. In an embodiment, for example, the planarization pattern OCT may have a visible light transmittance of approximately 90% or more.

[0204] refer to Figure 8, the window WM may be disposed on the display module DM. The window WM may include a window base layer WBL, a light shielding layer BML disposed on the window base layer WBL, and a protective layer PF disposed on the light shielding layer BML. The window WM may further include a window adhesive layer WAL disposed between the window base layer WBL and the protective layer PF to bond the window base layer WBL and the protective layer PF. The light shielding layer BML may be disposed in the same layer as the layer in which the window adhesive layer WAL is disposed. However, embodiments of the present invention are not limited thereto, and in another embodiment, the window adhesive layer WAL may be omitted.

[0205] The window base layer WBL may overlap the display area DA and the non-display area NDA in a plan view. The window base layer WBL may be disposed at the lower side of the window WM to provide a base surface of the window WM. In an embodiment, the window base layer WBL may be a transparent substrate such as a glass substrate, but is not limited thereto, and in another embodiment, the window base layer WBL may include plastic.

[0206] The window adhesive layer WAL may be disposed on the window base layer WBL. The window base layer WBL and the protective layer PF may be bonded to each other through the window adhesive layer WAL. The window adhesive layer WAL may be optically transparent. The window adhesive layer WAL may be an adhesive layer manufactured by coating a liquid adhesive material and then curing, or may be an adhesive sheet manufactured separately. In an embodiment, for example, the window adhesive layer WAL may be a pressure sensitive adhesive (PSA), an optically clear adhesive (OCA), or an optically clear resin (OCR).

[0207] The light shielding layer BML may be disposed on the window base layer WBL. The light shielding layer BML may be disposed on the boundary area of ​​the window WM. In particular, the light shielding layer BML may overlap with the non-display area NDA of the window WM in a plan view. In a plan view, the light shielding layer BML may overlap with the entire non-display area NDA and may not overlap with the display area DA. The light shielding layer BML may be an ink printing layer. In addition, the light shielding layer BML may be a layer defined by including a pigment or a dye. The light shielding layer BML may include a shielding ink layer for shielding light. In an embodiment, for example, the shielding ink layer may include a base material and a shielding ink. The shielding ink may be carbon black particles. However, embodiments of the present invention are not limited thereto, and in another embodiment, in addition to the carbon black particles, the shielding ink may include at least one type of pigment, dye, or a mixture thereof. By means of the light shielding layer BML, internal components of the display device DD that overlap with the non-display area NDA may be prevented from being visible to the outside.

[0208] The protective layer PF may be disposed on the window adhesive layer WAL and the light shielding layer BML. The protective layer PF may be located at the uppermost portion of the window WM and may be a component defining the upper surface of the window WM. That is, the upper surface of the protective layer PF may correspond to the upper surface of the window WM. The protective layer PF may protect the display module DM disposed under the window WM, etc. In addition, the protective layer PF may further include a functional coating. The functional coating may include at least one of an anti-fingerprint layer, an anti-reflection layer, and a hard coating.

[0209] refer to Figures 6 to 9 , in the display device DD according to an embodiment of the present invention, the second light shielding pattern CPT2 of the anti-reflection layer ARL may be disposed in the peripheral area SA of the module area MA, and the light shielding layer BML of the window WM may not be disposed in the module area MA. Accordingly, by the second light shielding pattern CPT2 of the anti-reflection layer ARL, a phenomenon in which the reflected light generated from the lower portion of the electronic module EM in the hole area HA is visible to the outside of the display device DD can be prevented. In addition, even if the window WM moves in the first direction DR1 or the second direction DR2 on the display module DM due to an external impact, since the light shielding layer BML of the window WM is not disposed in the module area MA, a phenomenon in which the module hole MH appears tilted when viewed from the outside of the display device DD can be prevented. As a result, the aesthetics of the display device DD can be improved.

[0210] Fig. 10A is a cross-sectional view illustrating a portion of a display device according to an embodiment of the present invention. Fig. 10B yes Fig. 10A An enlarged view of the area CC' shown in FIG.

[0211] refer to Fig. 10A and Fig. 10B ,and Fig. 7A Compared with the embodiment illustrated in FIG, the display device DDa according to the embodiment of the present invention may further include a cover plate CVP under the display panel DP. In particular, the display module DM may further include a cover plate CVP under the display panel DP. The cover plate CVP may be disposed on the rear surface of the display panel DP, and therefore, the impact resistance of the display device DDa may be improved. The cover plate CVP may be fixed to the rear surface of the display panel DP by an adhesive layer ADL. The adhesive layer ADL may be a pressure sensitive adhesive (PSA), an optically clear adhesive (OCA), or an optically clear resin (OCR).

[0212] The display device DDa may include a module hole MHa defined by passing through a portion of the display device DDa. In an embodiment, for example, the module hole MHa may be defined by passing through the cover plate CVP, the display panel DP, the input sensing layer ISL, and the anti-reflection layer ARL. At least a portion of the electronic module EM may be disposed in the module hole MHa.

[0213] A first opening OP1a may be defined in the display panel DP, a second opening OP2a may be defined in the input sensing layer ISL, a third opening OP3a may be defined in the anti-reflection layer ARL, and a fourth opening OP4 may be defined in the cover plate CVP. According to an embodiment of the present invention, the module hole MHa may include a first hole H1a defining the first opening OP1a, a second hole H2a defining the second opening OP2a, a third hole H3a defining the third opening OP3a, and a fourth hole H4 defining the fourth opening OP4. The first to fourth holes H1a, H2a, H3a, and H4 may extend integrally to form the module hole MHa together.

[0214] According to an embodiment of the present invention, the size of the fourth hole H4 in the plan view may be smaller than the size of each of the first to third holes H1a, H2a, and H3a. In an embodiment, for example, the sizes of the first to third holes H1a, H2a, and H3a are the same, and the size of the fourth hole H4 may be smaller than the size of each of the first to third holes H1a, H2a, and H3a.

[0215] Fig.11A is a cross-sectional view illustrating a portion of a display device according to another embodiment of the present invention. Fig. 11B It is a graphic Fig.11A A plan view of a portion of the display device shown in FIG. Fig.12 is a cross-sectional view illustrating a portion of a display device according to still another embodiment of the present invention.

[0216] refer to Fig.11A ,and Fig. 7A Compared with the embodiment illustrated in , the display device DDb according to the embodiment of the present invention may further include an alignment mark AM. The alignment mark AM may be set in the module area MA. In particular, the alignment mark AM may be set in the peripheral area SA of the module area MA. The alignment mark AM may be set in the same layer as the layer in which any one of the first sensing pattern SP1, the second sensing pattern SP2 and the auxiliary pattern CP2 is set. The first sensing pattern SP1, the second sensing pattern SP2 and the auxiliary pattern CP2 may be collectively referred to as "sensing pattern". The alignment mark AM may have a structure extending from the third Hall signal line HSL3. That is, the alignment mark AM may be formed simultaneously with the third Hall signal line HSL3 and then patterned by using a separate mask. Fig.11AThe alignment mark AM is shown to be disposed between the first sensing insulating layer IS-IL1 and the second sensing insulating layer IS-IL2, but the embodiments of the present invention are not limited thereto. For another example, the alignment mark AM may be disposed between the second sensing insulating layer IS-IL2 and the third sensing insulating layer IS-IL3. In another embodiment, the alignment mark AM may be disposed on the third sensing insulating layer IS-IL3 in the form of relief or engraving.

[0217] The alignment mark AM may include a metal or an inorganic insulating material. The alignment mark AM may be patterned by dry etching or wet etching, or by using a laser. The alignment mark AM may be formed by various processes and is not limited to any one embodiment of the present invention. The alignment mark AM may be optically opaque.

[0218] According to an embodiment of the present invention, the alignment mark AM may overlap the second light shielding pattern CPT2 in a plan view. Accordingly, when viewed from above the display device DDb (ie, from the opposite direction of the third direction DR3), the alignment mark AM may not be visible to the user.

[0219] refer to Fig. 11B The alignment mark AM may have various geometric patterns that are recognizable by the alignment device, and a pattern having line segments that cross each other may be easily recognized. In an embodiment, for example, the alignment mark AM may have a plurality of geometric patterns such as "H", "T", "F", "X", Etc. letter shapes.

[0220] Reference together Fig.11A and Fig. 11B In order to couple the display module DM and the window WM together, an alignment device (not shown) may align the positions of the display module DM and the window WM. The alignment device includes a camera (not shown), and the camera captures the alignment mark AM from the lower part of the display module DM (i.e., in the opposite direction toward the third direction DR3). In this case, in order to identify the alignment mark AM, the alignment mark AM may not overlap with the plurality of dams DM1 and DM2 in a plan view. The alignment device may identify the alignment mark AM included in the image received by the camera, and align the positions of the display module DM and the window WM relative to the identified alignment mark AM. The alignment mark AM may be set not only at Figure 1 In the module area MA of the display device DD shown in the figure, it can also be set in the frame area BZA.

[0221] refer to Fig.12 ,and Fig.11ACompared with the embodiment illustrated in FIG. 2 , the pattern hole POH may be further defined in the second light shielding pattern CPT2a. The pattern hole POH may be defined by patterning the second light shielding pattern CPT2a. The pattern hole POH may overlap with the peripheral area SA in a plan view. The alignment mark AM may overlap with the pattern hole POH in a plan view. The camera of the alignment device captures the alignment mark AM from above the display module DM. The alignment device may identify the alignment mark AM included in the image received by the camera, and align the position of the display module DM and the window WM relative to the identified alignment mark AM.

[0222] Figures 13 to 15 is a perspective view of a display device according to an embodiment of the present invention. Fig.13 The display device DD-1 is shown in an unfolded state, and Fig.14 and Fig.15 The display device DD-1 is shown in the folded state. Figures 13 to 15 The diagram shows a difference between Figure 1 The display device DD illustrated in FIG. 2 is a display device according to an embodiment.

[0223] refer to Figures 13 to 15 The display device DD-1 according to the embodiment of the present invention may include a display surface DS-1 defined by a first direction DR1 and a second direction DR2 crossing the first direction DR1. The display device DD-1 may provide an image IM to a user through the display surface DS-1.

[0224] The display surface DS-1 may include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA may display an image IM, and the non-display area NDA may not display the image IM. The non-display area NDA may surround the display area DA. However, the embodiments of the present invention are not limited thereto, and in another embodiment, the shape of the display area DA and the shape of the non-display area NDA may be changed.

[0225] The display surface DS-1 may include a module area MA. The module area MA may be a partial area of ​​the display area DA. The module area MA may have a higher transmittance than other areas of the display area DA. Hereinafter, other areas of the display area DA except the module area MA may be defined as a regular display area.

[0226] An optical signal (eg, visible light or infrared light) may be moved to the module area MA. The display device DD-1 may capture an external image through visible light passing through the module area MA, or determine accessibility of an external object through infrared light. Fig.13 One module area MA is exemplarily illustrated, but the embodiments of the present invention are not limited thereto, and in another embodiment, the module area MA may be provided in plural.

[0227] The display device DD-1 may include a folding area FA (or a bending area) and a plurality of non-folding areas NFA1 and NFA2 (or non-bending areas). The non-folding areas NFA1 and NFA2 may include a first non-folding area NFA1 (or a first non-bending area) and a second non-folding area NFA2 (or a second non-bending area). In the second direction DR2, the folding area FA may be disposed between the first non-folding area NFA1 and the second non-folding area NFA2.

[0228] like Fig.14 As shown in FIG. 1 , the folding area FA may be folded about a folding axis FX parallel to the first direction DR1. The folding area FA has a predetermined curvature and a predetermined radius of curvature R1. The first non-folding area NFA1 and the second non-folding area NFA2 may face each other, and the display device DD-1 may be folded inwardly so that the display surface DS-1 is not exposed to the outside.

[0229] Although not illustrated in the drawings, the display device DD-1 may also be folded outwardly so that the display surface DS-1 will be exposed to the outside. According to an embodiment of the present invention, the display device DD-1 may be provided to repeat the operation of unfolding and folding inwardly or folding outwardly, but the embodiment of the present invention is not limited thereto. According to another embodiment of the present invention, the display device DD-1 may be provided to select any one of the operations of unfolding, folding inwardly and folding outwardly.

[0230] like Fig.14 As shown in FIG. 1 , the distance between the first non-folding area NFA1 and the second non-folding area NFA2 may be substantially the same as the curvature radius R1, but as shown in FIG. Fig.15 As shown in FIG. 8 , the distance between the first non-folding area NFA1 and the second non-folding area NFA2 may be smaller than the curvature radius R1 .

[0231] According to an embodiment of the present invention, in the display device DD-1, as Fig. 7A As illustrated in FIG. 1 , the second light-shielding pattern CPT2 of the anti-reflection layer ARL may be disposed in the module area MA, and the light-shielding layer BML of the window WM may not be disposed in the module area MA. Accordingly, by the second light-shielding pattern CPT2 of the anti-reflection layer ARL, a phenomenon in which the reflected light generated from the lower portion of the electronic module EM in the hole area HA is visible to the outside of the display device DD-1 can be prevented. In addition, even when the display device DD-1 is folded, the window WM moves in the first direction DR1 or the second direction DR2, since the light-shielding layer BML of the window WM is not disposed in the module area MA, a phenomenon in which the module hole MH appears tilted when viewed from the outside of the display device DD-1 can be prevented. As a result, the aesthetics of the display device DD-1 can be improved.

[0232] In the display device according to an embodiment of the present invention, the second light shielding pattern of the anti-reflection layer can be provided in the module region corresponding to the hole defined in the display module. Accordingly, by the second light shielding pattern of the anti-reflection layer, a phenomenon in which reflected light generated from the lower part of the electronic module is seen from the outside of the display device in the hole region can be prevented.

[0233] In addition, even if the window moves on the display module due to external impact, etc., since the window's shading layer is not set in the module area, it is possible to prevent the phenomenon in which the module hole looks tilted due to the window's shading layer when the user views from the outside.

[0234] Although the embodiments of the present invention have been described, it should be understood that the present invention should not be limited to these embodiments, but rather one of ordinary skill in the art will be able to make various changes and modifications within the spirit and scope of the present invention as claimed.

[0235] Therefore, the technical scope of the present invention should not be limited to the contents described in the specific embodiments in the specification, but should be defined by the claims.

Claims

1. A display device, include: Electronic modules; as well as a display module in which a module area corresponding to the electronic module and a display area adjacent to the module area are defined, and the display module includes a display panel having a plurality of pixels arranged in the display area and an anti-reflection layer arranged on the display panel, Wherein, the anti-reflection layer comprises: a first light-shielding pattern, the first light-shielding pattern being disposed in the display area and comprising a light-shielding material, and having a plurality of openings defined in the first light-shielding pattern corresponding to the plurality of pixels, respectively; a color filter layer having a plurality of color filters respectively overlapping the plurality of openings in a plan view; and The second light shielding pattern is disposed in the module region and comprises the light shielding material.

2. The display device according to claim 1, in, The module area includes a hole area overlapping the electronic module and a peripheral area surrounding the hole area, and The second light shielding pattern overlaps the peripheral area in the plan view.

3. The display device according to claim 2, in, The display module defines a module hole that passes through the display panel and the anti-reflection layer and corresponds to the hole area.

4. The display device according to claim 3, in, The module hole includes a first hole defined by passing through the display panel and a second hole defined by passing through the second light shielding pattern, and The size of the first hole and the size of the second hole in the plan view are the same.

5. The display device according to claim 4, in, The display module further includes a cover plate disposed below the display panel, and The module hole further includes a third hole defined by passing through the cover plate.

6. The display device according to claim 5, in, The size of the first hole in the plan view is greater than a size of the third hole. The display device according to claim 2 , further comprising a window disposed on the display module.

8. The display device according to claim 7, in, The window includes: a window substrate; and The light-shielding layer is arranged on the window substrate layer.

9. The display device according to claim 8, in, The light shielding layer does not overlap with the module area in the plan view.

10. The display device according to claim 9, in, The display module further includes a non-display area adjacent to the display area, and The light shielding layer overlaps with the non-display area.

11. The display device according to claim 8, in, The window further comprises a protective layer disposed on the window substrate layer, and The light shielding layer is arranged between the window base layer and the protection layer.

12. The display device according to claim 2, in, The display module further comprises: The input sensing layer is disposed between the display panel and the anti-reflection layer and includes a plurality of insulating layers and a plurality of sensing patterns disposed on at least one insulating layer among the plurality of insulating layers.

13. The display device according to claim 12, in, The input sensing layer further includes an alignment mark disposed under the second light shielding pattern and having conductivity.

14. The display device according to claim 13, in, The alignment mark overlaps the peripheral area in the plan view.

15. The display device according to claim 14, in, A pattern hole overlapping the peripheral area in the plan view is defined in the second light shielding pattern, and The alignment mark overlaps the pattern holes in the plan view.

16. The display device according to claim 13, in, The alignment mark is disposed in the same layer as a layer in which at least one sensing pattern of the plurality of sensing patterns is disposed.

17. The display device according to claim 16, in, The plurality of insulating layers include a first insulating layer and a second insulating layer, and The alignment mark is disposed between the first insulating layer and the second insulating layer.

18. The display device according to claim 1, in, The first light-shielding pattern and the second light-shielding pattern are integrally connected to each other.

19. The display device according to any one of claims 1 to 18, in, A folding area that is foldable about a virtual folding axis and a non-folding area that is not folded are defined in the display module, and The module area overlaps the non-folding area.

20. A display device, include: Electronic modules; a display module in which a module area corresponding to the electronic module and a display area adjacent to the module area are defined, and the display module includes a display panel having a plurality of pixels arranged in the display area, an input sensing layer arranged on the display panel, and a functional layer arranged on the input sensing layer; as well as a window, arranged on the display module, Wherein, the module area includes: a hole region overlapping the electronic module; and a peripheral region, surrounding the hole region, and The functional layer includes a module area light shielding pattern disposed on the input sensing layer, corresponding to the peripheral area and having a light shielding material.

21. The display device according to claim 20, in, The display module defines a module hole that passes through the display panel and the functional layer and corresponds to the hole area.

22. The display device according to claim 21, in, The module hole comprises: A first hole defined by penetrating the display panel; and a second hole defined by passing through the module area light shielding pattern, and The size of the first hole and the size of the second hole in a plan view are the same.

23. The display device according to claim 22, further comprising a cover plate disposed under the display panel, in, The module hole further includes a third hole defined by passing through the cover plate.

24. The display device according to claim 23, in, The size of the first hole in the plan view is greater than a size of the third hole.

25. The display device according to claim 20, in, The window comprises a window substrate layer and a light shielding layer arranged on the window substrate layer, and The light shielding layer does not overlap with the module area in a plan view.

26. The display device according to claim 20, in, The functional layer further comprises: a display area light shielding pattern, the display area light shielding pattern being disposed in the display area and comprising the light shielding material, and having a plurality of openings defined in the display area light shielding pattern corresponding to the plurality of pixels respectively; and The color filter layer includes a plurality of color filters respectively overlapping the plurality of openings in a plan view.

27. The display device according to any one of claims 20 to 26, in, A folding area that is foldable about a virtual folding axis and a non-folding area that is not folded are defined in the display module, and The module area overlaps the non-folding area.

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