Event-triggered distributed synchronization method and system based on node priority
Through the event-triggered distributed synchronization method based on node priority, using graph theory and nonlinear dynamic equation modeling, Lyapunov is designed to solve the problem of clock loss and transmission pressure in the power network, and achieve high-precision clock Synchronization and communication optimization improve the operating efficiency and reliability of the power system.
Patent Information
- Application Number
- CN202411082978.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-08
- Publication Date
- 2024-12-24
AI Technical Summary
In the power network, as the number of devices increases, clock loss causes the control equipment to be unable to accurately control the power grid. The transmission delay of the public network is fluctuating randomly, which cannot meet the needs of high-precision synchronization. The existing distributed synchronization scheme provides the transmission pressure of the central node. It is very difficult to meet communication needs.
Using event-triggered distributed synchronization method based on node priority, model node time through graph theory modeling and nonlinear dynamic equations, design Lyapunov stable solution control parameters and event triggering mechanism, reduce communication overhead, and realize multiple synchronization to Unified time standards.
It improves the operating efficiency and reliability of the power system, reduces network resource consumption, realizes high-precision clock synchronization of massive equipment, reduces the transmission burden of key nodes, and supports the safe and stable operation of the power system.
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Figure CN119182486A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of distributed clock synchronization of massive power equipment, and in particular to an event-triggered distributed synchronization method and system based on node priority. Background Art
[0002] With the development of modern science and technology, electric energy has become an indispensable and important energy source in human life. As the main carrier of electric energy transmission, power lines are distributed in every corner of the modern system, providing energy transmission for various complex systems, and also transmitting control signals. A large number of power equipment exist in various parts of the power grid, collecting and controlling the entire power grid system. For modern systems, it is like the human body's senses and neural network, playing an extremely important role.
[0003] However, when the number of devices increases, due to the insufficient communication capacity of the power network, clock desynchronization will occur. The continuous accumulation of these phenomena will cause the control equipment to be unable to accurately control the power grid, and the acquisition and control commands cannot be completed on time, resulting in the collapse of the power grid and significant economic losses. The public network transmission delay fluctuates randomly and cannot meet the corresponding accuracy requirements. In order to get rid of the limitations brought by public network transmission, distributed clock synchronization replaces the centralized time synchronization of the master station through information interaction between nodes to achieve higher-precision clock synchronization. However, during the distributed synchronization process, a large amount of information interaction will occur between the key nodes of the link and their neighbors, but the concurrent transmission capacity of the key nodes of the link such as the power-dedicated gateway and CCO is limited, which makes it difficult to meet the corresponding communication requirements. In response to the above problems, a time-triggered distributed synchronization scheme based on node priority is proposed to reduce the transmission burden of link aggregation nodes such as power-dedicated gateways and CCOs while meeting the high-precision synchronization requirements.
[0004] In recent years, domestic and foreign scholars have proposed a variety of distributed clock synchronization schemes. The main research ideas include: 1. Setting a reference node and taking the reference node as the center to gradually achieve synchronization with the surrounding nodes. This type of scheme still puts a large transmission pressure on the central node. 2. In order to reduce the burden on the backbone nodes, the fully distributed collaborative synchronization scheme does not set a reference node. All nodes interact with neighbors in a point-to-point manner to achieve network clock synchronization. In the actual operation of the synchronization scheme, continuous exchange of information between nodes is required, but in fact the capacity of the power network is highly limited. The randomly fluctuating transmission delay caused by the network bandwidth is ubiquitous, which will affect the convergence of the algorithm. Summary of the invention
[0005] The purpose of the present invention is to overcome the shortcomings and deficiencies of the prior art and provide an event-triggered distributed synchronization solution based on node priority. This method can not only synchronize the clocks of a large number of devices, but also quickly adjust the allocation strategy when a new user joins. At the same time, according to the priority of the node, the concurrent transmission volume of the key nodes is reduced. This method overcomes the premise that the existing solution needs to select reference clocks and high concurrent transmission of key nodes, and helps the existing power synchronization system to achieve synchronization more quickly and accurately.
[0006] To solve the above technical problems, the present invention provides the following technical solutions, a node priority-based event-triggered distributed synchronization method, comprising: using graph theory to model the power network, and using nonlinear dynamic equations to model node time; solving control parameters based on Lyapumnov stability; designing the input equation of the node when receiving the neighbor's clock; reducing communication overhead based on node priority and event triggering mechanism; and synchronizing multiple times to generate a unified time standard.
[0007] As a preferred solution of the event-triggered distributed synchronization method based on node priority described in the present invention, wherein: the modeling of the power network using graph theory includes representing the power communication network as a directed graph,
[0008] G=G(Q,U,A)
[0009] Where Q = {1, 2, ..., N} represents N new energy devices to be synchronized, and the directed edge set Weight link matrix A = [a ij ]∈R N×N ;
[0010] If (j,i)∈U, then a ij >0, i and j can synchronize their clocks. Otherwise, a ij = 0, i and j cannot synchronize their clocks, and there should be no self-loop in the power network. ii =0.
[0011] As a preferred solution of the event-triggered distributed synchronization method based on node priority described in the present invention, wherein: the node time modeling using nonlinear dynamic equations includes using the current clock state and offset and the clock input of the neighboring node to represent the clock of the current node, expressed as,
[0012]
[0013] Among them, x i Indicates the current clock state of the user equipment, u i is the input clock information at the current moment, B is the input equation of the system, which indicates the influence of the input on the system state, f(xi ,t) is the clock offset model, and a linear clock offset model is adopted.
[0014] As a preferred solution of the event-triggered distributed synchronization method based on node priority described in the present invention, wherein: the control parameters based on Lyapumnov stability solution include, when the nonlinear mapping f satisfies the Lipschitz condition, that is, f:R N ×R ≥0 →R N is piecewise continuous, there exists a Lipschitz constant L∈R ≥0 So that for any y,z∈R N There exists ||f(y,t)-f(z,t)||≤L||yz||.
[0015] As a preferred solution of the event-triggered distributed synchronization method based on node priority described in the present invention, the input equation of the node when receiving the neighbor clock is expressed as:
[0016]
[0017] in, is the clock x of user device i to neighbor device j j The estimated value of , the values of c and K are determined by solving the linear matrix inequality and the connectivity of the graph through the Lyapunov stability of the system to ensure the convergence of the synchronization algorithm;
[0018] When t→∞, x 1 (t) = x 2 (t)=…=x N (t), and for all user devices i∈Q, when t→∞, the dynamic equation Now enter u i (t)→0, the system reaches the synchronous state.
[0019] As a preferred solution of the event-triggered distributed synchronization method based on node priority described in the present invention, wherein: the communication overhead reduction based on node priority and event triggering mechanism is expressed as:
[0020]
[0021] δ j =||e j ||-h i
[0022] Among them, e j is the clock deviation, x j is the real clock of the source node, Based on The clock synchronization value of the previous moment, δ j It is expressed as the difference between the clock deviation and the threshold. When δ j >0, time synchronization starts;
[0023] The threshold design based on node priority is expressed as:
[0024] h i =h' j / D in
[0025] Among them, h i is the improved threshold, D in is the node in-degree, h' j is the clock deviation threshold.
[0026] As a preferred solution of the event-triggered distributed synchronization method based on node priority described in the present invention, the multiple synchronizations until a unified time standard is generated include: the source node sends a synchronization data packet to the neighbor node, including the current node clock information; after the neighbor node receives the data packet, it estimates the time of the source node and sends it back to the source node, and adjusts its own clock according to the nonlinear dynamic equation; the source node broadcasts its own clock information to the neighbor node in a differentiated manner according to its own priority and the threshold setting of the event trigger function; the neighbor node adjusts its own clock through the nonlinear dynamic equation of the node clock, as well as the estimated value of the source node clock and the value of its own clock.
[0027] Another object of the present invention is to provide an event-triggered distributed synchronization system based on node priority. The network modeling module ensures the accurate reflection of the network topology, the time modeling module improves the accuracy of time tracking, and the stable solution module ensures the stability of the synchronization process. The clock receiving module optimizes the information receiving mechanism, and the communication optimization module significantly reduces the communication burden. The synchronous execution module achieves the consistency of the whole network time. The synergy of the modules not only improves the operating efficiency and reliability of the power system, but also saves network resources, reduces maintenance costs, and provides strong support for the safe and stable operation of the power system.
[0028] As a preferred solution of the event-triggered distributed synchronization system based on node priority described in the present invention, it includes: a network modeling module, a time modeling module, a stable solution module, a clock receiving module, a communication optimization module, and a synchronization execution module;
[0029] Network modeling module, which uses graph theory to model the power network;
[0030] The time modeling module uses nonlinear dynamic equations to model node time;
[0031] Stable solution module, based on Lyapumnov stable solution of control parameters;
[0032] Clock receiving module, design the input equation of the node when receiving the neighbor clock;
[0033] Communication optimization module, which reduces communication overhead based on node priority and event triggering mechanism;
[0034] Synchronous execution module, multiple synchronizations to produce a unified time standard.
[0035] A computer device comprises a memory and a processor, wherein the memory stores a computer program, and is characterized in that when the processor executes the computer program, the steps of any one of the methods described in a distributed synchronization method triggered by an event based on node priority are implemented.
[0036] A computer-readable storage medium having a computer program stored thereon, characterized in that when the computer program is executed by a processor, the steps of any one of the methods in a node priority-based event-triggered distributed synchronization method are implemented.
[0037] Beneficial effects of the present invention: (1) The present invention solves the problem of clock synchronization of massive devices in the context of smart grids. Such problems are quite common in actual scenarios. For example, the peak-shaving and frequency regulation of massive distributed power generation equipment requires a fast response, but the existing power grid cannot achieve a unified time standard, making such services difficult to carry out. Solving such problems has practical value.
[0038] (2) The present invention not only realizes more effective grid clock synchronization, but also can meet the requirements of fast distributed clock synchronization under changing network topology, and can help the power synchronization system to achieve more accurate synchronization. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.
[0040] Figure 1 A flowchart of a synchronization process of an event-triggered distributed synchronization method based on node priority is provided in accordance with an embodiment of the present invention.
[0041] Figure 2 A diagram showing the implementation effect of an event-triggered distributed synchronization method based on node priority provided by an embodiment of the present invention.
[0042] Figure 3A comparison diagram of the implementation effects of an event-triggered distributed synchronization method based on node priority provided by an embodiment of the present invention.
[0043] Figure 4 A schematic diagram of a specific implementation scenario of an event-triggered distributed synchronization method based on node priority provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0044] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the drawings of the specification. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in the art without creative work should fall within the scope of protection of the present invention.
[0045] Example 1
[0046] Reference Figure 1 , which is the first embodiment of the present invention, provides an event-triggered distributed synchronization method based on node priority, including:
[0047] S1. Modeling the grid as a directed graph according to the actual situation, the user equipment sets the nonlinear dynamic equation of the node clock determined by the clock state and its offset and the clock input of the neighboring node;
[0048] S2, when the clock is offset, the clock synchronization begins, and the source node sends a synchronization data packet to the neighboring node, including the current node clock information;
[0049] S3, after receiving the data packet, the neighbor node estimates the time of the source node and sends it back to the source node;
[0050] S4. After the source node receives the response data packet of step 3, it determines whether the offset between its own clock and the neighbor node clock is greater than the threshold according to its own priority and the threshold setting of the event trigger function. If it is greater than the set threshold, the source node broadcasts its own clock information to the neighbor node in a differentiated manner; by canceling the rounds with offsets less than the threshold, the number of synchronizations is reduced, thereby achieving the effect of reducing overhead;
[0051] S5. After receiving the synchronization data packet, the neighbor node takes the clock information of the source node as input, adjusts the clock through the nonlinear dynamic equation of the node clock and its own clock value, and sends a response data packet containing its current clock information to the source node;
[0052] S6. Repeat steps S4-S5 until the system reaches a unified time standard, i.e., clock synchronization.
[0053] Furthermore, since distributed synchronization needs to describe the connection relationship between devices, the power communication network is represented as a directed graph G = G (Q, U, A). Among them, Q = {1, 2, ..., N} represents N new energy devices to be synchronized, and the directed edge set Weight adjacency matrix A = [a ij ]∈R N×N If (j,i)∈U then a ij >0, otherwise a ij = 0, and there should be no self-loop in the power network, so a ii =0.
[0054] Furthermore, in order to describe the clock of each node, for each user device in the distributed network, it is assumed that there is a nonlinear system dynamic equation as shown in the following equation, and the clock of the current node is represented by the current clock state and its offset and the clock input of the neighboring node.
[0055]
[0056] Among them, x i Indicates the current clock state of the user equipment, u i is the input clock information at the current moment, A is the weighted adjacency matrix of the graph, B is the input equation of the system, which indicates the influence of the input on the system state, f(x i ,t) is the clock offset model, and a linear clock offset model is adopted.
[0057] Furthermore, assume that the nonlinear mapping f satisfies the Lipschitz condition, that is, f:R N ×R ≥0 →R N is piecewise continuous, there exists a Lipschitz constant L∈R ≥0 So that for any y,z∈R N There exists ||f(y,t)-f(z,t)||≤L||yz||. The Lipschitz constant provides an upper bound on the rate of change of the mapping f, ensuring that synchronization can be achieved.
[0058] Furthermore, the clock information input by the neighboring nodes in the synchronization process can be expressed as:
[0059]
[0060] in, is the clock x of user device i to neighbor device j j The values of c and K are determined by solving the linear matrix inequality and the connectivity of the graph through the Lyapunov stability of the system to ensure the convergence of the synchronization algorithm.
[0061] The research goal of distributed clock synchronization is to express the input function in a specific form so that the clock deviation of the power equipment tends to 0 asymptotically, that is, when t→∞, x 1 (t) = x 2 (t)=…=x N (t), and for all user devices i∈Q, when t→∞, the dynamic equation Now enter u i (t)→0, the system reaches the synchronous state.
[0062] Furthermore, in order to reduce the communication overhead, an event trigger mechanism is designed, which is determined by the threshold function and the clock deviation. The function is:
[0063]
[0064] δ j =||e j ||-h i
[0065] Among them, e j is the clock deviation, x j is the real clock of the source node, is the estimated value of the neighbor node’s clock, h’ j is the threshold of clock deviation, δ j It is expressed as the difference between the clock deviation and the threshold. When δ j When (t)>0, the event trigger mechanism is triggered;
[0066] Furthermore, in order to further reduce the information transmission pressure of key nodes in the link, a threshold function design based on node priority is proposed, which can be expressed as:
[0067] h i =h' j / D in
[0068] Among them, h i is the improved threshold function, D in is the node indegree.
[0069] Since the concurrent processing capability of nodes in the power network is limited, the threshold function design of the node priority is based on the node, which effectively reduces the concurrent number of nodes with more connected devices in the power network, also known as key nodes, and increases the threshold of the key nodes by the connection degree of the nodes, thereby reducing the number of broadcasts of the key nodes to their neighbors.
[0070] Example 2
[0071] refer to Figure 2-Figure 4, which is the second embodiment of the present invention, provides an event-triggered distributed synchronization method based on node priority. In order to verify the beneficial effects of the present invention, scientific demonstration is carried out through experiments.
[0072] Figure 2 The simulation results are based on Figure 4 The power topology is realized, and its control parameters are set as:
[0073] c=2251.48,K=[-0.04703-0.013360.02849-0.02235]
[0074] The threshold function is selected as:
[0075] h(t)=(0.001+5e -t )*D in
[0076] according to Figure 2 ,The adaptive adjustment scheme can achieve asymptotic synchronization of the states of user devices within 5 seconds. The clock states of users gradually reach consistency and change along a common trajectory. The proposed distributed synchronization scheme has strong robustness.
[0077] according to Figure 3 ,In the comparison of synchronization error, the proposed synchronization algorithm is close to the ,synchronization error of continuous communication, which shows that the ,accuracy of distributed synchronization is retained while reducing the communication ,overhead.
[0078] according to Figure 4 , is a simulation topology diagram of the second embodiment of the present invention, the arrow direction is the direction of timing, and the numbered circle represents a device node.
[0079] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.
[0080] Example 3
[0081] The third embodiment of the present invention is different from the first two embodiments in that:
[0082] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.
[0083] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in conjunction with such instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in conjunction with such instruction execution systems, devices or apparatuses.
[0084] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering or, if necessary, processing in another suitable manner, and then stored in a computer memory.
[0085] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.
[0086] Example 4
[0087] A fourth embodiment of the present invention provides an event-triggered distributed synchronization system based on node priority, characterized in that it includes a network modeling module, a time modeling module, a stable solution module, a clock receiving module, a communication optimization module, and a synchronization execution module;
[0088] Network modeling module, which uses graph theory to model the power network;
[0089] The time modeling module uses nonlinear dynamic equations to model node time;
[0090] Stable solution module, based on Lyapumnov stable solution of control parameters;
[0091] Clock receiving module, design the input equation of the node when receiving the neighbor clock;
[0092] Communication optimization module, which reduces communication overhead based on node priority and event triggering mechanism;
[0093] Synchronous execution module, multiple synchronizations to produce a unified time standard.
[0094] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.
Claims
1. An event-triggered distributed synchronization method based on node priority, characterized in that: include, Model the power network using graph theory and model the node time using nonlinear dynamic equations; Design the input equation for the node when receiving the neighbor's clock; Solve the control parameters based on Lyapumnov stability; Reduce communication overhead based on node priority and event triggering mechanism; Synchronize multiple times to produce a unified time standard.
2. The event-triggered distributed synchronization method based on node priority as claimed in claim 1, characterized in that: The method of modeling the power network using graph theory includes representing the power communication network as a directed graph. G=G(Q,U,A) Where Q = {1, 2, ..., N} represents N new energy devices to be synchronized, and the directed edge set Weight link matrix A = [a ij ]∈R N×N ; If (j,i)∈U, then a ij >0 otherwise, a ij = 0, and there should be no self-loop in the power network, a ii =0; Among them, a ii Represented as a ring link from node i to itself, a ij It is represented as a ring link from node i to node j, i is represented as node i, and j is represented as node j.
3. The event-triggered distributed synchronization method based on node priority as claimed in claim 2, characterized in that: The node time modeling using nonlinear dynamic equations includes using the current clock state and offset and the clock input of the neighboring node to represent the clock of the current node, which is expressed as: Among them, x i Indicates the current clock state of the user equipment, u i is the input clock information at the current moment, B is the input equation of the system, which indicates the influence of the input on the system state, f(x i ,t) is the clock offset model, using a linear clock offset model, It represents the clock value after clock synchronization, and A represents the control parameter.
4. The event-triggered distributed synchronization method based on node priority as claimed in claim 3, characterized in that: The control parameters based on Lyapumnov stability solution include: when f:R N ×R ≥0 →R N is piecewise continuous, there exists a Lipschitz constant L∈R ≥0 So that for any y,z∈R N There exists ||f(y,t)-f(z,t)||≤L||yz||; Among them, R represents the real number field, y represents the clock state of node i, z represents the clock state of another node j, f(y,t) represents the mapping with y and t as variables, f(z,t) represents the mapping with z and t as variables, and t represents the standard time.
5. The event-triggered distributed synchronization method based on node priority as claimed in claim 4, characterized in that: The input equation of the node when the design receives the neighbor clock is expressed as, in, is the clock x of user device i to neighbor device j j The estimated value of , c and K are the control parameters of clock synchronization, It is represented as the set of all neighbor nodes that provide time to node i, u i Represents the input clock information of the current moment; When t→∞, x1(t)=x2(t)=…=x N (t), and for all user devices i∈Q, when t→∞, the dynamic equation Enter u i (t)→0, the system reaches the synchronous state.
6. The event-triggered distributed synchronization method based on node priority as claimed in claim 5, characterized in that: The node priority and event triggering mechanism based on reducing communication overhead is expressed as: d j =||e j ||-h i Among them, e j is the clock deviation, x j is the real clock of the source node, Based on The clock synchronization value of the previous moment, δ j It is expressed as the difference between the clock deviation and the threshold. When δ j >0, time synchronization starts; The threshold design based on node priority is expressed as: h i =h' j / D in Among them, h i is the improved threshold, D in is the node in-degree, h' j is the clock deviation threshold.
7. The event-triggered distributed synchronization method based on node priority as claimed in claim 6, characterized in that: The multiple synchronizations until a unified time standard is generated include: the source node sends a synchronization data packet to the neighbor node, including current node clock information; After receiving the data packet, the neighbor node estimates the time of the source node and sends it back to the source node, and adjusts its own clock according to the nonlinear dynamic equation; the source node broadcasts its own clock information to the neighbor node in a differentiated manner according to its own priority and the threshold setting of the event trigger function; the neighbor node adjusts its own clock through the nonlinear dynamic equation of the node clock, the estimated value of the source node clock and the value of its own clock.
8. A system for a distributed synchronization method based on event triggering based on node priority according to any one of claims 1 to 7, characterized in that: Including network modeling module, time modeling module, stable solution module, clock receiving module, communication optimization module, synchronous execution module; Network modeling module, which uses graph theory to model the power network; The time modeling module uses nonlinear dynamic equations to model node time; Stable solution module, based on Lyapumnov stable solution of control parameters; Clock receiving module, design the input equation of the node when receiving the neighbor clock; Communication optimization module, which reduces communication overhead based on node priority and event triggering mechanism; Synchronous execution module, multiple synchronizations to produce a unified time standard.
9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.
