ADS-B (Automatic Dependent Surveillance-Broadcast) detection efficiency improvement method based on digital multi-beam and time slot recombination

Abstract

The invention provides an ADS-B (Automatic Dependent Surveillance-Broadcast) detection efficiency improvement method based on digital multi-beam and time slot recombination. The method comprises the following steps: receiving an ADS-B signal by using digital multi-beam; performing time slot recombination on the received ADS-B signal; decoding the signal after the time slot recombination to obtain a decoded message; and de-duplication processing is carried out on the decoded message. According to the ADS-B signal receiving method and device, the ADS-B signals are received through the directional wave beams, due to the fact that the receiving gains of the directional wave beams on the ADS-B signals in different directions are different, obvious superposition cannot be formed between the ADS-B signals reaching the antenna array plane in the different receiving directions, the decoding accuracy can be improved, and the ADS-B signal receiving range can be increased; the ADS-B signals received by a plurality of beams are further processed by adopting a received signal time slot recombination method, using a single thread and adopting an assembly line serial mode, and the ADS-B detection performance is improved under the condition that processing resources are not increased.

Description

Technical Field

[0001] The present invention relates to the technical field of ADS-B (Automatic Dependent Surveillance-Broadcast), and in particular to a method for improving ADS-B detection efficiency based on digital multi-beam and time slot reorganization. Background Art

[0002] As a collaborative surveillance technology, ADS-B has the advantages of fast data update speed, high accuracy and low application cost, and is being continuously promoted and applied in the field of air traffic control. The ADS-B airborne transmitter uses the location data provided by GNSS (Global Navigation Satellite System) as the main information source, and periodically broadcasts its own location, speed, status and other information through the 1090ES (1090MHz extended message) data link. The ground station and the airborne ADS-BIN equipment of other aircraft receive these ADS-B OUT broadcast messages, thereby realizing air-to-air and air-to-ground integrated surveillance between aircraft, between aircraft and ground stations. Since ADS-B signals are omnidirectional in space, when there are relatively dense aircraft in the airspace, in order to avoid the interference of decoding caused by the superposition of ADS-B signals in different directions during reception, it is necessary to design a directional reception method to improve the ADS-B detection performance without increasing processing resources.

[0003] The existing ADS-B signal reception and processing method uses a single omnidirectional beam to receive ADS-B signals, and then opens a single thread in the FPGA (Field Programmable Gate Array) to complete the decoding of the ADS-B signals. Since the receiving gain of the omnidirectional beam for ADS-B signals in all directions is the same, in this case, the ADS-B signals received from different directions reaching the antenna array will form an obvious superposition, causing interference in decoding. In addition, the low receiving gain of the omnidirectional beam affects the ADS-B signal reception range and reduces the ADS-B detection performance. At the same time, the processing resource utilization rate of the single thread is low. Summary of the invention

[0004] The present invention aims to provide a method for improving ADS-B detection efficiency based on digital multi-beam and time slot reorganization to solve the problems existing in the above-mentioned existing ADS-B signal receiving and processing methods.

[0005] The present invention provides a method for improving ADS-B detection efficiency based on digital multi-beam and time slot reorganization, comprising the following steps:

[0006] S100, using digital multi-beam for ADS-B signal reception;

[0007] S200, reorganizing the time slots of the received ADS-B signal;

[0008] S300, decoding the signal after the time slot reorganization to obtain a decoded message;

[0009] S400, performing deduplication processing on the decoded message.

[0010] Furthermore, step S100 includes:

[0011] According to the receiving range of the antenna array, N digital beams with different directions are evenly formed at equal intervals;

[0012] The N digital beams with different directions are used to receive ADS-B signals.

[0013] Further, step S200 includes: after demodulating and AD sampling the received ADS-B signal, obtaining N digital beam signals with different directions through beam forming, and then reorganizing the N digital beam signals with different directions by time slots.

[0014] Further, in step S200, the time slot reorganization includes:

[0015] N digital beam signals with different directions are split by time slots to obtain 2N groups of signals;

[0016] 2N asynchronous FIFOs are opened to cache 2N groups of signals respectively. The write clock domain of FIFO is the sampling clock domain, and the read clock domain of FIFO is the decoding processing clock domain.

[0017] The 2N groups of signals are reorganized and arranged at the output port of the FIFO;.

[0018] Furthermore, when splitting the time slot, the time slot width is determined to be greater than twice the length of the standard ADS-B pulse sequence; two adjacent time slots are partially overlapped, and the leading edge interval is greater than the length of the standard ADS-B pulse sequence.

[0019] Furthermore, after reorganization and arrangement, the processing time occupied by each time slot signal includes the width of a single time slot signal and the reserved time for checking and error correction, and the processing time reserved for the 2N groups of signals is consistent with the time of the time slot width after the time slot is split.

[0020] Furthermore, in step S300, the signal after time slot reorganization is subjected to ADS-B sequence synchronization header recognition, ADS-B sequence reference amplitude calculation, ADS-B sequence symbol bit data and confidence extraction, ADS-B data CRC check and error correction to generate a decoded message.

[0021] Furthermore, the signal after the time slot reorganization is processed in a pipeline serial manner.

[0022] Furthermore, in step S400, M decoded message buffer spaces are opened up for cyclically storing newly generated decoded messages, including:

[0023] After each new decoded message is generated, it is compared with the decoded messages in the M decoded message cache spaces in turn. If the codes are the same, the decoded message is determined to be a duplicate message and is discarded. Otherwise, it is determined to be a valid message and needs to be output and reported, and the decoded message is stored in the M decoded message cache spaces. The cache address of the decoded message starts from 1. Each time a new decoded message is stored, its cache address is accumulated by 1. After accumulating to M, it returns to 1 to start the cycle.

[0024] Furthermore, the cache time of a single decoded message cache space lasts for a period of time T, and then the content thereof is cleared, wherein the period of time T covers the total time length of two adjacent time slots.

[0025] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0026] The present invention provides an ADS-B detection efficiency improvement method based on digital multi-beam and time slot reorganization. A directional beam is used to receive ADS-B signals. Since the receiving gains of the directional beam for ADS-B signals in different directions are different, no obvious superposition is formed between the ADS-B signals received from different directions reaching the antenna array surface, which is beneficial to improving the decoding accuracy. Digital multi-beam reception is used to synchronously improve the receiving gains of signals in all directions, which is beneficial to increasing the receiving range of ADS-B signals. A method for receiving signal time slot reorganization is used in FPGA, a single thread is used, and a pipeline serial method is used to process ADS-B signals received by multiple beams, so as to improve the ADS-B detection performance without increasing processing resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A flowchart of a method for improving ADS-B detection efficiency based on digital multi-beam and time slot reorganization provided in an embodiment of the present invention.

[0028] Figure 2 It is a schematic diagram of azimuth coverage of digital multi-beam and omni-directional beam in an embodiment of the present invention.

[0029] Figure 3 Schematic diagram of splitting a single beam time slot in an embodiment of the present invention.

[0030] Figure 4 Schematic diagram of time slot splitting in an embodiment of the present invention.

[0031] Figure 5 Schematic diagram of time slot reorganization in an embodiment of the present invention.

[0032] Figure 6 This is a flow chart of deduplication processing in an embodiment of the present invention. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0034] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0035] The existing ADS-B signal reception and processing method uses a single omnidirectional beam to receive ADS-B signals, and then opens a single thread in the FPGA to complete the decoding of the ADS-B signals. Since the receiving gain of the omnidirectional beam for ADS-B signals in all directions is the same, in this case, the ADS-B signals received from different directions reaching the antenna array will form an obvious superposition, causing interference to the decoding. In addition, the low receiving gain of the omnidirectional beam affects the ADS-B signal reception range and reduces the ADS-B detection performance. At the same time, the processing resource utilization rate of the single thread is low.

[0036] The present invention provides an ADS-B detection efficiency improvement method based on digital multi-beam and time slot reorganization. A directional beam is used to receive ADS-B signals. Since the receiving gains of the directional beam for ADS-B signals in different directions are different, no obvious superposition is formed between the ADS-B signals received from different directions reaching the antenna array surface, which is beneficial to improving the decoding accuracy. Digital multi-beam reception is used to synchronously improve the receiving gains of signals in all directions, which is beneficial to increasing the receiving range of ADS-B signals. A method for receiving signal time slot reorganization is used in FPGA, a single thread is used, and a pipeline serial method is used to process ADS-B signals received by multiple beams, so as to improve the ADS-B detection performance without increasing processing resources.

[0037] like Figure 1As shown, this embodiment proposes a method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization, which mainly includes the following four main steps:

[0038] S100, using digital multi-beam for ADS-B signal reception;

[0039] S200, reorganizing the time slots of the received ADS-B signal;

[0040] S300, decoding the signal after the time slot reorganization to obtain a decoded message;

[0041] S400, performing deduplication processing on the decoded message.

[0042] A specific implementation is as follows:

[0043] S100, using digital multi-beam for ADS-B signal reception:

[0044] Figure 2 The figure is a schematic diagram of the azimuth coverage of digital multi-beam and omni-directional beam in an embodiment of the present invention. Assuming that the receiving range of the antenna array is 120°, four digital beams with different directions are evenly formed at 30° intervals, and the 3dB width of each beam is set to 30°, so the four beams can form effective coverage within the azimuth range of 120°. The above four beams are:

[0045] Beam 1: -45° pointing beam, mainly responsible for receiving ADS-B signals in the azimuth of -60° to -30°;

[0046] Beam 2: -15° pointing beam, mainly responsible for receiving ADS-B signals in the -30° to 0° azimuth;

[0047] Beam 3: 15° pointing beam, mainly responsible for receiving ADS-B signals in the azimuth of 0° to 30°;

[0048] Beam 4: 45° pointing beam, mainly responsible for receiving ADS-B signals in the azimuth of 30° to 60°.

[0049] like Figure 2 As shown, since each of the above beams has different receiving gains for ADS-B signals in different directions, when each receives the ADS-B signal within the angle range it is responsible for, it will not be significantly superimposed by the ADS-B signal outside the angle range it is responsible for, which is beneficial to improving the decoding accuracy. Compared with the omnidirectional beam, the use of the above four beams for reception can simultaneously improve the signal reception gain in all directions within the range of 120°, which is beneficial to increasing the ADS-B signal reception range.

[0050] S200, reorganize the time slots of the received ADS-B signal:

[0051] The ADS-B signals received by the four beams are demodulated by the receiver and then AD sampled. In this embodiment, the sampling rate is set to 20 MHz, and then the sampled signals are sent to the FPGA for time slot reorganization.

[0052] Figure 3 Schematic diagram of time slot splitting of a single beam in an embodiment of the present invention. Since the length of a standard ADS-B pulse sequence is 120us, when splitting the signal time slot, it is assumed that an ADS-B pulse sequence appears in Figure 3 In order to ensure that at least one of the split time slots can contain a complete ADS-B pulse sequence, the time slot width is determined to be 250us (greater than twice the length of the standard ADS-B pulse sequence) when splitting the received sampling signal of each beam. The two adjacent time slots are partially overlapped, and the leading edge interval is 125us (greater than the length of the standard ADS-B pulse sequence). Figure 3 As shown, assuming that the ADS-B pulse sequence appears at possible position 1, the ADS-B pulse sequence will be completely contained in the time slot; assuming that the ADS-B pulse sequence appears at possible position 2, the ADS-B pulse sequence will be completely contained in the time slot xB-1.

[0053] Figure 4 Schematic diagram of time slot splitting in an embodiment of the present invention. After demodulating and sampling the ADS-B receiving signals of a total of 4 beams, 8 groups of signals are obtained by time slot splitting, which are represented by 1-A, 1-B, 2-A, 2-B, 3-A, 3-B, 4-A, and 4-B respectively.

[0054] Eight more asynchronous FIFOs are opened to cache the above eight groups of signals respectively. The write clock domain of the FIFO is a 20MHz sampling clock domain, and the read clock domain of the FIFO is a 200MHz decoding processing clock domain. Figure 5 This is a schematic diagram of time slot reorganization in an embodiment of the present invention. Eight groups of signals are reorganized and arranged at the output port of the FIFO. The processing time occupied by each time slot signal is 30us (the width of a single time slot signal is 25us, and 5us is reserved as time for verification and error correction). The processing time of the eight groups of signals is reserved for 250us, which is consistent with the time of the time slot width after the aforementioned splitting. This can ensure the continuity of ADS-B signal processing in the time domain.

[0055] S300, decoding the signal after time slot reorganization to obtain a decoded message:

[0056] The decoding process of ADS-B signal is carried out in the 200MHz clock domain. The signal after the time slot reorganization and arrangement in the previous step is processed in a pipeline serial manner. After the steps of ADS-B sequence synchronization header recognition, ADS-B sequence reference amplitude calculation, ADS-B sequence code bit data and confidence extraction, ADS-B data CRC check and error correction, etc., a decoded message is generated (the message content includes: 112-bit data, sequence reference amplitude, time slot number, etc.) and sent to the next step for ADS-B message deduplication processing.

[0057] Since the 8 groups of signals are processed in a pipeline serial manner, the logic resources used by the present invention are consistent with the logic resources used for ADS-B signal decoding processing in the single-beam single-thread case. In comparison, the efficiency of the use of logic resources is greatly improved.

[0058] S400: De-duplication processing is performed on the decoded message:

[0059] like Figure 3 As shown, when the ADS-B pulse sequence appears at possible position 3, it is possible that both time slots xA-1 and xB-1 completely contain the same ADS-B pulse sequence, and when performing the ADS-B signal decoding in step 3, repeated decoding messages will be obtained.

[0060] When four beams are used to receive ADS-B signals at the same time, different beams may receive the same ADS-B pulse sequence, and duplicate decoding messages may be obtained when decoding ADS-B signals.

[0061] Based on the above two situations, it is necessary to perform ADS-B message deduplication processing on the decoded message obtained by decoding the ADS-B signal. The specific processing flow is as follows:

[0062] 32 decoding message cache spaces are opened to cyclically store newly generated ADS-B decoding messages. For a single decoding message cache space, the cache time lasts for 500us and then its content is cleared (covering the total time length of two adjacent time slots);

[0063] Figure 6 The figure is a deduplication process flow chart in the embodiment of the present invention. After each new decoded message is generated, it is compared with the decoded messages in the 32 decoded message cache spaces in turn. If there is a situation where the 112-bit code is the same, the decoded message is determined to be a duplicate message and is discarded. Otherwise, it is determined to be a valid message, and the decoded message needs to be output and reported, and the decoded message is stored in the 32 decoded message cache spaces. The cache address of the decoded message starts from 1. Each time a new decoded message is stored, its cache address is accumulated by 1. After accumulating to 32, it returns to 1 to start the cycle.

[0064] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization, characterized in that: The steps include: S100, using digital multi-beam for ADS-B signal reception; S200, reorganizing the time slots of the received ADS-B signal; S300, decoding the signal after the time slot reorganization to obtain a decoded message; S400, performing deduplication processing on the decoded message.

2. The method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization according to claim 1 is characterized in that: Step S100 includes: According to the receiving range of the antenna array, N digital beams with different directions are evenly formed at equal intervals; The N digital beams with different directions are used to receive ADS-B signals.

3. The method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization according to claim 1 is characterized in that: Step S200 includes: After the received ADS-B signal is demodulated and AD sampled, N digital beam signals with different directions are obtained through beamforming, and then the N digital beam signals with different directions are reorganized in time slots.

4. The method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization according to claim 1 is characterized in that: In step S200, the time slot reorganization includes: N digital beam signals with different directions are split by time slots to obtain 2N groups of signals; 2N asynchronous FIFOs are opened to cache 2N groups of signals respectively. The write clock domain of FIFO is the sampling clock domain, and the read clock domain of FIFO is the decoding processing clock domain. The 2N signals are reorganized and arranged at the output port of the FIFO.

5. The method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization according to claim 4 is characterized in that: When splitting time slots, the time slot width is determined to be greater than twice the length of the standard ADS-B pulse sequence; two adjacent time slots are partially overlapped, and the leading edge interval is greater than the length of the standard ADS-B pulse sequence.

6. The method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization according to claim 4 is characterized in that: After reorganization and arrangement, the processing time occupied by each time slot signal includes the width of a single time slot signal and the reserved time for checking and error correction. The processing time reserved for the 2N groups of signals is consistent with the time of the time slot width after the time slot is split.

7. The method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization according to claim 1, characterized in that: In step S300, the signal after time slot reorganization is subjected to ADS-B sequence synchronization header recognition, ADS-B sequence reference amplitude calculation, ADS-B sequence symbol bit data and confidence extraction, ADS-B data CRC check and error correction to generate a decoded message.

8. The method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization according to claim 1 or 7, characterized in that: The signal after time slot reorganization is processed in a pipeline serial manner.

9. The method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization according to claim 1, characterized in that: In step S400, M decoded message buffer spaces are opened for cyclically storing newly generated decoded messages, including: After each new decoded message is generated, it is compared with the decoded messages in the M decoded message cache spaces in turn. If the codes are the same, the decoded message is determined to be a duplicate message and is discarded. Otherwise, it is determined to be a valid message and needs to be output and reported, and the decoded message is stored in the M decoded message cache spaces. The cache address of the decoded message starts from 1. Each time a new decoded message is stored, its cache address is accumulated by 1. After accumulating to M, it returns to 1 to start the cycle.

10. The method for improving ADS-B detection performance based on digital multi-beam and time slot reorganization according to claim 9, characterized in that: The cache time of a single decoded message cache space lasts for a period of time T, and then the content thereof is cleared to zero. The period of time T covers the total time length of two adjacent time slots.

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