A quantum circuit synthesis method and related apparatus

Abstract

The application discloses a quantum circuit synthesis method and related device, and belongs to the technical field of quantum computing. The method comprises the following steps: determining a target quantum circuit template from a quantum circuit template library based on a target unitary matrix; inputting the target unitary matrix into a trained first prediction model to predict an initial value of an adjustable parameter of the target quantum circuit template, wherein the first prediction model is trained with the goal of maximizing the fidelity between an output unitary matrix and an input unitary matrix, and the output unitary matrix is obtained by reconstructing the input unitary matrix; optimizing the adjustable parameter in the target quantum circuit template based on the predicted initial value; and when the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix satisfies a convergence condition, taking the target quantum circuit template corresponding to the latest adjustable parameter as a synthesized quantum circuit. The application can improve the efficiency of quantum circuit synthesis.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of quantum computing, in particular to a quantum circuit synthesis method and related device. BACKGROUND

[0002] Quantum circuit compilation is a key step in current quantum computing workflow, which aims to adapt a given quantum circuit to the instruction set supported by a specific quantum device. Modern quantum circuit compilers include multiple processing steps dedicated to different tasks to adapt to hardware with as few gate operations and circuit depth as possible, thereby reducing the impact of quantum hardware noise on computation.

[0003] Quantum circuit synthesis is a basic task in most compilers. Its goal is to find a sequence of quantum logic gates in the hardware instruction set that can achieve a target unitary matrix. In the process of finding quantum logic gates, an approximate method based on a given circuit template is usually used. Specifically, a circuit template composed of fixed quantum logic gates is adopted, in which the quantum logic gates carrying adjustable parameters are optimized based on randomly generated parameter values to maximize the fidelity between the generated circuit and the target unitary matrix. As the number of quantum bits increases, the process of optimizing the adjustable parameters of each quantum logic gate is time-consuming and slow to converge, which in turn leads to low efficiency of quantum circuit compilation. SUMMARY

[0004] The purpose of the present application is to provide a quantum circuit synthesis method and related device, aiming to improve the compilation efficiency of quantum circuits.

[0005] One embodiment of the present application provides a quantum circuit synthesis method, which comprises:

[0006] determining a target quantum circuit template from a quantum circuit template library based on a target unitary matrix, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter;

[0007] inputting the target unitary matrix into a trained first prediction model to predict the initial value of the adjustable parameter of the target quantum circuit template, wherein the first prediction model is trained to maximize the fidelity between the output unitary matrix and the input unitary matrix, and the output unitary matrix is reconstructed from the input unitary matrix;

[0008] optimizing the adjustable parameter in the target quantum circuit template based on the predicted initial value;

[0009] When the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix satisfies the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameter is used as the synthesized quantum circuit.

[0010] Optionally, determining the target quantum circuit template from the quantum circuit template library based on the target unitary matrix includes:

[0011] The target unitary matrix is ​​input into the trained second prediction model to obtain a set of selectable quantum circuit templates and the probability corresponding to each quantum circuit template. The second prediction model is obtained by performing probability prediction on the input unitary matrix with the goal of minimizing the cross-entropy loss function between the predicted probability and the pre-labeled actual probability.

[0012] Based on the obtained probabilities, the quantum circuit template corresponding to the highest probability is selected as the target quantum circuit template.

[0013] Optionally, the training process of the second prediction model includes:

[0014] Fill in the adjustable parameter values ​​of each quantum circuit template in the quantum circuit template library to obtain the corresponding unitary matrix, and construct the training dataset.

[0015] Each training data point in the training dataset is input into a pre-built second prediction model to obtain the prediction probability corresponding to each training data point.

[0016] The model parameters of the second prediction model are adjusted with the goal of minimizing the cross-entropy loss function between the predicted probability and the actual probability labeled in the training data.

[0017] Optionally, the second prediction model is a machine learning model.

[0018] Optionally, the second prediction model is a multilayer fully connected neural network.

[0019] Optionally, when the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix fails to converge, the method further includes:

[0020] From the quantum circuit template library, determine the quantum circuit template with the second highest probability after the current target quantum circuit template as the new target quantum circuit template, and return to the step of predicting the initial values ​​of the adjustable parameters of the target quantum circuit template through the target unitary matrix.

[0021] Optionally, the first prediction model is a machine learning model with the same input and learning objective.

[0022] Optionally, the model parameters of the first prediction model are complex numbers.

[0023] Optionally, the first prediction model is an autoencoder.

[0024] Another embodiment of this application provides a quantum circuit synthesis device, the device comprising:

[0025] The first determining module is used to determine a target quantum circuit template from a quantum circuit template library based on a target unitary matrix, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter.

[0026] The prediction module is used to input the target unitary matrix into a trained first prediction model to predict the initial values ​​of the adjustable parameters of the target quantum circuit template. The first prediction model is trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix. The output unitary matrix is ​​reconstructed from the input unitary matrix.

[0027] An optimization module is used to optimize the adjustable parameters in the target quantum circuit template based on the predicted initial values;

[0028] The second determining module is used to take the target quantum circuit template corresponding to the latest adjustable parameters as the synthesized quantum circuit when the fidelity between the unitary matrix corresponding to the latest adjustable parameters and the target unitary matrix satisfies the convergence condition.

[0029] Another embodiment of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements any of the methods described above.

[0030] Another embodiment of this application provides a computer device, the computer device including a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement any of the methods described above.

[0031] Compared with existing technologies, this application provides a quantum circuit synthesis method. First, a target quantum circuit template is determined from a quantum circuit template library based on a target unitary matrix. Then, the target unitary matrix is ​​input into a trained first prediction model to predict the initial values ​​of the adjustable parameters of the target quantum circuit template. Next, based on the predicted initial values, the adjustable parameters in the target quantum circuit template are optimized. Finally, when the fidelity between the unitary matrix corresponding to the latest adjustable parameters and the target unitary matrix satisfies the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameters is used as the synthesized quantum circuit. Compared with the existing technologies that randomly generate initial values ​​or empirical values ​​for adjustable parameters, this application uses a prediction model based on the target unitary matrix, resulting in a more reasonable initial value setting and reducing the number of parameter optimizations. Especially as the number of qubits increases, the number of optimizations is reduced even further, thus reducing optimization time and improving the compilation efficiency of the quantum circuit. Attached Figure Description

[0032] Figure 1 A network block diagram of a quantum circuit synthesis system provided in this application embodiment;

[0033] Figure 2 A flowchart of a quantum circuit synthesis method provided in this application embodiment;

[0034] Figure 3 A structural diagram of a quantum circuit synthesis device provided in an embodiment of this application;

[0035] Figure 4 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application. Detailed Implementation

[0036] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0037] Figure 1 This is a network block diagram of a quantum circuit synthesis system provided in an embodiment of this application. The quantum circuit synthesis system may include a network 110, a server 120, a wireless device 130, a client 140, a storage 150, a classical computing unit 160, a quantum computing unit 170, and may also include additional memory, a classical processor, a quantum processor, and other devices not shown.

[0038] Network 110 is a medium used to provide communication links between various devices and computers connected together within a quantum circuit synthesis system, including but not limited to the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof. The connection method can be wired, wireless communication links, or fiber optic cables.

[0039] Server 120, wireless device 130, and client 140 are conventional data processing systems that may contain data and application programs or software tools that perform conventional computational processes. Client 140 may be a personal computer or a network computer, so the data may also be provided by server 120. Wireless device 130 may be a smartphone, tablet, laptop, smart wearable device, etc. Storage unit 150 may include database 151, which can be configured to store data such as qubit parameters, quantum logic gate parameters, quantum circuits, and quantum programs.

[0040] The classical computing unit 160 (quantum computing unit 170) may include a classical processor 161 (quantum processor 171) for processing classical data (quantum data) and a memory 162 (memory 172) for storing classical data (quantum data). The classical data (quantum data) may be a boot file, an operating system image, and an application program 163 (application program 173). The application program 163 (application program 173) may be used to implement a quantum algorithm compiled according to the quantum circuit synthesis method provided in the embodiments of this application.

[0041] Any data or information stored or generated in the classical computing unit 160 (quantum computing unit 170) can also be configured to be stored or generated in another classical (quantum) processing system in a similar manner, and any application executed therein can also be configured to be executed in another classical (quantum) processing system in a similar manner.

[0042] It should be noted that a true quantum computer has a hybrid structure, which includes at least... Figure 1 The system consists of two main parts: the classical computing unit 160, which is responsible for performing classical calculations and control; and the quantum computing unit 170, which is responsible for running quantum programs to achieve quantum computing.

[0043] The aforementioned classical computing unit 160 and quantum computing unit 170 can be integrated into a single device or distributed across two different devices. For example, a first device including the classical computing unit 160 runs a classical computer operating system, providing quantum application development tools and services, as well as the storage and network services required for quantum applications. Users develop quantum programs using the quantum application development tools and services on the second device, and send these quantum programs to a second device including the quantum computing unit 170 via the network services. The second device runs a quantum computer operating system, which parses and compiles the quantum program's code into instructions that the quantum processor 170 can recognize and execute. The quantum processor 170 then implements the quantum algorithm corresponding to the quantum program based on these instructions.

[0044] The computing units of the classic processor 161 within the classic computing unit 160 are based on CMOS transistors on a silicon chip. These computing units are not limited by time or coherence; that is, they are available at any time without time constraints. Furthermore, the number of such computing units in a silicon chip is sufficient; currently, a single classic processor 161 contains tens of thousands of computing units. Given this sufficient number and the fixed selectable computing logic of the CMOS transistors (e.g., AND logic), computational performance is achieved by combining a large number of CMOS transistors with a limited set of logic functions during operation.

[0045] In the quantum computing unit 170, the basic computing unit of the quantum processor 171 is the qubit. The input of a qubit is limited by coherence and coherence time; that is, a qubit is limited by its available usage time and is not always readily available. Making full use of qubits within their available usage time is a key challenge in quantum computing. Furthermore, the number of qubits in a quantum computer is one of the representative indicators of its performance. Each qubit performs computational functions through on-demand configured logical functions. Given the limited number of qubits and the diverse logical functions available in quantum computing, such as Hadamard gates (H gates), Pauli-X gates (X gates), Pauli-Y gates (Y gates), Pauli-Z gates (Z gates), X gates, RY gates, RZ gates, CNOT gates, CR gates, iSWAP gates, Tofoli gates, etc., quantum computing requires combining a limited number of qubits with diverse logical function combinations to achieve computational effects.

[0046] Based on these differences, the design of classical logic functions applied to CMOS transistors and the design of quantum logic functions applied to qubits are significantly and fundamentally different. The design of classical logic functions applied to CMOS transistors does not need to consider the individuality of CMOS transistors. For example, the representation of a CMOS transistor in a silicon chip is its individual identifier, location, and usable time of each CMOS transistor. Therefore, classical algorithms composed of classical logic functions only express the operational relationship of the algorithm, not the algorithm's dependence on individual CMOS transistors.

[0047] Quantum logic functions applied to qubits need to consider the individuality of each qubit, such as its position within the quantum chip, its relationship with surrounding qubits, and the duration of its usable time. Therefore, quantum algorithms composed of quantum logic functions not only express the computational relationships within the algorithm but also its dependence on the individual qubits.

[0048] A quantum chip can include qubits and channels for controlling them. Quantum logic gates are implemented using analog signals. Different combinations of analog signals are applied to the qubits through these channels, thereby creating quantum circuits with different functions to process data. Therefore, the design of quantum logic functions in the qubits (including the design of whether qubits are used and the design of the efficiency of each qubit) is crucial for improving the computational performance of quantum computers and requires special design. This is the unique characteristic of quantum algorithms based on quantum logic functions, and it is fundamentally and significantly different from classical algorithms based on classical logic functions. The aforementioned design considerations for qubits are technical problems that ordinary computing devices do not need to consider or address.

[0049] See Figure 2 , Figure 2 A quantum circuit synthesis method provided in this application includes the following steps:

[0050] S201: Based on the target unitary matrix, determine the target quantum circuit template from the quantum circuit template library, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter.

[0051] Given a target unitary matrix, the quantum circuit template that is closest to the target unitary matrix is ​​searched from the quantum circuit template library and selected as the target quantum circuit template. There are many ways to determine the target quantum circuit template. One approach is to calculate the fidelity between the unitary matrix of each quantum circuit template and the target unitary matrix, and select the quantum circuit template with the highest fidelity as the target quantum circuit template. Another approach is to input the target unitary matrix into a trained model and use the model's output to determine the target quantum circuit template. Other methods used in the approximate synthesis of quantum circuits can also be employed, but these will not be elaborated upon here.

[0052] It should be noted that the order of the target unitary matrix is ​​the same as the order of the unitary matrix corresponding to the quantum circuit template, and the number of qubits in the quantum circuit template library is the same. Different quantum circuit template libraries correspond to target unitary matrices of different orders. Quantum circuit templates of the same type but different orders have different numbers of qubits, but the circuit structures can be the same. The quantum circuit template library corresponding to each target unitary matrix can be predetermined, or it can be formed by selecting quantum circuit templates with the order corresponding to the target unitary matrix from the quantum circuit template set after obtaining the target unitary matrix.

[0053] S202: Input the target unitary matrix into the trained first prediction model to predict the initial values ​​of the adjustable parameters of the target quantum circuit template, wherein the first prediction model is trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix, and the output unitary matrix is ​​reconstructed from the input unitary matrix.

[0054] The first prediction model is a prediction model capable of reconstructing a unitary matrix, and can be a prediction model with the same input and learning target. The target unitary matrix is ​​input into the trained first prediction model to obtain the initial values ​​of each adjustable parameter in the target quantum circuit template. In some embodiments of this application, during the training phase, the first prediction model is divided into two parts: a prediction part and a reconstruction part. When the model is trained and prediction is performed, the first prediction model does not include the reconstruction part; the reconstruction part is used to detect the prediction results.

[0055] As one embodiment of this application, the first prediction model is a machine learning model with the same input and learning objective.

[0056] The alignment of the input and learning objective of the first predictive model ensures that the model focuses on the most important features and patterns, thereby improving predictive accuracy. Simultaneously, it reduces the complexity of the model design process because there is no need for additional data processing and transformation to match different objectives. When the input data directly corresponds to the learning objective, the model can learn faster and improve training efficiency because each step in the training process directly moves towards the optimization goal. The model can more accurately capture the inherent patterns in the data during training, thus performing well on new and unseen data and exhibiting better generalization ability. When the model's input and learning objective are closely aligned, the risk of overfitting the training data is reduced because the model is not guided to learn complex patterns unrelated to the objective.

[0057] As one embodiment of this application, the model parameters of the first prediction model are complex numbers.

[0058] The first prediction model uses complex parameters to directly input and output complex values, which better represents the complex numerical properties of unitary matrices.

[0059] As one embodiment of this application, the first prediction model is an autoencoder.

[0060] An autoencoder is an unsupervised learning neural network model that achieves data compression and reconstruction by learning a low-dimensional representation of the input data. An autoencoder consists of an encoder and a decoder. The encoder maps the input data to a low-dimensional latent space, which can be a fully connected layer, while the decoder attempts to reconstruct the original data from the latent space. Autoencoders do not require labeled training data and can automatically learn features from unlabeled data. They can also perform non-linear transformations of features through multiple layers of non-linear activation functions, capturing more complex data structures. Furthermore, the structure of the encoder and decoder can be flexibly designed, including the number of neurons, layers, and activation functions. Through unsupervised learning, autoencoders extract useful information from large amounts of unlabeled data, giving them strong generalization capabilities. The data compression and decompression functions implemented by autoencoders help reduce the cost of data storage and transmission, and improve data transmission efficiency.

[0061] S203: Based on the predicted initial values, optimize the adjustable parameters in the target quantum circuit template.

[0062] The initial values ​​of the adjustable parameters of the target quantum circuit template are predicted. When optimizing the adjustable parameters, adjustments are made based on these predicted initial values. The optimization process can employ gradient descent, with the optimization objective being the fidelity between the generated quantum circuit and the target unitary matrix. Specifically, automatic differentiation techniques can be used to calculate the gradient of the adjustable parameters relative to the fidelity. The parameter values ​​are then iteratively updated based on the gradient information until a satisfactory fidelity is achieved.

[0063] S204: When the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix satisfies the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameter is used as the synthesized quantum circuit.

[0064] In the embodiments of this application, the convergence condition can be the maximum fidelity, the difference between two consecutive fidelities within a preset range, or the fidelity within a range set for the fidelity. Of course, it can also be other conditions based on fidelity to determine whether the optimization has converged. When the fidelity meets the convergence condition, it indicates that a satisfactory fidelity has been achieved, at which point the optimization terminates, and the synthesized quantum circuit is obtained.

[0065] This application first determines a target quantum circuit template from a quantum circuit template library based on the target unitary matrix; then, it inputs the target unitary matrix into a trained first prediction model to predict the initial values ​​of the adjustable parameters of the target quantum circuit template; next, it optimizes the adjustable parameters in the target quantum circuit template based on the predicted initial values; finally, when the fidelity between the unitary matrix corresponding to the latest adjustable parameters and the target unitary matrix satisfies the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameters is used as the synthesized quantum circuit. Compared with the prior art of randomly generating initial values ​​or empirical values ​​of adjustable parameters, this application uses a prediction model based on the target unitary matrix, resulting in a more reasonable initial value setting, reducing the number of parameter optimizations. In particular, as the number of qubits increases, the number of optimizations is reduced even further, thereby reducing optimization time and improving the compilation efficiency of the quantum circuit.

[0066] As one implementation of this application, determining the target quantum circuit template from the quantum circuit template library based on the target unitary matrix may include:

[0067] The target unitary matrix is ​​input into the trained second prediction model to obtain a set of selectable quantum circuit templates and the probability corresponding to each quantum circuit template. The second prediction model is obtained by performing probability prediction on the input unitary matrix with the goal of minimizing the cross-entropy loss function between the predicted probability and the pre-labeled actual probability.

[0068] Based on the obtained probabilities, the quantum circuit template corresponding to the highest probability is selected as the target quantum circuit template.

[0069] By utilizing the target unitary matrix for the target quantum circuit template, the synthesis speed of quantum circuits can be further accelerated, thereby improving the efficiency of quantum circuit compilation. The actual output of the second prediction model can be a set of probability distributions, where each probability corresponds to a quantum circuit template; that is, the final result is a quantum circuit template and its corresponding probability. For example, if the output is {0.5, 0.3, 0, 0, 0.2}, then the probability corresponding to quantum circuit template 1 is 0.5, the probability corresponding to quantum circuit template 2 is 0.3, the probability corresponding to quantum circuit template 3 is 0, the probability corresponding to quantum circuit template 4 is 0, and the probability corresponding to quantum circuit template 5 is 0.2. In this case, quantum circuit template 1 is selected as the target quantum circuit template. In some embodiments, the second prediction model can be a machine learning model; specifically, the second prediction model can be a classical machine learning model, a quantum machine learning model, or a classical-quantum hybrid machine learning model. Similarly, the first prediction model can be a classical machine learning model, a quantum machine learning model, or a classical-quantum hybrid machine learning model.

[0070] As one embodiment of this application, the training process of the second prediction model includes:

[0071] Fill in the adjustable parameter values ​​of each quantum circuit template in the quantum circuit template library to obtain the corresponding unitary matrix, and construct the training dataset.

[0072] Each training data point in the training dataset is input into a pre-built second prediction model to obtain the prediction probability corresponding to each training data point.

[0073] The model parameters of the second prediction model are adjusted with the goal of minimizing the cross-entropy loss function between the predicted probability and the actual probability labeled in the training data.

[0074] In this embodiment, the parameter values ​​filled into the quantum circuit template can be randomly generated or obtained through other methods. Different quantum circuit templates can be filled with the same or different parameter values. Multiple sets of data can be filled into the same quantum circuit template to obtain multiple unitary matrices. The number of output data from the second prediction model can be determined by the number of quantum circuit templates in the quantum circuit template library. For example, if there are 16 quantum circuit templates in the library, the number of output data from the second prediction model can be 16 or less.

[0075] A training dataset is input into the second prediction model to obtain the predicted probability of that training dataset. This predicted probability represents the probability distribution of quantum circuit templates selected from the quantum circuit template library. The cross-entropy loss function between the predicted probability and the actual probabilities pre-labeled for the training data is calculated to determine if it is minimized. If not, the model parameters of the second prediction model are adjusted; if so, the trained second prediction model is obtained.

[0076] As one embodiment of this application, the machine learning model is a multi-layer fully connected neural network.

[0077] Multilayer fully connected neural networks (also known as multilayer perceptrons or multilayer feedforward neural networks) are capable of learning complex patterns and nonlinear relationships in data. Each layer can be viewed as a feature transformer, extracting higher-level features from the raw data. Neurons in each layer typically use nonlinear activation functions such as ReLU, sigmoid, or tanh, which enable the network to learn and model nonlinear relationships. During training, multilayer fully connected neural networks can use regularization techniques to reduce overfitting and improve the model's generalization ability.

[0078] As one embodiment of this application, when the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix cannot converge, the method further includes:

[0079] From the quantum circuit template library, determine the quantum circuit template with the second highest probability after the current target quantum circuit template as the new target quantum circuit template, and return to the step of predicting the initial values ​​of the adjustable parameters of the target quantum circuit template through the target unitary matrix.

[0080] When optimizing the adjustable parameters of the current target quantum circuit fails to converge, a new target quantum circuit template needs to be replaced in order to achieve the synthesis of the quantum circuit. At this time, a new target quantum circuit template with a probability only lower than the current target quantum circuit template can be selected.

[0081] The failure of the fidelity between the unitary matrix corresponding to the latest adjustable parameters and the target unitary matrix to converge means that the fidelity has not converged to the maximum within the preset number of optimizations, or that the fidelity changes very little after a certain number of optimizations, or other conditions that determine convergence failure.

[0082] See Figure 3 , Figure 3 A quantum circuit synthesis apparatus provided in this application embodiment may include:

[0083] The first determining module 301 is used to determine a target quantum circuit template from a quantum circuit template library based on a target unitary matrix, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter.

[0084] The prediction module 302 is used to input the target unitary matrix into the trained first prediction model to predict the initial values ​​of the adjustable parameters of the target quantum circuit template. The first prediction model is trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix. The output unitary matrix is ​​reconstructed from the input unitary matrix.

[0085] The optimization module 303 is used to optimize the adjustable parameters in the target quantum circuit template based on the predicted initial values;

[0086] The second determining module 304 is used to take the target quantum circuit template corresponding to the latest adjustable parameters as the synthesized quantum circuit when the fidelity between the unitary matrix corresponding to the latest adjustable parameters and the target unitary matrix satisfies the convergence condition.

[0087] The specific functions and effects achieved by the aforementioned quantum circuit synthesis device can be explained by referring to other embodiments of this application, and will not be repeated here. Each module in the quantum circuit synthesis device can be implemented entirely or partially through software, hardware, or a combination thereof. Each module can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0088] Please see Figure 4 This application also provides a computer device, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the quantum circuit synthesis method in any of the above embodiments. Please refer to [link to relevant documentation]. Figure 4 The computer device can be a classical computer or a quantum computer.

[0089] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer, causes the computer to perform the quantum circuit synthesis method in any of the above embodiments.

[0090] This application also provides a computer program product containing instructions that, when executed by a computer, cause the computer to perform the quantum circuit synthesis method in any of the above embodiments.

[0091] It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this application in any way.

[0092] It is understood that the various implementation methods described in this application can be implemented individually or in combination, and the implementation methods in this application are not limited in this respect.

[0093] Unless otherwise stated, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this application includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0094] It is understood that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiments can be completed by the integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0095] It is understood that the memory in the embodiments of this application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Specifically, non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0096] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0097] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0098] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0099] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0100] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0101] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0102] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for synthesizing quantum circuits, characterized in that, The method includes: Based on the target unitary matrix, a target quantum circuit template is determined from a quantum circuit template library, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter; The target unitary matrix is ​​input into the trained first prediction model to predict the initial values ​​of the adjustable parameters of the target quantum circuit template. The first prediction model is a machine learning model trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix. The output unitary matrix is ​​reconstructed from the input unitary matrix. During the training phase, the first prediction model includes a prediction part and a reconstruction part. When the model is trained and prediction is performed, the first prediction model does not include the reconstruction part. Based on the predicted initial values, the adjustable parameters in the target quantum circuit template are optimized; When the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix satisfies the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameter is used as the synthesized quantum circuit.

2. The method as described in claim 1, characterized in that, The step of determining the target quantum circuit template from the quantum circuit template library based on the target unitary matrix includes: The target unitary matrix is ​​input into the trained second prediction model to obtain a set of selectable quantum circuit templates and the probability corresponding to each quantum circuit template. The second prediction model is obtained by performing probability prediction on the input unitary matrix with the goal of minimizing the cross-entropy loss function between the predicted probability and the pre-labeled actual probability. Based on the obtained probabilities, the quantum circuit template corresponding to the highest probability is selected as the target quantum circuit template.

3. The method as described in claim 2, characterized in that, The training process of the second prediction model includes: Fill in the adjustable parameter values ​​of each quantum circuit template in the quantum circuit template library to obtain the corresponding unitary matrix, and construct the training dataset. Each training data point in the training dataset is input into a pre-built second prediction model to obtain the prediction probability corresponding to each training data point. The model parameters of the second prediction model are adjusted with the goal of minimizing the cross-entropy loss function between the predicted probability and the actual probability labeled in the training data.

4. The method as described in claim 2, characterized in that, The second prediction model is a machine learning model.

5. The method as described in claim 4, characterized in that, The second prediction model is a multi-layer fully connected neural network.

6. The method as described in claim 2, characterized in that, When the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix cannot converge, the method further includes: From the quantum circuit template library, determine the quantum circuit template with the second highest probability after the current target quantum circuit template as the new target quantum circuit template, and return to the step of predicting the initial values ​​of the adjustable parameters of the target quantum circuit template through the target unitary matrix.

7. The method according to any one of claims 1-6, characterized in that, The first prediction model is a machine learning model with the same input and learning objective.

8. The method as described in claim 7, characterized in that, The model parameters of the first prediction model are complex numbers.

9. The method as described in claim 7, characterized in that, The first prediction model is an autoencoder.

10. A quantum circuit synthesis device, characterized in that, The device includes: The first determining module is used to determine a target quantum circuit template from a quantum circuit template library based on a target unitary matrix, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter. The prediction module is used to input the target unitary matrix into a trained first prediction model to predict the initial values ​​of the adjustable parameters of the target quantum circuit template. The first prediction model is a machine learning model trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix. The output unitary matrix is ​​reconstructed from the input unitary matrix. During the training phase, the first prediction model includes a prediction part and a reconstruction part. When the model is trained and prediction is performed, the first prediction model does not include the reconstruction part. An optimization module is used to optimize the adjustable parameters in the target quantum circuit template based on the predicted initial values; The second determining module is used to take the target quantum circuit template corresponding to the latest adjustable parameters as the synthesized quantum circuit when the fidelity between the unitary matrix corresponding to the latest adjustable parameters and the target unitary matrix satisfies the convergence condition.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method according to any one of claims 1 to 9.

12. A computer device, characterized in that, The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method according to any one of claims 1 to 9.

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