Method for manufacturing semiconductor package assembly and semiconductor package assembly

Abstract

According to a first example of the present disclosure, a method for manufacturing a semiconductor package assembly is presented. The method comprises the following steps: i) forming at least one semiconductor package by the following sub-steps: i1) providing a lead frame made of a metal material, said lead frame having a first frame side and a second frame side opposite the first frame side and having at least two terminals; i2) providing at least one semiconductor die structure having a first die side and a second die side opposite the first die side, with its second die side on the first frame side of the lead frame; i3) electrically and mechanically attaching at least one semiconductor die structure to the terminals of the lead frame; i4) attaching a heat sink element on the first die side and / or the second die side of the semiconductor die structure; and ii) encapsulating the at least one semiconductor die structure, the heat sink element, and the plurality of terminals with a molding resin such that at least a portion of the heat sink and at least a portion of the at least two terminals are exposed. Through the above steps, at least one encapsulated semiconductor packaging assembly is formed. The method further comprises a step iii) of providing a layer of at least silicate-containing minerals on the lead frame and / or the semiconductor die structure adjacent to the heat sink element at least prior to the encapsulating step ii).

Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing a semiconductor package assembly composed of a semiconductor package and a molded resin case. Background Art

[0002] A key property of semiconductor packages for high voltage devices (>500V) is the creepage and clearance distances of metal parts within the semiconductor package. In high voltage applications, the minimum creepage distances of electrical conductors are described, for example, in IEC 60664-1 and IPC 2221 A. The requirement for minimum distances according to these standards conflicts with the trend towards higher density electronic devices requiring smaller package components.

[0003] In known power semiconductor devices, no adequate solution has been proposed to incorporate good electrical insulation to mitigate arc risk in surface mounted devices. Furthermore, power semiconductor devices require large exposed heat sink elements for effective heat dissipation of the generated heat. However, at higher operating voltages, the arc risk is higher and heat accumulation inside the package also increases.

[0004] Therefore, an object of the present disclosure is to provide an improved semiconductor package assembly capable of suppressing malfunction in a case where a distance as defined in a standard is violated due to, for example, limitation of a package size. Summary of the invention

[0005] According to a first example of the present disclosure, a method for manufacturing a semiconductor package assembly is proposed. The method includes the following steps: i) forming at least one semiconductor package by the following sub-steps: i1) providing a lead frame made of a metal material, the lead frame having a first frame side and a second frame side opposite to the first frame side and having at least two terminals; i2) providing at least one semiconductor die structure, the at least one semiconductor die structure having a first die side and a second die side opposite to the first die side, wherein its second die side is on the first frame side of the lead frame; i3) electrically and mechanically attaching at least one semiconductor die structure to the terminal of the lead frame; i4) attaching a heat sink element to the first die side and / or the second die side of the semiconductor die structure; and ii) encapsulating at least one semiconductor die structure, the heat sink element and a plurality of terminals with a molding resin, exposing at least a portion of the heat sink and at least a portion of at least two terminals. Through the above steps, at least one encapsulated semiconductor package assembly is formed.

[0006] The method further comprises the step iii) of providing a layer consisting of a mineral containing at least a silicate on the lead frame and / or the semiconductor die structure adjacent to the heat sink element at least before the encapsulation step ii).

[0007] A silicate-containing mineral mounted on a lead frame and / or a semiconductor die structure adjacent to a heat sink element shields the heat sink element from the leads of the lead frame and provides improved creepage performance, particularly for top-cooled semiconductor package assemblies having a top surface heat sink. Furthermore, the presence of such a silicate-containing mineral allows for increased design margins in semiconductor package assemblies, as it is possible to develop package assemblies with larger heat sinks for progressive heat dissipation.

[0008] In a further example of the method according to the present disclosure, step iii) is performed before step i2) and comprises providing an adhesive tape having an adhesive side and comprising at least one layer consisting of at least a silicate-containing mineral on the adhesive side, and mounting at least a lead frame on the adhesive side of the adhesive tape.

[0009] Applying adhesive tape as backside tape in film-assisted molding technology can support the manufacturability of thinner lead frames.

[0010] In a further example, in the method according to the present disclosure, step iii) is followed by step vi) removing the adhesive tape, exposing at least one layer composed of at least a silicate-containing mineral.

[0011] The present disclosure also relates to a semiconductor package assembly consisting of a semiconductor package and a molded resin housing manufactured according to one or more of the method claims. In a specific example, the semiconductor package includes at least a lead frame made of a metal material, the lead frame having a first frame side and a second frame side opposite to the first frame side and having at least two terminals; at least one semiconductor die structure, the at least one semiconductor die structure having a first die side and a second die side opposite to the first die side, wherein its second die side is on the first frame side of the lead frame; a plurality of connections, the plurality of connections electrically and mechanically connecting the at least one semiconductor die structure to the terminals of the lead frame; at least one heat sink element, the at least one heat sink element being mounted to the semiconductor die structure; and at least one layer composed of a mineral containing at least silicates, the at least one layer being at least adjacent to the at least one heat sink element; and a molded resin, the molded resin encapsulating the at least one semiconductor die structure, the at least one heat sink element, the plurality of terminals and the at least one layer composed of a mineral containing at least silicates, leaving at least a portion of the heat sink and at least a portion of the at least two terminals exposed.

[0012] A silicate-containing mineral mounted on a lead frame and / or a semiconductor die structure adjacent to a heat sink element shields the heat sink element from the leads of the lead frame and provides improved creepage performance, particularly for top-cooled semiconductor package assemblies having a top surface heat sink. Furthermore, the presence of such a silicate-containing mineral allows for increased design margins in semiconductor package assemblies, as it is possible to develop package assemblies with larger heat sinks for progressive heat dissipation.

[0013] Preferably, the silicate-containing mineral is mica.Mica can be reinforced into a high stability composite material which provides excellent electrical insulation and is therefore very useful in mitigating the risk of arcing and creepage.

[0014] In particular, since in one example at least one layer consisting of at least a silicate-containing mineral layer surrounds the heat sink element, creepage currents are further mitigated.

[0015] Alternatively, at least one layer consisting of a mineral layer containing at least a silicate is positioned adjacent to a terminal of the lead frame. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The present disclosure will now be discussed with reference to the accompanying drawings, in which:

[0017] Figures 1A-1F Various examples of singulated semiconductor package assemblies according to the present disclosure are depicted;

[0018] Figures 2A-2D Various manufacturing steps according to the method of the present disclosure are depicted. DETAILED DESCRIPTION

[0019] For proper understanding of the present disclosure, in the following detailed description, corresponding elements or portions of the present disclosure will be denoted by the same reference numerals in the drawings.

[0020] Figures 1A-1F Various examples of semiconductor package assemblies according to the present disclosure are depicted and are respectively indicated by reference numerals 101 - 106 .

[0021] As mentioned in the introduction, one of the key properties of semiconductor packages for high voltage devices (>500V) is the creepage and clearance distances of metal parts within the semiconductor package. In high voltage applications, the minimum creepage distances of electrical conductors are described, for example, in IEC 60664-1 and IPC 2221 A. The requirement for minimum distances according to these standards conflicts with the trend towards higher density electronic devices requiring smaller package components.

[0022] In known power semiconductor devices, no adequate solution has been proposed to incorporate good electrical insulation to mitigate arc risk in surface mounted devices. Furthermore, power semiconductor devices require large exposed heat sink elements for effective heat dissipation of the generated heat. However, at higher operating voltages, the arc risk is higher and heat accumulation inside the package also increases.

[0023] exist Figures 1A-1F Examples 101-106 of the present invention respectively illustrate solutions to the above-mentioned adverse effects of applying high voltage in semiconductor package assemblies according to the prior art. The semiconductor package assemblies 101-106 are all composed of a semiconductor package 11 and a molded resin housing 12, as shown in cross-section. Figure 1A shown.

[0024] In all examples, the semiconductor package 11 is composed of a lead frame 14 having a first lead frame side 14a and a second lead frame side 14b opposite the first lead frame side 14a. The lead frame 14 may also include at least two terminals, represented as leads 13. The semiconductor die structure 15 has a first die side 15a and a second die side 15b opposite the first die side 15a, and is mounted on the first lead frame side 14a of the lead frame 14 with its second die side 15b, for example at a die pad 14z. In addition, one or more bonding elements 130 may be provided, which are electrically connected to the relevant parts of the semiconductor die structure 15 through the leads 13. The bonding elements may be bonding clips of bonding wires and extend into the leads 13.

[0025] Furthermore, the heat sink element 16 is arranged to have a planar configuration having a first heat sink side 16a and a second heat sink side 16b opposite the first heat sink side 16a. The heat sink element 16 may be mechanically connected to the lead frame 14 (so that the first lead frame side 14a is in contact with its second heat sink side 16b), or mechanically connected to the semiconductor die structure 15 (so that the first die side 15a or the second die side 15b is in contact with its second heat sink side 16b).

[0026] like Figure 1AAs shown, the molded resin housing 12 encapsulates at least the semiconductor die structure 15, the lead frame 14, the heat sink element 16, and the bonding element 130, and partially exposes a portion of the bonding element 130, thereby forming the lead 13. In addition, the first heat sink side 16a of the encapsulated heat sink element 16 is also not encapsulated by the molded resin housing 12, but is exposed similarly to the lead 13. The exposed first heat sink side 16a of the heat sink element 16 allows proper heat dissipation. The encapsulated semiconductor die structure 15, the lead frame 14, the heat sink element 16, and the bonding element 130 (both the encapsulated portion and the exposed portion thereof are the lead 13) are considered to be a semiconductor package assembly 10 (101-106).

[0027] Such semiconductor package assembly 10 (101-106) can be used in all kinds of electronic applications. To this end, the semiconductor package assembly 10 (101-106) can be mounted on a printed circuit board PCB (not shown) by welding leads 13 (13-13b) at relevant mounting positions on the PCB.

[0028] In power semiconductor devices operating at higher operating voltages, the risk of arcing is higher and the heat accumulation inside the package also increases. In order to suppress failures and mitigate the risk of arcing for surface mounted devices as in the case of violation of the distance defined in the standard (e.g. due to limitations on the package size), at least one layer 17, 17a-1, 17a-2, 17a-3 is provided, which layer 17, 17a-1, 17a-2, 17a-3 is composed of a mineral containing at least silicates.

[0029] like Figures 1A-1F As shown, at least one layer 17, 17a-1, 17a-2, 17a-3 composed of at least a silicate-containing mineral is disposed at least adjacent to the heat sink element 16, and optionally also adjacent to the exposed lead 13a.

[0030] In this application, it is observed that the exposed lead 13b can be connected to the drain and also electrically connected to the heat sink 16, as in Figure 1A 15 . Therefore, lead 13 b and heat sink 16 are at the same potential level. Lead 13 a is not electrically connected to heat sink 16, but may be connected to the source and gate of semiconductor die structure 15. The potential difference between lead 13 a and heat sink 16 may lead to a higher risk of arcing and heat buildup inside the package.

[0031] The mold resin 12 also encapsulates the at least one layer 17 , 17 a , 17 b , but in a similar manner to the exposure of the heat sink element 16 .

[0032] The silicate-containing mineral 17, 17a-1, 17a-2, 17a-3 mounted on the lead frame 14 and / or the semiconductor die structure 15 adjacent to the heat sink element shields the heat sink element from the leads 13a of the lead frame 14 and provides improved creepage performance, particularly for top-cooled semiconductor package assemblies having a top-surface heat sink element 16, such as Figures 1A-1F As shown in Examples 101-106.

[0033] Furthermore, the presence of such silicate-containing minerals 17, 17a-1, 17a-2, 17a-3 allows for an increase in the design margin of a semiconductor package assembly, since it is possible to develop a package assembly having a larger heat sink for progressive heat dissipation.

[0034] exist Figure 1A , 1B In 1C, the heat sink element 16 and the silicate-containing mineral 17 are located on the first top surface side 10a of the semiconductor package components 101, 102, and 103, shielding the heat sink 16 from the leads 13a (the leads and the heat sink 16 are at different potential levels). Figure 1D and 1E In the examples, the heat sink element 16 and the silicate-containing mineral 17 are located on the second bottom surface side 10b of the semiconductor packages 104 and 105. In all examples, the semiconductor packages 101-106 are mounted on a PCB (not shown) with their second bottom surface side 10b, and the silicate-containing mineral 17 electrically shields the heat sink 16 from the leads 13a (the leads are at different potential levels than the heat sink 16), thereby limiting the risk of arcing. Figure 1E In the embodiment, the strips 17a-1, 17a-2, 17a-3 of silicate-containing mineral are partially located around the heat sink 16, shielding the lead 13a (which are at different potential levels). Figure 1F The example of FIG. 1 shows a leadless semiconductor package assembly 106 .

[0035] Figures 2A-2D Various manufacturing steps of the method according to the present disclosure are depicted. The method is intended to form at least one semiconductor package 101-106 by the following sub-steps: step i1) providing a lead frame 14 made of a metal material, the lead frame having a first frame side 14a and a second frame side 14b opposite to the first frame side 14a and having at least two terminals 13; step i2) providing at least one semiconductor die structure 15, the semiconductor die structure having a first die side 15a and a second die side 15b opposite to the first die side 15a, wherein the second die side 15b thereof is on the first frame side 14a of the lead frame 14, for example at the position of a die pad 14z (see Figure 2B ).

[0036] The next step i3) involves electrically and mechanically attaching at least one semiconductor die structure 15 to the terminals 13 of the lead frame 14, for example using bonding clips or bonding wires 130. Figure 2B In a next step i4), a heat spreader element 16 is attached to the first die side 15 a and / or the second die side 15 b of the semiconductor die structure 15 or optionally to the lead frame 14 .

[0037] Prior to the encapsulation step ii) of encapsulating at least one semiconductor die structure 15, a heat sink element 16, a lead frame 14 and a plurality of terminals 13 with a molding resin 12, the method performs a step iii): providing a layer 17, 17a, 17b consisting of a mineral containing at least silicate on the lead frame 14 and / or the semiconductor die structure 15 adjacent to the heat sink element 16.

[0038] Various techniques may be applied to provide the layer 17, 17a, 17b of at least a silicate-containing mineral on the lead frame 14 and / or the semiconductor die structure 15 adjacent to the heat sink element 16.

[0039] One technique involves a printing technique in which the silicate-containing mineral is printed into one or more overlapping layers 17, 17a, 17b.

[0040] exist Figure 2A Another technique is disclosed in Figure 2A In a method step, an adhesive tape 100 having an adhesive side 100a is provided. On the adhesive side 100a, at least one layer 17, 17a, 17b of a mineral containing at least silicates is provided, for example wherein the length dimension is more or less equal to the width dimension of the lead frame 14. The lead frame 14 is adhered to the adhesive side 100a of the adhesive tape 100 with one of its lead frame sides, here the second lead frame side 14b, so that the at least one layer 17, 17a, 17b of the mineral containing at least silicates is sandwiched between the tape 100 and the lead frame 14.

[0041] After the step of adhering the lead frame 14 to the adhesive tape 100, the steps outlined above are performed: at least one semiconductor die structure 15 is mounted with its second die side 15b on the first frame side 14a of the lead frame 14, for example at the location of the die pad 14z (see Figure 2B ), at least one semiconductor die structure 15 is electrically and mechanically attached to the terminal 13 of the lead frame 14, and at least one heat sink element 16 is attached to the first die side 15a and / or the second die side 15b of the semiconductor die structure 15, or optionally to the lead frame 14.

[0042] Subsequently, an encapsulation step is performed using encapsulant 12, exposing first heat sink side 16a of heat sink element 16, optionally at least layer 17, 17a, 17b of silicate-containing mineral and leads or terminals 13, thereby forming at least one encapsulated semiconductor package 101-106.

[0043] The efficiency of the manufacturing method according to the present disclosure allows the manufacture of a large number of encapsulated semiconductor package components 101-106 using an adhesive tape having an adhesive side and comprising multiple layers, each layer being composed of a mineral containing at least silicates, at specific locations on the adhesive side corresponding to the number of semiconductor packages 11 to be formed on a matrix-shaped lead frame 14 comprising multiple tube cores 14z and leads 13.

[0044] After encapsulation, known singulation and lead forming techniques may be used to create individual semiconductor package assemblies 101 - 106 .

[0045] List of reference symbols used

[0046] 101-106 Semiconductor Package Assembly (Example of the Present Disclosure)

[0047] 11 Semiconductor packaging

[0048] 12 Molded resin housing

[0049] 13a-13b Leads / Terminals

[0050] 130 Joint element

[0051] 14 Lead frame

[0052] 14 First side of lead frame

[0053] 14b Second side of lead frame

[0054] 14z Lead Frame Die Holder

[0055] 15 Semiconductor die structure

[0056] 15a First die side of semiconductor die structure

[0057] 15b Second die side of the semiconductor die structure

[0058] 16 Radiator

[0059] 16 First side of the heat sink

[0060] 16 Second side of the radiator

[0061] 17; 17a-n; 17 A layer composed of a mineral containing at least silicates

[0062] 100 belt

[0063] 100a Adhesive side of tape

Claims

1. A method for manufacturing a semiconductor package assembly, the method comprising the following steps: i) forming at least one semiconductor package by the following sub-steps: i1) providing a lead frame made of a metal material, the lead frame having a first frame side and a second frame side opposite to the first frame side and having at least two terminals; i2) providing at least one semiconductor die structure having a first die side and a second die side opposite to the first die side, wherein the second die side thereof is on the first frame side of the lead frame; i3) electrically and mechanically attaching said at least one semiconductor die structure to said terminals of said lead frame; i4) attaching a heat sink element to the first die side and / or the second die side of the semiconductor die structure; as well as ii) encapsulating the at least one semiconductor die structure, the heat sink element and the plurality of terminals with a molding resin, leaving at least a portion of the heat sink and at least a portion of the at least two terminals exposed, thereby forming at least one encapsulated semiconductor package assembly; The method further comprises the following steps: iii) providing a layer consisting of a mineral containing at least a silicate on said lead frame and / or said semiconductor die structure adjacent to said heat sink element at least before said encapsulation step ii).

2. The method according to claim 1, wherein step iii) is performed before step i2) and comprises: providing an adhesive tape having an adhesive side and comprising at least one layer of the at least silicate-containing mineral on the adhesive side, and At least the lead frame is mounted on the adhesive side of the adhesive tape.

3. The method according to claim 2, wherein step iii) is followed by the following steps: vi) removing the adhesive tape to expose the at least one layer consisting of the at least silicate-containing mineral.

4. The method according to any one or more of the preceding claims, wherein the silicate-containing mineral is mica.

5. The method according to any one or more of the preceding claims, wherein the at least one layer consisting of the at least silicate-containing mineral layer surrounds the radiator element.

6. The method according to any one or more of the preceding claims, wherein the at least one layer consisting of the at least silicate-containing mineral layer is adjacent to the terminals of the lead frame.

7. A semiconductor package assembly consisting of a semiconductor package and a molded resin case manufactured according to one or more of the method claims 1 to 6, the semiconductor package comprising at least: a lead frame made of a metal material, the lead frame having a first frame side and a second frame side opposite the first frame side and having at least two terminals; at least one semiconductor die structure having a first die side and a second die side opposite the first die side, wherein the second die side thereof is on the first frame side of the lead frame; a plurality of connections electrically and mechanically connecting the at least one semiconductor die structure to the terminals of the lead frame; at least one heat sink element mounted to the semiconductor die structure; at least one layer composed of a mineral comprising at least silicates, said at least one layer being adjacent to at least said at least one radiator element; as well as A molding resin encapsulates the at least one semiconductor die structure, the at least one heat sink element, the plurality of terminals, and the at least one layer comprised of at least a silicate-containing mineral, leaving at least a portion of the heat sink and at least a portion of the at least two terminals exposed.

8. The semiconductor package assembly of claim 7, wherein the silicate-containing mineral is mica.

9. The semiconductor package assembly according to claim 7 or 8, wherein the at least one layer consisting of the at least silicate-containing mineral layer is located around the heat sink element.

10. The semiconductor package assembly of claim 7, 8 or 9, wherein the at least one layer comprised of the at least silicate-containing mineral layer is positioned adjacent to the terminal of the lead frame.

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