A bidirectional four-port three-phase DC-AC converter and its modulation strategy

Abstract

The application belongs to the technical field of power equipment, and specifically provides a bidirectional four-port three-phase DC-AC converter and a modulation strategy thereof, which comprises a DC-DC converter, a double-output converter, a low-voltage direct-current port Vdc1, a high-voltage direct-current port Vdc2 and two alternating-current voltage ports Vac1 and Vac2; the converter can be operated in a single-input single-output, single-input double-output, double-input single-output or double-input double-output mode by controlling a switching module, compared with a traditional two-stage structure, the power capacity, loss and volume cost of the DC-AC converter are effectively reduced, and the DC-AC converter can be well applied to a hybrid AC / DC microgrid.

Description

Technical Field

[0001] This invention belongs to the field of power equipment technology, specifically relating to a bidirectional four-port three-phase DC-AC converter and its modulation strategy. Background Technology

[0002] In recent years, with the global emphasis on and development of renewable energy, the large-scale integration of distributed energy sources such as solar and wind power, and the application demands in modern hybrid AC / DC microgrid environments, the structure and operation mode of the power grid have undergone profound changes. Traditional power grids mainly rely on centralized power generation and unidirectional power transmission, meaning that electricity is transmitted from power plants to various levels of the grid and then to end users. In this mode, the direction of power flow is singular, and the power conversion process is relatively simple. However, in the modern energy structure, renewable energy and distributed generation systems are gradually becoming mainstream. They are characterized by unstable output voltage and power, requiring flexible and efficient power conversion and management technologies to adapt to their volatility and intermittency. Hybrid AC / DC microgrids are one of the important technological paths to address this challenge. They organically combine DC and AC power sources, enabling more efficient utilization of various types of power sources and improving the flexibility and stability of the power grid. In this context, traditional DC-AC converters can no longer meet practical needs. These converters typically can only handle a single type of voltage conversion and have limited efficiency and flexibility, making it difficult to achieve ideal performance in complex multi-port, multi-mode applications.

[0003] Furthermore, with the development of smart grids and the energy internet, the requirements for power quality and conversion efficiency are becoming increasingly stringent. Research on multi-port converters and multi-mode operation has become a hot topic, aiming to improve the overall performance and adaptability of converters through optimized control strategies without increasing hardware costs. This necessitates new converter topologies that not only achieve efficient power conversion but also flexibly switch between different operating modes and adapt to various voltage and power demands. Against this backdrop, developing a bidirectional DC-AC converter capable of flexibly handling multi-port, multi-mode operation has become an urgent technological need. Summary of the Invention

[0004] In view of the above-mentioned shortcomings of the prior art, the present invention provides a bidirectional four-port three-phase DC-AC converter and its modulation strategy to solve the above-mentioned technical problems.

[0005] In a first aspect, the present invention provides a bidirectional four-port three-phase DC-AC converter, comprising a DC-DC converter, a dual-output converter, and a low-voltage DC port V. dc1 High-voltage DC port V dc2 and two AC voltage ports V ac1 V ac2 ;

[0006] Low-voltage DC port V dc1 Connected to the energy storage battery, low-voltage DC port V dc1 A capacitor C1 is connected in parallel between the positive and negative terminals;

[0007] The first terminal of both the DC-DC converter and the dual-output converter is connected to the low-voltage DC port V. dc1 The positive terminal of the DC-DC converter and the second terminal of the dual-output converter are both connected to the high-voltage DC port V. dc2 The positive terminal, the high-voltage DC port V dc2 The positive terminal is also connected to the positive terminal P of the DC bus, and the third terminal and low-voltage DC port V of the DC-DC converter. dc1 The negative terminal, the third terminal of the dual-output converter, and the high-voltage DC port V dc2 The negative terminals are all grounded, and the high-voltage DC port V dc2 The negative terminal is also connected to the negative terminal N of the DC bus, and the fourth terminal of the dual-output converter is connected to the AC voltage port V. ac1 Connected to an external three-phase load, the fifth terminal of the dual-output converter is connected to the AC voltage port V. ac2 Connected to an external power grid;

[0008] The dual-output converter includes three phase arms: phase A, phase B, and phase C. Each phase arm consists of six switching modules S. x1 ~S x6 Composition, where x∈{A, B, C}.

[0009] A further improvement to this technical solution is that the DC-DC converter includes an inductor L1, an insulated-gate bipolar transistor S1, an insulated-gate bipolar transistor S2, and a capacitor C2, with the first end of the inductor L1 connected to the low-voltage DC port V. dc1 The positive terminal of the inductor L1 is connected to the emitter of the insulated-gate bipolar transistor S1 and the collector of the insulated-gate bipolar transistor S2. The collector of the insulated-gate bipolar transistor S1 and the first terminal of the capacitor C2 are both connected to the high-voltage DC port V. dc2 The positive terminal of the insulated gate bipolar transistor S2, the emitter of the insulated gate bipolar transistor S2, and the second terminal of the capacitor C2 are all grounded.

[0010] Further improvements to this technical solution include: the A-phase bridge arm includes an insulated gate bipolar transistor S. A1 Insulated Gate Bipolar Transistor S A2 Insulated Gate Bipolar Transistor S A3 Insulated Gate Bipolar Transistor S A4 Insulated Gate Bipolar Transistor S A5 and insulated gate bipolar transistor S A6 ;

[0011] Insulated Gate Bipolar Transistor S A1The collector is connected to the high-voltage DC port V. dc2 The positive terminal of the insulated gate bipolar transistor S A1 The emitter is connected to the insulated gate bipolar transistor S. A2 The collector and the A-phase input terminal of the external three-phase load, the insulated gate bipolar transistor S A2 The emitter is connected to the insulated gate bipolar transistor S. A4 collector and insulated gate bipolar transistor S A5 The collector of the insulated gate bipolar transistor S A4 The emitter is connected to the insulated gate bipolar transistor S. A3 The emitter of the insulated gate bipolar transistor S A3 The collector is connected to the low-voltage DC port V. dc1 The positive terminal of the insulated gate bipolar transistor S A5 The emitter is connected to the insulated gate bipolar transistor S. A6 The collector of the insulated gate bipolar transistor S A5 The emitter is connected to the inductor L a Phase A line connected to the external power grid, Insulated Gate Bipolar Transistor S A6 The emitter is grounded.

[0012] Further improvements to this technical solution include the inclusion of an insulated gate bipolar transistor S in the B-phase bridge arm. B1 Insulated Gate Bipolar Transistor S B2 Insulated Gate Bipolar Transistor S B3 Insulated Gate Bipolar Transistor S B4 Insulated Gate Bipolar Transistor S B5 and insulated gate bipolar transistor S B6 ;

[0013] Insulated Gate Bipolar Transistor S B1 The collector is connected to the high-voltage DC port V. dc2 The positive terminal of the insulated gate bipolar transistor S B1 The emitter is connected to the insulated gate bipolar transistor S. B2 The collector and the B-phase input terminal of the external three-phase load, the insulated gate bipolar transistor S B2 The emitter is connected to the insulated gate bipolar transistor S. B4 collector and insulated gate bipolar transistor S B5 The collector of the insulated gate bipolar transistor S B4 The emitter is connected to the insulated gate bipolar transistor S. B3 The emitter of the insulated gate bipolar transistor S B3 The collector is connected to the low-voltage DC port V. dc1 The positive terminal of the insulated gate bipolar transistor S B5 The emitter is connected to the insulated gate bipolar transistor S.B6 The collector of the insulated gate bipolar transistor S B5 The emitter is connected to the inductor L b The B-phase line connected to the external power grid contains an insulated gate bipolar transistor (IGBT). B6 The emitter is grounded.

[0014] Further improvements to this technical solution include the inclusion of an insulated-gate bipolar transistor S in the C-phase bridge arm. C1 Insulated Gate Bipolar Transistor S C2 Insulated Gate Bipolar Transistor S C3 Insulated Gate Bipolar Transistor S C4 Insulated Gate Bipolar Transistor S C5 and insulated gate bipolar transistor S C6 ;

[0015] Insulated Gate Bipolar Transistor S C1 The collector is connected to the high-voltage DC port V. dc2 The positive terminal of the insulated gate bipolar transistor S C1 The emitter is connected to the insulated gate bipolar transistor S. C2 The collector and the C-phase input terminal of the external three-phase load, the insulated gate bipolar transistor S C2 The emitter is connected to the insulated gate bipolar transistor S. C4 collector and insulated gate bipolar transistor S C5 The collector of the insulated gate bipolar transistor S C4 The emitter is connected to the insulated gate bipolar transistor S. C3 The emitter of the insulated gate bipolar transistor S C3 The collector is connected to the low-voltage DC port V. dc1 The positive terminal of the insulated gate bipolar transistor S C5 The emitter is connected to the insulated gate bipolar transistor S. C6 The collector of the insulated gate bipolar transistor S C5 The emitter is connected to the inductor L c The C-phase line connected to the external power grid, and the S-phase insulated gate bipolar transistor. C6 The emitter is grounded.

[0016] Further improvements to this technical solution include a first inverter stage consisting of three output ports from phase A, phase B, and phase C connected to an external three-phase load, and a second inverter stage consisting of three output ports from phase A, phase B, and phase C connected to an external power grid.

[0017] Secondly, the present invention provides a triangular carrier modulation strategy based on any one of the above-mentioned bidirectional four-port three-phase DC-AC converters, comprising:

[0018] Get switch module Sx1 ~S x6 The status of its operation;

[0019] According to switch module S x1 ~S x6 The activation status determines the output phase voltage of the corresponding output ports of the first and second inverter stages;

[0020] According to the low-voltage DC port V dc1 and high voltage DC port V dc2 The voltage level at that point modulates the triangular carrier wave;

[0021] The three-phase modulated wave is modulated based on the modulated triangular carrier wave, the determined two output phase voltages, and the modulation constraint conditions.

[0022] The switching drive signals for each phase bridge arm are generated based on the modulated triangular carrier and the three-phase modulation.

[0023] A further improvement to this technical solution is that the modulation constraint is: during modulation, the output phase voltage of the bridge arm in the first inverter stage cannot be less than the output phase voltage of the bridge arm in the second inverter stage.

[0024] Further improvements to this technical solution include, when V dc1 >1 / 2V dc2 At that time, the three-phase modulation wave of the first inverter stage is:

[0025] ;

[0026] Further improvements to this technical solution include, when V dc1 >1 / 2V dc2 At that time, the three-phase modulation wave of the second inverter stage is:

[0027] ;

[0028] Where m1 and m2 are both modulation degrees, and their linear values ​​range from 0 to 1; and For the output angular frequency, and The initial phase angle, and This is the DC offset.

[0029] The beneficial effect of this invention lies in that it discloses a novel bidirectional four-port three-phase DC-AC converter topology for hybrid AC / DC microgrids. For hybrid AC / DC microgrid systems, the topology of this invention has two DC ports and two three-phase AC ports, namely one low-voltage DC port V. dc1 A high-voltage DC port V dc2 and two AC voltage ports Vac1 and V ac2 By controlling the switching module, the converter can operate in single-input single-output, single-input dual-output, dual-input single-output, or dual-input dual-output modes. Compared with the traditional two-stage structure, it effectively reduces the power capacity, loss, and size cost of the DC-AC converter, and can be well applied to hybrid AC / DC microgrids.

[0030] Furthermore, the design principle of this invention is reliable, the structure is simple, and it has a very wide range of application prospects. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a topology diagram of the bidirectional four-port three-phase DC-AC converter of the present invention.

[0033] Figure 2 (a) is the schematic diagram of switch state 1.

[0034] Figure 2 (b) is the schematic diagram of switch state 2.

[0035] Figure 2 (c) is the schematic diagram of switch state 3.

[0036] Figure 2 (d) is the schematic diagram of switch state 4.

[0037] Figure 2 (e) is the schematic diagram of switch state 5.

[0038] Figure 2 (f) is the schematic diagram of switch state 6.

[0039] Figure 3 (a) is a schematic diagram comparing the upper and lower sets of triangular carrier waves with the same amplitude and frequency and symmetrical distribution.

[0040] Figure 3 (b) is a schematic diagram comparing the triangular carrier wave and the modulated wave corresponding to Vdc1>1 / 2Vdc2.

[0041] Figure 3 (c) is a schematic diagram comparing the triangular carrier wave and the modulated wave corresponding to Vdc1<1 / 2Vdc2.

[0042] Figure 4This is a schematic diagram of the triangular carrier PWM strategy for the same-frequency and same-phase operation mode of FPTPC.

[0043] Figure 5 This is a schematic diagram of the triangular carrier PWM strategy for FPTPC operating in the same frequency but out-of-phase mode.

[0044] Figure 6 The logic circuit diagram for generating the A-phase bridge arm switch drive signal in FPTPC.

[0045] Figure 7 This is a schematic diagram comparing the triangular carrier wave and the modulated wave in the FPTPC modulation strategy.

[0046] Figure 8 The output port outputs a three-phase voltage waveform for the FPTPC modulation strategy.

[0047] Figure 9 The output port outputs a three-phase current waveform for the FPTPC modulation strategy.

[0048] Figure 10 This is the output three-phase voltage waveform at the output port under the FPTPC modulation strategy.

[0049] Figure 11 The output port outputs a three-phase current waveform under the FPTPC modulation strategy.

[0050] Figure 12 This is a schematic diagram comparing the triangular carrier wave and the modulated wave in the first non-sinusoidal modulation strategy.

[0051] Figure 13 The first non-sinusoidal modulation strategy outputs a three-phase voltage waveform at the output port.

[0052] Figure 14 The first non-sinusoidal modulation strategy outputs a three-phase current waveform at the output port.

[0053] Figure 15 The output port outputs a three-phase voltage waveform under the first non-sinusoidal modulation strategy.

[0054] Figure 16 The output port outputs a three-phase current waveform under the first non-sinusoidal modulation strategy.

[0055] Figure 17 The output port outputs active and reactive waveforms for the first non-sinusoidal modulation strategy.

[0056] Figure 18 The output port outputs active and reactive waveforms under the first non-sinusoidal modulation strategy.

[0057] Figure 19 This is a schematic diagram comparing the triangular carrier wave and the modulated wave in the second non-sinusoidal modulation strategy.

[0058] Figure 20 The output port outputs a three-phase voltage waveform for the second non-sinusoidal modulation strategy.

[0059] Figure 21 The output port outputs a three-phase current waveform for the second non-sinusoidal modulation strategy.

[0060] Figure 22 The output port outputs a three-phase voltage waveform under the second non-sinusoidal modulation strategy.

[0061] Figure 23 The output port outputs a three-phase current waveform under the second non-sinusoidal modulation strategy.

[0062] Figure 24 The second non-sinusoidal modulation strategy outputs active and reactive waveforms at the output port.

[0063] Figure 25 The output port outputs active and reactive waveforms under the second non-sinusoidal modulation strategy.

[0064] Figure 26 This is a schematic diagram comparing the triangular carrier wave and the modulated wave in the third non-sinusoidal modulation strategy.

[0065] Figure 27 The third non-sinusoidal modulation strategy outputs a three-phase voltage waveform at the output port.

[0066] Figure 28 The third non-sinusoidal modulation strategy outputs a three-phase current waveform at the output port.

[0067] Figure 29 The output port outputs a three-phase voltage waveform under the third non-sinusoidal modulation strategy.

[0068] Figure 30 The output port outputs a three-phase current waveform under the third non-sinusoidal modulation strategy.

[0069] Figure 31 The third non-sinusoidal modulation strategy outputs active and reactive waveforms at the output port.

[0070] Figure 32 The output port outputs active and reactive waveforms under the third non-sinusoidal modulation strategy. Detailed Implementation

[0071] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0072] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0073] like Figure 1 As shown, the present invention provides a bidirectional four-port three-phase DC-AC converter, including a DC-DC converter, a dual-output converter, and a low-voltage DC port V. dc1 High-voltage DC port V dc2 and two AC voltage ports V ac1 V ac2 Low-voltage DC port V dc1 Connected to the energy storage battery, low-voltage DC port V dc1 A capacitor C1 is connected in parallel between the positive and negative terminals; the first terminal of both the DC-DC converter and the dual-output converter are connected to the low-voltage DC port V. dc1 The positive terminal of the DC-DC converter and the second terminal of the dual-output converter are both connected to the high-voltage DC port V. dc2 The positive terminal, the high-voltage DC port V dc2 The positive terminal is also connected to the positive terminal P of the DC bus, and the third terminal and low-voltage DC port V of the DC-DC converter. dc1 The negative terminal, the third terminal of the dual-output converter, and the high-voltage DC port V dc2 The negative terminals are all grounded, and the high-voltage DC port V dc2 The negative terminal is also connected to the negative terminal N of the DC bus, and the fourth terminal of the dual-output converter is connected to the AC voltage port V. ac1 Connected to an external three-phase load, the fifth terminal of the dual-output converter is connected to the AC voltage port V. ac2 Connected to the external power grid; the dual-output converter includes three phase arms: phase A, phase B, and phase C, each phase arm consisting of six switching modules S. x1 ~S x6 Composition, where x∈{A, B, C}.

[0074] This dual-output converter is a four-port three-phase converter (FPTPC), and it is an improvement on the dual-output T-type three-level converter topology. It provides four voltage ports, namely one low-voltage DC port V. dc1 A high-voltage DC port V dc2 and two AC voltage ports V ac1 And Vac2. The high-voltage DC port is connected to the intermediate DC bus, while the low-voltage DC port is directly connected to the energy storage battery. When AC and DC energy interacts through the low-voltage DC port, only a single-stage conversion is required. However, when energy interacts through the high-voltage DC port, it must first be boosted by a DC-DC converter before energy interaction. The output voltage amplitude and frequency of the two AC voltage ports can be flexibly adjusted. When power is transferred from DC to AC, it is defined as inverter mode; conversely, when power is transferred from AC to DC, it is defined as rectification mode. Taking inverter mode as an example, a portion of the power P... dc1 The power is transmitted directly to the AC side via FPTPC, while another portion of the power P... dc2 The power is transmitted to the AC side through two conversion stages: a boost DC-DC converter and an FPTPC.

[0075] Specifically, the DC-DC converter includes an inductor L1, an insulated-gate bipolar transistor S1, an insulated-gate bipolar transistor S2, and a capacitor C2. The first terminal of the inductor L1 is connected to the low-voltage DC port V. dc1 The positive terminal of the inductor L1 is connected to the emitter of the insulated-gate bipolar transistor S1 and the collector of the insulated-gate bipolar transistor S2. The collector of the insulated-gate bipolar transistor S1 and the first terminal of the capacitor C2 are both connected to the high-voltage DC port V. dc2 The positive terminal of the insulated gate bipolar transistor S2, the emitter of the insulated gate bipolar transistor S2, and the second terminal of the capacitor C2 are all grounded.

[0076] The A-phase bridge arm includes an insulated gate bipolar transistor S. A1 Insulated Gate Bipolar Transistor S A2 Insulated Gate Bipolar Transistor S A3 Insulated Gate Bipolar Transistor S A4 Insulated Gate Bipolar Transistor S A5 and insulated gate bipolar transistor S A6 Insulated Gate Bipolar Transistor S A1 The collector is connected to the high-voltage DC port V. dc2 The positive terminal of the insulated gate bipolar transistor S A1 The emitter is connected to the insulated gate bipolar transistor S. A2 The collector and the A-phase input terminal of the external three-phase load, the insulated gate bipolar transistor S A2The emitter is connected to the insulated gate bipolar transistor S. A4 collector and insulated gate bipolar transistor S A5 The collector of the insulated gate bipolar transistor S A4 The emitter is connected to the insulated gate bipolar transistor S. A3 The emitter of the insulated gate bipolar transistor S A3 The collector is connected to the low-voltage DC port V. dc1 The positive terminal of the insulated gate bipolar transistor S A5 The emitter is connected to the insulated gate bipolar transistor S. A6 The collector of the insulated gate bipolar transistor S A5 The emitter is connected to the inductor L a Phase A line connected to the external power grid, Insulated Gate Bipolar Transistor S A6 The emitter is grounded.

[0077] In addition, the B-phase bridge arm includes an insulated gate bipolar transistor S. B1 Insulated Gate Bipolar Transistor S B2 Insulated Gate Bipolar Transistor S B3 Insulated Gate Bipolar Transistor S B4 Insulated Gate Bipolar Transistor S B5 and insulated gate bipolar transistor S B6 Insulated Gate Bipolar Transistor S B1 The collector is connected to the high-voltage DC port V. dc2 The positive terminal of the insulated gate bipolar transistor S B1 The emitter is connected to the insulated gate bipolar transistor S. B2 The collector and the B-phase input terminal of the external three-phase load, the insulated gate bipolar transistor S B2 The emitter is connected to the insulated gate bipolar transistor S. B4 collector and insulated gate bipolar transistor S B5 The collector of the insulated gate bipolar transistor S B4 The emitter is connected to the insulated gate bipolar transistor S. B3 The emitter of the insulated gate bipolar transistor S B3 The collector is connected to the low-voltage DC port V. dc1 The positive terminal of the insulated gate bipolar transistor S B5 The emitter is connected to the insulated gate bipolar transistor S. B6 The collector of the insulated gate bipolar transistor S B5 The emitter is connected to the inductor L b The B-phase line connected to the external power grid contains an insulated gate bipolar transistor (IGBT). B6 The emitter is grounded.

[0078] Additionally, the C-phase bridge arm includes an insulated-gate bipolar transistor S. C1, Insulated Gate Bipolar Transistor S C2 , Insulated Gate Bipolar Transistor S C3 , Insulated Gate Bipolar Transistor S C4 , Insulated Gate Bipolar Transistor S C5 and Insulated Gate Bipolar Transistor S C6 ; The collector of the Insulated Gate Bipolar Transistor S C1 is connected to the positive pole of the high-voltage DC port V dc2 , the emitter of the Insulated Gate Bipolar Transistor S C1 is connected to the collector of the Insulated Gate Bipolar Transistor S C2 and the C-phase input terminal of the external three-phase load. The emitter of the Insulated Gate Bipolar Transistor S C2 is connected to the collector of the Insulated Gate Bipolar Transistor S C4 and the collector of the Insulated Gate Bipolar Transistor S C5 . The emitter of the Insulated Gate Bipolar Transistor S C4 is connected to the emitter of the Insulated Gate Bipolar Transistor S C3 . The collector of the Insulated Gate Bipolar Transistor S C3 is connected to the positive pole of the low-voltage DC port V dc1 . The emitter of the Insulated Gate Bipolar Transistor S C5 is connected to the collector of the Insulated Gate Bipolar Transistor S C6 . The emitter of the Insulated Gate Bipolar Transistor S C5 is connected to the C-phase line of the external power grid through the inductor L c . The emitter of the Insulated Gate Bipolar Transistor S C6 is grounded.

[0079] Among them, the first inverter stage is composed of three output ports of the A-phase bridge arm, B-phase bridge arm and C-phase bridge arm connected to the external three-phase load. The second inverter stage is composed of three output ports of the A-phase bridge arm, B-phase bridge arm and C-phase bridge arm connected to the external power grid. The first inverter stage is connected to the external three-phase load. The second inverter stage is connected to the external power grid through the inductor L a , inductor L b and inductor L c to complete grid connection.

[0080] As Figure 2 shown, this bidirectional four-port three-phase DC-AC converter has a total of 6 switching states. Since the voltage V dc1 of the low-voltage DC port is not a constant value, it is expressed in a general form as kU(0<k≤2) here, where k = 2V dc1 [[ID= sixty]] / V dc2 . Taking the A-phase bridge arm as an example, the six switching states of this converter are described as follows:

[0081] Operating state 1: Insulated Gate Bipolar Transistor S A1Insulated Gate Bipolar Transistor S A2 Insulated Gate Bipolar Transistor S A3 and insulated gate bipolar transistor S A5 With the DC link turned on, the current paths between the DC link and node A1 (the output port corresponding to A in the first inverter stage) and node A2 (the output port corresponding to A in the second inverter stage) are as follows: Figure 2 As shown in (a). At this time, the output phase voltage V of phase A in the first inverter stage. A1N The output phase voltage V of phase A in the second inverter stage is 2U. A2N It is 2U.

[0082] Operating State 2: Insulated Gate Bipolar Transistor S A1 Insulated Gate Bipolar Transistor S A3 Insulated Gate Bipolar Transistor S A4 and insulated gate bipolar transistor S A5 The DC link is turned on, and the current paths between node A1 and node A2 are as follows: Figure 2 As shown in (b). At this time, the output phase voltage V of phase A in the first inverter stage. A1N The output phase voltage V of phase A in the second inverter stage is 2U. A2N is kU.

[0083] Operating state 3: Insulated gate bipolar transistor S A1 Insulated Gate Bipolar Transistor S A3 Insulated Gate Bipolar Transistor S A4 and insulated gate bipolar transistor S A6 The DC link is turned on, and the current paths between node A1 and node A2 are as follows: Figure 2 As shown in (c). At this time, the output phase voltage V of phase A in the first inverter stage. A1N The output phase voltage V of phase A in the second inverter stage is 2U. A2N It is 0.

[0084] Operating state 4: Insulated gate bipolar transistor S A2 Insulated Gate Bipolar Transistor S A3 Insulated Gate Bipolar Transistor S A4 and insulated gate bipolar transistor S A5 The DC link is turned on, and the current paths between node A1 and node A2 are as follows: Figure 2 As shown in (d). At this time, the output phase voltage V of phase A in the first inverter stage. A1N For kU, the output phase voltage V of phase A in the second inverter stage A2N is kU.

[0085] Operating state 5: Insulated gate bipolar transistor S A2 Insulated Gate Bipolar Transistor S A3Insulated Gate Bipolar Transistor S A4 and insulated gate bipolar transistor S A6 The DC link is turned on, and the current paths between node A1 and node A2 are as follows: Figure 2 As shown in (e). At this time, the output phase voltage V of phase A in the first inverter stage. A1N For kU, the output phase voltage V of phase A in the second inverter stage A2N It is 0.

[0086] Operating State 6: Insulated Gate Bipolar Transistor S A2 Insulated Gate Bipolar Transistor S A4 Insulated Gate Bipolar Transistor S A5 and insulated gate bipolar transistor S A6 The DC link is turned on, and the current paths between node A1 and node A2 are as follows: Figure 2 As shown in (f). At this time, the output phase voltage V of phase A in the first inverter stage. A1N The output phase voltage V of phase A in the second inverter stage is 0. A2N It is 0.

[0087] Table 1 summarizes the working principle of the Insulated Gate Bipolar Transistor (IGBT) based on the above-mentioned switching module. A1 ~S A6 The potential of the upper and lower output terminals of phase A bridge arm relative to point N for each working state corresponding to different on and off states.

[0088] Table 1 Relationship between FPTPC switching state and output phase voltage

[0089]

[0090] The bidirectional four-port three-phase DC-AC converter includes seven operating modes, divided into four categories. The first category is the single-input single-output operating mode, which can be further divided into three modes: Mode 1-V. dc1 Enter V ac2 Output, Mode 2-V dc2 Enter V ac1 Output, Mode 3-V dc2 Enter V ac2 Output; the second type is the single-input dual-output operating mode, which is mode 4-V. dc2 Enter V ac1 and V ac2 Output; the third category is the dual-input single-output operating mode, which corresponds to two operating modes, namely Mode 5-V. dc1 and V dc2 Enter V ac1 Output, Mode 6-V dc1 and V dc2 Enter V ac2Output; the last major category is the dual-input dual-output operating mode, namely mode 7-V. dc1 and V dc2 Enter V ac1 and V ac2 Output. For single-input single-output and single-input dual-output modes, since their corresponding equivalent topologies are an equivalent three-phase voltage source inverter and a nine-switch inverter respectively, a carrier PWM modulation strategy is adopted. For dual-input single-output mode, which is a three-level converter, the modulation strategy adopts carrier stacked pulse width modulation. The following section analyzes in detail an improved carrier PWM modulation method suitable for FPTPC in dual-input dual-output operation mode.

[0091] This invention provides a triangular carrier modulation strategy based on any one of the above-described bidirectional four-port three-phase DC-AC converters, comprising:

[0092] Step 210: Obtain switch module S x1 ~S x6 The status of its operation;

[0093] Step 220: According to the switch module S x1 ~S x6 The activation status determines the output phase voltage of the corresponding output ports of the first and second inverter stages;

[0094] Step 230: Based on the low-voltage DC port V dc1 and high voltage DC port V dc2 The voltage level at that point modulates the triangular carrier wave;

[0095] Step 240: Modulate the three-phase modulated wave based on the modulated triangular carrier wave and the determined two output phase voltages, combined with the modulation constraint conditions;

[0096] Step 250: Generate the switching drive signals for each phase bridge arm based on the modulated triangular carrier and three-phase modulation.

[0097] Specifically, since the voltage at the low-voltage DC port of the FPTPC is no longer constantly half of the voltage at the high-voltage DC port, the traditional carrier-layered PWM strategy uses two sets of symmetrically distributed triangular carriers with the same amplitude and frequency to intersect with the modulation wave and generate a switching signal, such as... Figure 3 The case shown in (a) will no longer apply. Where, U c1 and U c2 There are two sets of carriers, V A This is a phase A modulated wave. The carrier stacking method needs to be studied as it varies with the low-voltage DC port level. When the FPTPC employs a carrier modulation strategy, its carrier amplitude needs to be determined based on the level V. dc1 and V dc2 Make adjustments, refer to Figure 3 (b) is Vdc1 >1 / 2V dc2 The corresponding carrier amplitude is given, and the formulas for calculating the carrier peak and valley values ​​are as follows:

[0098] .

[0099] Reference Figure 3 (c) is V dc1 <1 / 2V dc2 The corresponding carrier amplitude is given, and the formulas for calculating the carrier peak and valley values ​​are as follows:

[0100] .

[0101] With V dc1 >1 / 2V dc2 The proposed FPTPC carrier PWM strategy, derived based on the corresponding carrier conditions, requires that modulation constraints be met during modulation. These constraints are: during modulation, the output phase voltage of the bridge arm in the first inverter stage cannot be less than the output phase voltage of the bridge arm in the second inverter stage. Therefore, a DC offset is added to the two sets of sinusoidal modulation waves to expand the converter's operating range. Thus, the three-phase modulation wave of the first inverter stage is:

[0102] ;

[0103] Accordingly, the three-phase modulation wave of the second inverter stage is:

[0104] ;

[0105] Where m1 and m2 are both modulation degrees, and their linear values ​​range from 0 to 1; and For the output angular frequency, and The initial phase angle, and The values ​​for DC offset are as follows:

[0106] .

[0107] When the first and second inverter stages operate at the same frequency and in phase... = , = Let's take phase A as an example. For the first inverter stage, if the modulation wave V... mA1 Greater than carrier U C1 The first inverter stage output phase voltage V A1N For 2U; if the modulating wave V mA1 Less than carrier U C1 The first inverter stage output phase voltage VA1N The voltage is 0; otherwise, the output phase voltage V of the first inverter stage is 0. A1N For the second inverter stage, if the modulated wave V... mA2 Greater than load U C2 The output phase voltage V of the second inverter stage A2N For 2U; if the modulating wave V mA2 Less than carrier U C2 The output phase voltage V of the second inverter stage A2N The value is 0; otherwise, the output phase voltage V of the second inverter stage is 0. A2N Let kU be the output phase voltage. Similarly, the output phase voltages of phases B and C can be obtained.

[0108] In synchronous operation mode, refer to Figure 4 Modulated wave V mA1 and V mA2 The peak times are the same, and a DC offset is added to ensure that the values ​​of modulation index m1 and m2 do not affect each other:

[0109] .

[0110] When the first inverter stage and the second inverter stage operate at the same frequency but out of phase = = , ≠ The modulation wave V of the first inverter stage mA1 The modulation wave V of the second inverter stage mA2 and two carriers U C1 U C2 Reference Figure 5 The range of values ​​for m2 can be determined as follows:

[0111] .

[0112] The FPTPC carrier PWM modulation strategy determines the output phase voltage by comparing the modulating wave and the carrier. The following explains in detail how to generate the switching drive signals for each phase bridge arm based on the modulating wave and the carrier.

[0113] Let's take phase A bridge arm as an example: Figure 6 This is the logic circuit diagram for generating the A-phase bridge arm switch drive signal in FPTPC. Where S... A1 ~S A6 These represent the drive signals for the six switches in phase A bridge arm. Where || represents an OR gate operation, && represents an AND gate operation, and ! represents a NOT gate operation. The on / off logic of each switch module can be obtained as follows:

[0114] ;

[0115] ;

[0116] ;

[0117] ;

[0118] ;

[0119] ;

[0120] ;

[0121] ;

[0122]

[0123] .

[0124] To analyze the power flow of FPTPC, the current i flowing through the low-voltage DC port under the carrier PWM strategy is first derived. dc1 The expression for this is given. When the modulation ratio of the first inverter stage is greater than k / 2, the modulation waves of the first inverter stage and 2V can be obtained. dc1 / V dc2 -1. Define six regions R1 to R6. Similarly, the low-voltage DC port current i of the first inverter stage in regions R1 to R6 can be obtained. dc11 The value of low-voltage DC port current i in different regions dc11 The values ​​are shown in the table below:

[0125]

[0126] When the modulation ratio of the first inverter stage is less than k / 2, all modulated waves of the first inverter stage are greater than 2Vdc1 / Vdc2-1. Therefore, the calculation of the low-voltage DC port current idc11 of the first inverter stage no longer needs to be solved by region. The expression for the low-voltage DC port current idc11 of the first inverter stage can be obtained as follows:

[0127] .

[0128] It can be seen that the low-voltage DC port current i in both cases dc11 The average value over one cycle is less than 0, therefore, the upper DC bias reduces the output power of the low-voltage DC port. Similarly, the lower DC bias increases the output power of the low-voltage DC port. Therefore, to increase the output power of the low-voltage DC port, a lower DC bias is injected into both inverter stages simultaneously. At the same time, to satisfy the constraint that the output phase voltage of the first inverter stage arm cannot be less than the output phase voltage of the second inverter stage arm, the modulation ratio of the first inverter stage must be greater than or equal to the modulation ratio of the second inverter stage.

[0129] Three non-sinusoidal carrier PWM modulation strategies for increasing the output power of the DC low-voltage port include:

[0130] The first modulation strategy involves injecting a zero-sequence voltage of 1 / 2 (V) into the three-phase sinusoidal reference signals of the two sets of inverter stages. max +V min Therefore, the reference signal for the four-port three-phase DC-AC converter is corrected as follows:

[0131] ;

[0132] ;

[0133] The values ​​of the modulation scales m1' and m2' range from 0 to 1.15.

[0134] Then, the zero-sequence components v10 and v20 are injected into the three-phase sinusoidal reference signals of the above two sets of formulas, and their calculation is as follows:

[0135] ;

[0136] .

[0137] Similar to the sinusoidal carrier PWM of FPTPC, this scheme also adds the necessary DC component offsets Vbia1' and Vbia2', calculated as follows:

[0138] ;

[0139] .

[0140] The modulated wave signal corresponding to the proposed first non-sinusoidal modulated wave carrier PWM modulation strategy can be calculated:

[0141] ;

[0142] .

[0143] The second modulation strategy involves injecting a zero-sequence voltage -1-vmin into the three-phase sinusoidal reference signals of the two inverter stages. Therefore, the zero-sequence components in the three-phase sinusoidal reference signals of the injection formula are v10 and v20, calculated as follows:

[0144] ;

[0145] .

[0146] Since the non-sinusoidal CBPWM modulation strategy based on the second zero-sequence voltage injection directly clamps the modulation signal to the lowest end, it does not require DC bias. According to the formula, the modulation signal corresponding to the proposed second non-sinusoidal modulation wave carrier PWM modulation strategy is as follows:

[0147] ;

[0148] .

[0149] The second non-sinusoidal carrier PWM modulation strategy can maximize the output power of the low-voltage DC port, effectively reducing the number of switching operations of the FPTPC and reducing the losses of the switching devices. The first non-sinusoidal carrier PWM modulation strategy can result in better quality voltage waveforms for both outputs.

[0150] The third modulation strategy: To fully utilize the advantages of the two non-sinusoidal carrier PWM modulation strategies mentioned above, this invention proposes a third non-sinusoidal carrier PWM modulation strategy, namely, hybrid modulation. To meet the constraint that the output phase voltage of the first inverter stage bridge arm cannot be less than the output phase voltage of the second inverter stage bridge arm, the proposed hybrid modulation uses the first non-sinusoidal carrier PWM modulation strategy for the first inverter stage and the second non-sinusoidal carrier PWM modulation strategy for the second inverter stage. This combines the advantages of both strategies, resulting in one set of output voltage waveforms with better quality, and the other set maximizing the output power of the low-voltage DC port. Since both inverter stages use down-biasing, the non-sinusoidal carrier PWM modulation strategies used by the two inverter stages must be as specified above and cannot be interchanged; otherwise, severe distortion of the output waveform will occur.

[0151] To verify the feasibility of the proposed novel bidirectional four-port three-phase DC-AC converter topology and the effectiveness of its carrier modulation strategy, simulations were performed using MATLAB / Simulink.

[0152] A novel bidirectional four-port three-phase DC-AC converter with dual-input dual-output three-level simulation modulation strategy: the three-phase modulation wave U A1 U B1 U C1 The amplitude is 300V, the frequency is 50Hz, and the offset is 0; the triangular carrier U c1 U c2 Parameter design such as Figure 7 As shown, the peak value of the upcarrier is 1, and the peak value of the downcarrier is 0.2. DC input terminal V dc1 360V, V dc2The voltage is 600V. The upper AC output is connected to a three-phase resistive-inductive load with a resistance of 10Ω and an inductance of 10mH; the lower AC output is connected to a three-phase resistive-inductive load with a resistance of 10Ω and an inductance of 10mH. Figure 8 , 10 These are the three-phase voltage waveform and three-phase current waveform output from the upper output port, respectively. Figure 9 , 11 These are the three-phase voltage waveform and three-phase current waveform output from the lower output port, respectively.

[0153] The first non-sinusoidal modulation strategy is achieved by injecting a zero-sequence voltage of 1 / 2(Vmax+Vmin) into the three-phase sinusoidal reference signals of the two inverter stages. The modulation index m1 at the upper output port is 1.1, and the modulation index m2 at the lower output port is 1. The comparison between the carrier wave and the modulated wave is as follows: Figure 12 As shown. Figure 13 , 15 17 represents the three-phase voltage waveform, three-phase current waveform, and active and reactive power output from the upper output port, respectively. Figure 14 , 16 18 represents the three-phase voltage waveform, three-phase current waveform, and active and reactive power output from the lower output port, respectively.

[0154] The second modulation strategy employs zero-sequence extremum injection, achieved by injecting a zero-sequence voltage -1 - Vmin into the three-phase sinusoidal reference signals of the two inverter stages, with an offset of 0; the modulated wave operates in a state of in-phase and in-frequency operation. The modulation index m1 at the upper output port is 1.1, and the modulation index m2 at the lower output port is 1; the carrier settings are also the same as above; the DC input terminal V... dc1 360V, V dc2 The voltage is 600V. The comparison between the carrier wave and the modulated wave is as follows: Figure 15 As shown, the output three-phase voltage waveform of the upper output port is as follows: Figure 16 As shown, the output three-phase voltage waveform of the lower output port is as follows: Figure 19 As shown, Figure 20 , 22 24 represents the three-phase voltage waveform, three-phase current waveform, and active and reactive power output from the upper output port, respectively. Figure 21 , 23 25 represents the three-phase voltage waveform, three-phase current waveform, and active and reactive power output from the lower output port, respectively.

[0155] The third modulation strategy is hybrid modulation. The first inverter stage uses the first non-sinusoidal carrier PWM modulation strategy, and the second inverter stage uses the second non-sinusoidal carrier PWM modulation strategy. The modulation index m1 at the upper output port is 1.1, and the modulation index m2 at the lower output port is 1; the carrier settings are the same as above. DC input V dc1Vdc2 is 120V, and Vdc2 is 200V. The comparison between the carrier wave and the modulated wave is as follows: Figure 26 As shown, Figure 20 , 22 24 represents the three-phase voltage waveform, three-phase current waveform, and active and reactive power output from the upper output port, respectively. Figure 21 , 23 25 represents the three-phase voltage waveform, three-phase current waveform, and active and reactive power output from the lower output port, respectively.

[0156] The simulation results above demonstrate that the novel bidirectional four-port three-phase DC-AC converter and its carrier modulation strategy of this invention, along with the unique down-bias strategy of the dual-output DC-AC converter, can increase the output power of the low-voltage DC port. A sinusoidal CBPWM modulation strategy and three non-sinusoidal CBPWM modulation strategies can simultaneously increase the output power of the low-voltage DC port and the DC bus voltage utilization rate.

[0157] Although the present invention has been described in detail with reference to the accompanying drawings and preferred embodiments, the present invention is not limited thereto. Various equivalent modifications or substitutions can be made to the embodiments of the present invention by those skilled in the art without departing from the spirit and essence of the invention, and such modifications or substitutions should all be within the scope of the present invention. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should also be covered within the protection scope of the present invention.

Claims

1. A bidirectional four-port three-phase DC-AC converter, characterized in that, The DC-DC converter, the dual-output converter, a low-voltage direct-current port Vdc1, a high-voltage direct-current port Vdc2, and two alternating-current voltage ports Vac1 and Vac2 are included. The low-voltage direct-current port Vdc1 is connected to an energy storage battery, and a capacitor C1 is connected in parallel between the positive electrode and the negative electrode of the low-voltage direct-current port Vdc1. The first end of the DC-DC converter and the first end of the dual-output converter are both connected to the positive electrode of the low-voltage direct-current port Vdc1, the second end of the DC-DC converter and the second end of the dual-output converter are both connected to the positive electrode of the high-voltage direct-current port Vdc2, the positive electrode of the high-voltage direct-current port Vdc2 is also connected to the positive electrode end P of a direct-current bus, the third end of the DC-DC converter, the negative electrode of the low-voltage direct-current port Vdc1, the third end of the dual-output converter, and the negative electrode of the high-voltage direct-current port Vdc2 are all grounded, the negative electrode of the high-voltage direct-current port Vdc2 is also connected to the negative electrode end N of the direct-current bus, the fourth end of the dual-output converter is connected to an external three-phase load through the alternating-current voltage port Vac1, and the fifth end of the dual-output converter is connected to an external power grid through the alternating-current voltage port Vac2. The dual-output converter includes three-phase bridge arms, namely an A-phase bridge arm, a B-phase bridge arm, and a C-phase bridge arm, each of which is composed of six switching modules Sx1-Sx6, where x ∈ {A, B, C}. The A-phase bridge arm includes an insulated gate bipolar transistor SA1, an insulated gate bipolar transistor SA2, an insulated gate bipolar transistor SA3, an insulated gate bipolar transistor SA4, an insulated gate bipolar transistor SA5, and an insulated gate bipolar transistor SA6. The collector of the insulated gate bipolar transistor SA1 is connected to the positive electrode of the high-voltage direct-current port Vdc2, the emitter of the insulated gate bipolar transistor SA1 is connected to the collector of the insulated gate bipolar transistor SA2 and the A-phase input end of the external three-phase load, the emitter of the insulated gate bipolar transistor SA2 is connected to the collector of the insulated gate bipolar transistor SA4 and the collector of the insulated gate bipolar transistor SA5, the emitter of the insulated gate bipolar transistor SA4 is connected to the emitter of the insulated gate bipolar transistor SA3, the collector of the insulated gate bipolar transistor SA3 is connected to the positive electrode of the low-voltage direct-current port Vdc1, the emitter of the insulated gate bipolar transistor SA5 is connected to the collector of the insulated gate bipolar transistor SA6, the emitter of the insulated gate bipolar transistor SA5 is connected to the A-phase line of the external power grid through an inductor La, and the emitter of the insulated gate bipolar transistor SA6 is grounded. The B-phase bridge arm includes an insulated gate bipolar transistor SB1, an insulated gate bipolar transistor SB2, an insulated gate bipolar transistor SB3, an insulated gate bipolar transistor SB4, an insulated gate bipolar transistor SB5, and an insulated gate bipolar transistor SB6. The C-phase bridge arm includes an insulated gate bipolar transistor SC1, an insulated gate bipolar transistor SC2, an insulated gate bipolar transistor SC3, an insulated gate bipolar transistor SC4, an insulated gate bipolar transistor SC5, and an insulated gate bipolar transistor SC6. The collector of the insulated gate bipolar transistor SB1 is connected to the positive pole of the high-voltage direct-current port Vdc2, the emitter of the insulated gate bipolar transistor SB1 is connected to the collector of the insulated gate bipolar transistor SB2 and the B-phase input terminal of the external three-phase load, the emitter of the insulated gate bipolar transistor SB2 is connected to the collector of the insulated gate bipolar transistor SB4 and the collector of the insulated gate bipolar transistor SB5, the emitter of the insulated gate bipolar transistor SB4 is connected to the emitter of the insulated gate bipolar transistor SB3, the collector of the insulated gate bipolar transistor SB3 is connected to the positive pole of the low-voltage direct-current port Vdc1, the emitter of the insulated gate bipolar transistor SB5 is connected to the collector of the insulated gate bipolar transistor SB6, and the emitter of the insulated gate bipolar transistor SB5 is connected to the B-phase line of the external power grid through the inductor Lb, and the emitter of the insulated gate bipolar transistor SB6 is grounded. The C-phase bridge arm comprises an insulated gate bipolar transistor SC1, an insulated gate bipolar transistor SC2, an insulated gate bipolar transistor SC3, an insulated gate bipolar transistor SC4, an insulated gate bipolar transistor SC5 and an insulated gate bipolar transistor SC6. The collector of the insulated gate bipolar transistor SC1 is connected to the positive pole of the high-voltage direct-current port Vdc2, the emitter of the insulated gate bipolar transistor SC1 is connected to the collector of the insulated gate bipolar transistor SC2 and the C-phase input terminal of the external three-phase load, the emitter of the insulated gate bipolar transistor SC2 is connected to the collector of the insulated gate bipolar transistor SC4 and the collector of the insulated gate bipolar transistor SC5, the emitter of the insulated gate bipolar transistor SC4 is connected to the emitter of the insulated gate bipolar transistor SC3, the collector of the insulated gate bipolar transistor SC3 is connected to the positive pole of the low-voltage direct-current port Vdc1, the emitter of the insulated gate bipolar transistor SC5 is connected to the collector of the insulated gate bipolar transistor SC6, and the emitter of the insulated gate bipolar transistor SC5 is connected to the C-phase line of the external power grid through the inductor Lc, and the emitter of the insulated gate bipolar transistor SC6 is grounded.

2. A bidirectional four-port three-phase DC-AC converter according to claim 1, characterized in that, The DC-DC converter comprises an inductor L1, an insulated gate bipolar transistor S1, an insulated gate bipolar transistor S2 and a capacitor C2, the first end of the inductor L1 is connected to the positive pole of the low-voltage direct-current port Vdc1, the second end of the inductor L1 is connected to the emitter of the insulated gate bipolar transistor S1 and the collector of the insulated gate bipolar transistor S2, the collector of the insulated gate bipolar transistor S1 and the first end of the capacitor C2 are both connected to the positive pole of the high-voltage direct-current port Vdc2, and the emitter of the insulated gate bipolar transistor S2 and the second end of the capacitor C2 are both grounded.

3. The bidirectional four-port three-phase DC-AC converter of claim 1, wherein, The first inverter stage is composed of three output ports connected to the external three-phase load in the A-phase bridge arm, the B-phase bridge arm and the C-phase bridge arm, and the second inverter stage is composed of three output ports connected to the external power grid in the A-phase bridge arm, the B-phase bridge arm and the C-phase bridge arm.

4. A triangular carrier modulation strategy for a bidirectional four-port three-phase DC-AC converter according to any one of claims 1-3, characterized in that, It comprises: acquiring the turn-on state of the switching modules Sx1-Sx6; determining the output phase voltage of the corresponding output port of the first inverter stage and the second inverter stage according to the turn-on state of the switching modules Sx1-Sx6; modulating the triangular carrier according to the level at the low-voltage direct-current port Vdc1 and the high-voltage direct-current port Vdc2; According to the modulated triangular carrier and the determined two output phase voltages and in combination with modulation constraint conditions, the three-phase modulation wave is modulated; According to the modulated triangular carrier and the three-phase modulation, switch driving signals of each phase bridge arm are generated.

5. The triangular carrier modulation strategy for bidirectional four-port three-phase DC-AC converter of claim 4, wherein, The modulation constraint condition is that during modulation, the output phase voltage of the bridge arm in the first inverter stage cannot be less than the output phase voltage of the bridge arm in the second inverter stage.

6. The triangular carrier modulation strategy for bidirectional four-port three-phase DC-AC converter of claim 4, wherein, When Vdc1>1 / 2Vdc2, the three-phase modulation wave of the first inverter stage is: 。 7. The triangular carrier modulation strategy for bidirectional four-port three-phase DC-AC converter of claim 6, wherein, When Vdc1>1 / 2Vdc2, the three-phase modulation wave of the second inverter stage is: ； Wherein, m1 and m2 are both modulation factors, linearly ranging from 0 to 1; and is an output angular frequency, and is an initial phase angle, and is a DC offset.

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