A custom frequency offset compensation method and system based on CSS modulation network

Abstract

The application discloses a self-defined frequency offset compensation method and system based on a CSS modulation network. The method comprises the following steps: initialization setting, including self-defined redundancy bits, selection of a spread spectrum factor SF, a bandwidth BW and a coding rate CR; constructing a data packet and transmitting after interleaving coding, wherein the self-defined redundancy bits are inserted in the process of coding the data packet, the header Header of the data packet is set to 12 bits, the first 8 bits are used for indicating the length of the data packet, the 9th-11th bits are used for indicating the selected coding rate, and the 12th bit is a parity check bit; at a receiving end, the self-defined redundancy bits are used as a reference signal to calculate the offset of each symbol in each data packet, and then the offset of the data packet is corrected and supplemented at a symbol level. The application solves the problem of severe frequency offset of the CSS modulation network in a harsh environment, and guarantees the stability of network performance.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and more particularly to a custom frequency offset compensation method and system based on a CSS modulation network. Background Art

[0002] CSS (Chirp Spread Spectrum modulation) modulation is a wireless communication technology that transmits data based on linear frequency modulation signals. By mapping information into a frequency signal that changes linearly with time, CSS can use Up Chirp with increasing frequency or Down Chirp with decreasing frequency for data transmission. The main advantages of CSS modulation are strong anti-interference ability and long-distance communication performance. This unique technology enables the signal to propagate over a larger frequency range, ensuring stable communication effects in environments with high noise or severe multipath interference. In addition, CSS modulation has low power consumption and is particularly suitable for low-power devices that need to run for a long time. In the low-power wide area network (LPWAN) of the Internet of Things, such as LoRa and ChirpIoT TM CSS modulation has been widely used in the past decade. Its unique characteristics enable long-distance, low-power data transmission, making it suitable for scenarios such as remote sensor networks, smart cities, and agricultural monitoring. The flexibility and robustness of CSS modulation have also led to its widespread use in fields requiring high reliability and anti-interference performance, such as military communications, satellite communications, and industrial automation. However, in extremely low-temperature environments (e.g., below 0°C), frequency offset is significantly increased by the rate of temperature change, thus affecting communication quality. Therefore, designing robust frequency offset compensation algorithms has become a key research issue.

[0003] In the prior art, frequency offset estimation is typically performed based on the unique structure of the CSS modulation network. The data packet structure is divided into three main parts: the preamble, the frame start flag, and the data portion. Since the preamble consists of a Basic Up Chirp, after multiplying it with the Basic Down Chirp of the SFD, the signal will be converted into a single-frequency signal, so that the signal energy is concentrated at a single frequency. By performing an FFT (Fast Fourier Transform) on the signal, the signal can be converted from the time domain to the frequency domain. Theoretically, the result of multiplying the Basic Up Chirp and the Basic Down Chirp will result in a peak at frequency 0. By measuring the offset of this peak, the frequency offset can be estimated.

[0004] Analysis shows that the above method of estimating the overall signal frequency offset using the preamble is only applicable when the frequency offset is relatively stable. If the signal's frequency offset fluctuates significantly, the frequency offset of each chirp will no longer be consistent, making the method of relying solely on the preamble for frequency offset estimation ineffective. In this case, a more complex algorithm is required to handle the frequency offset estimation. Summary of the Invention

[0005] The object of the present invention is to overcome the above-mentioned defects of the prior art and provide a method and system for user-defined frequency offset compensation based on a CSS modulation network.

[0006] According to a first aspect of the present invention, a method for customizing frequency offset compensation based on a CSS modulation network is provided. The method comprises the following steps:

[0007] Initialization settings, including customizing redundant bits, selecting spreading factor SF, bandwidth BW, and coding rate CR;

[0008] Constructing a data packet and transmitting it after interleaving encoding, wherein the custom redundant bit is inserted in the process of encoding the data packet, and the header of the data packet is set to 12 bits, the first to the eighth bits are used to indicate the length of the data packet, the ninth to the eleventh bits are used to indicate the selected coding rate, and the twelfth bit is a parity check bit;

[0009] At the receiving end, the custom redundant bits are used as reference signals to calculate the offset of each symbol in each data packet, and then the offset of the data packet is corrected and supplemented at the symbol level.

[0010] According to a second aspect of the present invention, a custom frequency offset compensation system based on a CSS modulation network is provided. The system includes a transmitting end and a receiving end, wherein:

[0011] The transmitter performs: initialization settings, including customizing redundant bits, selecting the spreading factor SF, bandwidth BW, and coding rate CR;

[0012] Constructing a data packet and transmitting it after interleaving encoding, wherein the custom redundant bit is inserted in the process of encoding the data packet, and the header of the data packet is set to 12 bits, the first to the eighth bits are used to indicate the length of the data packet, the ninth to the eleventh bits are used to indicate the selected coding rate, and the twelfth bit is a parity check bit;

[0013] Execution at the receiving end: using the custom redundant bit as a reference signal, calculating the offset of each symbol in each data packet, and then performing symbol-level correction and supplement on the offset of the data packet.

[0014] Compared with the existing technology, the advantage of the present invention is that, to address the problem of unstable and excessive frequency offset in CSS modulation networks under extreme environments, the present invention designs a frequency offset compensation method based on CSS modulation networks. This method can accurately calculate the frequency offset of each chirp, ensuring that nodes can correctly decode even in extreme environments, thereby ensuring the stability of network performance.

[0015] Further features and advantages of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0017] Figure 1 is a schematic diagram of a frame structure based on a CSS modulation network according to an embodiment of the present invention;

[0018] Figure 2 2 is a schematic diagram of the structure of a header packet of a custom frequency offset compensation method according to an embodiment of the present invention;

[0019] Figure 3 is a process diagram of a custom frequency offset compensation method according to an embodiment of the present invention;

[0020] Figure 4 is a flow chart of a custom frequency offset compensation method based on a CSS modulation network according to an embodiment of the present invention;

[0021] Figure 5 The figure is a schematic diagram of the overall process of a custom frequency offset compensation method based on a CSS modulation network according to an embodiment of the present invention. DETAILED DESCRIPTION

[0022] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention.

[0023] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0024] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0025] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0026] It should be noted that like reference numerals and letters refer to like items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0027] In the following, the frame structure of the existing CSS modulation network, the frame structure of the custom frequency offset compensation solution designed by the present invention, and the application process of the present invention will be introduced respectively.

[0028] 1. Frame Structure Based on CSS Modulation Network

[0029] First, we introduce the unique frame structure of the CSS modulation network, such as Figure 1 As shown in the figure, the data packet structure is divided into three main parts: preamble, start frame delimiter (SFD), and data. The preamble consists of 6 to 65535 Basic Up Chirs and two chirps identifying the network ID. This is followed by 2.25 Basic Down Chirs, which serve as the start frame delimiter (SFD) and mark the beginning of the data portion. The data portion includes the header, payload, and CRC checksum. The header consists of the first 8 chirps, occupying 20 bits, which are used to represent the following information: payload length (8 bits), data coding rate (CR) (3 bits), CRC checksum flag (1 bit), and CRC checksum of the header field (8 bits). The remaining chirps constitute the payload portion, and the last 2 bytes are the CRC checksum, which is used to verify the integrity of the entire data packet.

[0030] To enhance the stability of data packets, the CSS modulation network introduces a low data rate optimization mode (LDR), which adds 2 bits of redundancy after the valid data bit so that the receiver can track the signal more accurately, thereby reducing the bit error rate. However, through a large number of experiments in extreme environments (below 0 degrees Celsius), it was found that the offset of a symbol can reach more than 8, and the 2-bit redundancy can only correct a maximum of 4 (2 2 Therefore, in order to better cope with frequency offsets in different environments, the present invention proposes an adaptive frequency offset compensation method based on a CSS modulation network.

[0031] Secondly, the frame structure of the self-defined frequency offset compensation scheme is designed.

[0032] In the self-defined mode, the Header structure of the CSS modulation network is redesigned, as shown in Figure 2 The original 20 bits are reduced to 12 bits, and the 8-bit CRC check is removed. In the designed 12-bit packet structure, the first 8 bits are the packet length (0-255), the 9-11 bits are the CR (coding rate), which can be selected as 4 / 5, 4 / 6, 4 / 7, 4 / 8, and the 12th bit is the parity check bit. For the new packet header design, in the subsequent encoding process, a redundant bit x is introduced and a 4 / 8 coding rate is used, which is sufficient to ensure the correctness of the data packet, so only a simple parity check is needed for data error detection. The redundant bit x satisfies the following formula:

[0033]

[0034] Where SF represents the spreading factor. According to formula (1), the corresponding relationship between the spreading factor and the redundant bit x can be calculated, as shown in Table 1.

[0035] In another embodiment, the corresponding relationship between the commonly used spreading factor SF and the redundant bit x can also be pre-stored to improve the calculation efficiency.

[0036] For example, in the case of a spreading factor (SF) of 7, the redundant bit x can be set to the maximum value 4, so that up to 16 (2 4 ) frequency offsets can be protected, so that this design is sufficient to cope with frequency offset in harsh environments and ensures the reliability of data transmission.

[0037] Table 1: Corresponding relationship between spreading factor and self-defined redundant bit

[0038] SF Customized maximum value of redundant bits (bit) Protection offset bit 7 4 15 8 5 31 9 6 63 10 7 127 11 8 255 1 2 9 511

[0039] Specifically, the packet length N pkl can be obtained by the following formula (2):

[0040]

[0041] Where PL is the number of bytes of the data packet; IH is the packet header flag bit, 0 indicates that the packet header mode is not enabled, and 1 indicates that the packet header mode is enabled; CR is the coding rate, which can be selected as 4 / 5, 4 / 6, 4 / 7 or 4 / 8; SF is the spreading factor; and x is the redundant bit set in the self-defined mode.

[0042] It is worth noting that since the first 8 symbols use a fixed coding rate of 4 / 8, the minimum packet length is 8. Under this design, subsequent data packets except the header part use a customized CR coding rate. To further ensure the accuracy of the data packets, the CRC mode can be turned on by default, that is, the parity check method is used.

[0043] 3. Customized Frequency Offset Compensation Scheme of the Present Invention

[0044] Figure 3 This is a schematic diagram of the overall custom frequency offset compensation algorithm. The first 8 symbols of this structure form a fixed part, namely the first interleaved block. The length of the subsequent interleaved blocks is determined by the selected coding rate (CR). This design allows each symbol to protect a maximum of 2 x -1 bit offset helps ensure data accuracy in the early stages of data packet transmission, thereby effectively reducing the error rate and improving transmission reliability.

[0045] In summary, the present invention addresses the severe frequency offset that can occur in CSS modulation networks in harsh environments (below zero degrees Celsius). In such situations, the traditional method of correcting frequency offset by multiplying the preamble and the Basic Up Chirp and Basic Down Chirp in the SFD is ineffective. To address this issue, the present invention adds a custom x-bit redundancy to compensate for and correct frequency offset in harsh environments, thereby ensuring communication accuracy and network performance in CSS modulation networks.

[0046] Specifically, combined Figure 4 and Figure 5 As shown, for actual scenarios, the adaptive frequency offset compensation method based on the CSS modulation network provided by the present invention includes:

[0047] Step S1: The transmitting end performs initialization settings, including defining x redundant bits, selecting a spreading factor and a coding rate.

[0048] First, the CSS modulation network is initialized, including customizing x-bit redundancy, selecting parameters such as the spreading factor (SF), bandwidth (BW), coding rate (CR), and transmit power. Since the header structure is fixed at 12 bits, when the spreading factor is 7, the maximum value of x is 4, which must satisfy the conditions of formula (1). When the spreading factor ranges from 7 to 12, the maximum value of x varies depending on the spreading factor, ranging from 4 to 9.

[0049] In step S2, the sending end constructs a data packet and inserts x redundant bits during the encoding process, and then transmits it to the receiving end.

[0050] When constructing the header, the packet length is first calculated using formula (2) and entered into the first 8 bits of the header. Next, based on the selected coding rate, this value is entered into bits 9-11 of the header. Finally, a parity check is performed on the first 11 bits of data, and the result is entered into bit 12, completing the complete header structure. This design ensures the integrity and accuracy of the packet.

[0051] Furthermore, the transmitter performs interleaving encoding and other processes on the constructed data packet before transmitting it to the receiver. The present invention does not elaborate on the specific signal transmission process. During the interleaving process, the size of each interleaving block is 4 / CR*(SF), of which 4 / CR*x bits are redundant bits added to compensate for severe frequency offsets, which are usually set to 0. Therefore, in a standard data packet, it can be seen that x bits of valid data in each symbol are 0 (i.e., by setting x bits of redundant bits to 0 as a reference signal), which can be used as a reference signal.

[0052] In step S3, the receiving end calculates the offset of each symbol and performs frequency offset compensation based on the value of the x redundant bits of each symbol in the received signal.

[0053] At the receiving end, by comparing the actual received data packet signal with the reference signal, the offset of each symbol in each packet can be accurately calculated, allowing symbol-level offset correction to be applied. For example, if the last x bits of a symbol in the received signal are 7, this means that the symbol differs by 7 units from the known reference signal. This 7-unit difference is the frequency offset of the symbol. Therefore, to ensure signal accuracy, a 7-bit offset compensation is required for the received signal.

[0054] Accordingly, the present invention also provides a custom frequency offset compensation system based on a CSS modulation network, for implementing one or more aspects of the above-mentioned method. For example, the system includes a transmitting end and a receiving end, wherein: the transmitting end performs: initialization settings, including custom redundant bits, selection of a spreading factor (SF), bandwidth (BW), and coding rate (CR); constructs a data packet and transmits it after interleaving coding, wherein the custom redundant bits are inserted during the encoding of the data packet, and the header of the data packet is set to 12 bits, with bits 1-8 indicating the length of the data packet, bits 9-11 indicating the selected coding rate, and bit 12 being a parity bit; and the receiving end performs: using the custom redundant bits as a reference signal, calculating the offset of each symbol in each data packet, and then performing symbol-level correction and supplementation on the data packet offset.

[0055] In summary, the present invention designs a unique adaptive frequency offset compensation method by adding custom x-bit redundancy. By adding redundant bits in harsh environments, the reliability of the CSS modulation network and the accuracy of data transmission are significantly improved, ensuring stable communication in various environments.

[0056] The present invention may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present invention.

[0057] Computer-readable storage medium can be a tangible device that can keep and store the instructions used by the instruction execution device.Computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device or any suitable combination thereof.More specific examples (non-exhaustive list) of computer-readable storage medium include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, for example, a punch card or a convex structure in a groove having instructions stored thereon, and any suitable combination thereof.Computer-readable storage medium used herein is not interpreted as a transient signal itself, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagated by waveguides or other transmission media (for example, light pulses by fiber optic cables), or electrical signals transmitted by wires.

[0058] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to be stored in the computer-readable storage medium in each computing / processing device.

[0059] The computer program instructions for performing the operation of the present invention can be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, Python, and conventional procedural programming languages ​​such as "C" language or similar programming languages. The computer readable program instructions can be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), is personalized by utilizing the state information of the computer readable program instructions, and the electronic circuit can execute the computer readable program instructions, thereby realizing various aspects of the present invention.

[0060] Various aspects of the present invention are described herein with reference to flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present invention. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0061] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device is generated that implements the functions / actions specified in one or more blocks in the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, where these instructions cause the computer, programmable data processing device, and / or other device to operate in a specific manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0062] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0063] The flowcharts and block diagrams in the accompanying drawings show the possible implementation architecture, functions and operations of the systems, methods and computer program products according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, program segment or part of an instruction, and the module, program segment or part of the instruction contains one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system that performs the specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions. It is well known to those skilled in the art that implementation by hardware, implementation by software, and implementation by a combination of software and hardware are all equivalent.

[0064] While various embodiments of the present invention have been described above, the foregoing description is intended to be illustrative, non-exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or technological improvements in the marketplace, or to enable others skilled in the art to understand the embodiments disclosed herein. The scope of the present invention is defined by the appended claims.

Claims

1. A custom frequency offset compensation method based on a CSS modulation network, comprising the following steps: Initialization settings, including customizing redundant bits, selecting spreading factor SF, bandwidth BW, and coding rate CR; Constructing a data packet and transmitting it after interleaving encoding, wherein the custom redundant bit is inserted in the process of encoding the data packet, and the header of the data packet is set to 12 bits, the first to the eighth bits are used to indicate the length of the data packet, the ninth to the eleventh bits are used to indicate the selected coding rate, and the twelfth bit is a parity check bit; At the receiving end, the custom redundant bits are used as reference signals to calculate the offset of each symbol in each data packet, and then the offset of the data packet is corrected and supplemented at the symbol level; The custom redundant bits satisfy the following formula: in, SF represents the spreading factor, x Indicates custom redundant bits; The length of the constructed data packet is calculated according to the following formula: , and round up: in, PL is the number of bytes in the data packet; IH The packet header flag bit, 0 means the packet header mode is not enabled, 1 means the packet header mode is enabled; CR is the coding rate; x It is a custom redundant bit.

2. The method according to claim 1, characterized in that The coding rate CR The value can be 4 / 5, 4 / 6, 4 / 7 or 4 / 8.

3. The method according to claim 1, characterized in that The custom redundant bit x The maximum value varies according to the spreading factor and ranges from 4 to 9.

4. The method according to claim 1, wherein The CSS modulation network is a low-power wide-area network for the Internet of Things.

5. The method according to claim 4, characterized in that The low-power wide area network includes the LoRa network and the ChirpIoT™ network.

6. The method according to claim 1, characterized in that For the constructed data packet, the first 8 symbols are fixedly coded at a rate of 4 / 8.

7. A custom frequency offset compensation system based on a CSS modulation network, comprising a transmitting end and a receiving end, wherein: The transmitter performs: initialization settings, including customizing redundant bits, selecting the spreading factor SF, bandwidth BW, and coding rate CR; Constructing a data packet and transmitting it after interleaving encoding, wherein the custom redundant bit is inserted in the process of encoding the data packet, and the header of the data packet is set to 12 bits, the first to the eighth bits are used to indicate the length of the data packet, the ninth to the eleventh bits are used to indicate the selected coding rate, and the twelfth bit is a parity check bit; At the receiving end, the following steps are executed: using the custom redundant bit as a reference signal, calculating the offset of each symbol in each data packet, and then performing symbol-level correction and supplementation on the offset of the data packet; The custom redundant bits satisfy the following formula: in, SF represents the spreading factor, x Indicates custom redundant bits; The length of the constructed data packet is calculated according to the following formula: , and round up: in, PL is the number of bytes in the data packet; IH The packet header flag bit, 0 means the packet header mode is not enabled, 1 means the packet header mode is enabled; CR is the coding rate; x It is a custom redundant bit.

8. A computer-readable storage medium having a computer program stored thereon, wherein: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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