Frequency modulation method, electronic equipment, chip system and readable storage medium

Abstract

The invention provides a frequency modulation method, electronic equipment, a chip system and a readable storage medium. According to the method, the frequency range of the CPU for executing the next frame drawing task of the current frame drawing task by the CPU cluster can be determined, and compared with a related technology in which the frequency of the CPU of the CPU cluster is adjusted in a fixed frequency range, the method can adjust the fixed frequency range, so that the frequency range of the CPU of the current frame drawing task can be adjusted. And adjusting the CPU frequency of the CPU cluster within the adjusted frequency range of the CPU by the electronic equipment, so that in some scenes, the frequency of the CPU can be greater than or equal to a specific value within the fixed frequency range of the CPU, the performance requirement of the electronic equipment is met, the electronic equipment displays a smooth picture, and in other scenes, the performance of the electronic equipment is not influenced. According to the technical scheme, the frequency of the CPU can be smaller than the minimum value in the fixed frequency range of the CPU, the performance requirement of the electronic equipment is met, meanwhile, the power consumption of the electronic equipment is reduced, and the power consumption and the performance of the electronic equipment are balanced.

Description

Technical Field

[0001] The present application relates to the field of terminals, and in particular to a frequency modulation method, an electronic device, a chip system and a readable storage medium. Background Art

[0002] At present, when electronic devices are running, they often experience problems such as freezing and frame drops due to insufficient performance, affecting the user experience. Alternatively, they often experience problems such as over-performance of electronic devices, which causes high power consumption and reduced battery life. In other words, the electronic devices cannot balance power consumption and performance. Summary of the invention

[0003] The present application provides a frequency modulation method, an electronic device, a chip system and a readable storage medium, which can balance the power consumption and performance of the electronic device and improve the user experience.

[0004] In a first aspect, a frequency modulation method is provided. The method is applied to an electronic device, the electronic device includes a core layer, and the method includes:

[0005] When the electronic device displays the Nth frame image (the Nth frame image can be understood as the current frame image), the kernel layer determines at least one drawing frame duration (the drawing frame duration can be understood as the execution duration of the drawing frame task executed when the electronic device displays a frame image, and at least one drawing frame duration can be understood as the drawing frame duration of the drawing frame task corresponding to the current frame image and the first few frames of the current frame), a first type of CPU load (the first type of CPU load can be understood as the CPU load of the CPU cluster) and a second type of CPU load (the second type of CPU load can be understood as the CPU load of the target thread), a drawing frame duration is used to indicate the execution duration of a drawing frame task, a drawing frame task is used to display a frame image, at least one drawing frame duration includes the drawing frame duration of the Mth drawing frame task to the drawing frame duration of the Nth drawing frame task, the Nth drawing frame task is used to display the Nth frame image, M and N are integers greater than 1, M is less than N, the first type of CPU load includes the CPU load of at least one CPU cluster, and the second type of CPU load includes at least one target thread. The CPU load of the thread, at least one target thread includes a thread with a wake-up relationship and / or a thread corresponding to the maximum load among the CPU loads of multiple threads within each drawing frame duration; the kernel layer determines the first CPU load and the second CPU load of the N+1th drawing frame duration (the N+1th drawing frame duration can be understood as the execution duration of the drawing frame task executed when the electronic device displays the next frame image of the current frame) based on the first CPU load and the second CPU load within at least one drawing frame duration, and the N+1th drawing frame duration is used to indicate the drawing frame duration of the N+1th drawing frame task when the electronic device displays the N+1th frame image; the kernel layer determines the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task based on the first CPU load and the second CPU load within the N+1th drawing frame duration; the kernel layer adjusts the CPU frequency of each CPU cluster executing the N+1th drawing frame task based on the frequency range of the CPU of each CPU cluster to display the N+1th frame image (the next frame image of the current frame).

[0006] In the related art, electronic devices adjust the frequency of the CPU within a fixed frequency range, and are unable to adjust the CPU frequency to a specific value within the fixed frequency range, which results in insufficient performance and causes problems such as lag and frame drops in the operation of the electronic device, or the CPU frequency cannot be adjusted to a value less than the minimum value within the frequency range, which results in over-performance and causes the electronic device to heat up due to high power consumption, reduced battery life and other problems. That is, the related art cannot balance the performance and power consumption of electronic devices.

[0007] In the embodiment of the present application, the kernel layer can determine the frequency range of the CPU of each CPU cluster executing the next frame drawing task of the current frame drawing task to display the next frame image on the screen of the electronic device (i.e., determine the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task). Compared with the related technology that the electronic device adjusts the CPU frequency within a fixed frequency range, the present application can adjust the fixed frequency range to obtain the frequency range of the CPU of each CPU cluster executing the next frame drawing task of the current frame drawing task. The kernel layer adjusts the CPU frequency of each CPU cluster executing the N+1th frame drawing task within the adjusted CPU frequency range (i.e., the kernel layer adjusts the CPU frequency of each CPU cluster executing the N+1th frame drawing task based on the frequency range of the CPU of each CPU cluster). The CPU frequency can be adjusted to a specific value within the fixed CPU frequency range, meeting the performance requirements of the electronic device while allowing the electronic device to display a smooth picture. The CPU frequency can also be made less than the minimum value within the fixed CPU frequency range, meeting the performance requirements of the electronic device while reducing the power consumption of the electronic device, improving the endurance of the electronic device, balancing the power consumption and performance of the electronic device, and improving the user experience.

[0008] Moreover, the kernel layer determines the CPU load of at least one CPU cluster and the CPU load of at least one target thread corresponding to the next drawing frame task of the current drawing frame task based on the CPU load of at least one CPU cluster and the CPU load of at least one target thread corresponding to the historical drawing frame task (i.e., the first CPU load and the second CPU load within at least one drawing frame duration, and the first CPU load and the second CPU load within the N+1 drawing frame duration are determined), and determines the frequency range of the CPU for each CPU cluster to execute the N+1 drawing frame task based on the first CPU load and the second CPU load within the N+1 drawing frame duration. Since the CPU load of at least one CPU cluster can reflect the resource utilization of the entire electronic device, the CPU load of at least one target thread can reflect the resource utilization of certain threads in the electronic device, therefore, based on the CPU loads in the above two dimensions, the accuracy of the determined CPU frequency range for each CPU cluster to execute the N+1 drawing frame task can be improved.

[0009] In combination with the first aspect, in some implementations of the first aspect, the kernel layer determines the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration, including:

[0010] The kernel layer determines the minimum value of the frequency range of the CPU that performs the N+1th drawing frame task in each CPU cluster based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration; the kernel layer determines the frequency range of the CPU that performs the N+1th drawing frame task in each CPU cluster based on the minimum value of the frequency range of the CPU that performs the N+1th drawing frame task in each CPU cluster.

[0011] In the embodiment of the present application, the kernel layer can determine the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task based on the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task. In this way, the kernel layer does not need to determine the frequency range of the CPU after determining the minimum value of the frequency range of the CPU, which can reduce the amount of calculation when the electronic device determines the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task.

[0012] In combination with the first aspect, in some implementations of the first aspect, the kernel layer determines the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration, including:

[0013] The kernel layer determines the minimum value of each candidate frequency range corresponding to the CPU load of each CPU cluster within the N+1th drawing frame duration based on the corresponding relationship between the CPU load of each CPU cluster and each CPU cluster within the N+1th drawing frame duration, and each corresponding relationship is a corresponding relationship between the CPU load of each CPU cluster and the minimum value of the CPU frequency range; the kernel layer determines the minimum value of each alternative frequency range corresponding to the second type of CPU load within the N+1th drawing frame duration based on the corresponding relationship between the second type of CPU load and each CPU cluster within the N+1th drawing frame duration; the kernel layer determines the minimum value of the frequency range of the CPU for each CPU cluster to execute the N+1th drawing frame task based on the minimum value of each candidate frequency range and the minimum value of each alternative frequency range.

[0014] In the embodiment of the present application, since the CPU load of the CPU cluster can reflect the resource utilization of the entire electronic device, therefore, based on the corresponding relationship between the CPU load of each CPU cluster and each CPU cluster within the N+1th drawing frame duration, when determining the minimum value of each candidate frequency range corresponding to the CPU load of each CPU cluster within the N+1th drawing frame duration, the granularity is coarser, and the CPU load of at least one target thread included in the second type of CPU load can reflect the resource utilization of certain threads in the electronic device. Based on the corresponding relationship between the second type of CPU load and each CPU cluster within the N+1 drawing frame duration, the minimum value of each candidate frequency range corresponding to the second type of CPU load within the N+1th drawing frame duration is determined, and the granularity is finer. Finally, by comprehensively considering the minimum value of each candidate frequency range obtained based on the coarser granularity and the minimum value of each candidate frequency range obtained based on the finer granularity, the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task can be accurately determined.

[0015] In combination with the first aspect, in some implementations of the first aspect, the at least one CPU cluster includes a first CPU cluster, a second CPU cluster, and a third CPU cluster.

[0016] In combination with the first aspect, in some implementations of the first aspect, after the kernel layer determines the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task based on the minimum value of each candidate frequency range and the minimum value of each alternative frequency range, the method further includes:

[0017] The kernel layer determines the adjustment amplitude of the minimum value of the frequency range of the CPU of each CPU cluster according to the frame duration of the N+1th frame drawing task and the standard frame duration. The standard frame duration is determined by the screen frame rate of the electronic device. The kernel layer adjusts the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task based on the adjustment amplitude.

[0018] It should be understood that the higher the frequency of the electronic device's CPU, the lower the frame drawing time of the electronic device to perform the frame drawing task, and the lower the frequency of the electronic device's CPU, the higher the frame drawing time of the electronic device to perform the frame drawing task. It should also be understood that when the frame drawing time of the frame drawing task of the Nth frame executed by the electronic device is equal to the standard frame drawing time, the interface is smooth when the electronic device displays the N+1th frame image, and no heat is generated. When the frame drawing time of the frame drawing task of the N+1th frame executed by the electronic device is greater than the standard frame drawing time, the performance of the electronic device is insufficient and the interface freezes. Therefore, in an embodiment of the present application, after determining the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task based on the minimum value of each candidate frequency range and the minimum value of each alternative frequency range at the kernel layer, the adjustment amplitude of the minimum value of the frequency range of the CPU of each CPU cluster is determined according to the frame drawing time of the N+1th frame drawing task and the standard frame drawing time; based on the adjustment amplitude, the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task is adjusted, which can increase or guarantee the performance of the electronic device, so that the interface of the electronic device is smooth when displaying the N+1th frame image, and no heat is generated.

[0019] In combination with the first aspect, in certain implementations of the first aspect, the frame drawing duration of the N+1th frame drawing task is determined by the difference between the end time of the queue buffer function in the N+1th frame drawing task and the end time of the queue buffer function in the Nth frame drawing task.

[0020] In combination with the first aspect, in some implementations of the first aspect, the kernel layer determines the first type of CPU load and the second type of CPU load within at least one drawing frame duration, including:

[0021] The kernel layer determines the first type of CPU load for each drawing frame duration within at least one drawing frame duration according to the number of CPU cycles completed by at least one CPU cluster corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task; the kernel layer determines the second type of CPU load for each drawing frame duration within at least one drawing frame duration according to the number of CPU cycles completed by at least one target thread corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task.

[0022] In the embodiment of the present application, the kernel layer can accurately determine the first type of CPU load of each drawing frame duration within at least one drawing frame duration based on the number of CPU cycles completed by at least one CPU cluster corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task; and can accurately determine the second type of CPU load of each drawing frame duration within at least one drawing frame duration based on the number of CPU cycles completed by at least one target thread corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task.

[0023] In combination with the first aspect, in some implementations of the first aspect, at least one drawing frame duration includes a drawing frame duration of an i-th drawing frame task, where i is an integer greater than or equal to M and less than or equal to N; and the kernel layer determines the first type of CPU load of each drawing frame duration within the at least one drawing frame duration according to the number of CPU cycles completed by at least one CPU cluster corresponding to each end time of the N-th drawing frame task to the M-1-th drawing frame task, including:

[0024] The kernel layer determines the first type of CPU load within the i-th drawing frame duration based on the difference between the number of CPU cycles completed by at least one CPU cluster corresponding to the end time of the i-th drawing frame task and the number of CPU cycles completed by at least one CPU cluster corresponding to the end time of the i-1-th drawing frame task; and the kernel layer determines the second type of CPU load for each drawing frame duration within at least one drawing frame duration according to the number of CPU cycles completed by at least one target thread corresponding to each end time of the N-th drawing frame task to the M-1-th drawing frame task, including: the kernel layer determines the second type of CPU load within the i-th drawing frame duration based on the difference between the number of CPU cycles completed by at least one target thread corresponding to the end time of the i-th drawing frame task and the number of CPU cycles completed by at least one target thread corresponding to the end time of the i-1-th drawing frame task.

[0025] In combination with the first aspect, in some implementations of the first aspect, each end time is an end time of the queue buffer function in each of the Nth frame drawing task to the M-1th frame drawing task.

[0026] In the related art, it is difficult for the kernel layer to determine the end time of a frame drawing task, resulting in inaccurate end time of the determined frame drawing task. In the embodiment of the present application, each end time can be set as the end time of the queue buffer function in each frame drawing task from the Nth frame drawing task to the M-1th frame drawing task, which can improve the accuracy of the determined end time of the frame drawing task.

[0027] In combination with the first aspect, in some implementations of the first aspect, the kernel layer determines the first type of CPU load and the second type of CPU load for the N+1th drawing frame duration based on the first type of CPU load and the second type of CPU load within at least one drawing frame duration, including:

[0028] The kernel layer determines the first type of CPU load for the N+1th drawing frame duration based on the CPU load of each CPU in at least one CPU cluster within at least one drawing frame duration, the CPU load of each CPU within the Nth frame drawing frame duration, and the CPU load of each CPU within the Mth frame drawing frame duration; the kernel layer determines the second type of CPU load for the N+1th drawing frame duration based on the CPU load of each target thread in at least one target thread within at least one drawing frame duration, the CPU load of each target thread within the Nth frame drawing frame duration, and the CPU load of each target thread within the Mth frame drawing duration.

[0029] In the embodiment of the present application, since the CPU load of each CPU in at least one CPU cluster within at least one drawing frame duration and the CPU load of each target thread in at least one target thread within at least one drawing frame duration can represent the busyness of the CPU, the CPU load of each CPU within the Nth frame drawing duration and the CPU load of each CPU within the Mth frame drawing duration and the CPU load of each target thread within the Nth frame drawing duration and the CPU load of each target thread within the Mth frame drawing duration can represent the increase or decrease trend of the CPU load, based on the busyness of the CPU and the increase or decrease trend of the CPU load, the accuracy of determining the first type of CPU load for the N+1th drawing frame duration and the second type of CPU load for the N+1th drawing frame duration can be improved.

[0030] In a second aspect, an electronic device is provided, and the electronic device is used to execute the method provided in the first aspect. Specifically, the electronic device may include a processing unit for executing any possible implementation manner of the first aspect.

[0031] In a third aspect, an electronic device is provided, comprising: one or more processors; one or more memories; the one or more memories storing one or more computer programs, the one or more computer programs comprising instructions, which, when executed by the one or more processors, enable the electronic device to execute a method in any possible implementation of the first aspect.

[0032] In a fourth aspect, a computer-readable storage medium is provided, comprising computer instructions. When the computer instructions are executed on an electronic device, the electronic device executes the method described in the first aspect.

[0033] In a fifth aspect, a chip is provided, comprising a memory for storing instructions; and a processor for calling and executing instructions from the memory, so that an electronic device equipped with the chip executes the method described in the first aspect above. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a structural diagram of an electronic device 100 provided in an embodiment of the present application.

[0035] Figure 2 Schematic diagram of the software system of the electronic device 100 according to an embodiment of the present application.

[0036] Figure 3 An example graph is provided for a fixed frequency range.

[0037] Figure 4 This is an example diagram of an adjusted frequency range provided in an embodiment of the present application.

[0038] Figure 5 It is a schematic diagram of a sliding scenario provided in an embodiment of the present application.

[0039] Figure 6 This is a timing diagram of a frequency modulation method provided in an embodiment of the present application.

[0040] Figure 7 This is an example diagram of the frame drawing duration of a frame drawing task provided in an embodiment of the present application.

[0041] Figure 8 This is an example diagram of the CPU load of the CPU cluster determined in the embodiment of the present application.

[0042] Fig. 9 This is an example diagram of a target thread provided in an embodiment of the present application.

[0043] Fig.10 This is an example diagram for determining the minimum value within a frequency range provided in an embodiment of the present application.

[0044] Fig.11 It is a schematic flow chart of a frequency modulation method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0045] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. In the description of the embodiments of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, "plurality" or "multiple" refers to two or more than two.

[0046] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this embodiment, unless otherwise specified, "plurality" means two or more.

[0047] The frequency modulation method provided in the embodiment of the present application is applied to electronic devices. The electronic device may also be referred to as a terminal, a user equipment (UE), a mobile station (MS), a mobile terminal (MT), etc. The electronic device may be an electronic device (mobile phone), a smart TV, a wearable device, a tablet computer (Pad), a computer with wireless transceiver function, a virtual reality (VR) electronic device, an augmented reality (AR) electronic device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart city, a wireless terminal in smart home, etc. The embodiment of the present application does not limit the specific technology and specific device form adopted by the electronic device.

[0048] Figure 11 is a schematic diagram of the structure of an electronic device 100 (taking a mobile phone as an example) provided in an embodiment of the present application. The electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, an antenna 1, an antenna 2, a mobile communication module 140, a wireless communication module 150, an audio module 160, a sensor module 170, a camera 181, a display screen 182, etc. The sensor module 170 may include a pressure sensor 170A, a gyroscope sensor 170B, etc.

[0049] It is to be understood that the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0050] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0051] The controller may be the nerve center and command center of the electronic device 100. The controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.

[0052] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0053] In some embodiments, the processor 110 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0054] The processor 110 can calculate the CPU load and the target thread load in the historical frame drawing task, predict the CPU load and the target thread load in the next frame drawing task based on the CPU load and the target thread load in the historical frame drawing task, determine the minimum value in the frequency range of the CPU in the next frame drawing task and the frequency range of the CPU in the next frame drawing task based on the CPU load and the target thread load in the next frame drawing task, and adjust the frequency of the CPU based on the frequency range of the CPU in the next frame drawing task.

[0055] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 140, the wireless communication module 150, the modem processor and the baseband processor.

[0056] The electronic device 100 implements the display function through a GPU, a display screen 182, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 182 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

[0057] The display screen 182 is used to display images, videos, etc. The display screen 182 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light emitting diode or an active-matrix organic light emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include 1 or N display screens 182, where N is a positive integer greater than 1.

[0058] The electronic device 100 can realize the shooting function through ISP, camera 181, video codec, GPU, display screen 182 and application processor.

[0059] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100 .

[0060] The internal memory 121 may be used to store computer executable program codes, wherein the executable program codes include instructions. The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121 .

[0061] The electronic device 100 can implement audio functions such as music playing and recording through the audio module 160 and the application processor.

[0062] The pressure sensor 170A is used to sense pressure signals and convert the pressure signals into electrical signals.

[0063] The gyro sensor 170B may be used to determine the motion posture of the electronic device 100 .

[0064] The hardware structure of the electronic device 100 is introduced here. It can be understood that: Figure 1The components included in the hardware structure shown do not constitute a specific limitation on the electronic device 100. The electronic device 100 may have more or fewer components than those shown in the figure, may combine two or more components, or may have different component configurations. The various components shown in the figure may be implemented in hardware, software, or a combination of hardware and software including one or more signal processing and / or application specific integrated circuits.

[0065] In addition, an operating system is running on the above components, such as the iOS operating system developed by Apple, the Android open source operating system developed by Google, and the Windows operating system developed by Microsoft. Application programs can be installed and run on the operating system.

[0066] The operating system of the electronic device 100 may adopt a layered architecture, an event-driven architecture, a micro-core architecture, a micro-service architecture, or a cloud architecture. The embodiment of the present application takes the Android system of the layered architecture as an example to exemplify the software system of the electronic device 100.

[0067] Figure 2 1 is a schematic diagram of the software system of the electronic device 100 of the embodiment of the present application. The software system includes several layers, each layer has a clear role and division of labor, and the layers communicate with each other through software interfaces. In some embodiments, the software system is divided into an application layer, an application framework layer, a system library, and a kernel layer from top to bottom.

[0068] The application layer can include a series of application packages, such as camera, calendar, map, clock, gallery, call, navigation, application 1, etc. Among them, application 1 can be an entertainment application, a news application, etc., which is not limited in this application. When these application packages are running, the various service modules provided by the media platform framework layer can be accessed through the application programming interface (API) and the corresponding services can be executed.

[0069] The application framework layer, referred to as the framework layer, provides an application programming interface (API) and programming framework for the application layer's applications. The application framework layer includes some predefined functions.

[0070] The application framework layer may include a window manager, content provider, view system, resource manager, etc.

[0071] The window manager is used to manage window programs. The window manager can obtain the display screen size, determine whether there is a status bar, lock the screen, capture the screen, etc.

[0072] Content providers are used to store and retrieve data and make it accessible to applications. These data may include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

[0073] The view system includes visual controls, such as controls for displaying text and controls for displaying images, etc. The view system can be used to build applications. A display interface can be composed of one or more views. For example, a display interface including a text notification icon can include a view for displaying text and a view for displaying images.

[0074] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0075] The system library can include multiple functional modules, such as surface manager, media libraries, graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), window system (SurfaceFlinger), etc.

[0076] The surface manager is used to manage the display subsystem and provide the fusion of 2D and 3D layers for multiple applications.

[0077] The media library supports playback and recording of a variety of commonly used audio and video formats, as well as static image files, etc. The media library can support a variety of audio and video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

[0078] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0079] A 2D graphics engine is a drawing engine for 2D drawings.

[0080] The window system (SurfaceFlinger) is a service responsible for compositing screen display content.

[0081] The kernel layer is the layer between hardware and software. The kernel layer contains at least a feature collector, a load calculation module, a load prediction module, a frequency modulation module, and a frequency prediction module.

[0082] The feature collector user obtains the load of the number of CPU cycles of the CPU cluster and the number of CPU cycles of the target thread (for the explanation of the CPU cluster, target thread, and CPU cycle, please refer to the embodiment below) in the historical frame drawing task (for the description of the historical frame drawing task, please refer to the embodiment below).

[0083] The load calculation module is used to calculate the CPU load of the CPU cluster and the CPU load of the target thread in the historical frame drawing task according to the number of CPU cycles of the CPU cluster and the number of CPU cycles of the target thread in the historical frame drawing task.

[0084] The load prediction module is used to predict the CPU load and the target thread load in the next frame drawing task according to the CPU load and the target thread load in the historical frame drawing task.

[0085] The frequency prediction module is used to determine the minimum value within the frequency range of the CPU in the next frame drawing task and determine the frequency range of the CPU in the next frame drawing task according to the CPU load in the next frame drawing task and the load of the target thread.

[0086] The frequency modulation module is used to adjust the CPU frequency based on the frequency range of the CPU in the next frame drawing task.

[0087] Understandably, Figure 2 The layers in the software system shown and the components contained in each layer do not constitute a specific limitation on the electronic device. In other embodiments of the present application, the electronic device may include more or fewer layers than shown, and each layer may include more or fewer components.

[0088] It is understandable that in order to implement the frequency modulation method in the embodiment of the present application, the electronic device includes hardware and / or software modules corresponding to the execution of each function. In combination with the algorithm steps of each example described in the embodiment disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in combination with the embodiments.

[0089] It should be noted that although the embodiments of the present application are described using the Android system as an example, its basic principles are also applicable to electronic devices based on operating systems such as iOS or Windows.

[0090] The following is an introduction to the technical problems to be solved by this application and the inventive concept of this application.

[0091] At present, when electronic devices are running, they often experience problems such as freezing and frame drops due to insufficient performance, affecting the user experience. Alternatively, they often experience problems such as over-performance of electronic devices, which causes high power consumption and reduced battery life. In other words, the electronic devices cannot balance power consumption and performance.

[0092] The reason for the above is that when the electronic device is running, the electronic device adjusts the frequency of the processor (Central Processing Unit, CPU) within a fixed frequency range. It should be understood that the relationship between the frequency, performance and power consumption of the CPU in the electronic device can be: the higher the CPU frequency, the more powerful the CPU can provide, thereby improving the performance of the electronic device and increasing the power consumption of the electronic device; the lower the CPU frequency, the more limited the CPU can provide, thereby reducing the performance of the electronic device and reducing the power consumption of the electronic device.

[0093] In one case, the electronic device needs to adjust the CPU frequency to a value less than the minimum value within a fixed frequency range to meet the performance requirements of the electronic device. However, the electronic device usually adjusts the CPU frequency within a fixed frequency range and cannot adjust the CPU frequency to a value less than the minimum value within the frequency range. This will result in overperformance, causing the electronic device to heat up due to high power consumption, reduced battery life and other problems. In another case, the electronic device needs to adjust the CPU frequency to a specific value within a fixed frequency range to meet the performance requirements of the electronic device. However, the electronic device usually adjusts the CPU frequency within a fixed frequency range and the minimum value of the fixed frequency range is too low. The CPU frequency cannot be adjusted from a smaller value to a specific value within the fixed frequency range. This will result in insufficient performance and cause problems such as stuttering and frame drops in the electronic device.

[0094] For example, please refer to Figure 3 , Figure 3 An example graph is provided for a fixed frequency range. Figure 3 For example, the maximum value of the fixed CPU frequency range is 5 megahertz (MHz) and the minimum value is 2.5MHz. In some cases, when the electronic device is running, the CPU frequency needs to be 3MHz, but the electronic device cannot adjust the CPU frequency to 3MHz, which will lead to insufficient performance and cause problems such as lag and frame drops in the electronic device. In other cases, the CPU frequency needs to be less than 2.5MHz, but the electronic device cannot adjust the CPU frequency to less than 2.5MHz, which will lead to over-performance, causing the electronic device to heat up due to high power consumption, reduced battery life and other problems.

[0095] In order to solve the above problems, the embodiment of the present application provides a frequency modulation method, which can adjust the fixed frequency range of the CPU in real time. Specifically, the fixed frequency range of the CPU is adjusted by adjusting the minimum value of the fixed frequency range of the CPU. In this way, when the electronic device needs to adjust the CPU frequency to a specific value within the frequency range to meet the performance requirements of the electronic device, the CPU frequency can be adjusted within the adjusted CPU frequency range so that the CPU frequency is greater than or equal to the specific value within the CPU frequency range before adjustment. And when the electronic device needs to adjust the CPU frequency to a value less than the minimum value of the frequency range to meet the performance requirements of the electronic device, the CPU frequency can be adjusted within the adjusted CPU frequency range so that the CPU frequency is less than the minimum value within the CPU frequency range before adjustment. In this way, the electronic device can balance power consumption and performance and improve user experience.

[0096] For example, please refer to Figure 4 , Figure 4 This is an example diagram of an adjusted frequency range provided in an embodiment of the present application. Figure 4 In the drawing frame time of the first frame, the maximum value within the frequency range of the CPU is 5MHz, and the minimum value is 2.5MHz. Through the frequency modulation method provided in the embodiment of the present application, the maximum value within the frequency range of the CPU within the drawing frame time of the second frame is 5MHz, and the minimum value is 3MHz. In the drawing frame time of the NKth frame, the maximum value within the frequency range of the CPU is 5MHz, and the minimum value is 3.5MHz. In the drawing frame time of the N+1th frame, the maximum value within the frequency range of the CPU is 5MHz, and the minimum value is 2MHz, etc.

[0097] Below, a schematic diagram of a scenario of a frequency modulation method provided in an embodiment of the present application is described in conjunction with the accompanying drawings.

[0098] Please refer to Figure 5 , Figure 5 It is a schematic diagram of a sliding scenario provided in an embodiment of the present application.

[0099] Please refer to Figure 5 The interface 510 shown in (a) of FIG. 5 includes an icon 511, which is used to indicate application 1. Application 1 may be a social application, an entertainment application, a news application, etc. The user may click on icon 511, and in response to the user clicking on icon 511, the electronic device displays Figure 5 In the interface 520 shown in (b), the first to twelfth content items are displayed in the interface 520, and the user can select one of the content items to read. The user can perform a sliding operation in the interface 511, and in response to the user's sliding operation, the electronic device displays Figure 5In the interface 530 shown in (c), the twentieth to thirty-first items of content are displayed in the interface 530.

[0100] In response to the user's sliding operation, the electronic device Figure 5 The interface 520 shown in (b) shows Figure 5 In the process of displaying the interface 530 shown in (c), if the performance of the electronic device is insufficient, the display interface 530 may be stuck, such as when the electronic device is displaying Figure 5 Before the interface 530 shown in (c), the display Figure 5 The interface 540 shown in (d) includes text 541, which indicates that Figure 5 The interface 530 shown in (c) in the figure is stuck. As can be seen from the above, this situation is caused by the electronic device being unable to adjust the CPU frequency to a specific value in the frequency range of the CPU frequency, resulting in insufficient performance of the electronic device. The frequency modulation method provided in the embodiment of the present application can adjust the CPU frequency range. By adjusting the CPU frequency within the adjusted CPU frequency range, the CPU frequency can be made greater than or equal to the specific value in the original CPU frequency range, thereby alleviating the problem of the electronic device display being stuck. Figure 5 (c) shows the freezing phenomenon that occurs on the interface 530.

[0101] Similarly, in electronic devices Figure 5 The interface 520 shown in (b) shows Figure 5 In the process of interface 530 shown in (c), it is assumed that the performance of the electronic device is oversupplied, resulting in heating and reduced battery life due to high power consumption. As can be seen from the above, this situation is caused by the electronic device being unable to adjust the CPU frequency to a value less than the minimum value of the frequency range of the CPU frequency. The frequency modulation method provided in the embodiment of the present application can adjust the CPU frequency range. By adjusting the CPU frequency within the adjusted CPU frequency range, the CPU frequency can be made less than the minimum value of the original CPU frequency range, thereby reducing the power consumption of the electronic device and improving the battery life of the electronic device.

[0102] Figure 5 The frequency modulation method provided in the embodiment of the present application is applied to a sliding scenario for example. It should be noted that the frequency modulation method provided in the embodiment of the present application can be applied to any scenario in which the electronic device operates, such as a video call scenario, a game scenario, etc. The embodiment of the present application is not limited to this.

[0103] The implementation process of the frequency modulation method provided in the embodiment of the present application is introduced below with reference to the accompanying drawings.

[0104] Please refer to Figure 6 , Figure 6 is a timing diagram of a frequency modulation method provided in an embodiment of the present application. Figure 2 The software architecture shown introduces the frequency modulation method provided in the embodiment of the present application.

[0105] S601, the application layer receives a sliding operation on application 1 by the user.

[0106] It should be understood that application 1 can be Figure 5 The application 1 shown in (a) may be one of many application programs downloaded through an application store or other channels, or may be one of many small programs developed based on an application software open platform interface that users can use without installation. The embodiment of the present application does not limit the type of application 1.

[0107] The user's sliding operation can be used as a reference Figure 5 It should be understood that the user's sliding operation can cause the interface in the application to display different content. Therefore, in other embodiments, the electronic device can also receive the user's voice command, such as "next page", "previous page", etc., and the electronic device responds to the user's voice command and displays different content in the interface.

[0108] S602: In response to a sliding operation on application 1, application 1 in the application layer sends a frame drawing instruction to the view system in the framework layer.

[0109] It should be understood that the view system can be responsible for the interface drawing and event processing of the application. After receiving the frame drawing instruction, the view system can notify the graphics processing library in the system library to execute the frame drawing task.

[0110] S603: After receiving the frame drawing instruction, the view system notifies the graphics processing library in the system library to execute the frame drawing task.

[0111] S604, after receiving the notification, the graphics processing library in the system library executes the frame drawing task.

[0112] It should be understood that the frame drawing task can be understood as a task that an electronic device needs to perform to display a frame of an image. The frame drawing task includes a drawing task and a display sending task. The drawing task includes a main thread (UI Thread) and a rendering thread (Render Thred). The main thread can be implemented through a frame function (DoFrame). The DoFrame function also includes a measurement function (Measure), a layout function (Layout) and a drawing function (Draw). The measurement function is used to measure the size of the control, the layout function is used to determine the position of the control on the screen according to the size of the control measured in the measurement function, and the drawing function is used to draw the control on the screen. The rendering thread can be implemented through a drawing frame function (DrawFrame). The DrawFrame function also includes a queue buffer function (QueueBuffer). The QueueBuffer function is used to place the image frame data that has been drawn in a queue buffer (BufferQueue).

[0113] In some embodiments, the above functions may also be referred to as methods, etc., which is not limited in the embodiments of the present application.

[0114] It should also be understood that the display task in the frame drawing task can be Figure 2 The window system (SurfaceFlinger) in the system library shown is implemented. The window system (SurfaceFlinger) is a service responsible for synthesizing screen display content. It receives data from queue buffers of multiple applications and system services, synthesizes them into a final queue buffer according to their position, size, transparency, Z-axis order and other properties, and then sends them to the screen for display. Exemplarily, the window system can implement the synthesis task through the message receiving function (OnMessageReceived), and can implement the display sending task through the LCD driver function (LCD Driver) and LCD screen function (LCD Panel) in the LCD screen.

[0115] S605: The system library sends the end time of the frame drawing task to the feature collector in the kernel layer.

[0116] It should be understood that the end time of a frame drawing task is used to determine the frame drawing duration of the frame drawing task. The frame drawing duration of a frame drawing task may be the difference between the end time of the current frame drawing task and the end time of the previous frame drawing task.

[0117] In the embodiment of the present application, during the frame drawing process of the frame drawing task, the thread that interacts relatively closely with the user is the rendering thread. After the rendering thread is executed, the data processed by the current frame can be output to the graphics and then displayed on the screen. Therefore, the frame drawing duration of a frame drawing task can be set to the difference between the end time of the rendering thread of the current frame drawing task and the end time of the rendering thread of the previous frame drawing task.

[0118] It should also be understood that the rendering thread includes a QueueBuffer function, which is used to place the completed image frame data in the queue buffer (BufferQueue). Therefore, in the embodiment of the present application, the frame drawing duration of a frame drawing task can be set to the difference between the end time of the QueueBuffer function of the rendering thread of the current frame drawing task and the end time of the QueueBuffer function of the rendering thread of the previous frame drawing task. For example, please refer to Figure 7 , Figure 7 This is an example diagram of the frame drawing duration of a frame drawing task provided in an embodiment of the present application. Figure 7 The frame drawing task A can be understood as the previous frame drawing task, and the frame drawing task B can be understood as the current frame drawing task. The frame drawing task A includes the main thread A and the rendering thread A, and the rendering thread A includes the queue buffer function A (QueueBuffer). The frame drawing task B includes the main thread B and the rendering thread B, and the rendering thread B includes the queue buffer function B (QueueBuffer). The duration of the frame drawing task B can be the difference between the end time of the queue buffer function B and the end time of the queue buffer function A.

[0119] S606, after receiving the end time of the frame drawing task, the feature collector obtains the number of CPU cycles completed by at least one CPU cluster and the number of CPU cycles completed by at least one thread corresponding to each end time from the end time of the Nth frame drawing task to the NKth frame drawing task.

[0120] It should be understood that the frame drawing tasks from the Nth frame to the NKth frame can be understood as historical frame drawing tasks. N is an integer greater than 1, K is an integer greater than 1, and K is less than N. The Nth frame drawing task can be understood as the current frame drawing task, and the NKth frame drawing task can be understood as the frame drawing task of the K frames before the current frame. The frame drawing tasks from the Nth frame to the NKth frame are continuous frame drawing tasks.

[0121] It should also be understood that a multi-core processor may include several cores that can execute instructions independently, and these cores can be regarded as a separate unit or cluster. In the embodiment of the present application, when the processor is a multi-core processor, a multi-core processor may include multiple CPU clusters, and the multi-core processor may be dual-core, quad-core, octa-core, etc., which is not limited in the embodiment of the present application. When the processor is a single-core processor, a single-core processor may include a CPU cluster. In the embodiment of the present application, at least one CPU cluster includes one or more CPU clusters.

[0122] The CPU load of a CPU cluster can reflect the resource utilization of the entire electronic device. Usually, the CPU load of a CPU cluster can be characterized by CPU utilization (util), which is a measure of the amount of time the CPU spends executing various tasks and processes on the computer.

[0123] It should be understood that the number of CPU cycles executed by the CPU cluster of the historical frame drawing task obtained in the embodiment of the present application is to calculate the CPU load of the CPU cluster of the historical frame drawing task, and the CPU load is to predict the frequency range of the CPU frequency required when the electronic device executes the next frame drawing task, so that the electronic device can adjust the CPU frequency within the predicted frequency range. However, the CPU load of the CPU cluster reflects the resource utilization of the entire electronic device. The frequency range of the CPU frequency is predicted based on the CPU load of the CPU cluster, and the granularity is relatively coarse. Even if the CPU frequency can be adjusted to a suitable frequency value based on the predicted frequency range to meet the performance requirements of the electronic device, it may increase the power consumption of the electronic device, and the electronic device still cannot balance power consumption and performance.

[0124] Therefore, in order to balance the power consumption and performance of the electronic device, the embodiment of the present application can determine the CPU load of the thread by the number of CPU cycles executed by the thread, and use the CPU load of the thread as a factor for predicting the frequency range of the CPU frequency.

[0125] The CPU load of a thread can reflect the resource utilization of a thread in an electronic device. Usually, the CPU load of a thread can be characterized by CPU utilization (util), which is a measure of the amount of time the CPU spends executing the thread on a computer.

[0126] The at least one thread may include a thread for a frame drawing task (such as UI Thread and Render Thred), and may also include other threads running in the background of the electronic device when the electronic device is performing the frame drawing task, such as when the electronic device is responding to Figure 5In the interface 520, the user slides the application 1, and during the frame drawing task, the electronic device runs the thread of the application 2 in the background.

[0127] The CPU cycle can be called a machine cycle. In computers, for ease of management, the execution process of an instruction is often divided into several stages. Each stage completes a task, such as fetching instructions, reading memory, writing memory, etc. Each of these tasks is called a basic operation (each basic operation is composed of several basic CPU actions). The time required to complete a basic operation is called a machine cycle. The CPU cycle is usually specified by the shortest time to read an instruction word in memory.

[0128] During implementation, the system library may send the end time of each frame drawing task to the feature collector in the kernel layer. A counter may be configured in the feature collector. When the counter indicates that the end time of the frame drawing task is the end time of the Nth frame drawing task to the NKth frame drawing task, the feature collector obtains the number of CPU cycles completed by at least one CPU cluster and the number of CPU cycles completed by at least one thread corresponding to each end time of the Nth frame drawing task to the NKth frame drawing task through an interface (qcom_cpufreq_get_cpu_cycle_counter). Exemplarily, when N=5, K=3, when the counter indicates that the end time of the frame drawing task is the end time of the 2nd (5-3rd) frame drawing task, the feature collector obtains the number of CPU cycles completed by at least one CPU cluster and the number of CPU cycles completed by at least one thread corresponding to the end time of the 2nd (5-3rd) frame drawing task through the interface (qcom_cpufreq_get_cpu_cycle_counter), and when the counter indicates that the end time of the frame drawing task is the end time of the 3rd frame drawing task, the feature collector obtains the number of CPU cycles completed by at least one CPU cluster and the number of CPU cycles completed by at least one thread corresponding to the end time of the 3rd frame drawing task through the interface (f qcom_cpufreq_get_cpu_cycle_counter). Based on the above method, the feature collector can obtain the number of CPU cycles completed by at least one CPU cluster and the number of CPU cycles completed by at least one thread corresponding to each end time of the frame drawing tasks from the 2nd frame to the 5th frame.

[0129] S607, the feature collector sends to the load calculation module the number of CPU cycles completed by at least one CPU cluster and the number of CPU cycles completed by at least one thread corresponding to each end time from the end time of the Nth frame drawing task to the NKth frame drawing task.

[0130] S608, after the load calculation module receives the number of CPU cycles completed by at least one CPU cluster and the number of CPU cycles completed by at least one thread corresponding to each end time from the Nth frame drawing task to the NKth frame drawing task, the load calculation module determines the CPU load of at least one CPU cluster in each drawing frame duration from the Nth frame drawing task to the N-K+1th frame drawing task according to the number of CPU cycles completed by at least one CPU cluster corresponding to each end time from the Nth frame drawing task to the NKth frame drawing task; and determines the CPU load of the target thread in each drawing frame duration from the Nth frame drawing task to the N-K+1th frame drawing task according to the number of CPU cycles completed by at least one thread corresponding to each end time from the Nth frame drawing task to the NKth frame drawing task.

[0131] In implementation, the load calculation module can determine the CPU load of at least one CPU cluster within each frame drawing duration from the Nth frame drawing task to the N-K+1th frame drawing task by the following formula 1 and formula 2.

[0132] Formula 1:

[0133]

[0134] Formula 2:

[0135]

[0136] Among them, demand k Represents the number of completed CPU cycles of at least one CPU cluster within the frame drawing duration of a frame drawing task, factor k It is a constant that represents the computing power of the CPU cluster. Different CPU clusters have different values ​​of this constant. cycles k,i Indicates the number of CPU cycles completed by the CPU cluster corresponding to the end time of the i-th frame drawing task, cycles k,i-1 Indicates the number of CPU cycles completed by the CPU cluster corresponding to the end time of the previous frame drawing task of the i-th frame drawing task. k Represents the CPU load of at least one CPU cluster within the frame drawing time of a frame drawing task, and tgt time represents the standard frame drawing time. The standard frame drawing time can be determined according to the frame rate of the screen. The frame rate refers to the number of frames that the screen displays an image in one second. The standard frame drawing time refers to the reciprocal of the screen frame rate. For example, if the screen frame rate is 60fps (the unit of frame rate), then the standard frame drawing time is 1 / 60 second.

[0137] For example, please refer to Figure 8 , Figure 8This is an example diagram of determining the CPU load of a CPU cluster according to an embodiment of the present application. Figure 8 The processor shown is a multi-core processor. The multi-core processor includes eight CPUs from CPU0 to CPU7, wherein CPU0 to CPU2 form a CPU cluster, which can be called a small-core CPU cluster, CPU3 to CPU6 form a CPU cluster, which can be called a medium-core CPU cluster, and CPU7 forms a CPU cluster, which can be called a large-core CPU cluster. When calculating the CPU load of CPU0 during the frame drawing duration of the Nth frame drawing task, the number of CPU cycles completed by CPU0 corresponding to the end time of the Nth frame drawing task can be calculated. k,N , and the number of CPU cycles that CPU0 has completed at the end of the N-1 frame drawing task k,N-1 , and the constant factor corresponding to the small-core CPU cluster k Substitute into formula 1 to get demand k , then demand k Substituting tgt time into Formula 2, the CPU load of CPU0 within the frame duration of the Nth frame drawing task can be determined. Based on the above method, the CPU load of CPU0 to CPU7 within the frame duration of the Nth frame drawing task can be determined, as well as the CPU load of CPU0 to CPU7 within each frame duration of the N-1th frame, the N-2th frame, ... the N-K+1th frame drawing tasks.

[0138] It should be noted that when the processor is a single-core processor, the load calculation module can also calculate the CPU load of one CPU in the above manner, which will not be repeated here.

[0139] In the embodiment of the present application, the target thread may include a thread with which a wake-up relationship exists. For example, please refer to Fig. 9 , Fig. 9 This is an example diagram of a target thread provided in an embodiment of the present application. Fig. 9 (a) includes the main thread, thread A and rendering thread. The main thread wakes up thread A at time point 1, and thread A wakes up the rendering thread at time point 2. Then the main thread, thread A and rendering thread can all be called target threads. Fig. 9 (b) includes the main thread, thread A, thread B and rendering thread. The main thread wakes up thread A at time point 1, thread A wakes up the rendering thread at time point 2, and the rendering thread wakes up thread B at time point 3. Then the main thread, thread A, thread B and rendering thread can be called target threads.

[0140] In the implementation, the load calculation module first determines the key thread (such as the rendering thread and the main thread) in at least one thread, and determines the target thread according to the wake-up relationship between the key thread and the key thread. Exemplarily, when the feature collector sends the number of CPU cycles completed by at least one thread corresponding to each end time from the Nth frame drawing task to the NKth frame drawing task to the load calculation module, it can carry the identifier of at least one thread (such as the thread name). The load calculation module determines the key thread according to the identifier of at least one thread, and then determines the target thread according to the wake-up relationship of the key thread.

[0141] In the embodiment of the present application, the target thread may also include the thread with the largest load. For example, the load calculation module determines the CPU load of at least one thread in the Nth frame drawing task according to the number of CPU cycles completed by at least one thread corresponding to each end time from the Nth frame drawing task to the N-1th frame drawing task, including the load of the rendering thread, the load of the main thread, the load of thread A, the load of thread B, etc. The load calculation module may use the thread corresponding to the maximum value of the above thread loads as the target thread (such as thread B).

[0142] In the implementation, the load calculation module can determine the CPU load of the target thread according to Formula 1 and Formula 2 above. For example, please refer again to Figure 8 Assuming that the target thread includes thread A, when calculating the CPU load of thread A during the frame drawing duration of the Nth frame drawing task, the load calculation module can calculate the number of CPU cycles completed by thread A in CPU0 corresponding to the end time of the Nth frame drawing task. k,N , and the number of CPU cycles completed by thread A in CPU0 at the end of the N-1 frame drawing task k,N-1 , and the constant factor corresponding to the small-core CPU cluster k Substitute into formula 1 and formula 2, and the number of CPU cycles completed by thread A in CPU1 corresponding to the end time of the Nth frame drawing task cycles k,N , and the number of CPU cycles completed by thread A in CPU1 at the end of the N-1 frame drawing task k,N-1 , and the constant factor corresponding to the small-core CPU cluster k Substituting into Formula 1 and Formula 2, based on the above method, the number of CPU cycles completed by thread A in each CPU (CPU0 to CPU7) corresponding to the end time of the Nth frame drawing task can be calculated as cycles k,N , and the number of CPU cycles completed by thread A of each CPU (CPU0 to CPU7) at the end of the N-1 frame drawing taskk,N-1 , and the constant factor corresponding to each CPU cluster (large core CPU cluster, medium core CPU cluster, small core CPU cluster) k Substituting into Formula 1 and Formula 2, the CPU load of thread A during the frame drawing duration of the Nth frame drawing task can be determined. Based on the above method, the CPU load of thread A during each frame drawing duration of the N-1th frame, the N-2th frame, ... the N-K+1th frame drawing tasks can be determined.

[0143] S609, the load calculation module sends the CPU load of at least one CPU cluster in each frame drawing time from the Nth frame drawing task to the N-K+1th frame drawing task and the CPU load of the target thread in each frame drawing time from the Nth frame drawing task to the N-K+1th frame drawing task to the load prediction module.

[0144] S610, the load prediction module determines the CPU load of at least one CPU cluster within the frame drawing duration of the N+1 frame drawing task based on the CPU load of at least one CPU cluster within each frame drawing duration from the N frame drawing task to the N-K+1 frame drawing task; and determines the CPU load of the target thread within the frame drawing duration of the N+1 frame drawing task based on the CPU load of the target thread within each frame drawing duration from the N frame drawing task to the N-K+1 frame drawing task.

[0145] In implementation, the load prediction module can determine the CPU load of at least one CPU cluster within the frame drawing duration of the N+1th frame drawing task according to Formula 3 to Formula 5.

[0146] Formula 3:

[0147]

[0148] in, Represents the mean of the sum of the CPU loads of at least one CPU cluster in each frame duration from the Nth frame drawing task to the N-K+1th frame drawing task. This mean can reflect the busyness of the CPU. Based on this busyness, the CPU load of at least one CPU cluster in the frame duration of the next frame (Nth frame) drawing task can be predicted. Represents the sum of the CPU loads of at least one CPU cluster during each frame duration of the Nth frame drawing task to the N-K+1th frame drawing task. N represents the number of the Nth frame drawing task to the N-K+1th frame drawing task.

[0149] For example, assuming the processor is Figure 8In the multi-core processor shown, N=5, K=3, then the Nth frame drawing task represents the 5th frame drawing task, and the N-K+1th frame drawing task represents the 3rd frame drawing task. The load prediction module can substitute the CPU load of CPU0 in the small core CPU cluster within the frame drawing time of the 3rd frame drawing task, the CPU load of CPU0 in the small core CPU cluster within the frame drawing time of the 4th frame drawing task, the CPU load of CPU0 in the small core CPU cluster within the frame drawing time of the 5th frame drawing task, and the number 3 into formula 1, and calculate the average of the sum of the CPU loads of CPU0 in the small core CPU cluster within each frame drawing time of the 3rd frame drawing task to the 5th frame drawing task. Based on the above method, the average of the sum of the CPU loads of CPU0 to CPU7 within each frame drawing time of the 3rd frame drawing task to the 5th frame drawing task can be calculated respectively.

[0150] In other embodiments, Formula 3 may also be a formula for calculating the maximum or minimum value of the CPU load of at least one CPU cluster within each frame drawing duration from the Nth frame drawing task to the N-K+1th frame drawing task, and the embodiments of the present application are not limited to this.

[0151] Formula 4:

[0152] d=max(0,util k , t -util k，t-1 ).

[0153] Where d is 0 and util k，t -util k，t-1 The maximum value between k，t -util k，t-1 Indicates the difference between the CPU load of at least one CPU cluster within the frame drawing duration of the Nth frame drawing task and the CPU load of at least one CPU cluster within the frame drawing duration of the N-1th frame drawing task, util k，t Indicates the CPU load of at least one CPU cluster within the frame drawing duration of the Nth frame drawing task. d can reflect the increase or decrease trend of the CPU load, and the CPU load of at least one CPU cluster within the frame drawing duration of the next frame (N+1th frame) drawing task can be predicted based on the increase or decrease trend.

[0154] For example, assuming the processor is Figure 8 In the multi-core processor shown, N=5, K=3, the CPU load of CPU0 is 30% during the frame drawing time of the 4th frame drawing task, and the CPU load of CPU0 is 50% during the frame drawing time of the 5th frame drawing task. Then util k，t -util k，t-1Assume that the CPU load of CPU0 is 50% during the frame drawing time of the 4th frame drawing task, and the CPU load of CPU0 is 30% during the frame drawing time of the 5th frame drawing task, then util k，t -util k，t-1 is negative 20%, at which time d is 0.

[0155] In other embodiments, util k，t -util k，t-1 It can also represent the difference between the CPU load of at least one CPU cluster within the frame drawing duration of the Nth frame drawing task and the CPU load of at least one CPU cluster within the frame drawing duration of the N-2th frame, the N-3th frame, the N-K+1th frame, etc., which is not limited in the embodiments of the present application.

[0156] Formula 5:

[0157]

[0158] in, It is the CPU load of at least one CPU cluster within the frame drawing duration of the frame drawing task of the N+1th frame.

[0159] For example, assuming the processor is Figure 8 In the multi-core processor shown, N=5, K=3, the CPU load of CPU0 during the drawing time of the 3rd frame drawing task is 35%, the CPU load of CPU0 during the drawing time of the 4th frame drawing task is 40%, and the CPU load of CPU0 during the drawing time of the 5th frame drawing task is 45%. Then, according to the above formulas 3 to 5, it can be determined that the CPU load of CPU0 during the drawing time of the 6th frame drawing task is

[0160] Based on the above formulas 3 to 5, the load prediction module can determine the CPU load of each CPU in at least one CPU cluster within the frame drawing duration of the N+1 frame drawing task. For example, please refer to Fig.10 , Fig.10 The processor shown is a multi-core processor, wherein the small-core CPU cluster includes CPU0 to CPU2, the medium-core CPU cluster includes CPU3 to CPU6, and the large-core CPU cluster includes CPU7. Assuming K=3, the historical frame drawing tasks include the N-K+1(N-2)th frame drawing task, the N-1th frame drawing task, and the Nth frame drawing task. The load calculation module determines the CPU load of each CPU in at least one CPU cluster within each frame drawing time of the Nth frame drawing task to the N-2th frame drawing task based on Formula 1 and Formula 2 in S608. Fig.10The load prediction module determines the CPU load of each CPU in at least one CPU cluster within the frame drawing duration of the N+1 frame drawing task based on Formula 3 and Formula 5 in S610. Fig.10 The data in rows 2 to 9 and column 6.

[0161] It is also understood that after determining the CPU load of each CPU in at least one CPU cluster within the frame drawing duration of the N+1 frame drawing task, the load prediction module also needs to determine the CPU load of each CPU cluster within the frame drawing duration of the N+1 frame drawing task. In implementation, the load prediction module can average the CPU loads of multiple CPUs in the same CPU cluster to determine the CPU load of the CPU cluster. For example, please refer again to Fig.10 , the CPU load of the small-core CPU cluster is

[0162] The CPU load of the medium-core CPU cluster is The CPU load of the large-core CPU cluster is Mean_util3=util7N+1.

[0163] In implementation, the load prediction module can also determine the CPU load of the target thread within the frame drawing duration of the N+1 frame drawing task according to the CPU load of the target thread within each frame drawing duration from the N frame drawing task to the N-K+1 frame drawing task through the above formulas 3 to 5. For example, please refer to Fig.10 , assuming that the target threads include the main thread, the rendering thread, and thread A (thread A is the thread with the largest load). The load calculation module determines the CPU load of each thread in the target thread during each frame drawing time from the Nth frame drawing task to the N-2th frame drawing task based on formula 1 and formula 2 in S608. Fig.10 The load prediction module determines the CPU load of each thread in the target thread within the frame drawing time of the N+1 frame drawing task based on formula 3 and formula 5 in S610. Fig.10 The data in rows 10 to 12 and column 6.

[0164] It is also understood that after determining the CPU load of each thread in the target thread within the frame drawing duration of the N+1th frame drawing task, the load prediction module also needs to determine the CPU load of the target thread within the frame drawing duration of the N+1th frame drawing task.

[0165] In the implementation, the load prediction module can average the CPU loads of multiple threads in the target thread to determine the CPU load of the target thread. For example, please refer again to Fig.10 , the CPU load of the target thread is:

[0166] S611, the load prediction module sends the CPU load of at least one CPU cluster within the frame drawing duration of the N+1th frame drawing task and the CPU load of the target thread within the frame drawing duration of the N+1th frame drawing task to the frequency prediction module.

[0167] S612, the frequency prediction module determines the minimum value of the CPU frequency range when each CPU cluster executes the frame drawing task of the N+1th frame according to the CPU load of at least one CPU cluster within the frame drawing duration of the N+1th frame drawing task and the CPU load of the target thread within the frame drawing duration of the N+1th frame drawing task, so as to obtain the CPU frequency range of the frame drawing task of the N+1th frame.

[0168] In the implementation, when determining the minimum value of the CPU frequency range when each CPU cluster executes the frame drawing task of the N+1th frame, the frequency prediction module can call the data in the operating performance points (OPP) table of the device. The OPP table stores the correspondence between CPU load, OPP gear and frequency point. The frequency point refers to the specific frequency value in a specific frequency band. Then, based on the data in the OPP table and the CPU load of at least one CPU cluster and the CPU load of the target thread, the minimum value of the CPU frequency range when each CPU cluster executes the frame drawing task of the N+1th frame is determined.

[0169] It should be noted that when the processor is a multi-core processor, the data in the OPP table corresponding to different CPU clusters are different.

[0170] For example, the processor is Fig.10 When an eight-core processor is shown, the OPP table corresponding to the small-core CPU cluster can refer to Table 1:

[0171] Table 1

[0172] load OPP position Frequency(MHz) 42 15 307 61 14 441 77 13 556 93 12 672 109 11 787 125 10 902 141 9 1017 154 8 1113 170 7 1228 186 6 1344 202 5 1459 216 4 1555 232 3 1670 248 2 1785 264 1 1900 280 0 2016

[0173] In one implementation, for example, when determining the minimum value of the CPU frequency range when the small-core CPU cluster executes the frame drawing task of the N+1 frame, the frequency prediction module can first query the CPU load of the small-core CPU cluster within the frame drawing duration of the N+1 frame drawing task in the OPP table provided in Table 1 (the load can be expressed as Fig.10 Mean_util1 shown in the figure) corresponds to the gear position in the OPP table (the gear position can be expressed as Fig.10 Then, the CPU load of the target thread within the frame drawing time of the N+1 frame drawing task is queried (the load can be expressed as Fig.10Mean_util4 characterization shown) corresponds to the gear position in the OPP table (the gear position can be expressed as Fig.10 Finally, the minimum value between Mean_OPP1 and Mean_OPP4 is searched (the minimum value can be expressed as Fig.10 The frequency point in Table 1 is represented by Freq_min_OPP1 shown in Table 1, and the frequency value corresponding to the frequency point is used as the minimum value of the CPU frequency range when the small-core CPU cluster executes the frame drawing task of the N+1 frame (the minimum value can be expressed as Fig.10 Freq_min1 representation shown).

[0174] For example: assuming that Mean_util1 is 77, the corresponding Mean_OPP1 of Mean_util1 is 13 in Table 1; assuming that Mean_util4 is 93, the corresponding Mean_OPP4 of Mean_util4 is 12 in Table 1; then the minimum value 12 of Mean_OPP1 and Mean_OPP4 corresponding to frequency point 672 is queried in Table 1, and the frequency value corresponding to frequency point 672 is used as the minimum value of the CPU frequency range when the small-core CPU cluster executes the frame drawing task of the N+1th frame.

[0175] In another implementation, exemplarily, when the frequency prediction module determines the minimum value of the CPU frequency range when the small-core CPU cluster executes the frame drawing task of the N+1 frame, it can first query the gear (Mean_OPP1) in the OPP table corresponding to the CPU load (Mean_util1) of the small-core CPU cluster within the frame drawing duration of the N+1 frame drawing task, query the frequency point corresponding to Mean_OPP1, and then query the gear (Mean_OPP4) in the OPP table corresponding to the CPU load (Mean_util4) of the target thread within the frame drawing duration of the N+1 frame drawing task, query the frequency point corresponding to Mean_OPP4, and finally determine the maximum value between the frequency points corresponding to Mean_OPP1 and the frequency points corresponding to Mean_OPP4, and use the frequency value corresponding to the maximum value as the minimum value of the CPU frequency range when the small-core CPU cluster executes the frame drawing task of the N+1 frame (the minimum value can be expressed as Fig.10 Freq_min1 representation shown).

[0176] For example: assuming that Mean_util1 is 77, the Mean_OPP1 corresponding to Mean_util1 in Table 1 is 13, and the frequency point corresponding to Mean_OPP1(13) is 556. Assuming that Mean_util4 is 93, the Mean_OPP4 corresponding to Mean_util4 in Table 1 is 12, and the frequency point corresponding to Mean_OPP4(12) is 672. Finally, the frequency value corresponding to the maximum value 672 between the frequency point 672 and the frequency point 556 is used as the minimum value of the CPU frequency range when the small-core CPU cluster executes the frame drawing task of the N+1 frame.

[0177] For example, the processor is Fig.10 When an eight-core processor is shown, the OPP table corresponding to the middle-core CPU cluster can refer to Table 2:

[0178] Table 2

[0179] load OPP position Frequency(MHz) 152 19 499 187 18 614 222 17 729 257 16 844 286 15 940 322 14 1056 357 13 1171 392 12 1286 427 11 1401 468 10 1536 503 9 1651 544 8 1785 585 7 1920 626 6 2054 667 5 2188 708 4 2323 749 3 2457 790 2 2592 825 1 2707 855 0 2803

[0180] In one implementation, for example, when determining the minimum value of the CPU frequency range when the middle core CPU cluster executes the frame drawing task of the N+1 frame, the frequency prediction module can first query the CPU load of the middle core CPU cluster within the frame drawing duration of the N+1 frame drawing task in the OPP table provided in Table 1 (the load can be expressed as Fig.10 Mean_util2 characterization shown) corresponds to the gear position in the OPP table (the gear position can be expressed as Fig.10 Then, the CPU load of the target thread within the frame drawing time of the N+1 frame drawing task is queried (the load can be expressed as Fig.10 Mean_util4 characterization shown) corresponds to the gear position in the OPP table (the gear position can be expressed as Fig.10 Finally, the minimum value between Mean_OPP2 and Mean_OPP4 is searched (the minimum value can be expressed as Fig.10 The frequency point in Table 1 is represented by Freq_min_OPP2 shown in FIG. 1 , and the frequency value corresponding to the frequency point is used as the minimum value of the CPU frequency range when the middle core CPU cluster executes the frame drawing task of the N+1 frame (the minimum value can be expressed as Fig.10 Freq_min2 characterization shown).

[0181] For example: assuming that Mean_util2 is 286, the corresponding Mean_OPP2 of Mean_util2 is 15 in Table 1. assuming that Mean_util4 is 257, the corresponding Mean_OPP4 of Mean_util4 is 16 in Table 1. Then, the minimum value 15 of Mean_OPP2 and Mean_OPP4 corresponding to frequency point 940 is queried in Table 1. The frequency value corresponding to frequency point 940 is used as the minimum value of the CPU frequency range when the middle core CPU cluster executes the frame drawing task of the N+1 frame.

[0182] In another implementation, exemplarily, when the frequency prediction module determines the minimum value of the CPU frequency range when the middle core CPU cluster executes the frame drawing task of the N+1 frame, it can first query the gear (Mean_OPP2) in the OPP table corresponding to the CPU load (Mean_util2) of the middle core CPU cluster within the frame drawing duration of the N+1 frame drawing task, query the frequency point corresponding to Mean_OPP2, and then query the gear (Mean_OPP4) in the OPP table corresponding to the CPU load (Mean_util4) of the target thread within the frame drawing duration of the N+1 frame drawing task, query the frequency point corresponding to Mean_OPP4, and finally determine the maximum value between the frequency points corresponding to Mean_OPP2 and the frequency points corresponding to Mean_OPP4, and use the frequency value corresponding to the maximum value as the minimum value (Freq_min2) of the CPU frequency range when the middle core CPU cluster executes the frame drawing task of the N+1 frame.

[0183] For example: assuming that Mean_util2 is 286, the Mean_OPP2 corresponding to Mean_util2 is 15 in Table 1, and the frequency point corresponding to Mean_OPP2(15) is 940. Assuming that Mean_util4 is 257, the Mean_OPP4 corresponding to Mean_util4 is 16 in Table 1, and the frequency point corresponding to Mean_OPP4(16) is 844. Finally, the frequency value corresponding to the maximum value 940 between the frequency points 940 and 844 is used as the minimum value of the CPU frequency range when the middle core CPU cluster executes the frame drawing task of the N+1 frame.

[0184] For example, the processor is Fig.10 When an eight-core processor is shown, the OPP table corresponding to the large-core CPU cluster can refer to Table 3:

[0185] Table 3

[0186]

[0187]

[0188] In one implementation, for example, when determining the minimum value of the CPU frequency range when the large-core CPU cluster executes the frame drawing task of the N+1 frame, the frequency prediction module can first query the CPU load of the large-core CPU cluster within the frame drawing duration of the N+1 frame drawing task in the OPP table provided in Table 1 (the load can be expressed as Fig.10 Mean_util3 characterization shown) corresponds to the gear position in the OPP table (the gear position can be expressed as Fig.10 The Mean_OPP3 representation shown in FIG. 1 is then used to query the CPU load of the target thread within the frame drawing duration of the N+1 frame drawing task (the load can be expressed as Fig.10 Mean_util4 characterization shown) corresponds to the gear position in the OPP table (the gear position can be expressed as Fig.10 The minimum value between Mean_OPP3 and Mean_OPP4 is finally found (the minimum value can be expressed as Fig.10 The frequency point in Table 1 is represented by Freq_min_OPP3 shown in FIG. 1 , and the frequency value corresponding to the frequency point is used as the minimum value of the CPU frequency range when the large-core CPU cluster executes the frame drawing task of the N+1 frame (the minimum value can be expressed as Fig.10 Freq_min3 characterization shown).

[0189] For example: assuming that Mean_util3 is 400, the corresponding Mean_OPP3 of Mean_util3 is 15 in Table 1. assuming that Mean_util4 is 437, the corresponding Mean_OPP4 of Mean_util4 is 14 in Table 1. Then, the minimum value 14 of Mean_OPP3 and Mean_OPP4 corresponding to frequency point 1248 is queried in Table 1. The frequency value corresponding to frequency point 1248 is used as the minimum value of the CPU frequency range when the large-core CPU cluster executes the frame drawing task of the N+1th frame.

[0190] In another implementation, exemplarily, when determining the minimum value of the frequency range of the CPU when the large-core CPU cluster executes the frame drawing task of the N+1 frame, the frequency prediction module can first query the gear (Mean_OPP3) in the OPP table corresponding to the CPU load (Mean_util3) of the large-core CPU cluster within the frame drawing duration of the N+1 frame drawing task, query the frequency point corresponding to Mean_OPP3, and then query the gear (Mean_OPP4) in the OPP table corresponding to the CPU load (Mean_util4) of the target thread within the frame drawing duration of the N+1 frame drawing task, query the frequency point corresponding to Mean_OPP4, and finally determine the maximum value between the frequency points corresponding to Mean_OPP3 and the frequency points corresponding to Mean_OPP4, and use the frequency value corresponding to the maximum value as the minimum value (Freq_min3) of the frequency range of the CPU when the large-core CPU cluster executes the frame drawing task of the N+1 frame.

[0191] For example, assuming that Mean_util3 is 300, the Mean_OPP3 corresponding to Mean_util3 is 15 in Table 1, and the frequency point corresponding to Mean_OPP3(15) is 1132. Suppose that Mean_util4 is 437, the Mean_OPP4 corresponding to Mean_util4 is 14 in Table 1, and the frequency point corresponding to Mean_OPP4(14) is 1248. Finally, the frequency value corresponding to the maximum value 1248 between the frequency points 1132 and 1248 is used as the minimum value of the CPU frequency range when the large-core CPU cluster executes the frame drawing task of the N+1th frame.

[0192] In some embodiments, after determining the minimum value of the CPU frequency range when each CPU cluster executes the frame drawing task of the N+1th frame, the frequency prediction module can also adjust the minimum value of the CPU frequency range according to the frame drawing duration of the frame drawing task of the Nth frame and the standard frame drawing duration. The explanation and determination method of the frame drawing duration of the frame drawing task of the Nth frame and the standard frame drawing duration can be referred to the above embodiment, which will not be repeated here.

[0193] It should be understood that the higher the frequency of the CPU of the electronic device, the lower the frame length of the frame drawing task performed by the electronic device, and the lower the frequency of the CPU of the electronic device, the higher the frame length of the frame drawing task performed by the electronic device. It should also be understood that when the frame length of the frame drawing task of the Nth frame executed by the electronic device is equal to the standard frame length, the interface is smooth when the electronic device displays the Nth frame image, and no heating phenomenon occurs. When the frame length of the frame drawing task of the Nth frame executed by the electronic device is greater than the standard frame length, the performance of the electronic device is insufficient, and the interface freezes. Therefore, after the frequency prediction module determines the minimum value of the CPU frequency range when each CPU cluster executes the frame drawing task of the N+1th frame, assuming that the determined frame length of the frame drawing task of the Nth frame is greater than the standard frame length, then the performance of the electronic device is insufficient at this time. In order to increase or ensure the performance of the electronic device, the frequency prediction module can also increase the minimum value of the CPU frequency range. In implementation, the frequency prediction module determines the increase amplitude of the minimum value of the CPU frequency range according to the following formula six.

[0194]

[0195] Among them, Margin represents the increase amplitude of the minimum value of the CPU frequency range. Margin can be the number in the second column OPP in Table 1, Table 2 and Table 2 above, which can also be called a gear. 1 / 3Margin represents the gear at the 1 / 3th position of all gears in the OPP table. For example, the OPP table in Table 1 has a total of 16 gears, so the gear at the 1 / 3th position can be 6. The OPP table in Table 2 and Table 3 has a total of 20 gears, so the gear at the 1 / 3th position can be 7. q2q represents the frame drawing time of the frame drawing task of the Nth frame, tgt time represents the standard frame drawing time, and the value of q2q-tgt time is in milliseconds (ms). The method for determining the frame drawing time of the frame drawing task of the Nth frame and the standard frame drawing time can be referred to the above embodiment, which will not be repeated here.

[0196] After determining the increase amplitude of the minimum value of the CPU frequency range, the frequency prediction module can adjust the minimum value of the CPU frequency range according to the increase amplitude. Exemplarily, assuming that the minimum value of the CPU frequency range when the small-core CPU cluster performs the frame drawing task of the N+1 frame determined by the frequency prediction module according to Table 1 is the frequency value corresponding to the frequency point 556, and it can be seen from Table 1 that the OPP gear corresponding to 556 is 13, assuming that the Margin determined by the frequency prediction module according to Formula 6 is 1, then the frequency prediction module can reduce the gear of the OPP by one gear, such as reducing the gear of the OPP from 13 to 12, and the minimum value of the CPU frequency range corresponding to gear 12 is the frequency value corresponding to the frequency point 672, and the frequency prediction module can increase the minimum value of the CPU frequency range from the frequency value corresponding to 556 to the frequency value corresponding to 672. In this way, the frequency value adjusted within the above frequency range may increase the CPU frequency of the electronic device executing the frame drawing task of the Nth frame, shorten the frame drawing time of the frame drawing task of the Nth frame, and improve the performance of the electronic device.

[0197] It is also understandable that the frequency prediction module can determine the frequency range of the CPU of the frame drawing task of the N+1th frame according to the minimum value of the frequency range of the CPU of the frame drawing task of the N+1th frame. Figure 3 The frequency range shown in FIG. 1 is (2.5 MHz, 5 MHz), and the minimum value of the frequency range of the CPU of the frame drawing task of the N+1th frame is 3 MHz. Based on the minimum value, the frequency range of the CPU of the frame drawing task of the N+1th frame is adjusted. For example, the frequency range of the CPU of the frame drawing task of the N+1th frame is (3 MHz, 5 MHz).

[0198] S613: The frequency prediction module sends the CPU frequency range of the frame drawing task of the N+1th frame to the frequency modulation module.

[0199] S614, after receiving the frequency range of the CPU of the frame drawing task of the N+1th frame, the frequency modulation module adjusts the frequency of the CPU of the frame drawing task of the N+1th frame based on the frequency range of the CPU of the frame drawing task of the N+1th frame.

[0200] It should be understood that the frequency modulation module can be an energy aware scheduler (Energy Aware Scheduling, EAS), a completely fair scheduler (Completely Fair Scheduler, CFS), etc., and the embodiments of the present application are not limited to this.

[0201] It should also be understood that within the CPU frequency range of the frame drawing task of the N+1th frame, the frequency adjustment module can adjust the CPU frequency to a specific value greater than or equal to the fixed frequency range, or less than the minimum value of the fixed frequency range. For example, please refer again Figure 4, assuming that the frequency range corresponding to the first frame drawing frame length is a fixed frequency range (2.5MHz, 5MHz), in one case, when the electronic device displays the image of the NKth frame, the frequency modulation module needs to adjust the CPU frequency to 3MHz, but the frequency modulation module is usually unable to adjust the CPU frequency to 3MHz. Through the method provided in the embodiment of the present application, the electronic device can adjust the frequency range of the CPU, for example, the frequency range of the CPU when the NKth frame image is adjusted to be the frequency range (3.5MHz, 5MHz), so that the frequency modulation module can adjust the CPU frequency to 3.5MHz, 3.5MHz is greater than 3MHz, so that the performance of the electronic device can be guaranteed, so that the electronic device can display a smooth picture. For example, in another case, when the electronic device displays the N+1th frame image, the frequency modulation module needs to adjust the CPU frequency to less than the minimum value in the frequency range to meet the performance requirements of the electronic device, and there will be no problems such as heating and reduced battery life caused by high power consumption of the electronic device due to over-supply of performance, but the frequency modulation module usually adjusts the CPU frequency within a fixed frequency range (2.5MHz, 5MHz), and cannot adjust the CPU frequency to less than 5MHz. By using the method provided in the embodiment of the present application, the electronic device can adjust the frequency range of the CPU. For example, the frequency range of the CPU when displaying the image of the N+1th frame after adjustment is (2MHz, 5MHz). In this way, the frequency modulation module can adjust the CPU frequency to less than 2.5MHz, so that the performance of the electronic device can be guaranteed, so that the electronic device can display a smooth picture, while reducing the power consumption of the electronic device and improving the endurance of the electronic device. Therefore, by using the method provided in the embodiment of the present application, the performance and power consumption of the electronic device can be balanced.

[0202] The following describes an implementation process of a frequency modulation method provided in an embodiment of the present application in conjunction with the accompanying drawings.

[0203] Fig.11 1 is a schematic flow chart of a frequency modulation method provided in an embodiment of the present application. The method can be executed by an electronic device, or by a processor or chip in the electronic device, and the embodiment of the present application does not make any limitation. For the convenience of description, the method is described in detail by taking an electronic device as an example.

[0204] S1100: When the electronic device displays an Nth frame of image, the kernel layer determines a first type of CPU load and a second type of CPU load within at least one drawing frame duration.

[0205] It should be understood that the Nth frame image can be understood as the image currently displayed on the screen of the electronic device. At least one drawing frame duration includes the drawing frame duration of the Mth drawing frame task to the drawing frame duration of the Nth drawing frame task, M and N are integers greater than 1, M is less than N, and the drawing frame duration of the Mth drawing frame task to the drawing frame duration of the Nth drawing frame task refers to the continuous drawing frame duration, for example, M is 3, N is 5, and the drawing frame duration of the Mth drawing frame task to the drawing frame duration of the Nth drawing frame task refers to the drawing frame duration of the 3rd drawing frame task to the drawing frame duration of the 5th drawing frame task. The Mth drawing frame task to the Nth drawing frame task can be understood as a historical drawing frame task. At least one drawing frame duration can also refer to the drawing frame duration of the N-K+1th frame drawing task to the drawing frame duration of the Nth frame task in the above embodiment.

[0206] It should also be understood that a frame drawing duration is used to indicate the execution duration of a frame drawing task, and a frame drawing task is used to display a frame image. For example, the 3rd frame drawing task is used to display the 3rd frame image, the 5th frame drawing task is used to display the 5th frame image, the Nth frame drawing task is used to display the Nth frame image, and so on.

[0207] It can also be understood that the first type of CPU load includes the CPU load of at least one CPU cluster. For example, when the processor of the electronic device is a single-core processor, the single-core processor includes a CPU cluster, and a CPU cluster includes a CPU, then the first type of CPU load may include the CPU load of a CPU in a CPU cluster. For another example, the processor of the electronic device is a multi-core processor, and the multi-core processor can be a two-core, a four-core, an eight-core, etc., and the embodiments of the present application are not limited to this. Taking an eight-core processor as an example, the eight-core processor includes three CPU clusters, namely a small-core CPU cluster, a medium-core CPU cluster, and a large-core CPU cluster. The small-core CPU cluster includes three CPUs, the medium-core CPU cluster includes four CPUs, and the medium-core CPU cluster includes one CPU, then the first type of CPU load may include the CPU load of eight CPUs in three CPU clusters. For the explanation of the CPU cluster, please refer to the above embodiment, which will not be repeated here.

[0208] The second type of CPU load includes the CPU load of at least one target thread, where the at least one target thread includes a thread with a wake-up relationship and / or a thread corresponding to the maximum CPU load among multiple threads within each frame duration. For example, please refer to Fig. 9 , Fig. 9 (a) includes the main thread, thread A and rendering thread. The main thread wakes up thread A at time point 1, and thread A wakes up the rendering thread at time point 2. Then the main thread, thread A and rendering thread can all be called target threads. Fig. 9(b) includes the main thread, thread A, thread B and rendering thread. The main thread wakes up thread A at time point 1, thread A wakes up the rendering thread at time point 2, and the rendering thread wakes up thread B at time point 3. Then the main thread, thread A, thread B and rendering thread can be called target threads.

[0209] The thread corresponding to the maximum load among the CPU loads of multiple threads within each frame duration refers to the thread corresponding to the maximum load among the CPU loads of multiple threads within each frame duration from the frame duration of the Mth frame task to the frame duration of the Nth frame task. Exemplarily, the CPU loads of multiple threads within a frame duration include the CPU load of the rendering thread, the CPU load of the main thread, the CPU load of thread A, the CPU load of thread B, etc. The thread corresponding to the maximum value among the CPU loads of the above threads can be used as the target thread (such as thread B). Based on the above method, the thread corresponding to the maximum load among the CPU loads of multiple threads within each frame duration can be obtained.

[0210] For example, the first type of CPU load within at least one drawing frame duration determined by the kernel layer can refer to Fig.10 The second type of CPU load within at least one drawing frame duration determined by the kernel layer can be referred to in Fig.10 The data in rows 10 to 12 and columns 3 to 5.

[0211] In one implementation, the kernel layer may call the first type of CPU load and the second type of CPU load within at least one drawing frame duration through an interface to determine the first type of CPU load and the second type of CPU load within at least one drawing frame duration.

[0212] In another implementation, the kernel layer may call the CPU loads of multiple threads within at least one drawing frame duration through an interface, determine threads with dependencies and threads with a maximum CPU load among the CPU loads of the multiple threads according to thread identifiers carried by the CPU loads of the multiple threads, take the threads with dependencies and threads with a maximum CPU load among the CPU loads of the multiple threads as target threads, and then determine the CPU load of at least one target thread within at least one drawing frame duration.

[0213] In another implementation, the kernel layer may call the number of CPU cycles at the end of each drawing frame duration of at least one drawing frame duration through an interface, and determine the first type of CPU load and the second type of CPU load within the at least one drawing frame duration according to the number of CPU cycles. The explanation of the CPU cycle has been explained in the above embodiment and will not be repeated here.

[0214] S1200: The kernel layer determines the first type of CPU load and the second type of CPU load in the N+1th drawing frame duration based on the first type of CPU load and the second type of CPU load in at least one drawing frame duration.

[0215] It should be understood that the N+1th drawing frame duration is used to indicate the drawing frame duration of the N+1th drawing frame task when the electronic device displays the N+1th frame image. The N+1th drawing frame task can be understood as the next drawing frame task of the current drawing frame task.

[0216] It should also be understood that the first type of CPU load and the second type of CPU load within at least one drawing frame duration can be understood as the first type of CPU load and the second type of CPU load within each drawing frame duration of each drawing frame task of the historical drawing frame tasks.

[0217] In this embodiment of the application, the kernel layer can predict the first and second CPU loads within the frame duration of the next frame task of the current frame task based on the first and second CPU loads within each frame duration of each frame task in the historical frame tasks.

[0218] In the implementation, the kernel layer can obtain a measurement value for characterizing the busyness of the CPU cluster and the increase or decrease trend of the CPU load of the CPU cluster based on the first-category CPU load and the second-category CPU load within each frame duration of each frame task in the historical frame tasks. Based on the measurement value, the first-category CPU load and the second-category CPU load within the frame duration of the next frame task of the current frame task can be predicted.

[0219] S1300: The kernel layer determines a frequency range of a CPU of each CPU cluster that executes an N+1th drawing frame task based on a first type of CPU load and a second type of CPU load within an N+1th drawing frame duration.

[0220] It should be understood that the relationship between CPU load and CPU frequency can be: the greater the CPU load, the greater the CPU frequency, and the smaller the CPU load, the smaller the CPU frequency. In implementation, the kernel layer can determine the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration according to the above relationship.

[0221] For example, the frequency range of the CPU of a CPU cluster that executes the N+1th frame drawing task can be determined by referring to Figure 4 , I will not go into details here.

[0222] S1400: The kernel layer adjusts the CPU frequency of each CPU cluster executing the N+1th frame drawing task based on the frequency range of the CPU of each CPU cluster, so as to display the N+1th frame image.

[0223] The kernel layer adjusts the CPU frequency of each CPU cluster executing the N+1th frame drawing task based on the frequency range of the CPU of each CPU cluster to display the N+1th frame image. The implementation method can refer to the above embodiment and will not be repeated here.

[0224] In the related art, electronic devices adjust the frequency of the CPU within a fixed frequency range, and are unable to adjust the CPU frequency to a specific value within the fixed frequency range, which results in insufficient performance and causes problems such as lag and frame drops in the operation of the electronic device, or are unable to adjust the CPU frequency to a value less than the minimum value within the frequency range, which results in over-performance and causes the electronic device to heat up due to high power consumption, reduced battery life and other problems. That is, the related art cannot balance the performance and power consumption of electronic devices.

[0225] In the embodiment of the present application, the kernel layer can determine the frequency range of the CPU of each CPU cluster executing the next frame drawing task of the current frame drawing task to display the next frame image on the screen of the electronic device (i.e., determine the frequency range of the CPU of each CPU cluster executing the N+1 frame drawing task). Compared with the related technology that the electronic device adjusts the CPU frequency within a fixed frequency range, the present application can adjust the fixed frequency range to obtain the frequency range of the CPU of each CPU cluster executing the next frame drawing task of the current frame drawing task. The kernel layer adjusts the CPU frequency of each CPU cluster executing the N+1 frame drawing task within the adjusted CPU frequency range (i.e., the kernel layer adjusts the CPU frequency of each CPU cluster executing the N+1 frame drawing task based on the frequency range of the CPU of each CPU cluster). The CPU frequency can be made greater than or equal to a specific value within the fixed CPU frequency range, meeting the electronic device's performance requirements while allowing the electronic device to display a smooth picture. The CPU frequency can also be made less than the minimum value within the fixed CPU frequency range, meeting the electronic device's performance requirements while reducing the power consumption of the electronic device, improving the endurance of the electronic device, balancing the power consumption and performance of the electronic device, and improving the user experience.

[0226] Moreover, the kernel layer determines the CPU load of at least one CPU cluster and the CPU load of at least one target thread corresponding to the next drawing frame task of the current drawing frame task based on the CPU load of at least one CPU cluster and the CPU load of at least one target thread corresponding to the historical drawing frame task (i.e., the first CPU load and the second CPU load within at least one drawing frame duration, and the first CPU load and the second CPU load within the N+1 drawing frame duration are determined), and determines the frequency range of the CPU for each CPU cluster to execute the N+1 drawing frame task based on the first CPU load and the second CPU load within the N+1 drawing frame duration. Since the CPU load of at least one CPU cluster can reflect the resource utilization of the entire electronic device, the CPU load of at least one target thread can reflect the resource utilization of certain threads in the electronic device, therefore, based on the CPU loads in the above two dimensions, the accuracy of the determined CPU frequency range for each CPU cluster to execute the N+1 drawing frame task can be improved.

[0227] In some embodiments, the kernel layer determines the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration, including:

[0228] The kernel layer determines the minimum value of the frequency range of the CPU that performs the N+1th drawing frame task in each CPU cluster based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration; and determines the frequency range of the CPU that performs the N+1th drawing frame task in each CPU cluster based on the minimum value of the frequency range of the CPU that performs the N+1th drawing frame task.

[0229] For example, a fixed CPU frequency range (such as Figure 3 The frequency range shown in FIG. 1 is (2.5 MHz, 5 MHz), and the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task is 3 MHz, and the maximum value remains unchanged. In this way, the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task can be determined. For example, the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task is (3 MHz, 5 MHz).

[0230] In an embodiment of the present application, the kernel layer can determine the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task based on the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task. In this way, the amount of calculation when the electronic device determines the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task can be reduced.

[0231] In some embodiments, the kernel layer determines the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration, including:

[0232] The kernel layer determines the minimum value of each candidate frequency range corresponding to the CPU load of each CPU cluster within the N+1th drawing frame duration based on the corresponding relationship between the CPU load of each CPU cluster and each CPU cluster within the N+1th drawing frame duration, and each corresponding relationship is a corresponding relationship between the CPU load of each CPU cluster and the minimum value of the CPU frequency range; based on the corresponding relationship between the second type of CPU load within the N+1th drawing frame duration and each CPU cluster, the minimum value of each alternative frequency range corresponding to the second type of CPU load within the N+1th drawing frame duration is determined; based on the minimum value of each candidate frequency range and the minimum value of each alternative frequency range, the minimum value of the CPU frequency range of each CPU cluster executing the N+1th drawing frame task is determined.

[0233] It should be understood that the corresponding relationship of each CPU cluster can refer to Table 1, Table 2 and Table 3 in the above embodiment, which will not be repeated here.

[0234] It should also be understood that the processor includes a single-core processor and a multi-core processor. The implementation method of the embodiment of the present application is explained with the processor being a multi-core processor, and the multi-core processor including a small-core CPU cluster, a medium-core CPU and a large-core CPU cluster. When the processor is a single-core processor, the implementation method of the kernel layer determining the minimum value of the frequency range of the CPU of the CPU cluster executing the N+1th frame drawing task is the same as the implementation method of the kernel layer determining the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task when the processor is a single-core processor.

[0235] The following describes an implementation method for determining, by the kernel layer, the minimum value of the frequency range of the CPU that executes the N+1th frame drawing task in each CPU cluster, using a small-core CPU cluster in a multi-core processor.

[0236] In one implementation, for example, when the kernel layer determines the minimum value of the CPU frequency range when the small core CPU cluster executes the frame drawing task of the N+1 frame, it can first query the CPU load of the small core CPU cluster within the frame drawing time of the N+1 frame drawing task in the OPP table provided in Table 1 of the above embodiment (the load can be expressed as Fig.10 Mean_util1 shown in the figure) corresponds to the gear position in the OPP table (the gear position can be expressed as Fig.10 Then, the CPU load of the target thread within the frame drawing time of the N+1 frame drawing task is queried (the load can be expressed as Fig.10Mean_util4 characterization shown) corresponds to the gear position in the OPP table (the gear position can be expressed as Fig.10 Finally, the minimum value between Mean_OPP1 and Mean_OPP4 is searched (the minimum value can be expressed as Fig.10 The frequency point in Table 1 (the frequency value corresponding to the frequency point of Mean_OPP1 can be considered as the minimum value of the candidate frequency range corresponding to the CPU load of the small-core CPU cluster, and the frequency value corresponding to the frequency point of Mean_OPP4 can be considered as the minimum value of the candidate frequency range corresponding to the CPU load of the second type of load), and the frequency value corresponding to the frequency point is used as the minimum value of the CPU frequency range when the small-core CPU cluster executes the frame drawing task of the N+1th frame (the minimum value can be Fig.10 Freq_min1 is shown as a representation). Based on the above method, the minimum value of the frequency range of the CPU of each CPU cluster in the large-core CPU cluster, the medium-core CPU cluster and the small-core CPU cluster that executes the N+1th frame drawing task can be determined. It should be noted that when determining the minimum value of the frequency range of the CPU of the large-core CPU cluster that executes the N+1th frame drawing task, a query is made in the corresponding relationship of the large-core CPU cluster (such as Table 3 provided in the above embodiment). When determining the minimum value of the frequency range of the CPU of the medium-core CPU cluster that executes the N+1th frame drawing task, a query is made in the corresponding relationship of the medium-core CPU cluster (such as Table 3 provided in the above embodiment).

[0237] In one implementation, when the kernel layer determines the minimum value of the CPU frequency range when the small-core CPU cluster executes the frame drawing task of the N+1 frame, it can first query the gear (Mean_OPP1) in the OPP table corresponding to the CPU load (Mean_util1) of the small-core CPU cluster within the frame drawing duration of the N+1 frame drawing task in the OPP table provided in Table 1, query the frequency point corresponding to Mean_OPP1 (the frequency value corresponding to the frequency point can be considered as the minimum value of the candidate frequency range corresponding to the CPU load of the small-core CPU cluster), and then query the N+1 frame drawing task. The gear (Mean_OPP4) in the OPP table corresponding to the CPU load (Mean_util4) of the target thread within the frame drawing duration of the task is queried, and the frequency point corresponding to Mean_OPP4 is queried (the frequency value corresponding to this frequency point can be considered as the minimum value of the alternative frequency range corresponding to the second type of CPU load), and finally the maximum value of the frequency points corresponding to Mean_OPP1 and Mean_OPP4 is determined, and the frequency value corresponding to this maximum value is used as the minimum value of the CPU frequency range when the small-core CPU cluster executes the frame drawing task of the N+1 frame (this minimum value can be Fig.10Based on the above method, the minimum value of the frequency range of the CPU in each of the large-core CPU cluster, the medium-core CPU cluster and the small-core CPU cluster that executes the N+1th frame drawing task can be determined.

[0238] In the embodiment of the present application, since the CPU load of the CPU cluster can reflect the resource utilization of the entire electronic device, therefore, based on the corresponding relationship between the CPU load of each CPU cluster and each CPU cluster within the N+1th drawing frame duration, when determining the minimum value of each candidate frequency range corresponding to the CPU load of each CPU cluster within the N+1th drawing frame duration, the granularity is coarser, and the CPU load of at least one target thread included in the second type of CPU load can reflect the resource utilization of certain threads in the electronic device. Based on the corresponding relationship between the second type of CPU load and each CPU cluster within the N+1 drawing frame duration, the minimum value of each candidate frequency range corresponding to the second type of CPU load within the N+1th drawing frame duration is determined, and the granularity is finer. Finally, by comprehensively considering the minimum value of each candidate frequency range obtained based on the coarser granularity and the minimum value of each candidate frequency range obtained based on the finer granularity, the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task can be accurately determined.

[0239] In some embodiments, the at least one CPU cluster includes a first CPU cluster, a second CPU cluster, and a third CPU cluster.

[0240] It should be understood that when the processor is a multi-core processor, at least one CPU cluster includes a first CPU cluster, a second CPU cluster and a third CPU cluster. The first CPU cluster can be the small-core processor mentioned above, the second CPU cluster can be the medium-core processor mentioned above, and the third CPU cluster can be the large-core processor mentioned above.

[0241] In some embodiments, after the kernel layer determines the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task based on the minimum value of each candidate frequency range and the minimum value of each alternative frequency range, the method further includes:

[0242] The kernel layer determines the adjustment amplitude of the minimum value of the frequency range of the CPU of each CPU cluster according to the frame duration of the N+1th frame drawing task and the standard frame duration, where the standard frame duration is determined by the screen frame rate of the electronic device; based on the adjustment amplitude, the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task is adjusted.

[0243] It should be understood that the frame drawing duration of the N+1th frame drawing task can be determined by the difference between the end time of the queue buffer function in the N+1th frame drawing task and the end time of the queue buffer function in the Nth frame drawing task. Figure 7 , Figure 7 The frame drawing task A can be understood as the N+1th frame drawing task, and the frame drawing task B can be understood as the Nth frame drawing task. The frame drawing task A includes the main thread A and the rendering thread A, and the rendering thread A includes the queue buffer function A (QueueBuffer). The frame drawing task B includes the main thread B and the rendering thread B, and the rendering thread B includes the queue buffer function B (QueueBuffer). The duration of the frame drawing task B can be the difference between the end time of the queue buffer function B and the end time of the queue buffer function A.

[0244] The standard frame duration can be determined based on the screen's frame rate. The frame rate refers to the number of frames the screen displays in one second. The standard frame duration refers to the reciprocal of the screen's frame rate. For example, if the screen's frame rate is 60fps (the unit of frame rate), then the standard frame duration is 1 / 60 second.

[0245] In implementation, the kernel layer may substitute the frame drawing duration and the standard frame drawing duration of the N+1th frame drawing task into Formula 6 in the above embodiment to obtain the adjustment amplitude of the minimum value of the frequency range of the CPU of each CPU cluster (such as the Margin value in Formula 6 above), and then adjust the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task according to the adjustment amplitude. Exemplarily, assuming that the minimum value of the CPU frequency range when the small-core CPU cluster determines according to Table 1 to execute the frame drawing task of the N+1 frame is the frequency value corresponding to the frequency point 556, it can be seen from Table 1 that the OPP gear corresponding to 556 is 13, assuming that the Margin determined by the frequency prediction module according to Formula 6 is 1, then the frequency prediction module can reduce the gear of the OPP by one gear, for example, reduce the gear of the OPP from 13 to 12, and the minimum value of the CPU frequency range corresponding to gear 12 is the frequency value corresponding to the frequency point 672. The kernel layer can increase the minimum value of the CPU frequency range from the frequency value corresponding to 556 to the frequency value corresponding to 672. The frequency value adjusted within the above frequency range may increase the CPU frequency of the electronic device executing the frame drawing task of the Nth frame, shorten the frame drawing time of the frame drawing task of the N+1 frame, and improve the performance of the electronic device.

[0246] It should be understood that the higher the frequency of the electronic device's CPU, the lower the frame drawing time of the electronic device to perform the frame drawing task, and the lower the frequency of the electronic device's CPU, the higher the frame drawing time of the electronic device to perform the frame drawing task. It should also be understood that when the frame drawing time of the frame drawing task of the Nth frame executed by the electronic device is equal to the standard frame drawing time, the interface is smooth when the electronic device displays the N+1th frame image, and no heat is generated. When the frame drawing time of the frame drawing task of the N+1th frame executed by the electronic device is greater than the standard frame drawing time, the performance of the electronic device is insufficient and the interface freezes. Therefore, in an embodiment of the present application, after determining the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task based on the minimum value of each candidate frequency range and the minimum value of each alternative frequency range at the kernel layer, the adjustment amplitude of the minimum value of the frequency range of the CPU of each CPU cluster is determined according to the frame drawing time of the N+1th frame drawing task and the standard frame drawing time; based on the adjustment amplitude, the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task is adjusted, which can increase or guarantee the performance of the electronic device, so that the interface of the electronic device is smooth when displaying the N+1th frame image, and no heat is generated.

[0247] In some embodiments, the kernel layer determines the first type of CPU load and the second type of CPU load within at least one drawing frame duration, including:

[0248] The kernel layer determines the first type of CPU load for each drawing frame duration within at least one drawing frame duration according to the number of CPU cycles completed by at least one CPU cluster corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task; and determines the second type of CPU load for each drawing frame duration within at least one drawing frame duration according to the number of CPU cycles completed by at least one target thread corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task.

[0249] It should be understood that the end time of the Nth to M-1th drawing frame tasks may refer to the end time of the Nth to Kth drawing frame tasks mentioned in the above embodiment.

[0250] In the embodiment of the present application, the kernel layer determines the first type of CPU load of each drawing frame duration within at least one drawing frame duration in the following manner:

[0251] For example, please refer to Figure 8 , Figure 8The processor shown is a multi-core processor. The multi-core processor includes eight CPUs from CPU0 to CPU7, wherein CPU0 to CPU2 form a CPU cluster, which can be called a small-core CPU cluster, CPU3 to CPU6 form a CPU cluster, which can be called a medium-core CPU cluster, and CPU7 forms a CPU cluster, which can be called a large-core CPU cluster. When determining the CPU load of CPU0 within the frame drawing duration of the Nth frame drawing task, the number of CPU cycles completed by CPU0 corresponding to the end time of the Nth frame drawing task can be calculated. k,N , and the number of CPU cycles that CPU0 has completed at the end of the N-1 frame drawing task k,N-1 , and the constant factor corresponding to the small-core CPU cluster k Substitute into formula 1 to get demand k , then demand k Substituting tgt time into Formula 2, the CPU load of CPU0 within the frame duration of the Nth frame drawing task can be determined. Based on the above method, the CPU load of CPU0 to CPU7 within the frame duration of the Nth frame drawing task can be determined to obtain the first type of CPU load within the frame duration of the Nth frame drawing task. Similarly, based on the above method, the CPU load of CPU0 to CPU7 within each frame duration of the N-1th frame, the N-2th frame, ... the N-K+1th frame drawing tasks can be determined to obtain the first type of CPU load for each frame duration within at least one frame duration.

[0252] In the embodiment of the present application, the kernel layer determines the second type of CPU load of each drawing frame duration within at least one drawing frame duration in the following manner:

[0253] For example, please refer to Figure 8 , assuming that the second type of CPU load includes a target thread, which is thread A. When the load calculation module determines the CPU load of thread A within the frame drawing duration of the Nth frame drawing task, it can calculate the number of CPU cycles completed by thread A in CPU0 corresponding to the end time of the Nth frame drawing task. k,N , and the number of CPU cycles completed by thread A in CPU0 at the end of the N-1 frame drawing task k,N-1 , and the constant factor corresponding to the small-core CPU cluster k Substitute into formula 1 and formula 2, and the number of CPU cycles completed by thread A in CPU1 corresponding to the end time of the Nth frame drawing task cycles k,N , and the number of CPU cycles completed by thread A in CPU1 at the end of the N-1 frame drawing taskk,N-1 , and the constant factor corresponding to the small-core CPU cluster k Substituting into Formula 1 and Formula 2, based on the above method, the number of CPU cycles completed by thread A in each CPU (CPU0 to CPU7) corresponding to the end time of the Nth frame drawing task can be calculated as cycles k,N , and the number of CPU cycles completed by thread A of each CPU (CPU0 to CPU7) at the end of the N-1 frame drawing task k,N-1 , and the constant factor corresponding to each CPU cluster (large core CPU cluster, medium core CPU cluster, small core CPU cluster) k Substituting into Formula 1 and Formula 2, the CPU load of thread A within the drawing frame duration of the Nth frame drawing task can be determined to obtain the second type of CPU load within the Nth frame drawing duration. Similarly, based on the above method, the CPU load of thread A within each drawing frame duration of the N-1th frame, the N-2th frame, ... the N-K+1th frame drawing tasks can be determined to obtain the second type of CPU load for each drawing frame duration within at least one drawing frame duration.

[0254] In the embodiment of the present application, the kernel layer can accurately determine the first type of CPU load of each drawing frame duration within at least one drawing frame duration based on the number of CPU cycles completed by at least one CPU cluster corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task; and can accurately determine the second type of CPU load of each drawing frame duration within at least one drawing frame duration based on the number of CPU cycles completed by at least one target thread corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task.

[0255] In some embodiments, at least one drawing frame duration includes a drawing frame duration of an i-th drawing frame task, where i is an integer greater than or equal to M and less than or equal to N; and the kernel layer determines the first type of CPU load of each drawing frame duration within the at least one drawing frame duration according to the number of CPU cycles completed by at least one CPU cluster corresponding to each end time of the N-th drawing frame task to the M-1-th drawing frame task, including:

[0256] The kernel layer determines the first type of CPU load within the i-th drawing frame duration based on the difference between the number of CPU cycles completed by at least one CPU cluster corresponding to the end time of the i-th drawing frame task and the number of CPU cycles completed by at least one CPU cluster corresponding to the end time of the i-1-th drawing frame task;

[0257] And, the kernel layer determines the second type of CPU load of each drawing frame duration within at least one drawing frame duration according to the number of CPU cycles completed by at least one target thread corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task, including:

[0258] The kernel layer determines the second type of CPU load within the i-th drawing frame duration based on the difference between the number of CPU cycles completed by at least one target thread corresponding to the end time of the i-th drawing frame task and the number of CPU cycles completed by at least one target thread corresponding to the end time of the i-1-th drawing frame task.

[0259] It should be understood that i is an integer greater than or equal to M and less than or equal to N, and the i-th drawing frame task is any one of the M-th drawing frame task to the N-th drawing frame task.

[0260] In the implementation, when the kernel layer determines the first type of CPU load within the i-th drawing frame duration, it can be determined based on the difference between the number of CPU cycles completed by at least one CPU cluster corresponding to the end time of the i-th drawing frame task and the number of CPU cycles completed by at least one CPU cluster corresponding to the end time of the i-th previous drawing frame task (i-1-th drawing frame task).

[0261] When the kernel layer determines the second type of CPU load within the duration of the i-th drawing frame, it can be determined based on the difference between the number of CPU cycles completed by at least one CPU cluster corresponding to the end time of the i-th drawing frame task and the number of CPU cycles completed by at least one CPU cluster corresponding to the end time of the i-th previous drawing frame task (i-1-th drawing frame task).

[0262] In some embodiments, each end time is an end time of the queue buffer function in each of the Nth frame drawing task to the M-1th frame drawing task.

[0263] It should be understood that during the frame drawing process, the thread that interacts relatively closely with the user is the rendering thread. The rendering thread includes a queue buffer function (QueueBuffer function). The QueueBuffer function is used to place the completed image frame data in the queue buffer (BufferQueue). Therefore, the present application can set the end time of each frame drawing task from the Nth frame drawing task to the M-1th frame drawing task as the end time of the QueueBuffer function of the rendering thread of each frame drawing task.

[0264] In the related art, it is difficult for the kernel layer to determine the end time of a frame drawing task, resulting in inaccurate end time of the determined frame drawing task. In the embodiment of the present application, each end time can be set as the end time of the queue buffer function in each frame drawing task from the Nth frame drawing task to the M-1th frame drawing task, which can improve the accuracy of the determined end time of the frame drawing task.

[0265] In some embodiments, the kernel layer determines the first type of CPU load and the second type of CPU load for the N+1th drawing frame duration based on the first type of CPU load and the second type of CPU load within at least one drawing frame duration, including:

[0266] The kernel layer determines the first type of CPU load for the N+1th drawing frame duration based on the CPU load of each CPU in at least one CPU cluster within at least one drawing frame duration, the CPU load of each CPU within the Nth frame drawing frame duration, and the CPU load of each CPU within the Mth frame drawing frame duration; and determines the second type of CPU load for the N+1th drawing frame duration based on the CPU load of each target thread in at least one target thread within at least one drawing frame duration, the CPU load of each target thread within the Nth frame drawing frame duration, and the CPU load of each target thread within the Mth frame drawing duration.

[0267] In the implementation, the kernel layer determines the first type of CPU load of the N+1th drawing frame duration in the following way:

[0268] First, the kernel layer substitutes the CPU load of each CPU in at least one CPU cluster within at least one drawing frame duration and the number of drawing frame durations into Formula 3 mentioned in the above embodiment to obtain the average of the sum of the CPU loads of each CPU in at least one CPU cluster within at least one drawing frame duration. For example, assuming that the processor is Figure 8 In the multi-core processor shown, the Nth frame drawing task represents the 5th frame drawing task, and the NMth frame drawing task represents the 3rd frame drawing task. The kernel layer can substitute the CPU load of CPU0 in the small core CPU cluster within the frame drawing time of the 3rd frame drawing task, the CPU load of CPU0 in the small core CPU cluster within the frame drawing time of the 4th frame drawing task, the CPU load of CPU0 in the small core CPU cluster within the frame drawing time of the 5th frame drawing task, and the number 3 into formula 1, and calculate the average of the sum of the CPU loads of CPU0 in the small core CPU cluster within each frame drawing time of the 3rd frame drawing task to the 5th frame drawing task. Based on the above method, the average of the sum of the CPU loads of CPU0 to CPU7 within each frame drawing time of the 3rd frame drawing task to the 5th frame drawing task can be calculated respectively.

[0269] Next, the CPU load of each CPU in the Nth frame drawing time of the kernel layer and the CPU load of each CPU in the Mth frame drawing time are substituted into Formula 4 mentioned in the above embodiment. For example, assuming that the processor is Figure 8 In the multi-core processor shown in the figure, the Nth frame drawing task represents the 5th frame drawing task, the N-1th frame drawing task represents the 4th frame drawing task, the CPU load of CPU0 during the drawing time of the 4th frame drawing task is 30%, and the CPU load of CPU0 during the drawing time of the 5th frame drawing task is 50%, then the util in formula 4 k，t -util k，t-1 =20%, then d in Formula 4 is 20%. Assuming that the CPU load of CPU0 is 50% during the frame drawing time of the 4th frame drawing task, and the CPU load of CPU0 is 30% during the frame drawing time of the 5th frame drawing task, then util in Formula 4 is k，t -util k，t-1 is negative 20%, and at this time d in Formula 4 is 0. Based on the above method, the d values ​​of the CPU loads of CPU0 to CPU7 can be obtained respectively.

[0270] Finally, the kernel layer substitutes the results of Formula 3 and Formula 4 into Formula 5 to determine the first type of CPU load for the N+1th frame duration. For example, assuming that the Nth frame drawing task represents the 5th frame drawing task, the NMth frame drawing task represents the 3rd frame drawing task, the CPU load of CPU0 during the frame duration of the 3rd frame drawing task is 35%, the CPU load of CPU0 during the frame duration of the 4th frame drawing task is 40%, and the CPU load of CPU0 during the frame duration of the 5th frame drawing task is 45%. Then, the average of the sum of the CPU loads of CPU0 in the small-core CPU cluster during each frame duration from the 3rd frame drawing task to the 5th frame drawing task calculated according to Formula 3 is 45%, d calculated according to Formula 4 is 5%, and the CPU load of CPU0 for the N+1(6)th frame duration calculated according to Formula 5 is

[0271] Based on the above method, the CPU load of each CPU in the N+1th drawing frame duration can be determined to obtain the first type of CPU load. For example, based on the above method, the CPU load of CPU0 to CPU7 in the N+1th drawing frame duration can be determined, the sum of the CPU loads of CPU0 to CPU2 in the N+1th drawing frame duration is averaged to obtain the CPU load of the small-core CPU cluster in the N+1th drawing frame duration, the sum of the CPU loads of CPU3 to CPU6 in the N+1th drawing frame duration is averaged to obtain the CPU load of the medium-core CPU cluster in the N+1th drawing frame duration, the sum of the CPU loads of CPU7 in the N+1th drawing frame duration is averaged to obtain the CPU load of the large-core CPU cluster in the N+1th drawing frame duration, and the first type of CPU load is obtained based on the CPU load of the small-core CPU cluster, the CPU load of the medium-core CPU cluster, and the CPU load of the large-core CPU cluster.

[0272] In the implementation, the second type of CPU load for determining the duration of the N+1th drawing frame can be implemented as follows:

[0273] First, the kernel layer substitutes the CPU load of each target thread in at least one target thread within at least one drawing frame duration and the number of drawing frame durations into Formula 3 mentioned in the above embodiment, and obtains the average of the sum of the CPU loads of each target thread in at least one target thread within at least one drawing frame duration. Exemplarily, assuming that the target threads include the main thread, the rendering thread and the thread A, the Nth frame drawing task represents the 5th frame drawing task, and the NMth frame drawing task represents the 3rd frame drawing task, the kernel layer can substitute the CPU load of the main thread within the frame drawing time of the 3rd frame drawing task, the CPU load of the main thread within the frame drawing time of the 4th frame drawing task, the CPU load of the main thread within the frame drawing time of the 5th frame drawing task, and the number 3 into formula 1, and calculate the average of the sum of the CPU loads of the main thread within each frame drawing time of the 3rd frame drawing task to the 5th frame drawing task. Based on the above method, the average of the sum of the CPU loads of the main thread, the rendering thread and the thread A within each frame drawing time of the 3rd frame drawing task to the 5th frame drawing task can be calculated respectively.

[0274] Secondly, the CPU load of each target thread within the Nth frame drawing duration of the kernel layer and the CPU load of each target thread within the Mth frame drawing duration are substituted into Formula 4 mentioned in the above embodiment. For example, assuming that the Nth frame drawing task represents the 5th frame drawing task, the N-1th frame drawing task represents the 4th frame drawing task, the CPU load of the main thread within the 4th frame drawing task is 30%, and the CPU load of the main thread within the 5th frame drawing task is 50%, then the util in Formula 4 is k，t -util k，t-1is 20%, and d in Formula 4 is 20%. Assuming that the CPU load of the main thread slave is 50% during the frame drawing time of the 4th frame drawing task, and the CPU load of the main thread is 30% during the frame drawing time of the 5th frame drawing task, then the util in Formula 4 is k，t -util k，t-1 is negative 20%, and d in Formula 4 is 0. Based on the above method, the d values ​​of the CPU loads of the main thread, rendering thread, and thread A can be obtained respectively.

[0275] Finally, the kernel layer substitutes the results of Formula 3 and Formula 4 into Formula 5 to determine the first type of CPU load for the N+1th frame duration. For example, assuming that the Nth frame drawing task represents the 5th frame drawing task, the NMth frame drawing task represents the 3rd frame drawing task, the CPU load of the main thread during the frame duration of the 3rd frame drawing task is 35%, the CPU load of the main thread during the frame duration of the 4th frame drawing task is 40%, and the CPU load of the main thread during the frame duration of the 5th frame drawing task is 45%. Then, the average of the sum of the CPU loads of the main thread during each frame duration of the 3rd frame drawing task to the 5th frame drawing task calculated according to Formula 3 is 45%, d calculated according to Formula 4 is 5%, and the CPU load of the main thread for the N+1(6)th frame duration calculated according to Formula 5 is

[0276] Based on the above method, the CPU load of each target thread in the N+1th frame duration can be determined to obtain the second type of CPU load. For example, based on the above method, the CPU load of the main thread, the CPU load of the rendering thread, and the CPU load of thread A in the N+1th frame duration can be determined respectively, and the sum of the CPU load of the main thread, the CPU load of the rendering thread, and the CPU load of thread A in the N+1th frame duration is averaged to obtain the CPU load of the small-core CPU cluster in the N+1th frame duration, and the sum of the CPU loads of CPU3 to CPU6 in the N+1th frame duration is averaged to obtain the second type of CPU load in the N+1th frame duration.

[0277] In the embodiment of the present application, since the CPU load of each CPU in at least one CPU cluster within at least one drawing frame duration and the CPU load of each target thread in at least one target thread within at least one drawing frame duration can represent the busyness of the CPU, the CPU load of each CPU within the Nth frame drawing duration and the CPU load of each CPU within the Mth frame drawing duration and the CPU load of each target thread within the Nth frame drawing duration and the CPU load of each target thread within the Mth frame drawing duration can represent the increase or decrease trend of the CPU load, based on the busyness of the CPU and the increase or decrease trend of the CPU load, the accuracy of determining the first type of CPU load for the N+1th drawing frame duration and the second type of CPU load for the N+1th drawing frame duration can be improved.

[0278] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0279] The embodiment of the present application provides a computer program product, when the computer program product is run on an electronic device, the electronic device executes the technical solution in the above embodiment. Its implementation principle and technical effect are similar to those of the above method-related embodiments, and will not be repeated here.

[0280] The embodiment of the present application provides a readable storage medium, the readable storage medium contains instructions, when the instructions are executed in an electronic device, the electronic device executes the technical solution of the above embodiment. The implementation principle and technical effect are similar, and will not be repeated here.

[0281] The embodiment of the present application provides a chip, the chip is used to execute instructions, when the chip is running, the technical solution in the above embodiment is executed. The implementation principle and technical effect are similar, and will not be repeated here.

[0282] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a high-density digital video disc (DVD)), or a semiconductor medium (eg, a solid state disk (SSD)).

[0283] It should be understood that the "embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, the various embodiments in the entire specification do not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application.

[0284] In this application, elements expressed in the singular are intended to mean "one or more" rather than "one and only one", unless otherwise specified. In this application, "at least one" is intended to mean "one or more", and "more than one" is intended to mean "two or more", unless otherwise specified.

[0285] In this document, the term "at least one of..." or "at least one of..." means all or any combination of the listed items. For example, "at least one of A, B, and C" may mean: A exists alone, B exists alone, C exists alone, A and B exist at the same time, B and C exist at the same time, and A, B, and C exist at the same time, where A may be singular or plural, B may be singular or plural, and C may be singular or plural.

[0286] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0287] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0288] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0289] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0290] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0291] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks or optical disks.

[0292] The same or similar parts between the various embodiments in this application can refer to each other. In the various embodiments in this application, and the various implementation methods / implementation methods / implementation methods in each embodiment, if there is no special explanation and logical conflict, the terms and / or descriptions between different embodiments and the various implementation methods / implementation methods / implementation methods in each embodiment are consistent and can be referenced to each other. The technical features in different embodiments and the various implementation methods / implementation methods / implementation methods in each embodiment can be combined to form new embodiments, implementation methods, implementation methods, or implementation methods according to their inherent logical relationships. The above-described implementation methods of this application do not constitute a limitation on the scope of protection of this application.

[0293] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims. In short, the above is only a preferred embodiment of the technical solution of the present application, and is not used to limit the protection scope of the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A frequency modulation method, applied to an electronic device, the electronic device comprising a core layer, characterized in that: The method comprises: In the case where the electronic device displays an N-th frame of image, the kernel layer determines a first type of CPU load and a second type of CPU load within at least one drawing frame duration, where one drawing frame duration is used to indicate an execution duration of a drawing frame task, and one drawing frame task is used to display one frame of image, and the at least one drawing frame duration includes a drawing frame duration from an M-th drawing frame task to a drawing frame duration of an N-th drawing frame task, and the N-th drawing frame task is used to display the N-th frame of image, M and N are integers greater than 1, M is less than N, the first type of CPU load includes a CPU load of at least one CPU cluster, the second type of CPU load includes a CPU load of at least one target thread, and the at least one target thread includes a thread having a wake-up relationship and / or a thread corresponding to a maximum load among CPU loads of multiple threads within each drawing frame duration; The kernel layer determines the first type of CPU load and the second type of CPU load of the N+1th drawing frame duration based on the first type of CPU load and the second type of CPU load within the at least one drawing frame duration, wherein the N+1th drawing frame duration is used to indicate the drawing frame duration of the N+1th drawing frame task when the electronic device displays the N+1th frame of image; The kernel layer determines the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration; The kernel layer adjusts the CPU frequency of each CPU cluster executing the N+1th frame drawing task based on the frequency range of the CPU of each CPU cluster, so as to display the N+1th frame image.

2. The method according to claim 1, characterized in that The kernel layer determines the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration, including: The kernel layer determines, based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration, a minimum value of a frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task; The kernel layer determines the frequency range of the CPU in each CPU cluster executing the N+1th frame drawing task based on the minimum value of the frequency range of the CPU in each CPU cluster executing the N+1th frame drawing task.

3. The method according to claim 2, characterized in that The kernel layer determines the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th drawing frame task based on the first type of CPU load and the second type of CPU load within the N+1th drawing frame duration, including: The kernel layer determines, based on the correspondence between the CPU load of each CPU cluster and each CPU cluster within the N+1th drawing frame duration, the minimum value of each candidate frequency range corresponding to the CPU load of each CPU cluster within the N+1th drawing frame duration, wherein each correspondence is a correspondence between the CPU load of each CPU cluster and the minimum value of the CPU frequency range; The kernel layer determines, based on the correspondence between the second type of CPU load within the N+1 drawing frame duration and each CPU cluster, a minimum value of each candidate frequency range corresponding to the second type of CPU load within the N+1 drawing frame duration; The kernel layer determines the minimum value of the frequency range of the CPU in each CPU cluster executing the N+1th frame drawing task based on the minimum value of each candidate frequency range and the minimum value of each alternative frequency range.

4. The method according to claim 3, characterized in that The at least one CPU cluster includes a first CPU cluster, a second CPU cluster, and a third CPU cluster.

5. The method according to claim 3 or 4, characterized in that: After the kernel layer determines the minimum value of the frequency range of the CPU of each CPU cluster executing the N+1th frame drawing task based on the minimum value of each candidate frequency range and the minimum value of each alternative frequency range, the method further includes: The kernel layer determines the adjustment amplitude of the minimum value of the frequency range of the CPU of each CPU cluster according to the frame drawing duration of the N+1th frame drawing task and the standard frame drawing duration, wherein the standard frame drawing duration is determined by the screen frame rate of the electronic device; The kernel layer adjusts the minimum value of the frequency range of the CPU in each CPU cluster executing the N+1th frame drawing task based on the adjustment amplitude.

6. The method according to any one of claims 1 to 5, characterized in that: The frame drawing duration of the N+1th frame drawing task is determined by the difference between the end time of the queue buffer function in the N+1th frame drawing task and the end time of the queue buffer function in the Nth frame drawing task.

7. The method according to any one of claims 1 to 6, characterized in that: The kernel layer determines the first type of CPU load and the second type of CPU load within at least one drawing frame duration, including: The kernel layer determines the first type of CPU load of each drawing frame duration within the at least one drawing frame duration according to the number of CPU cycles completed by the at least one CPU cluster corresponding to each end time of the Nth drawing frame task to the M-1th drawing frame task; The kernel layer determines the second type of CPU load for each drawing frame duration within the at least one drawing frame duration according to the number of CPU cycles completed by the at least one target thread corresponding to each end time from the Nth drawing frame task to the M-1th drawing frame task.

8. The method according to claim 7, characterized in that The at least one drawing frame duration includes the drawing frame duration of the i-th drawing frame task, where i is an integer greater than or equal to M and less than or equal to N; and the kernel layer determines the first type of CPU load of each drawing frame duration within the at least one drawing frame duration according to the number of CPU cycles completed by the at least one CPU cluster corresponding to each end time of the N-th drawing frame task to the M-1-th drawing frame task, including: The kernel layer determines the first type of CPU load within the i-th drawing frame duration based on the difference between the number of CPU cycles completed by the at least one CPU cluster corresponding to the end time of the i-th drawing frame task and the number of CPU cycles completed by the at least one CPU cluster corresponding to the end time of the i-1-th drawing frame task; And, the kernel layer determines the second type of CPU load of each drawing frame duration within the at least one drawing frame duration according to the number of CPU cycles completed by the at least one target thread corresponding to each end time of the Nth drawing frame task to the M-1th drawing frame task, including: The kernel layer determines the second type of CPU load within the i-th drawing frame duration based on the difference between the number of CPU cycles completed by the at least one target thread corresponding to the end time of the i-th drawing frame task and the number of CPU cycles completed by the at least one target thread corresponding to the end time of the i-1-th drawing frame task.

9. The method according to claim 7 or 8, characterized in that: Each end time is an end time of the queue buffer function in each of the Nth frame drawing task to the M-1th frame drawing task.

10. The method according to any one of claims 1 to 9, characterized in that: The kernel layer determines the first type of CPU load and the second type of CPU load of the N+1th drawing frame duration based on the first type of CPU load and the second type of CPU load within the at least one drawing frame duration, including: The kernel layer determines the first type of CPU load of the N+1th drawing frame duration based on the CPU load of each CPU in the at least one CPU cluster within the at least one drawing frame duration, the CPU load of each CPU within the Nth frame drawing frame duration, and the CPU load of each CPU within the Mth frame drawing frame duration; The kernel layer determines the second type of CPU load of the N+1th drawing frame duration based on the CPU load of each target thread in the at least one target thread within the at least one drawing frame duration, the CPU load of each target thread within the Nth frame drawing frame duration, and the CPU load of each target thread within the Mth frame drawing duration.

11. An electronic device, characterized in that: The electronic device includes: one or more processors, and a memory; The memory is coupled to the one or more processors, and the memory is used to store computer program codes, wherein the computer program codes include computer instructions, and the one or more processors call the computer instructions to enable the electronic device to perform the method according to any one of claims 1 to 10.

12. A chip system, characterized in that: The chip system is applied to an electronic device, and the chip system includes one or more processors, and the one or more processors are used to call computer instructions so that the electronic device executes the method as described in any one of claims 1 to 10.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium comprises instructions, and when the instructions are executed on an electronic device, the electronic device executes the method according to any one of claims 1 to 10.

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