Pixel circuit, display panel and display device

Abstract

The application discloses a pixel circuit, a display panel and a display device, relates to the technical field of display, and can improve the dark line defect caused by local electrode short circuit, improve display effect and display yield. The pixel circuit comprises: a first sub-circuit electrically connected with a first node, the first sub-circuit being used for electrically connecting a data signal line; a second sub-circuit electrically connected with a second node, the second sub-circuit being used for electrically connecting a first power supply line; a driving sub-circuit electrically connected with the first node, the second node and a third node, the third node being used for electrically connecting a first electrode of a light-emitting device, a second electrode of the light-emitting device being used for electrically connecting a common electrode; a reset sub-circuit comprising a protection unit and a reset unit, the protection unit being electrically connected with the reset unit, the protection unit being electrically connected with the third node, and the reset unit being used for electrically connecting a second power supply connection line; the protection unit comprises a resistor, and the resistivity of the protection unit is less than the resistivity of the second power supply connection line.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a pixel circuit, a display panel and a display device. BACKGROUND

[0002] At present, in the field of display technology, as the core circuit of the display driver backplane, the pixel circuit, together with the gate drive circuit and the data drive circuit, constitutes a basic display driver backplane. Under the control of the row scanning signal output by the gate drive circuit, the pixel circuit writes the display data signal output by the data drive circuit into the storage capacitor of the pixel circuit row by row through the switch tube in the pixel circuit. The drive tube in the pixel circuit accurately and continuously outputs voltage or current to the display optoelectronic device, such as the pixel electrode of the light-emitting device or the liquid crystal panel, under the control of the voltage stored in the capacitor. The display device displays image information through active light emission or passive light emission and other ways under the drive of the current or voltage.

[0003] However, the existing pixel circuit structure is prone to cause dark line defects of the whole row, the whole column or the cross type due to local electrode short circuit, which seriously affects the display effect and yield of the display panel. SUMMARY

[0004] The embodiments of the present application provide a pixel circuit, a display panel and a display device, which can improve the dark line defects caused by local electrode short circuit and improve the display effect and yield.

[0005] In a first aspect, the embodiments of the present application provide a pixel circuit, comprising:

[0006] A first sub-circuit is electrically connected with a first node, and the first sub-circuit is configured to electrically connect a data signal line;

[0007] A second sub-circuit is electrically connected with a second node, and the second sub-circuit is configured to electrically connect a first power supply line;

[0008] A driving sub-circuit is electrically connected with the first node, the second node and a third node respectively, the third node is configured to be electrically connected with a first pole of a light-emitting device, and a second pole of the light-emitting device is configured to be electrically connected with a common electrode;

[0009] A reset sub-circuit comprises a protection unit and a reset unit, the protection unit is electrically connected with the reset unit, the protection unit is electrically connected with the third node, and the reset unit is configured to be electrically connected with a second power supply connection line configured to transmit a second power supply signal;

[0010] The protection unit comprises a resistor, and the resistivity of the protection unit is less than the resistivity of the second power supply connection line.

[0011] In some embodiments, in the case that the first electrode and the second electrode of the light emitting device are short-circuited, the potential accessed by the second power connection line and the potential accessed by the common electrode have a first difference, the first difference is greater than or equal to a driving voltage difference for the light emitting device to emit light, the protection unit is configured to be open-circuited under the action of a current formed between the second power connection line and the third node, and the reset unit is disconnected from the third node.

[0012] In some embodiments, the first sub-circuit, the second sub-circuit, the driving sub-circuit and the reset unit each include a transistor, the second sub-circuit includes a capacitor unit, a first end of the capacitor is electrically connected to the first node, a second end of the capacitor unit is electrically connected to the second node, and a third end of the capacitor unit is electrically connected to a fourth node, and the fourth node is configured to be electrically connected to the first power line.

[0013] The driving sub-circuit includes a P-type transistor, and the reset unit includes an N-type transistor.

[0014] In some embodiments, the first sub-circuit includes a first transistor, the second sub-circuit includes a second transistor, the driving sub-circuit includes a driving transistor, the reset unit includes a third transistor, and the capacitor unit includes a first capacitor and a second capacitor.

[0015] A gate of the first transistor is configured to receive a first control signal, a first electrode of the first transistor is configured to be electrically connected to a data signal line, a second electrode of the first transistor is electrically connected to the first node, a gate of the second transistor is configured to receive a second control signal, a first electrode of the second transistor is electrically connected to the fourth node, and a second electrode of the second transistor is electrically connected to the second node, two ends of the first capacitor are respectively electrically connected to the first node and the second node, two ends of the second capacitor are respectively electrically connected to the second node and the fourth node, a gate of the driving transistor is electrically connected to the first node, a first electrode of the driving transistor is electrically connected to the second node, a second electrode of the driving transistor is electrically connected to the third node, a gate of the third transistor is configured to receive a third control signal, a first electrode of the third transistor is electrically connected to the protection unit, and a second electrode of the third transistor is configured to be electrically connected to the second power connection line.

[0016] In some embodiments, in the case that the first electrode and the second electrode of the light emitting device are short-circuited, the first control signal is configured to control the first transistor to be turned off so as to disconnect the first sub-circuit, the second control signal is configured to control the second transistor to be turned off so as to disconnect the second sub-circuit, and the third control signal is configured to control the third transistor to be turned on so as to turn on the reset unit; and / or,

[0017] In the presence of a short circuit between the first electrode and the second electrode of the light emitting device, the potential of the second power signal is a ground potential, and the potential of the common electrode is a negative potential.

[0018] In some embodiments, the protection unit comprises an electrical fuse;

[0019] In the presence of a short circuit between the first electrode and the second electrode of the light emitting device, the electrical fuse is used to be blown under the action of a current to disconnect the reset unit from the third node.

[0020] In some embodiments, the protection unit comprises an electrical fuse;

[0021] The electrical fuse is arranged in the same layer as at least one signal line, the resistivity of the electrical fuse is less than the resistivity of the signal line arranged in the same layer; and / or,

[0022] The electrical fuse is arranged in the same layer as a gate of a transistor, the resistivity of the electrical fuse is less than the resistivity of the gate of the transistor; and / or,

[0023] The electrical fuse is arranged in the same layer as a semiconductor layer, the resistivity of the electrical fuse is less than the resistivity of the semiconductor layer arranged in the same layer.

[0024] In some embodiments, the protection unit comprises an electrical fuse;

[0025] The electrical fuse comprises a first connection end, a second connection end and a fuse segment, the fuse segment, the first connection end and the second connection end are an integrated structure, and the fuse segment is connected between the first connection end and the second connection end;

[0026] The first connection end is electrically connected to the third node through a first via, and the second connection end is electrically connected to the reset unit through a second via;

[0027] The size of the fuse segment in a first direction is less than the size of the connection end, the first direction intersects with a second direction, and the second direction is the length direction of the fuse segment.

[0028] In some embodiments, the pixel circuit further comprises:

[0029] A process reference structure arranged in the same layer as the electrical fuse;

[0030] The process reference structure is arranged on different sides of the fuse segment from the first connection end and the second connection end, respectively;

[0031] The orthographic projection of the process reference structure on a substrate layer does not overlap with the orthographic projection of the electrical fuse on the substrate layer.

[0032] In some embodiments, the second power connection line is configured to be electrically connected to a second power line, and the second power line is electrically connected to a plurality of the second power connection lines;

[0033] The current density of the second power connection line is greater than the current density of the electrical fuse;

[0034] The current density of the second power line is greater than the current density of the electrical fuse.

[0035] In some embodiments, the distance between the electrical fuse and the first pole of the light-emitting device is greater than the distance between the electrical fuse and the second power connection line; and / or,

[0036] The electrical fuse has a fuse voltage range of 7.5V to 9V; and / or,

[0037] The line width of the fuse section ranges from 0.02μm to 0.2μm, and the thickness of the fuse section ranges from 200nm to 500nm; and / or,

[0038] The fuse section is arranged in a curve or a polyline.

[0039] In some embodiments, the protection unit includes an electrical fuse, and the electrical fuse is configured to be fused under the action of a current in the presence of a short circuit between the first pole and the second pole of the light-emitting device, so as to disconnect the reset unit from the third node;

[0040] The electrical fuse has a sheet resistance ranging from 0.06 to 0.3 ohm / □; and / or,

[0041] The electrical fuse at least partially surrounds the third transistor; and / or,

[0042] The gate of the third transistor is spaced from the electrical fuse by a shielding layer.

[0043] In a second aspect, the embodiments of the present application provide a display panel, comprising:

[0044] The pixel circuit according to the first aspect;

[0045] A light-emitting device, a first pole of the light-emitting device being electrically connected to the third node of the pixel circuit;

[0046] A data signal line, electrically connected to the first sub-circuit of the pixel circuit;

[0047] A first power line, electrically connected to the second sub-circuit of the pixel circuit;

[0048] A second power connection line, electrically connected to the reset unit of the pixel circuit;

[0049] a second power line, electrically connected with the plurality of pixel circuits through the second power connection lines;

[0050] a common electrode, electrically connected with the second electrode of the light emitting device.

[0051] In a third aspect, the embodiment of the present application provides a display device, comprising:

[0052] The display panel according to the second aspect.

[0053] By arranging the protection unit in the pixel circuit, the protection unit can comprise a resistor, the resistivity of the resistor of the protection unit can be less than the resistivity of the second power connection line, in the case of short circuit between the two poles of the light emitting device, the resistor of the protection unit can be broken under the action of a large current, and the large current has no effect on the second power connection line. The disconnection of the protection unit can disconnect the reset unit and the third node. The disconnection of the reset unit and the third node can avoid the potential of the second power connection line being pulled to the short-circuit potential of the first pole in the case of short circuit between the first pole and the second pole, and further avoid the potential of the second power line being pulled to the potential of the first pole, thereby avoiding the dark line defect of the whole row, the whole column or the cross type caused by the local short circuit of the light emitting device. The dark line defect in the display mode of the display panel can be repaired to a point defect. BRIEF DESCRIPTION OF DRAWINGS

[0054] Figure 1 A schematic structural block diagram of a pixel circuit is provided for the embodiment of the present application;

[0055] Figure 2 A schematic structural diagram of a display panel is provided for the embodiment of the present application;

[0056] Figure 3 A schematic structural block diagram of a display chip is provided for the embodiment of the present application;

[0057] Figure 4 A schematic structural diagram of another display panel is provided for the embodiment of the present application;

[0058] Figure 5 A schematic structural diagram of a display module is provided for the embodiment of the present application;

[0059] Figure 6 A schematic circuit connection diagram of a display panel is provided for the embodiment of the present application;

[0060] Figure 7 A schematic structural block diagram of another pixel circuit is provided for the embodiment of the present application;

[0061] Figure 8A schematic structural diagram of another pixel circuit provided for an embodiment of the present application;

[0062] Figure 9 A driving timing diagram of a pixel circuit provided for an embodiment of the present application;

[0063] Figure 10 A working state diagram of a first stage of a pixel circuit provided for an embodiment of the present application;

[0064] Figure 11 A working state diagram of a second stage of a pixel circuit provided for an embodiment of the present application;

[0065] Figure 12 A working state diagram of a third stage of a pixel circuit provided for an embodiment of the present application;

[0066] Figure 13 A working state diagram of a fourth stage of a pixel circuit provided for an embodiment of the present application

[0067] Figure 14 A working state diagram of a fourth stage of another pixel circuit provided for an embodiment of the present application;

[0068] Figure 15 A partial control signal timing diagram of a repair driving mode provided for an embodiment of the present application;

[0069] Figure 16 A working state diagram of a pixel circuit in a repair driving mode provided for an embodiment of the present application;

[0070] Figure 17 Another working state diagram of a pixel circuit in a repair driving mode provided for an embodiment of the present application;

[0071] Figure 18 Another working state diagram of a pixel circuit in a repair driving mode provided for an embodiment of the present application;

[0072] Figure 19 A schematic structural diagram of an electrical fuse provided for an embodiment of the present application;

[0073] Figure 20 A schematic structural diagram of another electrical fuse provided for an embodiment of the present application;

[0074] Figure 21 A schematic structural diagram of yet another electrical fuse provided for an embodiment of the present application;

[0075] Figure 22 A schematic structural diagram of still another electrical fuse provided for an embodiment of the present application;

[0076] Figure 23 A schematic structural diagram of an electric fuse is provided for an embodiment of the present application.

[0077] Figure 24 A schematic structural diagram of a display panel is provided for an embodiment of the present application.

[0078] Figure 25 A schematic structural diagram of a display device is provided for an embodiment of the present application. DETAILED DESCRIPTION

[0079] In order to better understand the technical solutions provided by the embodiments of the present specification, the technical solutions of the embodiments of the present specification will be described in detail below through the accompanying drawings and specific embodiments. It should be understood that the specific features in the embodiments of the present specification and the embodiments are detailed descriptions of the technical solutions of the embodiments of the present specification, and not limitations of the technical solutions of the present specification. In the case of no conflict, the technical features in the embodiments of the present specification and the embodiments can be combined with each other.

[0080] In this document, relational terms such as first and second and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises... a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the recited element. The term "two or more" includes two or more than two.

[0081] At present, in the field of display technology, pixel circuit as the core circuit of display driver backplane, and gate drive circuit and data drive circuit constitute the basic display drive backplane. Under the control of the row scanning signal output by the gate drive circuit, the pixel circuit writes the display data signal output by the data drive circuit into the storage capacitor of the pixel circuit row by row through the switch tube in the pixel circuit. The drive tube in the pixel circuit accurately and continuously outputs voltage or current to the display optoelectronic device, such as light emitting device or liquid crystal panel pixel electrode, under the control of the voltage stored in the capacitor. The display device displays image information through active light emission or passive light emission and other ways under the drive of current or voltage. However, the existing pixel circuit structure, local electrode short circuit can easily lead to dark line defects of whole row, whole column or cross type, which seriously affects the display effect and yield of display panel.

[0082] Therefore, the pixel circuit, the display panel and the display device provided in the embodiments of the present application can improve the dark line defect caused by the short circuit of the local electrode, improve the display effect and the display yield.

[0083] In a first aspect, the embodiments of the present application provide a pixel circuit, Figure 1 A schematic structural block diagram of a pixel circuit is provided in the embodiments of the present application. As shown in the figure, Figure 1 The pixel circuit includes a first sub-circuit 100, a second sub-circuit 200, a driving sub-circuit 300 and a reset sub-circuit 400. The first sub-circuit 100 is electrically connected to a first node N1, and is configured to be electrically connected to a data signal line 600, which can be configured to transmit a data signal DATA. The second sub-circuit 200 is electrically connected to a second node N2, and is configured to be electrically connected to a first power supply line 700, which can be configured to transmit a first power supply signal VDD. The driving sub-circuit 300 is electrically connected to the first node N1, the second node N2 and a third node N3, respectively. The third node N3 is configured to be electrically connected to a first electrode 510 of a light emitting device 500. A second electrode 520 of the light emitting device 500 is configured to be electrically connected to a common electrode 800, which can be configured to transmit a common signal VCOM. The reset sub-circuit 400 includes a protection unit 410 and a reset unit 420. The protection unit 410 is electrically connected to the reset unit 420. The protection unit 410 is electrically connected to the third node N3. The reset unit 420 is configured to be electrically connected to a second power supply connection line 900, which can be configured to transmit a second power supply signal VSS. The light emitting device 500 can emit light under the voltage driving of the first electrode 510 and the second electrode 520. The protection unit 410 includes a resistor. The resistivity of the protection unit 410 is less than the resistivity of the second power supply connection line 900.

[0084] In some examples, the second power supply connection line 900 is connected to a second power supply line. The second power supply line can be connected to a whole row of pixel circuits, a whole column of pixel circuits or pixel circuits arranged in a cross. The potential of the second power supply connection line 900 connected to the current pixel circuit will inversely affect the potential of the second power supply line.

[0085] In the presence of a two-pole short circuit of the light-emitting device, the resistance of the protection unit can be broken under the action of a large current, and after the resistance is broken, the protection unit is disconnected, and the large current has no effect on the second power supply connection line. The disconnection of the protection unit can disconnect the reset unit from the third node. Disconnecting the reset unit from the third node can avoid the potential of the second power supply connection line being pulled to the short-circuit potential of the first pole in the case of a short circuit between the first pole and the second pole, thereby avoiding the potential of the second power supply line being pulled to the potential of the first pole, thereby avoiding the dark line defect of the entire row, the entire column, or the cross-shaped dark line caused by the local light-emitting device short circuit. The dark line defect in the display mode of the display panel can be repaired to a point defect.

[0086] For example, referring to Figure 1 A repair driving mode can be provided, in which the difference between the potential of the second power supply connection line 900 and the potential of the common electrode 800 is a first difference, and the first difference can be the difference between the second power supply signal VSS and the common signal VCOM. The first difference is greater than or equal to the driving voltage difference of the light-emitting device 500, that is, the size of the first difference can be used to drive the light-emitting device 500 to emit light. If there is a short circuit between the first pole 510 and the second pole 520 of the light-emitting device 500, the protection unit 410 can be used to disconnect under the action of the current formed between the second power supply connection line 900 and the third node N3. The reset unit 420 is disconnected from the third node. Disconnecting the reset unit 420 from the third node can avoid the potential of the second power supply connection line 900 being pulled to the short-circuit potential of the first pole 510 in the case of a short circuit between the first pole 510 and the second pole 520, thereby avoiding the potential of the second power supply line being pulled to the potential of the first pole 510, thereby avoiding the dark line defect of the entire row, the entire column, or the cross-shaped dark line caused by the local light-emitting device short circuit. The dark line defect can be repaired to a point defect.

[0087] For example, in the driving control circuit of a silicon-based OLED (organic light-emitting diode) micro display, a silicon-based LED (light-emitting diode) micro display, and an OLED display, the circuit can include a gate driver circuit, a source driver circuit, and a pixel circuit. The silicon-based micro display architecture and production manufacturing process include dual-chip and single-chip display architectures. The pixel circuit provided by the embodiments of the present application can be applicable to product types including but not limited to silicon-based OLED micro displays, silicon-based LED micro displays, and OLED displays. The display panel to which the pixel circuit provided by the embodiments of the present application is applied can be applied in fields including but not limited to smart phones, computers, televisions, tablet computers, or smart wearable devices. The smart wearable devices can include smart watches or smart glasses, etc. For example, AR (augmented reality), VR (virtual reality), XR (extended reality), MR (mixed reality), sighting devices, and range finders, etc. Consumer electronics products.

[0088] Exemplarily, the silicon-based OLED is a new display technology which combines semiconductor process and OLED display technology, and prepares the OLED device based on the monocrystalline silicon driving circuit wafer. Because of the advantages of semiconductor process and OLED display technology, the technology can prepare the micro display with smaller display area (generally 0.2-1.8 inch) while maintaining a certain resolution. This feature makes the silicon-based OLED have very high pixel density (generally more than 3000 PPI). In addition to high PPI, the silicon-based OLED also has the advantages of high brightness, low power consumption, high response speed, high color gamut and high thermal stability.

[0089] Figure 2 A schematic structural diagram of a display panel is provided for the embodiments of the present application. Exemplarily, referring to Figure 2 , the silicon-based OLED can be a single-chip driving architecture. The single-chip driving architecture is to integrate the display area ACTIVE AREA of the display panel and the complete display control and driving circuit on the same chip. The driving circuit includes the row driving unit GATE DRIVER, the column driving unit SOURCE DRIVER_MUX, the image processing unit IMAGE PROCESS BLOCK, the storage unit RAM, the clock control unit OTC, etc. The bonding area BONDING PAD AREA can bind the display chip.

[0090] Figure 3 A schematic architecture block diagram of a display chip is provided for the embodiments of the present application. Exemplarily, referring to Figure 3 , the display chip in the single-chip architecture can include digital and analog parts, which belongs to a mixed signal chip. The display chip includes the electrostatic module ESD, the data driving module SD, the row clock control module GTON, the storage unit RAM, the power module POWER, the processor interface MIPI, the clock generation module TS and the input and output pins I / O Pad. The image processing unit IMAGE PROCESS BLOCK, the clock control unit OTC, etc. in the display control circuit belong to the digital module, which needs a semiconductor process with a higher process node (generally 55 nm) for production and manufacturing. At the same time, because the logic of the digital module is more complex, the number of metal layers used (generally at least 6 metal layers) is more, which leads to the production cost of the monocrystalline silicon driving substrate being too high. In addition, the yield of the silicon-based OLED micro display can be divided into the display area part and the display control driving part. The yield of the display control driving part is only determined by the semiconductor process, while the yield of the display area is determined by the semiconductor process and the OLED device process. Under the single-chip architecture, any part of the unqualified will lead to the entire module becoming a defective product, resulting in a large loss of product yield, and further increasing the production cost.

[0091] With the increasing requirement of display size, the cost problem of single chip architecture is concerned. In order to reduce the cost and further reduce the power consumption, a double chip architecture is proposed. Figure 4 Another schematic architecture diagram of a display panel is provided for the embodiments of the present application. As shown in the example, Figure 4 The double chip architecture is to integrate the display area and part of the driving circuit in the panel. The remaining driving circuit and display control circuit are independently DDIC. The panel part includes the display area ACTIVE AREA, the row driving unit GATE DRIVER and the data driving module SD, while the DDIC part includes the timing controller CT, the processor interface MIPI, the image processing unit, which can include the data signal unit DDIC_SOURCE, the scanning signal unit including DDIC_GOUT_L and DDIC_GOUT_R. The panel can also integrate the multiplexing circuit DeMUX<1:6> and the cathode signal ring line Cathode Ring. After the design of the panel and DDIC, different process nodes are used for production and manufacturing, the DDIC part uses high process node process (generally below 28nm), and the panel part uses low process node process (generally 110nm). After the production and manufacturing of the panel circuit, the panel good product is continuously put into the production and manufacturing of the OLED device, and finally the manufactured panel good product and the DDIC good product are bonded together through the bonding process and the bonding area DDIC_I / O Pd Area to form a complete display, or a display module.

[0092] Figure 5 A schematic structure diagram of a display module is provided for the embodiments of the present application. As shown in the example, Figure 5 The display module includes a display panel, a driving chip DDIC and a flexible circuit board FPC. The display panel is provided with a multiplexing circuit DeMUX<1:6>, a cathode signal ring line Cathode Ring, a row driving unit GATE DRIVER and a timing controller CT.

[0093] According to different division schemes, the panel part has different components. The display area, gate driver circuit and part of the source driver circuit can be made on the panel. Figure 6 A schematic circuit connection diagram of a display panel is provided for the embodiments of the present application. As shown in the example, Figure 6 The display area is composed of an array of pixel circuits, each pixel circuit corresponding to driving a sub-pixel to emit light, i.e. providing the current required for OLED device to emit light; the row driving circuit provides the timing signal required for driving the row switch of the pixel circuit, realizing the function of display line-by-line scanning; the column driving circuit provides the column signal required for the pixel circuit, realizing the switching and control of the display picture.

[0094] In single-chip architecture and dual-chip architecture, pixel circuit as a key part of display driving backplane, directly affects the PPI, maximum brightness, contrast, crosstalk and jitter of display performance indicators.

[0095] The pixel circuit outputting stable voltage can be referred to as voltage type pixel circuit, and the pixel circuit outputting stable current can be referred to as current type pixel circuit. The type of pixel circuit can be determined according to the photoelectric characteristics of the display device. The pixel circuit can have a data writing stage and an output stage (or referred to as a light emitting stage). The consistency of the opening and closing characteristics of the photoelectric device and the initial working state of the pixel circuit requires an initialization stage. At the same time, in order to improve the uniformity of the output current or voltage, the threshold voltage uniformity and carrier mobility of the driving tube need to be compensated, and an additional threshold compensation stage is required. Therefore, the working state of the pixel driving circuit includes initialization, threshold compensation, data writing and driving light emitting four stages. Different applications and different circuit designs, four stages have the situation of simplification and merger, for example, threshold compensation stage and data writing stage are combined, threshold compensation and data writing are performed in the same stage.

[0096] The main indicators of the pixel driving circuit are as follows: first, the range of stable output voltage and / or current. Generally, the wider the range of stable output current or voltage, the wider the application range of the pixel circuit. The larger the range of output current or voltage, the higher the brightness and contrast of the display, and the better the circuit performance. Second, the uniformity of the output voltage and / or current. The better the uniformity of the output current or voltage, the better the brightness uniformity of the display. Third, the stability of the output voltage and / or current. Because the display is refreshed in units of frames, the pixel circuit needs to maintain stable output within a frame time. In addition, because the display image is complex, the pixel driving circuit is required to stably output when displaying complex or specific images, that is, the output of the pixel driving circuit is not affected by other data on the data line. The stability of the output of the pixel driving circuit is an important evaluation index of the pixel circuit.

[0097] Figure 7 Another schematic structure block diagram of a pixel circuit provided by the embodiment of the present application is provided. For example, referring to Figure 7In the case of VCOM=-9V, after the two electrodes of the light emitting device 500 are short-circuited by foreign matter, the potential of the first electrode 510 of the pixel circuit is pulled to the common signal VCOM, that is, generally -9V. The potential of one end of the third node N3 connected to the reset unit 420 of the pixel circuit is pulled to -9V. In the case that the reset unit 420 is turned on, the potential of one end of the reset unit 420 connected to the second power supply connection line 900 is pulled to -9V. The second power supply connection line 900 is connected to the second power supply line, which can be connected to the pixel circuits in a whole row, a whole column or a cross arrangement. The potential of the second power supply line under the voltage drop is pulled to about -8V. Then, the -8V potential of the second power supply signal line is transmitted to the reset units of other pixel circuits connected thereto. In the case that the reset units of other pixel circuits are turned on, the potential of the first electrode of the light emitting device connected to other pixel circuits is pulled to -8V. Under the action of the common signal -9V, the 1V voltage difference between the two ends of the light emitting device is far lower than the lighting voltage, which is generally 3V or above. The light emitting device of other pixel circuits cannot emit light under the action of the 1V voltage difference, and thus a dark line in a whole row, a whole column or a cross arrangement is formed, that is, a horizontal dark line, a vertical dark line or a cross dark line is formed on the display panel. In the case of short-circuiting of two electrodes of one or several light emitting devices, a larger range of dark lines is caused, which seriously affects the display effect, yield and reliability of the display panel.

[0098] Reference Figure 1 The protection unit 410 is arranged in the pixel circuit and between the reset unit and the third node N3. A repair driving mode is arranged. In the repair driving mode, the reset unit 420 and the protection unit 410 are both turned on, the first electrode 510 and the second electrode 520 are not short-circuited, the potential of the second electrode 520 is consistent with that of the common electrode 800, and the potential of the first electrode 510 is independent of that of the second electrode 520 due to no short-circuiting. The potential of the first electrode 510 is consistent with that of one end of the third node N3 connected to the protection unit 410. The protection unit 410 can be regarded as a wire, and the potentials at both ends of the protection unit 410 are almost consistent. In the case that the reset unit 420 is turned on, the reset unit can be regarded as a wire, and the potentials at both ends of the reset unit are consistent with the second power supply signal potential on the second power supply connection line. In the repair driving mode, the common signal VCOM=-9V, and the potential of the second power supply connection line is the ground potential, that is, the second power supply signal VSS=0V. Then, the potential of the first electrode 510 is 0V, the voltage difference between the two ends of the light emitting device 500 is 9V, and the potential of the first electrode 510 is higher than that of the second electrode 520. 9V meets the lighting voltage of the light emitting device, and thus the light emitting device 500 can be normally lighted. Therefore, the repair driving mode does not affect the normal light emitting device and the connected pixel circuit.

[0099] Reference Figure 1 In the repair driving mode, the reset unit 420 and the protection unit 410 are both turned on, the first electrode 510 and the second electrode 520 are short-circuited, the potential of the second electrode 520 is consistent with the potential of the common electrode 800, and due to the short circuit, the potential of the first electrode 510 is consistent with the potential of the second electrode 520; the potential of the first electrode 510 is consistent with the potential of the end of the third node N3 connected with the protection unit 410; the reset unit 420 can be regarded as a conductor when it is turned on, and the potential at both ends of the reset unit is consistent with the potential of the second power supply signal on the second power supply connection line. For example, in the repair driving mode, the common signal VCOM = -9V, the potential of the first electrode 510 is -9V, the potential of the second power supply connection line 900 is the ground potential, i.e., the second power supply signal VSS = 0V, the potential of the end of the protection unit 410 connected with the reset unit 420 is 0V, and the voltage difference between both ends of the protection unit 410 is 9V, so a large current flows through the protection unit 410, which can cause the protection unit 410 to be disconnected, the connection between the reset unit 420 and the third node N3 is cut off, i.e., the connection between the second power supply connection line 900 and the first electrode 510 is cut off, and the potential on the second power supply connection line 900 is not affected, so the potential on the second power supply line is not affected. After the repair driving mode, the second power supply line and the pixel circuit connected with the short-circuited light emitting device are independent of each other, i.e., there is no electrical connection, during the lighting driving process of the pixel circuit of the display panel, so the potential on the second power supply line will not be disturbed by the pixel circuit where the short-circuited light emitting device is located. The position where the short-circuited light emitting device is located will have a dark spot defect, but will not have a dark line defect, which can greatly reduce the defect range and improve the display effect, yield and reliability of the display panel.

[0100] It should be noted that the signal voltage values mentioned in the above embodiments are only illustrative, and the value of the common signal VCOM can also be -12V, -11V, -10V, -8V or -7V, and the value of the second power supply signal VSS can also be 0V, 1V or -1V, and the driving operation of the second power supply signal VSS with the ground potential is relatively simple.

[0101] For example, the first electrode 510 of the light emitting device 500 can be the anode of a light emitting diode, and the second electrode 520 can be the cathode of the light emitting diode.

[0102] For example, the repair driving mode can be an independent mode independent of the lighting mode, and all pixel circuits of the display panel can be repaired in the detection stage, and the short-circuited light emitting device can be isolated from the second power supply line to avoid interference of the pixel circuit connected with the short-circuited light emitting device on the pixel circuit connected with the same second power supply line in the lighting mode.

[0103] In some embodiments, the first sub-circuit, the second sub-circuit, the driving sub-circuit and the reset unit each include a transistor, the second sub-circuit includes a capacitor unit, a first end of the capacitor unit is electrically connected to the first node, a second end of the capacitor unit is electrically connected to the second node, a third end of the capacitor unit is electrically connected to the fourth node, and the fourth node is configured to be electrically connected to the first power supply line; the capacitor unit can store and discharge electric charges.

[0104] In some examples, the driving sub-circuit includes a P-type transistor, and the reset unit includes an N-type transistor.

[0105] For example, the reset unit uses a P-type transistor for resetting, and the reset voltage range is limited, thereby limiting the voltage range of the first electrode. However, in the circuit structure using the P-type transistor for resetting, the line defect will not occur due to the same mechanism. Using an N-type transistor for resetting can have a larger reset voltage range, but due to the special structure of the N-type transistor, the line defect will occur due to the mechanism mentioned above. Therefore, the protection unit is introduced on this basis. The N-type transistor cooperates with the setting of the protection unit to avoid the generation of the line defect. The reset unit uses an N-type transistor, and the driving sub-circuit can use a P-type transistor.

[0106] For example, the transistor can be a thin film transistor, which can use a semiconductor material as an active layer and metal as an electrode of the transistor. The transistor can also be a silicon-based transistor, which uses a single crystal silicon wafer as a substrate, obtains source and drain electrodes by locally doping the single crystal silicon substrate, and obtains a gate by doping polysilicon. The substrate of the silicon-based transistor can be connected to a power supply signal, for example, connected to the first power supply signal VDD, and can be isolated from the electrical connection between the plurality of transistors in the pixel circuit.

[0107] Figure 8 Another schematic structural diagram of a pixel circuit is provided for the embodiments of the present application. In some embodiments, referring to Figure 8The first sub-circuit comprises a first transistor M1, the second sub-circuit comprises a second transistor M2, the driving sub-circuit comprises a driving transistor DMOS, the reset unit 420 comprises a third transistor M3, and the capacitor unit comprises a first capacitor C1 and a second capacitor C2. The gate of the first transistor M1 is configured to receive a first control signal WS, the first control signal WS can control the on and off states of the first transistor M1, the first electrode of the first transistor M1 is configured to be electrically connected to a data signal line DATA, the first electrode of the first transistor M1 is configured to be electrically connected to the data signal line 600, and the second electrode of the first transistor M1 is electrically connected to a first node N1; the gate of the second transistor M2 is configured to receive a second control signal DS, the second control signal DS can control the on and off states of the second transistor M2, the first electrode of the second transistor M2 is electrically connected to a fourth node N4, the fourth node N4 is electrically connected to a first power supply line 700, and the second electrode of the second transistor M2 is electrically connected to a second node N2; the first end of the capacitor unit is one end of the first capacitor C1, the second end of the capacitor unit is connected to the first capacitor C1 and the second capacitor C2, and the third end of the capacitor unit is the other end of the second capacitor C2. The two ends of the first capacitor C1 are respectively electrically connected to the first node N1 and the second node N2, the two ends of the second capacitor C2 are respectively electrically connected to the second node N2 and the fourth node N4, and the fourth node N4 is electrically connected to the first power supply line 700; the gate of the driving transistor DMOS is electrically connected to the first node N1, the first electrode of the driving transistor DMOS is electrically connected to the second node N2, and the second electrode of the driving transistor DMOS is electrically connected to a third node N3; the gate of the third transistor M3 is configured to receive a third control signal AZ, the third control signal AZ can control the on and off of the third transistor M3, the first electrode of the third transistor M3 is electrically connected to the protection unit 410, and the second electrode of the third transistor M3 is configured to be electrically connected to a second power supply connection line 900.

[0108] It should be noted that the first electrode of the transistor can be one of the source and the drain, and the second electrode of the transistor can be the other of the source and the drain.

[0109] For example, referring to Figure 8 The protection unit can comprise an electric fuse 411, which can be used as a wire. The electric fuse 411 can be blown under the action of a large current, and can function as a fuse to cut off the path of a large current. The large current usually comes from a large voltage difference between the two ends of the path, so the path of the large voltage difference can be cut off to protect the potentials at the two ends of the path from affecting each other.

[0110] For example, the pixel circuit provided by the embodiment of the present application can be a silicon substrate, the substrate of the transistor in the pixel circuit can be a single crystal silicon substrate, and a power supply signal can be connected to the substrate of the transistor to achieve electrical isolation between transistors. For example, the substrate of the first transistor M1, the second transistor M2 and the driving transistor DMOS is connected to a first power supply signal VDD, and the substrate of the third transistor M3 is connected to a second power supply signal VSS.

[0111] Generally, in a silicon transistor, the potential of the source and the substrate is not the same. For an NMOS transistor, the substrate is usually connected to the lowest potential of the circuit, VBS≤0, VBS being the voltage difference between the substrate and the source; for a PMOS transistor, the substrate is usually connected to the highest potential of the circuit, VBS≥0. At this time, the threshold voltage of the transistor will change with the potential difference between the source and the substrate. This effect is called "back gate effect".

[0112] Taking an NMOS transistor as an example, when the NMOS transistor VBS<0, the change rule of the threshold voltage is that, as Vgs rises, Vgs being the voltage difference between the gate and the source of the transistor, the gate attracts the electrons inside the substrate to move to the surface of the substrate, and a depletion layer is generated on the surface of the substrate. When Vgs rises to a certain voltage until the threshold voltage is reached, the surface of the substrate under the gate undergoes inversion, and the NMOS transistor begins to conduct between the source and the drain. The threshold voltage is related to the charge amount of the depletion layer, and the more the charge amount of the depletion layer, the more difficult the NMOS transistor is to turn on, and the higher the threshold voltage required to turn on the NMOS transistor. When VBS<0, the potential difference between the gate and the substrate increases, the thickness of the depletion layer also increases, and the charge amount in the depletion layer increases, so that the threshold voltage increases. As VBS becomes smaller, the threshold voltage rises, and under the condition that VGS and VDS remain unchanged, the drain current becomes smaller. Therefore, the substrate and the gate have similar effects and can control the change of the drain current. Therefore, we call it "back gate" effect. Some measures can be taken in circuit design to weaken or eliminate the substrate bias effect, for example, the source and the substrate can be short-circuited, which can eliminate the influence of the substrate bias effect, but this requires the support of circuit and device structure and manufacturing process.

[0113] In addition, the circuit structure can be improved to weaken the substrate bias effect. The power supply signal can also be connected to the substrate.

[0114] In some examples, with reference to Figure 8 In the repair driving mode, the first control signal WS is used to control the first transistor M1 to be off to disconnect the first sub-circuit, the second control signal DS is used to control the second transistor M2 to be off to disconnect the second sub-circuit, and the third control signal AZ is used to control the third transistor M3 to be on to turn on the reset unit.

[0115] In some examples, in the repair driving mode, in the case that the first electrode and the second electrode of the light emitting device are short-circuited, the electric fuse is used to be blown under the action of the current to disconnect the reset unit from the third node.

[0116] In some examples, referring to Figure 8 , in the repair driving mode, the potential of the second power signal VSS is the ground potential, and the potential of the common electrode 900 is the negative potential. The difference between the potential of the second power signal VSS and the potential of the common electrode 900 is the first difference value, and the voltage value of the first difference value can be used to drive the light emitting device 500 to light up. Therefore, in the repair driving mode, the electric fuse 411 can normally conduct, and the light emitting device can be lighted up in the case that the two electrodes of the light emitting device 500 are not short-circuited. In the case that the two electrodes of the light emitting device 500 are short-circuited, the light emitting device 500 will not light up in the repair driving mode, the electric fuse 411 is blown, and the reset sub-circuit is disconnected.

[0117] Figure 9 A pixel circuit driving timing diagram provided by an embodiment of the present application; Figure 10 A first stage working state diagram of a pixel circuit provided by an embodiment of the present application; Figure 11 A second stage working state diagram of a pixel circuit provided by an embodiment of the present application; Figure 12 A third stage working state diagram of a pixel circuit provided by an embodiment of the present application; Figure 13 A fourth stage working state diagram of a pixel circuit provided by an embodiment of the present application. For example, referring to Figure 8 to Figure 13 , the pixel circuit adopts a 4T2C current type circuit, 4T2C represents 4 transistors and 2 capacitors, and the working state of the pixel circuit in the display stage can include four stages:

[0118] For example, referring to Figure 10 , the first stage ① can be regarded as an initialization stage. At t0 to t1, M1 is turned on, M2 is turned on, M3 is turned on, and the data signal DATA includes the initial data signal V ofs and the display data signal V data . The initial data signal V ofs voltage is written to the first capacitor C1 through M1, the potential of the second node N2 connected with the DMOS source electrode is V s = VDD, V s is also the source voltage of the DMOS, the potential of the first node N1 connected with the gate electrode of the DMOS is V g = V ofs , V g is also the voltage of the gate electrode of the DMOS, and the potential of the third node N3 connected with the drain electrode of the DMOS is V D = V g+V th , V D is the voltage of the DMOS drain, V th is the threshold voltage of the DMOS, VDD-V ofs >|V th |, and the discharge is ready for the next step. At this time, Vgs=V ini =VDD-V ofs , and C1 stores the voltage V ini .

[0119] For example, referring to Figure 10 , in the first stage, VSS=-5V, VCOM=-9V, M3 is on, the potential of the third node N3 is -5V, the potential of the first electrode 510 of the light emitting device 500 is -5V, the potential of the second electrode 520 is -9V, the voltage difference between the two electrodes of the light emitting device 500 is 4V, which is not enough to light up the light emitting device 500, the two electrodes of the light emitting device 500 are not on, and the current flowing through the electrical fuse 411 is about pA (picoampere), so the electrical fuse 411 will not be blown.

[0120] For example, referring to Figure 11 , the second stage 2 is from t1 to t2, which can be regarded as a self-discharge stage, M3 remains on, M1 is first turned off, the potential of the first node N1 is floating, M2 is then turned off, and the potential of the second node N2 starts to discharge through the loop formed by the DMOS and M3. The potential of the second node N2 decreases. Since the potential of the first node N1 is floating, the voltage difference across C1 remains unchanged, so the potential of the first node N1 decreases with the potential of the second node N2. Due to the back-gate effect of the DMOS, the equivalent threshold voltage of the DMOS is |V th_EF |=a×(VDD-V s )+|V th |, where a is the back-gate coefficient. Vgs remains unchanged, Vgs is the voltage difference between the gate and the source of the DMOS, |V th_EF | gradually increases as the potential of the second node N2 decreases, and when |V th_EF | increases to Vgs, the DMOS is turned off and the discharge of the second node N2 stops. At this time, |V th_EF |=a×(VDD-V s )+|V th |=V ini ,

[0121] For example, referring to Figure 12 , the third stage ③ is from t2 to t3, which can be regarded as a gray voltage writing and threshold compensation stage, M3 remains on, M2 remains off, and M1 is on. V data is written to the first node N1, and the voltage of the first node N1 is V ofsV data Since the second node N2 is floating, ΔV s = (1 - b) ΔV g Wherein Then the voltage of the second node N2 becomes:

[0122] It should be noted that VDD in b x VDD can be a power signal accessed by a transistor substrate, and in the present application, the silicon substrate of the transistor is accessed by a first power signal VDD, and can also be accessed by a fixed potential, which is not specifically limited in the embodiments of the present application.

[0123] For example, referring to Figure 11 and Figure 12 In the second and third stages, M3 remains on, the state of the electrical fuse 411 is consistent with that in the first stage, and the electrical fuse will not be blown.

[0124] For example, referring to Figure 13 , in the fourth stage 4 after t4, M1 is off, M2 is on, M3 is off, and the light emitting device 500 is lit, at this time, the current flowing through the light emitting device 500 is It can be seen that when , I 500 is independent of the threshold voltage |V th | of the driving transistor DMOS, that is, the threshold voltage compensation is completed. W / L is the width-length ratio of the channel of DMOS, μ p is the dielectric constant, and c ox is the gate oxide capacitance of DMOS, that is, the capacitance of the gate and the oxide layer.

[0125] For example, referring to Figure 13 , in the fourth stage, M3 is off, the electrical fuse 411 cannot form a path with M3, no current passes through the electrical fuse 411, and therefore the electrical fuse 411 will not be blown.

[0126] Figure 14 is a fourth stage working state schematic diagram of another pixel circuit provided by the embodiments of the present application. For example, referring to Figure 14, the first control signal WS = 3.3V, the second control signal DS = -2V, and the third control signal AZ = -5V. In this case, the first transistor M1 is turned off, the second transistor M2 is turned on, and the third transistor M3 is turned off. In the case of the horizontal arrangement of the second power line 901, the two poles of the light emitting device 500 connected to the second pixel circuit P2 are shorted, the potential of the second pole 520 of the light emitting device 500 is pulled to -9V, the gate voltage V3g of the M3 is AZ = -5V, the source voltage of the M3 is pulled to -9V, i.e., the source voltage V3s of the M3 is -9V, and the gate-source voltage difference V3gs of the M3 is -5V-(-9V) = 4V > V3th, i.e., the gate-source voltage difference of the M3 is greater than the threshold voltage V3th, so the M3 is turned on, and the drain voltage V3d of the M3 is approximately Vs = -9V. Due to the voltage drop, the potential of the second power line 901 connected to the drain of the M3 is pulled to -8V, i.e., in the case of the short circuit of the two poles of the light emitting device 500, the common signal VCOM is transmitted to the second power line 901 in the direction of the arrow, and due to the voltage drop, the potential of the second power line 901 is pulled to -8V. At this time, the pixel circuits connected to the normal light emitting devices, such as the third transistor M3 of the first pixel circuit P1, have the gate potential V3g of the M3 = AZ = -5V, the drain potential V3d of the M3 = -8V, the gate-drain voltage difference V3gd of the M3 = -5V-(-8V) = 3V > V3th, i.e., the M3 is turned on, V3s = -8V, the potential of the first pole 510 of the light emitting device of the first pixel circuit P1 is -8V, the potential of the second pole 520 of the light emitting device is -9V, and the voltage difference between the two poles of the light emitting device is 1V, which is insufficient to light up the light emitting device. Therefore, in the case of the short circuit of the two poles of the light emitting device of the second pixel circuit P2, the other light emitting devices arranged in the same row as the second pixel circuit P2 cannot be lighted up, and thus the horizontal dark line defect is formed.

[0127] For example, if the second power line 901 is arranged horizontally, a horizontal dark line is formed, and if the second power line 901 is arranged vertically, a vertical dark line is formed.

[0128] Figure 15 A partial control signal timing diagram for repairing the driving mode provided by the embodiment of the present application; Figure 16 A working state diagram of the pixel circuit in the repairing driving mode provided by the embodiment of the present application. For example, referring to Figure 16In the repair driving mode, the first control signal WS, the second control signal DS and the first power signal VDD are floating, i.e. in a high resistance state, i.e. in the time period of mode start Mode On and mode off Mode OFF of the repair driving mode, the first control signal WS, the second control signal DS and the first power signal VDD are in a high resistance state or connected to a 3V voltage, but cannot be in a low voltage state, for ensuring that the current cannot flow reversely through the driving transistor and be shunted. The third control signal AZ is set to a constant potential 3V, and the second power signal VSS is grounded, i.e. AZ=3V, VSS=0V, and the common signal VCOM is input with a negative voltage 12V (-12V). In the case that the light emitting device 500 is not short-circuited, AZ=3V, VSS=0V, the third transistor M3 is turned on, the potential of the first electrode 510 of the light emitting device 500 is 0V, the light emitting device 500 is turned on under a 12V voltage, the current in the loop where the electric fuse 411 is located is in the nA (nanoampere) level, and the electric fuse is not blown. Therefore, the working state of the circuit in the repair driving mode does not affect the normal light emitting device and the pixel circuit where the light emitting device is located.

[0129] Figure 17 Another working state of the pixel circuit provided by the embodiment of the present application in the repair driving mode is shown in the schematic diagram. For example, referring to FIG. 6, in the repair driving mode, the first control signal WS, the second control signal DS and the first power signal VDD are floating, i.e. in a high resistance state, the third control signal AZ is set to a constant potential 3V, and the second power signal VSS is grounded, i.e. AZ=0V, and the common signal VCOM is input with a negative voltage 12V (-12V). Figure 17 In the repair driving mode, the first control signal WS, the second control signal DS and the first power signal VDD are floating, i.e. in a high resistance state, the third control signal AZ is set to a constant potential 3V, and the second power signal VSS is grounded, i.e. AZ=0V, and the common signal VCOM is input with a negative voltage 12V (-12V). In the case that the light emitting device 500 is short-circuited at two poles, the potential of the first electrode 510 of the light emitting device 500 is -12V, the potential of the one end of the electric fuse 411 connected to the first node N3 is -12V, AZ=3V, VSS=0V, the third transistor M3 is turned on, the potential of the one end of the fuse connected to M3 is 0V, and the voltage across the electric fuse 411 is -12V.

[0130] Figure 18 Another working state of the pixel circuit provided by the embodiment of the present application in the repair driving mode is shown in the schematic diagram. For example, referring to FIG. 6, in the repair driving mode, the first control signal WS, the second control signal DS and the first power signal VDD are floating, i.e. in a high resistance state, the third control signal AZ is set to a constant potential 3V, and the second power signal VSS is grounded, i.e. AZ=0V, and the common signal VCOM is input with a negative voltage 12V (-12V). Figure 18In the repair driving mode, in the case of the two-pole short circuit of the light emitting device 500, the electric fuse 411 generates a large current of the order of mA (milliampere) under a voltage difference of -12V, the electric fuse 411 is fused, the third transistor M3 is disconnected from the light emitting device, and the potential of -12V cannot be transmitted to the second power supply line 901 through M3. Therefore, in the repair driving mode, the dark line defect becomes a dark point defect. In the subsequent display mode, the light emitting device in the short circuit state is not bright in the lighting stage. Since the second power supply line 901 has been disconnected from the light emitting device in the short circuit state, the light emitting device in the short circuit state does not affect the potential of the second power supply line 901, and the other normal light emitting devices are normally lit. Therefore, only the dark point defect occurs, and the dark line defect does not occur.

[0131] In the display panel, the anode-cathode short circuit of a single sub-pixel can pull down the anode potential of the pixels in the whole row or column through the second power supply line, resulting in that the light emitting devices in the whole row or column do not emit light and form a dark line. The pixel point circuit provided in the embodiments of the present application increases an electric fuse between the drain of the third transistor and the anode of the light emitting device, and then increases the voltage difference between the second power supply signal and the common signal in the repair driving mode. Therefore, the pixel in the anode-cathode short circuit generates an ampere-level large current on the electric fuse, the electric fuse is fused, a short circuit is formed, the connection between the second power supply line and the short-circuit pixel is cut off, and the second power supply line is not pulled down by the common electrode through the light emitting device. Therefore, the dark line can be repaired, and the dark point defect caused by the anode-cathode short circuit does not change. Since the tolerance to the dark point is much higher than the tolerance to the dark line, the dark line is repaired to the dark point defect, the display effect of the display panel can be improved, and the yield of the display panel can also be improved.

[0132] In some embodiments, the material of the electric fuse can include a semiconductor material or a metal material.

[0133] For example, in a silicon-based display panel, the gate of a silicon-based transistor is obtained by doping polycrystalline silicon, and the electric fuse can be arranged in the same layer as the gate in the silicon-based display panel. The doping concentration and other doping process parameters of the electric fuse can be differentiated from those of the gate according to the required resistivity of the electric fuse, or the polycrystalline silicon material of the electric fuse is not doped. The line width of the electric fuse can also be differentiated from that of the gate.

[0134] For example, the resistivity of the electric fuse can be less than that of the gate of the transistor arranged in the same layer. Therefore, under the same current, the electric fuse is more likely to break, and the gate is not likely to break.

[0135] For example, in a thin film display panel, the active layer of a thin film transistor is a semiconductor material, and the electric fuse can be arranged in the same layer as the active layer. Part of the active layer is subjected to a doping process to connect the source and the drain. Therefore, the doping of the electric fuse can be differentiated from or the same as the doping of the active layer to obtain the required resistivity.

[0136] Exemplarily, the resistivity of the electrical fuse can be less than the resistivity of the semiconductor layer arranged in the same layer, so that the electrical fuse is more likely to break under the same current, and the semiconductor layer is not likely to break.

[0137] Exemplarily, the pixel circuit is arranged with multiple metal layers, and the display panel is arranged with multiple signal lines, which are usually metal materials. The electrical fuse can be arranged in the same layer as at least one metal layer, and the electrical fuse can be arranged in the same layer as at least one signal line.

[0138] Exemplarily, the resistivity of the electrical fuse can be less than the resistivity of the signal line arranged in the same layer, so that the electrical fuse is more likely to break under the same current, and the signal line is not likely to break.

[0139] Exemplarily, the metal can include a stacked structure or a single-layer structure of molybdenum-aluminum-molybdenum, a stacked structure or a single-layer structure of titanium-aluminum-titanium, silver, or a conductive metal oxide such as indium tin oxide.

[0140] It should be noted that the electrical fuse and the reset unit arranged in the same layer means that the electrical fuse and the reset unit are prepared synchronously through the same process, and the film forming and patterning processes can be performed synchronously.

[0141] In some embodiments, the electrical fuse includes a first connection end, a second connection end, and a fuse segment, the fuse segment, the first connection end, and the second connection end are integrated structures, the fuse segment is connected between the first connection end and the second connection end; the first connection end is electrically connected to the third node through a first via, and the second connection end is electrically connected to the reset unit through a second via; the size of the fuse segment in the first direction is less than the size of the connection end, the first direction intersects with the second direction, and the second direction is the length direction of the fuse segment.

[0142] Figure 19 A schematic structural diagram of an electrical fuse is provided for the embodiments of the present application. Exemplarily, as shown in Figure 19 The electrical fuse includes a first connection end 412, a second connection end 413, and a fuse segment 414, the fuse segment 414 is connected between the first connection end 412 and the second connection end 413, and the first connection end 412, the second connection end 413, and the fuse segment 414 can all be rectangular in shape. The first direction X intersects with the second direction Y, and the second direction Y can be the length direction of the fuse segment 414. The size of the first connection end 412 and the second connection end 413 is the same, the size of the second connection end 413 along the first direction X can be a first size L1, the size of the fuse segment 414 along the first direction X is a second size L2, and the first size L1 is greater than the second size L2. The fuse segment 414 is used to be fused under the action of a large current, so the width of the fuse segment cannot be too wide. The connection end is used to connect other circuit structures, and sufficient space is needed to ensure the stability of the electrical connection, so the width of the connection end is greater than the width of the fuse segment.

[0143] In addition, a larger connection area can reduce the resistance of the fuse, ensuring that it melts under high current.

[0144] For example, refer to Figure 19 The electric fuse also includes a process reference structure 415, which is disposed on the same layer as the electric fuse. The process reference structure 415, the first connection end 412, and the second connection end 413 are respectively disposed on different sides of the fuse segment 414, that is, the process reference structure 415 can be disposed on the left and right sides of the fuse segment 414, and the connection ends are disposed on the top and bottom sides of the fuse segment. The orthographic projection of the process reference structure 415 on the substrate layer does not overlap with the orthographic projection of the electric fuse on the substrate layer. The process reference structure 415 is spaced apart from the first connection end 412, the second connection end 413, and the fuse segment 414.

[0145] For example, the larger connecting section can also act as a heat sink, making the two ends of the fuse segment cooler than the middle area during the melting process. The middle part of the fuse should be the hottest part because it is farthest from the cooling endpoints. This explains why we always see the fuse break in the middle, rather than near either end.

[0146] For example, in order to ensure process accuracy and stability during the setting of the electric fuse, the area of ​​the pattern structure during the process can be guaranteed by setting a process reference structure 415.

[0147] Figure 20 A schematic structural diagram of another electric fuse provided in an embodiment of this application. For example, refer to... Figure 20 The first connection terminal 412 is electrically connected to the first node through the first via 416, and the second connection terminal 413 is electrically connected to the third transistor through the second via 417. Each connection terminal can be provided with 4 vias, or more, such as 6 or 3. The more vias, the higher the electrical connection stability. Multiple vias can be provided within the limited area of ​​the connection terminal.

[0148] Figure 21 This is a schematic structural diagram of another type of electric fuse provided in an embodiment of this application. For example, refer to... Figure 21 The shape of the fuse section 414 is curved.

[0149] Figure 22 This is a schematic structural diagram of another type of electric fuse provided in an embodiment of this application. For example, refer to... Figure 22 The shape of the fuse segment 414 is a broken line.

[0150] Figure 23 This is a schematic structural diagram of an electric fuse provided in an embodiment of this application. For example, refer to... Figure 23The shape of the fuse section 414 is jagged, which can reduce the resistance of the fuse section.

[0151] Due to the limitation of the pixel circuit setting position, the size of the pixel circuit usually affects the resolution of the display panel. Therefore, it is necessary to avoid the pixel circuit occupying a large area. In the limited area space, the setting space of the newly added electrical fuse is limited. In order to ensure the related electrical parameters of the electrical fuse, such as the resistance value and the fusing current, a special-shaped fuse section can be set.

[0152] In some embodiments, the second power connection line is used for electrical connection with the second power line, the second power line is electrically connected with the plurality of second power connection lines; the current density of the second power connection line is greater than the current density of the electrical fuse; and the current density of the second power line is greater than the current density of the electrical fuse. In the case that the electrical fuse is fused, the second power connection line and the second power line can be prevented from being fused by a large current, thereby ensuring the stability of the second power line and the second power connection line.

[0153] In some embodiments, the connection distance between the electrical fuse and the first electrode of the light emitting device is greater than the connection distance between the electrical fuse and the second power connection line. The electrical fuse is closer to the second power connection line relative to the light emitting device, which can ensure that the connection between the second power line and the current pixel circuit is disconnected in the case that the electrical fuse is fused. In addition, the electrode of the light emitting device and the electrical fuse can be prevented from being short-circuited.

[0154] In some embodiments, the electrical fuse has a fusing voltage range of 7.5V to 9V, i.e., the voltage difference between the two ends that can cause the electrical fuse to fuse can be between 7.5V and 9V, for example, it can be 8V or 8.5V. In addition, the fusing condition of the electrical fuse also depends on the resistance value of the electrical fuse.

[0155] In some embodiments, the line width of the fuse section is in the range of 0.02μm to 0.2μm, i.e., the second size L2 is in the range of 0.1μm to 0.2μm, for example, it can be 0.15μm, etc., and the thickness of the fuse section is in the range of 200nm to 500nm. The cross-sectional area of the fuse section can determine the resistance of the fuse section.

[0156] For example, in a 0.11μm process precision process, the line width of the fuse section can be in the range of 0.1μm to 0.2μm. In a 55nm process precision process, the line width of the fuse section can be in the range of 0.02μm to 0.2μm.

[0157] In some embodiments, the sheet resistance of the electrical fuse is in the range of 0.06 to 0.3Ω / □, where □ represents a single square in the sheet resistance test.

[0158] In some implementations, the fuse may at least partially surround the third transistor. This surrounding of the third transistor can save space for the fuse and also serve to shield the third transistor from signal interference.

[0159] In some embodiments, a shielding layer is provided between the gate of the third transistor and the electric fuse. The shielding layer is mainly used to shield the gate from interference caused by the signal flowing through the electric fuse. In particular, the electric fuse is arranged around the third transistor. The current on the electric fuse may affect the induced charge of the gate and the active layer, thereby affecting the threshold voltage of the third transistor.

[0160] A second aspect of this application provides a display panel. Figure 24 This is a schematic structural diagram of a display panel provided in an embodiment of this application. Figure 24 As shown, the display panel includes: a pixel circuit P as provided in the first aspect, wherein multiple pixel circuits are arranged in an array; a first electrode of a light-emitting device is electrically connected to a third node N3 of the pixel circuit P; a data signal line 600 is electrically connected to a first sub-circuit of the pixel circuit P; a first power supply line 700 is electrically connected to a second sub-circuit of the pixel circuit P; a second power supply connection line is electrically connected to a reset unit of the pixel circuit; a second power supply line 901 is electrically connected to multiple pixel circuits via the second power supply connection line; and a common electrode is electrically connected to the second electrode of the light-emitting device.

[0161] For example, the common electrode can be an electrode layer covering the entire surface. The second power line 901 can also be vertically arranged, or it can be arranged in a mesh pattern. Without repair, poor mesh quality may occur due to dark lines. The first power line 700 can also be horizontally arranged, and the second power line 901 can also be arranged in a mesh pattern.

[0162] In some implementations, the ratio of the line width of the second power line 901 to the line width of the fuse segment is greater than or equal to 2, that is, the line width of the second power line is much larger than the line width of the fuse segment, which can prevent the fusing current of the fuse segment from affecting the second power line.

[0163] In some examples, the ratio of the width of the second power connection line to the width of the fuse segment is greater than or equal to 1. The width of the second power connection line is also greater than the width of the fuse segment.

[0164] The display panel sets a protection unit in the pixel circuit, the protection unit can include a resistor, the resistivity of the resistor of the protection unit can be less than the resistivity of the second power supply connection line, in the case of two-pole short circuit of the light emitting device, the resistor of the protection unit can be broken under the action of a large current, and the large current has no effect on the second power supply connection line. The disconnection of the protection unit can disconnect the reset unit from the third node, and can avoid the potential of the second power supply connection line being pulled to the short-circuit potential of the first pole in the case of short circuit between the first pole and the second pole, and further avoid the potential of the second power supply line being pulled to the potential of the first pole, thereby avoiding the dark line defect of the whole row, the whole column or the cross type caused by the local light emitting device short circuit. The dark line defect in the display mode of the display panel can be repaired to a point defect.

[0165] A third aspect of the embodiments of the present application, Figure 25 A schematic structural diagram of a display device is provided in the embodiments of the present application. As shown in Figure 25 The display device includes the display panel 1000 provided in the second aspect.

[0166] The display panel used by the display device sets a protection unit in the pixel circuit, the protection unit can include a resistor, the resistivity of the resistor of the protection unit can be less than the resistivity of the second power supply connection line, in the case of two-pole short circuit of the light emitting device, the resistor of the protection unit can be broken under the action of a large current, and the large current has no effect on the second power supply connection line. The disconnection of the protection unit can disconnect the reset unit from the third node, and can avoid the potential of the second power supply connection line being pulled to the short-circuit potential of the first pole in the case of short circuit between the first pole and the second pole, and further avoid the potential of the second power supply line being pulled to the potential of the first pole, thereby avoiding the dark line defect of the whole row, the whole column or the cross type caused by the local light emitting device short circuit. The dark line defect in the display mode of the display panel can be repaired to a point defect.

[0167] A fourth aspect of the embodiments of the present application provides a driving method of a pixel circuit, comprising:

[0168] Step one,

[0169] A common signal is provided to the common electrode, wherein the common signal is a negative voltage;

[0170] And a ground voltage is provided to the second power supply line, wherein the difference between the common signal and the ground signal is a first difference, and the first difference is a voltage difference that can light up the light emitting device;

[0171] And a third control signal is provided to the third transistor, and the third transistor is turned on under the action of the third control signal; to repair the dark line defect of the display panel, that is, to perform the operation of the repair driving mode.

[0172] Step two,

[0173] After the repair driving mode is completed, display mode driving of the display panel is performed.

[0174] Or,

[0175] After the repair driving mode is completed, test mode driving of the display panel is performed.

[0176] In the test mode driving, if there is a dark line defect, the repair driving mode can be executed again.

[0177] In some examples, before step one, test mode driving of the display panel can be performed, and if there is no dark line defect, the repair driving mode is not executed.

[0178] The embodiments of the present application can also provide a controller, which can include a memory and a processor, the memory can store a computer program, and the processor can execute the steps of the pixel driving method according to the computer program.

[0179] The display device provided by the embodiments of the present application can include a controller and a display panel, and the controller is used to drive the display panel.

[0180] The above embodiments are only used to illustrate the technical solutions of the present application, but not limit the same; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to some technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

[0181] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications to the embodiments once they know the basic inventive concept. Therefore, the appended claims are intended to be interpreted as including all the preferred embodiments and all the changes and modifications falling within the scope of the present application.

[0182] Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application also intends to include these modifications and variations.

Claims

1. A pixel circuit, characterized by comprising: The pixel circuit comprises: a first sub-circuit electrically connected to the first node, the first sub-circuit being configured to electrically connect a data signal line; a second sub-circuit electrically connected to the second node, the second sub-circuit being configured to electrically connect a first power supply line; a driving sub-circuit electrically connected to the first node, the second node and a third node respectively, the third node being configured to electrically connect a first electrode of a light emitting device, a second electrode of the light emitting device being configured to electrically connect a common electrode; a reset sub-circuit, the reset sub-circuit comprising a protection unit and a reset unit, the protection unit being electrically connected to the reset unit, the protection unit being electrically connected to the third node, the reset unit being configured to electrically connect a second power supply connection line configured to transmit a second power supply signal; the protection unit comprises a resistor, the resistivity of the protection unit being less than the resistivity of the second power supply connection line; in the case of a short circuit between the first electrode and the second electrode of the light emitting device, the difference between the potential accessed by the second power supply connection line and the potential accessed by the common electrode is a first difference, the first difference being greater than or equal to a driving voltage difference for the light emitting device to emit light, the resistor of the protection unit being configured to be disconnected under the action of a current formed between the second power supply connection line and the third node, and the reset unit being disconnected from the third node.

2. The pixel circuit according to claim 1, wherein: the first sub-circuit, the second sub-circuit, the driving sub-circuit and the reset unit each comprise a transistor, the second sub-circuit comprises a capacitor unit, a first end of the capacitor unit being electrically connected to the first node, a second end of the capacitor unit being electrically connected to the second node, a third end of the capacitor unit being electrically connected to a fourth node, the fourth node being configured to be electrically connected to the first power supply line; the driving sub-circuit comprises a P-type transistor, and the reset unit comprises an N-type transistor.

3. The pixel circuit according to claim 2, wherein: the first sub-circuit comprises a first transistor, the second sub-circuit comprises a second transistor, the driving sub-circuit comprises a driving transistor, the reset unit comprises a third transistor, and the capacitor unit comprises a first capacitor and a second capacitor. The gate of the first transistor is configured to receive a first control signal, the first electrode of the first transistor is configured to be electrically connected with a data signal line, the second electrode of the first transistor is electrically connected with the first node, the gate of the second transistor is configured to receive a second control signal, the first electrode of the second transistor is electrically connected with the fourth node, the second electrode of the second transistor is electrically connected with the second node, the first capacitor has two ends electrically connected with the first node and the second node respectively, the second capacitor has two ends electrically connected with the second node and the fourth node respectively, the gate of the driving transistor is electrically connected with the first node, the first electrode of the driving transistor is electrically connected with the second node, the second electrode of the driving transistor is electrically connected with the third node, the gate of the third transistor is configured to receive a third control signal, the first electrode of the third transistor is electrically connected with the protection unit, and the second electrode of the third transistor is configured to be electrically connected with the second power supply connection line.

4. The pixel circuit according to claim 3, wherein in a case where the first electrode and the second electrode of the light emitting device are short-circuited, the first control signal is configured to control the first transistor to be turned off so as to disconnect the first sub-circuit, the second control signal is configured to control the second transistor to be turned off so as to disconnect the second sub-circuit, and the third control signal is configured to control the third transistor to be turned on so as to turn on the reset sub-circuit; and / or in a case where the first electrode and the second electrode of the light emitting device are short-circuited, the second power supply signal has a ground potential, and the common electrode has a negative potential.

5. A pixel circuit, comprising: a first sub-circuit electrically connected with a first node, the first sub-circuit being configured to be electrically connected with a data signal line; a second sub-circuit electrically connected with a second node, the second sub-circuit being configured to be electrically connected with a first power supply line; a driving sub-circuit electrically connected with the first node, the second node and a third node respectively, the third node being configured to be electrically connected with a first electrode of a light emitting device, and a second electrode of the light emitting device being configured to be electrically connected with a common electrode; a reset sub-circuit, the reset sub-circuit comprising a protection unit and a reset unit, the protection unit being electrically connected with the reset unit, the protection unit being electrically connected with the third node, and the reset unit being configured to be electrically connected with a second power supply connection line configured to transmit a second power supply signal; the protection unit comprises an electrical fuse; in a case where the first electrode and the second electrode of the light emitting device are short-circuited, the electrical fuse is configured to be blown under the action of a current so as to disconnect the reset unit from the third node; the protection unit comprises an electrical fuse; the electrical fuse comprises a first connection end, a second connection end and a fuse segment, the fuse segment, the first connection end and the second connection end are integrated, and the fuse segment is connected between the first connection end and the second connection end; the first connection end is electrically connected with the third node through a first via, and the second connection end is electrically connected with the reset unit through a second via. The size of the fuse section in a first direction is smaller than the size of the connection end, the first direction intersects a second direction, and the second direction is the length direction of the fuse section. 6.The pixel circuit of claim 5, wherein, The first sub-circuit, the second sub-circuit, the driving sub-circuit, and the reset unit each include a transistor, the second sub-circuit includes a capacitor unit, a first end of the capacitor unit is electrically connected to the first node, a second end of the capacitor unit is electrically connected to the second node, a third end of the capacitor unit is electrically connected to a fourth node, and the fourth node is configured to be electrically connected to the first power supply line. The driving sub-circuit includes a P-type transistor, and the reset unit includes an N-type transistor. 7.The pixel circuit of claim 6, wherein, The first sub-circuit includes a first transistor, the second sub-circuit includes a second transistor, the driving sub-circuit includes a driving transistor, the reset unit includes a third transistor, and the capacitor unit includes a first capacitor and a second capacitor. A gate of the first transistor is configured to receive a first control signal, a first electrode of the first transistor is configured to be electrically connected to a data signal line, a second electrode of the first transistor is electrically connected to the first node, a gate of the second transistor is configured to receive a second control signal, a first electrode of the second transistor is electrically connected to the fourth node, a second electrode of the second transistor is electrically connected to the second node, two ends of the first capacitor are respectively electrically connected to the first node and the second node, two ends of the second capacitor are respectively electrically connected to the second node and the fourth node, a gate of the driving transistor is electrically connected to the first node, a first electrode of the driving transistor is electrically connected to the second node, a second electrode of the driving transistor is electrically connected to the third node, a gate of the third transistor is configured to receive a third control signal, a first electrode of the third transistor is electrically connected to the protection unit, and a second electrode of the third transistor is configured to be electrically connected to the second power supply connection line. 8.The pixel circuit of claim 7, wherein, in a case where the first pole and the second pole of the light emitting device are short-circuited, the first control signal is configured to control the first transistor to be turned off to disconnect the first sub-circuit, the second control signal is configured to control the second transistor to be turned off to disconnect the second sub-circuit, and the third control signal is configured to control the third transistor to be turned on to connect the reset unit; and / or, in a case where the first pole and the second pole of the light emitting device are short-circuited, the second power supply signal has a ground potential, and the common electrode has a negative potential. 9.The pixel circuit of any one of claims 5 to 8, wherein, the protection unit includes an electrical fuse; the electrical fuse is arranged in the same layer as at least one signal line, and the electrical fuse has a resistivity smaller than that of the signal line arranged in the same layer; and / or, ​ The electrical fuse is arranged in the same layer as the gate of the transistor, and the resistivity of the electrical fuse is less than the resistivity of the gate of the transistor; and / or, The electrical fuse is arranged in the same layer as the semiconductor layer, and the resistivity of the electrical fuse is less than the resistivity of the semiconductor layer arranged in the same layer.

10. The pixel circuit of claim 5, wherein, Further comprising: A process reference structure arranged in the same layer as the electrical fuse; The process reference structure is arranged on different sides of the fuse section from the first connection end and the second connection end, respectively; The normal projection of the process reference structure on the substrate layer does not overlap with the normal projection of the electrical fuse on the substrate layer.

11. The pixel circuit according to claim 10, wherein The second power connection line is electrically connected to a second power line, and the second power line is electrically connected to a plurality of the second power connection lines; The current density of the second power connection line is greater than the current density of the electrical fuse; The current density of the second power line is greater than the current density of the electrical fuse.

12. The pixel circuit according to claim 10, wherein The connection distance between the electrical fuse and the first electrode of the light emitting device is greater than the connection distance between the electrical fuse and the second power connection line; and / or, The electrical fuse has a fuse voltage range of 7.5V to 9V; and / or, The fuse section has a line width range of 0.02μm to 0.2μm, and a thickness range of 200nm to 500nm; and / or, The fuse section is arranged in a curve or a broken line.

13. The pixel circuit according to claim 7, wherein The sheet resistance of the electrical fuse ranges from 0.06 to 0.3 ohm / square; and / or, The electrical fuse at least partially surrounds the third transistor; and / or, A shielding layer is arranged between the gate of the third transistor and the electrical fuse.

14. A display panel, characterized by Comprising: The pixel circuit according to any one of claims 1 to 13; A light emitting device, a first electrode of the light emitting device being electrically connected to the third node of the pixel circuit; A data signal line, electrically connected to the first sub-circuit of the pixel circuit; A first power line, electrically connected to the second sub-circuit of the pixel circuit; A second power connection line, electrically connected to the reset unit of the pixel circuit; A second power line, electrically connected to a plurality of the pixel circuits through the second power connection line; A common electrode, electrically connected to a second electrode of the light emitting device.

15. A display device, characterized in that, Comprising: The display panel according to claim 14.

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