Frequency measurement method and system based on FPGA

Abstract

The invention relates to the technical field of frequency measurement, and discloses an FPGA-based frequency measurement method and system, and the method comprises the steps: collecting a plurality of sampling points in the whole period of an input signal when a calculation time refreshing instruction is obtained; the average value is calculated through the multiple sampling points and serves as a reference value; dividing the measured time into a plurality of continuous measured time sections; in each measured time section, acquiring the frequency of the input signal in each measured time section; and averaging the frequencies obtained in each measured time section, and taking the averaged frequency as the final frequency of the input signal measured in the measured time. The reference value is obtained by capturing the sampling points in real time, the problem that frequency measurement cannot be carried out due to offset under the fixed reference value is avoided, the frequency is obtained by carrying out frequency measurement on multiple sections one by one and then averaging, and the frequency measurement error is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of frequency measurement, and in particular to a frequency measurement method and system based on FPGA. Background Art

[0002] See also Figure 1 The conventional frequency measurement system is divided into two parts: an analog comparison circuit 300 and a digital controller 400. The analog comparison circuit 300 compares the input signal Vin with the reference value Vref to form an integer (see Figure 2 ) and then input to the digital controller 400 for digital frequency measurement. Currently, the digital frequency measurement methods are mainly divided into direct frequency measurement method, indirect frequency measurement method, and equal-precision frequency measurement method.

[0003] The direct measurement method generates a gate signal by counting the standard clock, counts the period of the measured signal within the gate signal time, and calculates the frequency of the measured signal according to the proportional relationship between the standard clock frequency, the number of standard clocks, and the number of periods of the measured signal. However, the direct measurement method directly measures the frequency of the measured signal by counting the measured signal through the standard clock timing, and the measurement error comes from ±1 period of the measured signal. The larger the period of the measured signal and the lower the frequency, the greater the error. Therefore, the direct frequency measurement method is only applicable to high-frequency measurement scenarios.

[0004] The indirect measurement method counts the standard clock within one cycle of the measured signal, calculates the period of the measured signal, and finds the frequency of the measured signal. The indirect measurement method determines the period of the measured signal by counting the number of standard clocks within one cycle of the measured signal, and then converts the frequency of the measured signal. The measurement error comes from ±1 standard clock cycle. However, in order to ensure the measurement accuracy of this method, the period of the measured signal is required to be large enough relative to the standard clock. Therefore, the indirect frequency measurement method is only applicable to low-frequency measurement scenarios.

[0005] See also Figure 3 , which shows the principle diagram of the equal-precision measurement method. The equal-precision measurement method generates an actual gate signal by counting the cycles of the measured clock signal, counts the standard clock signal in the actual gate Tx corresponding to the actual gate signal, and calculates the measured clock signal frequency according to the proportional relationship between the standard clock signal frequency, the number of standard clocks and the number of cycles of the measured clock signal. However, the equal-precision measurement method uses the measured clock signal to time, count the standard clock, and calculate the measured clock signal frequency according to the proportional relationship. The measurement error of each frequency band comes from ±1 standard clock cycle, ensuring equal precision of full-band measurement. However, it is necessary to consider the standard clock signal frequency and set a reasonable count value for the number of cycles of the measured clock signal, otherwise it will still lead to inaccurate measurement results or too long measurement time.

[0006] When the input signal Vin is shaped by the analog comparison circuit 300 , the hardware cost is complicated and once the input signal is small and lower than the reference value Vref, or the reference value Vref is inaccurate due to offset, the subsequent digital frequency measurement result will be affected.

[0007] Furthermore, the three digital frequency measurement methods described above have the defects of limited measurement range or low measurement accuracy. Therefore, it is necessary to provide an FPGA-based frequency measurement method and system that can adapt to large bandwidth, improve measurement accuracy, and have low hardware cost. Summary of the invention

[0008] The purpose of the embodiment of the present invention is to provide a frequency measurement method based on FPGA, which collects input signals through multiple sampling points to obtain a reference value for comparing the input signals, thereby avoiding the problem of being unable to perform frequency measurement due to offset under a fixed reference value, and dividing the measured time into multiple continuous measured time segments within the measured time, measuring the frequencies in each segment one by one and averaging them to obtain the final frequency of the input signal, thereby reducing the frequency measurement error.

[0009] In order to achieve the above-mentioned purpose, the present invention adopts the following technical solutions: The present application relates to a frequency measurement method based on FPGA, comprising: When the calculation time refresh instruction is obtained, a plurality of sampling points are collected in the entire cycle of the input signal; Use multiple sampling points to calculate the average value as the benchmark value; Divide the measured time into multiple continuous measured time segments; In each measured time segment, the frequency of the input signal in each measured time segment is obtained, specifically: Counting the standard clock signal, and at the same time, by comparing the reference level of the input signal with the reference value, recording the number of comparison points where the reference value is exceeded and the input signal has the same change trend; Calculating the frequency of the input signal in each measured time segment using the frequency of the standard clock signal, the count of the standard clock signal and the number, wherein the measured time segment is an integer multiple of the period of the input signal; The frequencies acquired in each measured time segment are averaged to serve as the final frequency of the input signal measured in the measured time.

[0010] In some embodiments of the present application, the frequency measurement method further includes: Before the input signal is collected, anti-disturbance noise processing is performed on the input signal.

[0011] In some embodiments of the present application, the number of comparison points at which the reference value is recorded and the input signal change trend is consistent is specifically: The number of comparison points when the reference value is recorded and the input signal rises, or The number of comparison points when the input signal falls after exceeding the reference value is recorded.

[0012] In some embodiments of the present application, the multiple consecutive measured time segments are different.

[0013] In some embodiments of the present application, during the final frequency measurement, if a calculation time refresh instruction is obtained, the last obtained final frequency is output; if the last final frequency measurement is not performed, zero is output.

[0014] In some embodiments of the present application, the frequency measurement method further includes: The final frequency is output.

[0015] The present application also relates to a frequency measurement system based on FPGA, comprising: an analog-to-digital converter for acquiring a plurality of sampling points over a whole period of an input signal; A frequency measurement module is used to measure the frequency of the input signal within the measured time, and the frequency measurement module is configured as follows: Use multiple sampling points to calculate the average value as the benchmark value; Divide the measured time into multiple continuous measured time segments; In each measured time segment, the standard clock signal is counted, and at the same time, by comparing the reference level of the input signal with the reference value, the number of comparison points that pass the reference value and have the same change trend of the input signal is recorded; and the frequency of the input signal in each measured time segment is calculated by using the frequency of the standard clock signal, the count of the standard clock signal and the number, wherein the measured time segment is an integer multiple of the period of the input signal; The frequencies acquired in each measured time segment are averaged to serve as the final frequency of the input signal measured in the measured time.

[0016] In some embodiments of the present application, the frequency measurement system further includes: A display module is used for displaying and outputting the final frequency.

[0017] In some embodiments of the present application, the process of the frequency measurement module performing frequency measurement is implemented using a state machine, and the frequency measurement module and the display module are both arranged on the FPGA.

[0018] Compared with the prior art, the technical solution of this application has the following advantages and beneficial effects: The FPGA-based frequency measurement method involved in the present application uses a sampling value averaging algorithm to average the sampling values ​​of multiple sampling points as a reference value, forms an adaptive reference level according to the input signal, and effectively avoids the problem of being unable to perform frequency measurement due to bias under a fixed reference value.

[0019] In addition, the frequency measurement method divides the measured time into multiple continuous measured time segments, and uses an equal-precision measurement method to perform step-by-step frequency measurement on each measured time segment, thereby compensating for the frequency measurement error caused by the gate signal time selection, reducing the frequency measurement error, and improving the frequency measurement accuracy.

[0020] After reading the specific embodiments of the present invention in conjunction with the accompanying drawings, other features and advantages of the present invention will become more clear. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 The principle block diagram of the existing frequency measurement system is shown; Figure 2 The response principle diagram of the analog comparison circuit in the existing frequency measurement system is shown; Figure 3 The schematic diagram of the equal precision measurement method is shown; Figure 4 The following is a schematic diagram showing an implementation principle of a frequency measurement method based on FPGA proposed by the present invention; Figure 5 A schematic diagram showing the step-by-step frequency measurement in an embodiment of the frequency measurement method based on FPGA proposed by the present invention is shown; Figure 6 The block diagram of the frequency measurement system based on FPGA proposed by the present invention is shown.

[0023] Reference numerals: 100, ADC; 200, FPGA; 210, frequency measurement module; 220, display module; 300, analog comparison circuit; 400, digital controller. DETAILED DESCRIPTION

[0024] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0025] Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. In the description of the present invention, it should be understood that the orientation or position relationship indicated by the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0026] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0027] The terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0028] In order to improve the frequency measurement accuracy, the present application relates to a frequency measurement method based on FPGA 200 (Field Programmable Gate Array, programmable array logic), which is relatively Figure 1 The frequency measurement method performed by the existing frequency measurement system shown in the figure acquires a reference value by adaptively sampling the input signal, replaces the analog comparison circuit 300 used to shape the input signal, reduces the hardware cost investment, and introduces step-by-step frequency measurement on the basis of the equal-precision measurement method to achieve high-precision frequency measurement and meet the large bandwidth and high-precision frequency measurement requirements.

[0029] The frequency measurement method based on FPGA 200 is adopted Figure 6 The frequency measurement method is performed based on the FPGA 200 shown, and therefore, the frequency measurement method will be described below in conjunction with the frequency measurement system.

[0030] Figure 4 shows a frequency measurement method in the form of a state machine, Figure 5 The schematic diagram of step-by-step frequency measurement is shown. Figure 6 Shown is a block diagram of a frequency measurement system.

[0031] The frequency measurement system includes an ADC (Analog-to-digital converter) 100 and an FPGA 200, wherein the frequency measurement module in the FPGA 200 implements the frequency measurement method in the form of a state machine, see Figure 4 , Figure 4 The middle ellipse represents the state and the arrow represents the condition.

[0032] It should be noted that the execution of some states in the state machine is not serial (i.e., chronological order) but can be executed in parallel.

[0033] See also Figure 4 and Figure 5 , specifically describe the process of frequency measurement.

[0034] S1: When the calculation time refresh instruction is obtained, multiple sampling points are collected within the entire cycle of the input signal.

[0035] The input signal is generally a sine wave signal, which needs to be acquired by an ADC (Analog-to-digital converter) 100 to obtain multiple digital sampling points within a period before the FPGA 200 can perform digital frequency measurement processing.

[0036] The calculation time refers to the period from the start of frequency measurement to the completion of frequency measurement. This time period can be modified.

[0037] See also Figure 4 In order to ensure the accuracy of the sampling point acquisition of the input signal, before the input signal is acquired, the input signal is also subjected to anti-disturbance noise processing to remove the burr interference on the input signal.

[0038] S2: Use multiple sampling points to calculate the average value as the benchmark value.

[0039] See also Figure 2 ,use Figure 1 When the existing frequency measurement system shown in the figure measures the frequency, the input signal Vin is compared with the reference value Vref and the voltage Vo is output, wherein VCC is the output calibration level. Thus, the rectangular wave signal Vo output after comparison by the analog comparison circuit 300 is obtained.

[0040] The existing frequency measurement system shapes the input signal Vin by comparing the level. The frequency measurement method has complex hardware cost and once the input signal Vin is smaller than the reference value Vref or the reference value Vref is inaccurate due to offset, it will cause the problem of being unable to measure.

[0041] Therefore, by means of digital operations, through real-time capture, dynamic adaptation, and reasonable grabbing of sampling points, errors caused by low signal power or signal bias causing the reference value Vref to deviate from the conventionally recognized zero point can be avoided.

[0042] In some embodiments of the present application, after a plurality of sampling points are acquired within a period of the input signal Vin, the sampling points are transmitted to the frequency measurement module 210, and an average value is obtained by using an average algorithm as a reference value Vref.

[0043] Since the sampling point captured in real time is a point on the input signal Vin, the reference value Vref will not be greater than the maximum amplitude of the input signal Vin. In this way, regardless of the capture position of the sampling point and the reference level of the obtained reference value Vref, it will not affect the comparison of the input signal Vin relative to the reference level Vref, effectively avoiding the problem of possible inability to measure due to bias under a fixed reference level Vref.

[0044] After obtaining the reference value Vin, the signal rising moment (or falling moment) is obtained by comparing the sampling point with the reference value Vin according to the sampling point input. When the signal of the next cycle arrives, the signal rising moment (or falling moment) can also be captured at the same position. The difference between the two signal rising moments (or falling moments) is one cycle of the input signal.

[0045] S3: Divide the measured time into a plurality of continuous measured time segments.

[0046] See also Figure 3 , which shows the principle diagram of the equal-precision measurement method.

[0047] The equal-precision measurement method generates an actual gate signal according to the cycle count of the clock signal under test, and the actual gate Tx corresponding to the actual gate signal is an integer multiple of the cycle Tfx of the clock signal under test.

[0048] Since the actual gate Tx is an integer multiple of the measured clock period, the error of ±1 clock period produced by the measured clock signal is eliminated. However, an error of ±1 clock period will be generated for the standard clock signal. The standard clock signal usually has an extremely high frequency, so the frequency error is greatly reduced compared with the direct measurement method and the indirect measurement method.

[0049] The measured clock signal is counted within the actual gate Tx, and the number of cycles is obtained as t1. Assuming the period of the measured clock signal is Tfx, the frequency of the measured clock signal fx=1 / Tfx, thus the equation can be obtained: t1*Tfx=t1 / fx=Tx.

[0050] Count the standard clock signal within the actual gate Tx to obtain the cycle number t2 (the error is 1). Suppose the clock period of the standard clock signal is Tfs, then the standard clock signal frequency fs=1 / Tfs, thus we can get the equation: t2*Tfs=t2 / fs=Tx.

[0051] Then t1 / fx=t2 / fs=Tx, and the measured clock signal frequency fx is obtained: fx=t1*fs / t2.

[0052] In order to improve the frequency measurement accuracy, some embodiments of the present application adopt a step-by-step frequency measurement method, that is, the measured time (that is, the actual gate) is divided into multiple continuous measured time segments, and in each measured time segment, the frequency is measured using an equal-precision measurement method. Afterwards, the measured frequencies are averaged as the final frequency of the input signal.

[0053] In some embodiments of the present application, the measured time segment is an integer multiple of the period of the input signal.

[0054] Each of the multiple continuous measured time segments may be the same time period, or may be a different time period (different time periods include time periods that are different from each other or at least two different time periods).

[0055] In some embodiments of the present application, a plurality of continuous measured time segments are set as different time periods, so as to compensate for errors in different time periods and achieve the effect of reducing the frequency measurement error as a whole.

[0056] For example, the measured time is divided into a first measured time segment Tx1 and a second measured time segment Tx2, the first measured time segment Tx1 and the second measured time segment Tx2 can be four cycles of the input signal respectively, or the first measured time segment Tx1 can be five cycles of the input signal, and the second measured time segment Tx2 can be four cycles of the input signal (see Figure 5 ).

[0057] It should be noted that Figure 5 The measured clock signal is shown in the figure for the convenience of explanation only. In the present application, the measured clock signal is not generated. Instead, the input signal is compared with the reference value, and the time between adjacent points where the reference value is passed and the signal change trend (for example, the rising moment of the signal or the falling moment of the signal) is consistent is recorded as one cycle of the input signal.

[0058] S4: In each measured time segment, the frequency of the input signal in each measured time segment is obtained.

[0059] See also Figure 4The portion shown in the dotted box is the number of comparison points that have passed the reference value points and have the same signal change trend, which are recorded in sequence during the calculation time, and are cyclically compared with the input signal and the reference value.

[0060] Specifically, in Figure 4 The dotted box shown in the figure is recorded as the initial value of the benchmark value when the benchmark value point is passed for the first time. After that, as time goes by, the input signal and the benchmark value are continuously compared, and the number of remaining comparison points is counted. This cycle is repeated until the calculation time ends, and the number of cycles of the input signal obtained under the actual gate can be obtained.

[0061] See also Figure 5 ,exist Figure 4 In the process of calculating the number of cycles of the input signal in the dotted box, the measured time (that is, the actual gate used for the equal-precision measurement method) is divided into multiple continuous measured time segments. Within the measured time segments, the frequency of the input signal is measured separately using the principle of the equal-precision measurement method.

[0062] The following description is made by taking the first measured time section Tx1 and the second measured time section Tx2 as examples.

[0063] S41: Counting the standard clock signal, and at the same time, by comparing the reference level of the input signal with the reference value, recording the number of comparison points where the reference value is exceeded and the input signal has the same change trend.

[0064] According to the measurement principle of the equal-precision measurement method, within the first measured time segment Tx1, the standard clock signal is counted to obtain the number of standard clock signal cycles t21.

[0065] At the same time, as described above, the number of comparison points at the reference value and the signal rising time is also recorded, so as to obtain the cycle number t11 of the input signal in the first measured time section Tx1.

[0066] S42: Calculate the frequency of the input signal in each measured time segment by using the frequency fs of the standard clock signal, the count of the standard clock signal and the number of comparison points.

[0067] See also Figure 5 , the count of the standard clock signal is the number of standard clock signal cycles t21, and the number of comparison points minus 1 is the number of cycles of the input signal t11.

[0068] According to the frequency calculation formula used in the equal-precision measurement method as described above, the frequency fx1 = t11 * fs / t21 of the first measured time segment Tx1 is obtained.

[0069] Similarly, for the second measured time segment Tx2, the standard clock signal is counted to obtain the number of standard clock signal cycles t22.

[0070] At the same time, the number of comparison points at which the reference value is exceeded and the signal rises is recorded, so as to obtain the cycle number t12 of the input signal within the second measured time segment Tx2.

[0071] In this way, the frequency fx2=t12*fs / t22 of the second measured time segment Tx2 is obtained.

[0072] In some embodiments of the present application, if there are more than two measured time segments, the frequencies in other measured time segments also need to be calculated.

[0073] In some embodiments of the present application, when obtaining the number of cycles of the input signal, the comparison point at the time when the reference value is passed and the signal falls may also be recorded, which will not be elaborated here.

[0074] S5: averaging the frequencies obtained in each measured time segment as the final frequency measured by the input signal within the measured time.

[0075] As shown in S4 , the frequency fx1 obtained in the first measured time segment Tx1 and the frequency fx2 obtained in the second measured time segment Tx2 are exemplarily given.

[0076] In some embodiments of the present application, more than two measured time segments may be set. The number of measured time segments is related to the frequency of the standard clock signal. The higher the frequency of the standard clock signal, the smaller the equal-precision frequency measurement error, and the smaller the number of measured time segments.

[0077] In some embodiments of the present application, setting a first measured time segment Tx1 and a second measured time segment Tx2 is taken as an example to illustrate how to obtain the final frequency fx.

[0078] The final frequency fx=(fx1+fx2) / 2, thus reducing the frequency measurement error.

[0079] The frequency measurement processes described above are all implemented by the frequency measurement module 210. The frequency measurement module 210 is disposed on the FPGA 200, and the frequency measurement process constrains the frequency measurement flow and timing in the form of a state machine.

[0080] In some embodiments of the present application, the frequency measurement method also includes a process of outputting the final frequency, and the output can be output through the display module 220, for example, text output or screen output.

[0081] The display module 220 is also disposed on the FPGA 200, and the display module 220 can also output the simulation result after the frequency measurement is performed using the frequency measurement method as described above.

[0082] In some embodiments of the present application, in order to ensure stable execution of the state machine, during the final frequency measurement, if a calculation time refresh instruction is obtained, the last final frequency obtained is output; if the last final frequency measurement is not performed, zero is output.

[0083] Return to see Figure 4 When the frequency measurement system first enters the state machine, the output is 0, indicating that the system has not measured the frequency. After the frequency measurement system is reset, the system will wait in the idle state. When the calculation time refresh instruction is obtained, the state machine will output the last frequency measurement result.

[0084] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, it is still possible for a person skilled in the art to modify the technical solutions described in the aforementioned embodiments, or to replace some of the technical features therein by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions claimed to be protected by the present invention.

Claims

1. A frequency measurement method based on FPGA, characterized in that: include: When the calculation time refresh instruction is obtained, a plurality of sampling points are collected in the entire cycle of the input signal; Use multiple sampling points to calculate the average value as the benchmark value; Divide the measured time into multiple continuous measured time segments; In each measured time segment, the frequency of the input signal in each measured time segment is obtained, specifically: Counting the standard clock signal, and at the same time, by comparing the reference level of the input signal with the reference value, recording the number of comparison points where the reference value is exceeded and the input signal has the same change trend; Calculating the frequency of the input signal in each measured time segment using the frequency of the standard clock signal, the count of the standard clock signal and the number, wherein the measured time segment is an integer multiple of the period of the input signal; The frequencies acquired in each measured time segment are averaged to serve as the final frequency of the input signal measured in the measured time.

2. The frequency measurement method according to claim 1, characterized in that: The frequency measurement method further comprises: Before the input signal is collected, anti-disturbance noise processing is performed on the input signal.

3. The frequency measurement method according to claim 1, characterized in that: The number of comparison points where the benchmark value has been recorded and the input signal change trend is consistent, specifically: The number of comparison points when the reference value is recorded and the input signal rises, or The number of comparison points when the input signal falls after exceeding the reference value is recorded.

4. The frequency measurement method according to claim 1, characterized in that: The multiple consecutive measured time segments are different.

5. The frequency measurement method according to claim 1, characterized in that: During the final frequency measurement, if a calculation time refresh instruction is obtained, the last obtained final frequency is output; if the last final frequency measurement is not performed, zero is output.

6. The frequency measurement method according to claim 1, characterized in that: The frequency measurement method further comprises: The final frequency is output.

7. A frequency measurement system based on FPGA, characterized in that: include: an analog-to-digital converter for acquiring a plurality of sampling points over a whole period of an input signal; A frequency measurement module is used to measure the frequency of the input signal within the measured time, and the frequency measurement module is configured as follows: Use multiple sampling points to calculate the average value as the benchmark value; Divide the measured time into multiple continuous measured time segments; In each measured time segment, the standard clock signal is counted, and at the same time, by comparing the reference level of the input signal with the reference value, the number of comparison points at which the input signal passes the reference value and has the same change trend as the reference value is recorded; and the frequency of the input signal in each measured time segment is calculated by using the frequency of the standard clock signal, the count of the standard clock signal and the number, wherein the measured time segment is an integer multiple of the period of the input signal; The frequencies obtained in each measured time segment are averaged to serve as the final frequency of the input signal measured in the measured time.

8. The frequency measurement system according to claim 7, characterized in that: The frequency measurement system further comprises: A display module is used for displaying and outputting the final frequency.

9. The frequency measurement system according to claim 8, characterized in that: The frequency measurement process performed by the frequency measurement module is implemented in the form of a state machine, and the frequency measurement module and the display module are both arranged on the FPGA.

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