Chip configuration method and device, computer equipment and storage medium

Abstract

The invention relates to a chip configuration method and device, computer equipment and a storage medium. The method comprises the following steps: receiving a trigger instruction sent by an external host, wherein the trigger instruction is used for triggering a configuration agent module; configuration instructions in an external memory are obtained in batches through the configuration agent module, and the configuration instructions are stored in a buffer area of the configuration agent module; the configuration instructions are read one by one from the buffer area, the configuration instructions comprise control instructions and expression instructions, and one control instruction and a plurality of expression instructions form an expression sequence; and sequentially executing the configuration instructions in the expression sequence to configure the programmable register of the target module. By adopting the method, the control instruction can be obtained and executed through the configuration agent module, tedious, fixed or repeated function module configuration work executed by the processor is replaced, and the computing power of the processor is released.

Description

Technical Field

[0001] The present application relates to the field of chip integration technology, and in particular to a chip configuration method, device, computer equipment and storage medium. Background Art

[0002] In a system-on-chip (SoC), a processor, bus network, memory, and various peripherals, interfaces, and hardware acceleration modules are usually integrated. When the SoC chip is working, the processor not only has the task of accessing the on-chip memory for data calculations, but also needs to be responsible for global management and precise control of the functions of each module on the chip. This control is usually achieved by the processor accessing the programmable registers of each functional module and configuring them.

[0003] As the number of on-chip functional modules increases and the functions of the modules become more complex, the number of programmable registers that the processor needs to configure also increases, which causes the processor to consume more computing power when performing configuration tasks. In addition, some functional modules have a large number of programmable registers, but they only need to be configured in batches once after the chip is started; some functional modules need to configure multiple different programmable registers in sequence, or need to wait for certain state changes in the middle, but the configuration process is fixed. Although these configuration tasks are simple and repetitive, they occupy a lot of processor computing power and affect the execution efficiency of other key tasks of the processor. Summary of the invention

[0004] Based on this, it is necessary to provide a chip configuration method, device, computer equipment and storage medium that can replace the processor execution module configuration to address the above technical problems.

[0005] In one aspect, a chip configuration method is provided, the method comprising:

[0006] Receiving a trigger instruction sent by an external host, wherein the trigger instruction is used to trigger the configuration proxy module;

[0007] Acquire configuration instructions in the external memory in batches through the configuration proxy module, and store the configuration instructions in the buffer of the configuration proxy module;

[0008] Reading the configuration instructions one by one from the buffer, the configuration instructions including control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence;

[0009] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0010] In one embodiment, before receiving the trigger instruction sent by the external host, the method further includes:

[0011] Deploy the configuration agent module;

[0012] The startup address is written into the programmable register of the configuration agent module by the external host.

[0013] In one embodiment, after reading the configuration instructions one by one from the buffer, the method further includes:

[0014] In response to reading a control instruction from the buffer, determining a command type of the control instruction, the command type including a configuration command, a polling command, and a jump command;

[0015] In response to the control instruction being a configuration command or a jump command, the configuration quantity of expression instructions in the expression sequence is determined according to the control instruction, and the configuration quantity of expression instructions is read sequentially from the buffer.

[0016] In one embodiment, after reading the configuration instructions one by one from the buffer, the method further includes:

[0017] In response to reading an expression instruction from the buffer, determining an expression type of the expression instruction, the expression type including a target address, a data strobe, a replacement strobe and configuration data;

[0018] In response to the expression instruction being a target address, a data strobe or a replacement strobe, temporarily storing the expression instruction for standby use, and reading a next expression instruction from the buffer;

[0019] In response to the expression instruction being configuration data, the configuration data is combined with the data strobe or the replacement strobe to determine final configuration data.

[0020] In one embodiment, the sequentially executing the configuration instructions in the expression sequence to configure the programmable registers of the target module includes:

[0021] In response to performing strobe configuration on the first target module, a first configuration command, a first target address, a first data strobe and first configuration data form a first expression sequence, wherein the first data strobe is used to indicate a bit in the first configuration data that needs to be configured;

[0022] Read a current data value from the first target address, perform a bitwise AND operation on the first data strobe and the current data value to obtain a first data value;

[0023] Performing a bitwise AND operation on the first data strobe and the first configuration data to obtain a second data value;

[0024] Performing a bitwise OR operation on the first data value and the second data value to obtain first final configuration data;

[0025] The first final configuration data is written into the first target address to configure the programmable register of the first target module.

[0026] In one embodiment, the sequentially executing the configuration instructions in the expression sequence to configure the programmable registers of the target module further includes:

[0027] In response to performing replacement configuration on the second target module, the second configuration command, the second target address, the replacement strobe and the second configuration data form a second expression sequence, wherein the replacement strobe is used to indicate a bit position in the second configuration data that needs to be replaced;

[0028] In response to the presence of a plurality of replacement strobes in the second expression sequence, filling the to-be-replaced values ​​corresponding to the plurality of replacement strobes into the target buffer in order from low to high;

[0029] Obtaining the serial number of the target buffer through the second configuration command, and obtaining the value to be replaced from the target buffer according to the serial number;

[0030] Performing a bitwise AND operation on the to-be-replaced value and the plurality of replacement strobes in sequence to obtain a first replacement value;

[0031] Performing a bitwise AND operation on the replacement strobe and the second configuration data to obtain a second replacement value;

[0032] Performing a bitwise OR operation on the first replacement value and the second replacement value to obtain second final configuration data;

[0033] The second final configuration data is written into the second target address to configure the programmable register of the second target module.

[0034] In one embodiment, in response to reading a control instruction from the buffer, determining the command type of the control instruction further includes:

[0035] In response to the control instruction being a polling command, the polling command, the third target address, the second data strobe and the expected data constitute a third expression sequence;

[0036] Periodically reading a current state value from the third target address, and comparing the current state value with a strobe bit of the expected data;

[0037] In response to the current state value being not equal to the selection bit of the expected data and the maximum polling number not being reached, returning to polling after a waiting interval, wherein the maximum polling number is determined by the polling command;

[0038] In response to the current state value being equal to the selected bit of the expected data, or reaching the maximum polling number, the polling ends.

[0039] In another aspect, a chip configuration device is provided, the device comprising:

[0040] A trigger module, used for receiving a trigger instruction sent by an external host, wherein the trigger instruction is used for triggering the configuration proxy module;

[0041] A cache module, used to obtain configuration instructions in batches from an external memory through the configuration proxy module, and store the configuration instructions in a buffer of the configuration proxy module;

[0042] An acquisition module, used for reading the configuration instructions one by one from the buffer, wherein the configuration instructions include control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence;

[0043] The execution module is used to execute the configuration instructions in the expression sequence in sequence to configure the programmable registers of the target module.

[0044] In another aspect, a computer device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the following steps are implemented:

[0045] Receiving a trigger instruction sent by an external host, wherein the trigger instruction is used to trigger the configuration proxy module;

[0046] Acquire configuration instructions in the external memory in batches through the configuration proxy module, and store the configuration instructions in the buffer of the configuration proxy module;

[0047] Reading the configuration instructions one by one from the buffer, the configuration instructions including control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence;

[0048] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0049] In another aspect, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0050] Receiving a trigger instruction sent by an external host, wherein the trigger instruction is used to trigger the configuration proxy module;

[0051] Acquire configuration instructions in the external memory in batches through the configuration proxy module, and store the configuration instructions in the buffer of the configuration proxy module;

[0052] Reading the configuration instructions one by one from the buffer, the configuration instructions including control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence;

[0053] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0054] The above-mentioned chip configuration method, device, computer equipment and storage medium obtain and execute control instructions through the configuration agent module, extract the configuration intention and operation configuration value of the external host, and send them to the target module in turn to complete the programmable register configuration of each target module. It can be executed in a pipeline to increase the configuration speed, replace the chip processor to perform tedious, fixed or repetitive functional module configuration work, and release the processor computing power. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 A schematic diagram of a chip configuration method according to an embodiment;

[0056] Figure 2 A schematic diagram of the structure of configuring an agent module in an embodiment;

[0057] Figure 3 A schematic diagram of a configuration flow of a chip configuration method in one embodiment;

[0058] Figure 4 A schematic diagram of the structure of an expression sequence in one embodiment;

[0059] Figure 5 A schematic diagram of a configuration pair structure of a conventional configuration scenario in an embodiment;

[0060] Figure 6 A schematic diagram of a configuration pair structure of a gating configuration scenario in an embodiment;

[0061] Figure 7 A schematic diagram of a configuration pair structure of a replacement configuration scenario in an embodiment;

[0062] Figure 8 A schematic diagram of a configuration pair structure of a compression replacement configuration scenario in an embodiment;

[0063] Fig. 9 A schematic diagram of a configuration pair structure of a status polling scenario in an embodiment;

[0064] Fig.10 A schematic diagram of a structure of multiple configuration pairs of a continuous configuration scenario in an embodiment;

[0065] Fig.11 A structural block diagram of a chip configuration device in one embodiment;

[0066] Fig.12 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0067] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0068] In one embodiment, Figure 1-3 As shown, a chip configuration method is provided, comprising the following steps:

[0069] Step S1, receiving a trigger instruction sent by an external host, wherein the trigger instruction is used to trigger a configuration proxy module.

[0070] In one embodiment, before receiving the trigger instruction sent by the external host, the method further includes: deploying the configuration agent module; and writing the startup address into the programmable register of the configuration agent module through the external host.

[0071] Specifically, the configuration proxy module is triggered by an external host (such as a processor), and actively obtains and executes configuration instructions from the memory to achieve control and monitoring of various programmable registers of various functional modules. The configuration methods implemented by the configuration instructions in the memory include full-word configuration, strobe configuration, random configuration, continuous configuration, and status polling, which can cope with a variety of work scenarios. Among them, the composition of the configuration proxy module includes:

[0072] Trigger APB Slave: The external host (e.g., processor) configures the programmable registers of the trigger APB slave to start the configuration agent module to perform a series of configuration actions, including instruction fetching, instruction analysis, instruction scheduling, instruction expression, and finally configuring the programmable registers of the destination module;

[0073] Fetch AXI Master: After obtaining the startup address given by the external host, the proxy module is configured as the host starting from the address, and a batch of data is obtained from the external memory through the AXI host interface, where each 32-bit of the obtained data is regarded as an instruction;

[0074] Config-Instructions Buffer: In order to reduce the time to obtain configuration instructions from the external memory, the configuration agent module adopts burst transmission to fetch instructions, that is, a read command will read back a batch of instructions. The batch instructions read back are temporarily stored in the internal buffer of the configuration agent module, and will be taken out one by one for processing by subsequent links;

[0075] Sequencer: The core control module of the configuration agent module. It takes configuration instructions out of the buffer one by one, identifies the instruction type, calculates the final configuration data, assembles the configuration sequence, starts polling, and issues configuration access.

[0076] Configure AXI-Lite Master: Controlled by the sequence controller, it uses the AXI-Lite protocol to access the programmable registers of the target functional module and perform write or read operations.

[0077] Based on the above steps, by deploying the configuration agent module, the chip processor can be replaced to perform tedious, fixed or repetitive functional module configuration work, thereby releasing the processor capacity.

[0078] Step S2: acquiring configuration instructions in the external memory in batches through the configuration proxy module, and storing the configuration instructions in a buffer of the configuration proxy module.

[0079] like Figure 3 As shown, it is a configuration flow of the configuration agent module. The external host (such as a processor) writes the address of the first configuration instruction to the programmable register of the configuration agent module. The configuration agent module starts a configuration flow accordingly, batches the configuration instructions are retrieved from the instruction storage address, and temporarily stored in the internal buffer. Then, the instructions are read and executed from the buffer in sequence through the sequence controller, and finally a series of AXI reads and writes are formed that are reflected in the configuration of the AXI-Lite host.

[0080] like Figure 4 As shown in the figure, the configuration instruction (Config-Instruction) used by the configuration proxy module has a bit width of 32-bit. According to the influence on the configuration process, it can be divided into control instructions that can affect the process scheduling and expression instructions that only affect the final configuration. The control instruction includes the control command, and the expression instruction includes the target address, data selection, replacement selection and configuration data. The data selection, replacement selection and configuration data can all use the full 32-bit bit width. Each control instruction and the specified number of expression instructions following it together constitute an expression sequence. A target address and a set of expression instructions that determine the configuration data together constitute a configuration pair.

[0081] Among them, the control command (command, CMD) is used to manage the configuration process and identify the subsequent instruction type. The functions of its various bit fields are shown in Table 1; the target address (address, ADDR) is the address information of a configuration pair; the data strobe (strobe, STRB) indicates which bits in the configuration data need to be configured through a logic high, and the logic low indicates which bits of the original data of the target address need to keep the original value; the replacement strobe (replace, REPL) indicates which bits in the configuration data need to be replaced by additional data received from the configuration agent module from the external host instead of the configuration instruction through a logic high; the configuration data DATA, that is, the 32-bit original data to be configured to the target address, is not the value that can be finally implemented at the target address, and it also needs to be selected and replaced.

[0082] Table 1 Bit field functions of control commands

[0083]

[0084]

[0085] Step S3, reading the configuration instructions one by one from the buffer, the configuration instructions including control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence.

[0086] In one embodiment, after reading the configuration instructions one by one from the buffer, it also includes: in response to reading a control instruction from the buffer, judging the command type of the control instruction, the command type including a configuration command, a polling command and a jump command; in response to the control instruction being a configuration command or a jump command, determining the configuration number of expression instructions in the expression sequence according to the control instruction, and reading the configuration number of expression instructions from the buffer in sequence.

[0087] As shown in Table 1, the types of control commands include configuration commands, polling commands, and jump commands, which are identified by bit [31:30] of the command. A control command is usually followed by a number of expression commands, the number of which is identified by bit [15:0] of the control command. After processing the configuration number of expression commands, the configuration proxy module will identify the next command as a control command.

[0088] For example, the configuration format in a conventional configuration scenario is as follows: Figure 5As shown in the figure, the type is determined by analyzing the control instruction, where instruction bit[31:30] is 2'b01, indicating that the instruction is a configuration command; instruction bit

[29] is 0, indicating that the configuration data will be completely written to the target address; instruction bit

[28] is 0, indicating that it is a non-continuous configuration, and each subsequent configuration pair needs to provide a target address independently; instruction bit

[27] is 0, indicating that the configuration data does not need to be modified; instruction bit[15:0] specifies how many configuration pairs there are after the control instruction, and each configuration pair contains two instructions: the target address and the configuration data.

[0089] Based on the above steps, the types and quantities of instructions contained in the configuration pair vary depending on the configuration scenario. By intelligently identifying different instruction types and executing corresponding operations, and obtaining the configuration quantity of the expression instruction through control instructions, the complexity of instruction processing can be reduced, the configuration efficiency can be improved, and different configuration scenarios can be adapted.

[0090] In one embodiment, after reading the configuration instructions one by one from the buffer, it also includes: in response to reading an expression instruction from the buffer, judging the expression type of the expression instruction, the expression type including the target address, data select, replacement select and configuration data; in response to the expression instruction being the target address, data select or replacement select, temporarily storing the expression instruction for standby use, and reading the next expression instruction from the buffer; in response to the expression instruction being configuration data, combining the configuration data with the data select or the replacement select to determine the final configuration data.

[0091] Based on the above steps, different configuration scenarios can be flexibly handled through a variety of expression instructions, and different processing operations can be performed according to the instruction type to obtain the final configuration data, ensuring the accuracy of the configuration task while reducing resource consumption.

[0092] Step S4, executing the configuration instructions in the expression sequence in sequence to configure the programmable registers of the target module.

[0093] In one embodiment, the sequential execution of the configuration instructions in the expression sequence to configure the programmable registers of the target module includes: in response to the selection configuration of the first target module, a first configuration command, a first target address, a first data selection and a first configuration data form a first expression sequence, wherein the first data selection is used to indicate the bits that need to be configured in the first configuration data; reading the current data value from the first target address, bitwise NOTing the first data selection and performing a bitwise AND operation with the current data value to obtain a first data value; performing a bitwise AND operation with the first data selection and the first configuration data to obtain a second data value; performing a bitwise OR operation with the first data value and the second data value to obtain a first final configuration data; and writing the first final configuration data to the first target address to configure the programmable registers of the first target module.

[0094] Exemplarily, the configuration pair format in the gating configuration scenario is as follows: Figure 6 As shown, there are three instructions including the first target address, the first data strobe and the first configuration data, where each bit in the first data strobe instruction indicates whether the corresponding bit of the subsequent configuration data needs to be configured. Logic high indicates yes, and logic low indicates no. For the control instruction read, instruction bit[31:30] is 2'b01, indicating that the instruction is a configuration command; instruction bit

[29] is 1, indicating that the configuration data needs to be strobed before it can be written to the target address; instruction bit

[28] is 0, indicating non-continuous configuration, and each subsequent configuration pair needs to provide a target address independently; instruction bit

[27] is 0, indicating that the configuration data does not need to be modified; instruction bit[15:0] specifies how many configuration pairs there are after the control instruction.

[0095] After the configuration proxy module obtains the first data strobe (denoted as strobe), it will go to the first target address to read its current data value (denoted as rd_data), and perform a bitwise AND operation on it with the data after the bitwise NOT of the first data strobe, so as to filter out the part that remains unchanged after the configuration; after obtaining the first configuration data (denoted as cfg_data), the first data strobe is bitwise ANDed with the first configuration data, and then bitwise ORed with the current data value after the above screening, to obtain the first final configuration data wr_data to be written to the first target address = (rd_data&(~strobe))|(cfg_data&strobe).

[0096] Based on the above steps, using data selection instructions, you can flexibly control which bits need to be configured and which bits need to remain unchanged, instead of configuring the entire data field. This can reduce the number of configuration instructions that need to be sent, simplify the configuration process, and improve the flexibility and accuracy of the configuration.

[0097] In one embodiment, the sequential execution of the configuration instructions in the expression sequence to configure the programmable register of the target module also includes: in response to the replacement configuration of the second target module, the second configuration command, the second target address, the replacement select and the second configuration data form a second expression sequence, wherein the replacement select is used to indicate the bit that needs to be replaced in the second configuration data; in response to the presence of multiple replacement selects in the second expression sequence, the values ​​to be replaced corresponding to the multiple replacement selects are filled into the target buffer in sequence from low to high; the number of the target buffer is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; the value to be replaced is sequentially and bitwise ANDed with the multiple replacement selects to obtain a first replacement value; the replacement select is bitwise NOTed and bitwise ANDed with the second configuration data to obtain a second replacement value; the first replacement value and the second replacement value are bitwise ORed to obtain a second final configuration data; the second final configuration data is written to the second target address to configure the programmable register of the second target module.

[0098] For example, the configuration pair format in the replacement configuration scenario is as follows: Figure 7 As shown, there are 3 instructions including the second target address, replacement strobe and second configuration data. If data strobe is also required, the data strobe should appear before the replacement strobe, and there are 4 configuration commands in total. For the control instruction read, instruction bit[31:30] is 2'b01, indicating that the instruction is a configuration command; instruction bit

[29] is 0, indicating that the configuration data will be written completely to the target address; instruction bit

[28] is 0, non-continuous configuration, indicating that each subsequent configuration pair needs to provide a target address independently; instruction bit

[27] is 1, indicating that the configuration data needs to be modified; instruction bit[15:0] specifies how many configuration pairs there are after the control instruction.

[0099] The configuration proxy module needs to prepare several buffers for the configuration stream. During the replacement configuration, according to the buffer number specified by the command bit [23:20] at the beginning of the expression sequence, a value to be replaced (replace) is obtained from the corresponding buffer. After obtaining the replacement strobe (rep_strobe) and the second configuration data (cfg_data), the value to be replaced after the replacement strobe is replaced with the corresponding bit of the second configuration data, and the second final configuration data wr_data to be written to the second target address is obtained = (cfg_data & (~rep_strobe)) | (replace & rep_strobe).

[0100] Furthermore, the replacement source during replacement configuration comes from the buffer in the configuration proxy module, and the data in this buffer is also obtained from the external host. Therefore, for each replacement configuration, a 32-bit replacement value needs to be obtained from the buffer as the replacement source (buffer). When there are multiple replacement configuration requirements, the external host needs to send the required replacement source data multiple times.

[0101] like Figure 8 As shown, for permutation strobe 1, only bit[3:0], a total of 4 bits, need to be permuted; for permutation strobe 2, only bit[0] and bit[27:26], a total of 3 bits, need to be permuted; for permutation strobe 3, only bit[19:16], a total of 4 bits, need to be permuted. In the conventional permutation mode, the above three permutation configurations, a total of 11 bits of permutation source data, require the external host to send three write operations to the configuration agent module, and occupy three buffer slots, which is contrary to the starting point of reducing the configuration work of the external host. Therefore, the configuration agent module can be used to implement compression permutation, that is, the permutation valid source data required by multiple permutation strobes in the sequence are filled in the same buffer slot from low to high in sequence, leaving no invalid bits.

[0102] Based on the above steps, by using permutation configuration and compressed permutation configuration, multiple data used for permutation can be compressed by eliminating invalid bits and splicing them, and then the partial bit range of each configuration value of each configuration sequence can be flexibly modified with the least number of processor configurations, thereby reducing the number of processor configurations.

[0103] In one embodiment, in response to reading a control instruction from the buffer, determining the command type of the control instruction also includes: in response to the control instruction being a polling command, the polling command, the third target address, the second data select and the expected data constitute a third expression sequence; regularly reading the current state value from the third target address, and comparing the current state value with the select bit of the expected data; in response to the current state value being unequal to the select bit of the expected data, and not reaching the maximum number of polling times, returning to polling after a waiting interval, wherein the maximum number of polling times is determined by the polling command; in response to the current state value being equal to the select bit of the expected data, or reaching the maximum number of polling times, polling ends.

[0104] For example, the configuration format in the status polling scenario is as follows: Fig. 9As shown, it includes a third target address, a second data strobe and expected data, wherein the third target address is the target address of the status query. For the control instruction read, instruction bit [31:30] is 2'b10, indicating that the instruction is a polling command, instruction bit

[29] indicates whether the current status value read needs to be filtered; instruction bit

[28] is invalid; instruction bit

[25] indicates whether the entire configuration flow is terminated after the polling timeout fails; instruction bit [23:20] indicates which buffer the current status value read back is to be temporarily stored in; instruction bit [19:16] indicates how many device clock cycles the polling interval is; instruction bit [15:0] indicates the maximum number of polling times.

[0105] The proxy module is configured to read the current state value (recorded as rd_data) from the third target address at regular intervals, and compare the strobe bits of the current state value and the expected data (recorded as targ_data). If they are equal, the polling ends. If they are not equal and the maximum number of polling times has not been reached, the polling continues after the polling interval. Whether the final polling is successful, pass = ((rd_data & strobe) = = (targ_data & strobe)).

[0106] Furthermore, in response to a successful poll, the polling status value is stored in a buffer according to the buffer position selected by the instruction bit [23:20] in the polling command; the polling status value is extracted from the buffer as configuration data of the replacement configuration; according to the replacement configuration instruction, the value to be replaced is obtained from the selected buffer position, and the value to be replaced after the replacement selection is replaced with the corresponding bit of the polling status value, thereby realizing the write back of the polling status value.

[0107] Preferably, by default, the configuration command will not be blocked by the previous polling command in the same expression sequence. However, when bit [19:16] of the configuration command is non-0 (for example, N), the configuration command will be affected by the Nth polling state before it. Only after the Nth polling before it is completed, the configuration command and its configuration sequence can continue to execute.

[0108] Preferably, if Fig.10 As shown, in order to reduce the storage usage of the configuration instructions, the target address can be provided only in the first configuration pair of the expression sequence. The target addresses of the subsequent configuration pairs will be incremented by the configuration agent module. If there are addresses that need to be skipped in the middle, a 32-bit all-1 flag is used to achieve continuous configuration.

[0109] Based on the above steps, through the polling command, the read operation of the target address is automatically initiated at a certain interval, and the specified bit range of the read result is compared with the expected value, so that automatic status query can be realized, and the polling command can be combined with the replacement configuration to realize status writeback.

[0110] It should be understood that although Figure 2-3 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 2-3 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0111] In one embodiment, Fig.11 As shown, a chip configuration device is provided, including: a trigger module, a cache module, an acquisition module and an execution module, wherein:

[0112] A trigger module, used for receiving a trigger instruction sent by an external host, wherein the trigger instruction is used for triggering the configuration proxy module;

[0113] A cache module, used to obtain configuration instructions in batches from an external memory through the configuration proxy module, and store the configuration instructions in a buffer of the configuration proxy module;

[0114] An acquisition module, used for reading the configuration instructions one by one from the buffer, wherein the configuration instructions include control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence;

[0115] The execution module is used to execute the configuration instructions in the expression sequence in sequence to configure the programmable registers of the target module.

[0116] In one embodiment, it further includes a deployment module, wherein the deployment module is used to deploy the configuration agent module; and write the startup address into the programmable register of the configuration agent module through the external host.

[0117] In one embodiment, an analysis module is also included, which is used to judge the command type of the control instruction in response to reading the control instruction from the buffer, and the command type includes a configuration command, a polling command and a jump command; in response to the control instruction being a configuration command or a jump command, determine the configuration number of expression instructions in the expression sequence according to the control instruction, and read the configuration number of expression instructions from the buffer in sequence.

[0118] In one embodiment, the analysis module is also used to, in response to reading an expression instruction from the buffer, determine the expression type of the expression instruction, the expression type including the target address, data select, replacement select and configuration data; in response to the expression instruction being the target address, data select or replacement select, temporarily store the expression instruction for standby use and read the next expression instruction from the buffer; in response to the expression instruction being configuration data, combine the configuration data with the data select or the replacement select to determine the final configuration data.

[0119] In one embodiment, the execution module is also used to respond to the configuration of the first target module, and the first configuration command, the first target address, the first data select and the first configuration data constitute a first expression sequence, wherein the first data select is used to indicate the bit that needs to be configured in the first configuration data; read the current data value from the first target address, perform a bitwise AND operation on the first data select and the current data value after bitwise NOT, to obtain a first data value; perform a bitwise AND operation on the first data select and the first configuration data to obtain a second data value; perform a bitwise OR operation on the first data value and the second data value to obtain a first final configuration data; write the first final configuration data to the first target address to configure the programmable register of the first target module.

[0120] In one embodiment, the execution module is also used to respond to the replacement configuration of the second target module, and the second configuration command, the second target address, the replacement select and the second configuration data constitute a second expression sequence, wherein the replacement select is used to indicate the bit that needs to be replaced in the second configuration data; in response to the presence of multiple replacement selects in the second expression sequence, the values ​​to be replaced corresponding to the multiple replacement selects are filled into the target buffer in sequence from low to high; the number of the target buffer is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; the value to be replaced is bitwise ANDed with the multiple replacement selects in sequence to obtain a first replacement value; the replacement select is bitwise NOTed and then bitwise ANDed with the second configuration data to obtain a second replacement value; the first replacement value and the second replacement value are bitwise ORed to obtain a second final configuration data; the second final configuration data is written to the second target address to configure the programmable register of the second target module.

[0121] In one embodiment, the analysis module is also used to respond to the control instruction being a polling command, wherein the polling command, the third target address, the second data select and the expected data constitute a third expression sequence; periodically read the current state value from the third target address, and compare the current state value with the select bit of the expected data; in response to the current state value being unequal to the select bit of the expected data, and not reaching the maximum number of polling times, return to polling after a waiting interval, wherein the maximum number of polling times is determined by the polling command; in response to the current state value being equal to the select bit of the expected data, or reaching the maximum number of polling times, polling ends.

[0122] For the specific definition of the chip configuration device, please refer to the definition of the chip configuration method above, which will not be repeated here. Each module in the above chip configuration device can be implemented in whole or in part by software, hardware and a combination thereof. The above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0123] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Fig.12 As shown. The computer device includes a processor, a memory, a network interface and a database connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store control instruction data. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a chip configuration method is implemented.

[0124] Those skilled in the art will understand that Fig.12 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0125] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program:

[0126] Receiving a trigger instruction sent by an external host, wherein the trigger instruction is used to trigger the configuration proxy module;

[0127] Acquire configuration instructions in the external memory in batches through the configuration proxy module, and store the configuration instructions in the buffer of the configuration proxy module;

[0128] Reading the configuration instructions one by one from the buffer, the configuration instructions including control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence;

[0129] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0130] In one embodiment, when the processor executes the computer program, the following steps are further implemented: deploying the configuration agent module; and writing the startup address into the programmable register of the configuration agent module through the external host.

[0131] In one embodiment, the processor further implements the following steps when executing a computer program: in response to reading a control instruction from the buffer, determining a command type of the control instruction, wherein the command type includes a configuration command, a polling command, and a jump command; in response to the control instruction being a configuration command or a jump command, determining a configuration number of expression instructions in the expression sequence according to the control instruction, and sequentially reading the configuration number of expression instructions from the buffer.

[0132] In one embodiment, the processor further implements the following steps when executing a computer program: in response to reading an expression instruction from the buffer, determining the expression type of the expression instruction, the expression type including a target address, a data select, a replacement select and configuration data; in response to the expression instruction being a target address, a data select or a replacement select, temporarily storing the expression instruction for standby use, and reading the next expression instruction from the buffer; in response to the expression instruction being configuration data, combining the configuration data with the data select or the replacement select to determine the final configuration data.

[0133] In one embodiment, when the processor executes the computer program, the following steps are also implemented: in response to the first target module being configured by a strobe, a first configuration command, a first target address, a first data strobe and first configuration data form a first expression sequence, wherein the first data strobe is used to indicate the bits in the first configuration data that need to be configured; a current data value is read from the first target address, and the first data strobe is bitwise negated and then bitwise ANDed with the current data value to obtain a first data value; the first data strobe is bitwise ANDed with the first configuration data to obtain a second data value; the first data value is bitwise ORed with the second data value to obtain a first final configuration data; and the first final configuration data is written to the first target address to configure the programmable register of the first target module.

[0134] In one embodiment, the processor further implements the following steps when executing the computer program: in response to performing a replacement configuration on the second target module, the second configuration command, the second target address, the replacement select and the second configuration data form a second expression sequence, wherein the replacement select is used to indicate the bit that needs to be replaced in the second configuration data; in response to the presence of multiple replacement selects in the second expression sequence, the values ​​to be replaced corresponding to the multiple replacement selects are filled into the target buffer in sequence from low to high; the number of the target buffer is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; the value to be replaced is sequentially and bitwise ANDed with the multiple replacement selects to obtain a first replacement value; the replacement select is bitwise NOTed and bitwise ANDed with the second configuration data to obtain a second replacement value; the first replacement value is bitwise ORed with the second replacement value to obtain a second final configuration data; the second final configuration data is written into the second target address to configure the programmable register of the second target module.

[0135] In one embodiment, the processor also implements the following steps when executing the computer program: in response to the control instruction being a polling command, the polling command, the third target address, the second data select and the expected data constitute a third expression sequence; periodically reading the current state value from the third target address, and comparing the current state value with the select bit of the expected data; in response to the current state value being unequal to the select bit of the expected data and not reaching the maximum number of polling times, returning to polling after a waiting interval, wherein the maximum number of polling times is determined by the polling command; in response to the current state value being equal to the select bit of the expected data, or reaching the maximum number of polling times, polling ends.

[0136] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0137] Receiving a trigger instruction sent by an external host, wherein the trigger instruction is used to trigger the configuration proxy module;

[0138] Acquire configuration instructions in the external memory in batches through the configuration proxy module, and store the configuration instructions in the buffer of the configuration proxy module;

[0139] Reading the configuration instructions one by one from the buffer, the configuration instructions including control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence;

[0140] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0141] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: deploying the configuration agent module; writing the startup address into the programmable register of the configuration agent module through the external host.

[0142] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to reading a control instruction from the buffer, determining the command type of the control instruction, the command type including a configuration command, a polling command and a jump command; in response to the control instruction being a configuration command or a jump command, determining the configuration number of expression instructions in the expression sequence according to the control instruction, and reading the configuration number of expression instructions from the buffer in sequence.

[0143] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to reading an expression instruction from the buffer, determining the expression type of the expression instruction, the expression type including the target address, data select, replacement select and configuration data; in response to the expression instruction being the target address, data select or replacement select, temporarily storing the expression instruction for standby use, and reading the next expression instruction from the buffer; in response to the expression instruction being configuration data, combining the configuration data with the data select or the replacement select to determine the final configuration data.

[0144] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to the first target module being configured, a first configuration command, a first target address, a first data select and first configuration data form a first expression sequence, wherein the first data select is used to indicate the bit that needs to be configured in the first configuration data; reading the current data value from the first target address, bitwise negating the first data select and performing a bitwise AND operation with the current data value to obtain a first data value; performing a bitwise AND operation with the first data select and the first configuration data to obtain a second data value; performing a bitwise OR operation with the first data value and the second data value to obtain a first final configuration data; and writing the first final configuration data to the first target address to configure the programmable register of the first target module.

[0145] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to performing a replacement configuration on the second target module, the second configuration command, the second target address, the replacement select and the second configuration data form a second expression sequence, wherein the replacement select is used to indicate the bit that needs to be replaced in the second configuration data; in response to the presence of multiple replacement selects in the second expression sequence, the values ​​to be replaced corresponding to the multiple replacement selects are filled into the target buffer in sequence from low to high; the number of the target buffer is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; the value to be replaced is bitwise ANDed with the multiple replacement selects in sequence to obtain a first replacement value; the replacement select is bitwise NOTed and then bitwise ANDed with the second configuration data to obtain a second replacement value; the first replacement value and the second replacement value are bitwise ORed to obtain a second final configuration data; the second final configuration data is written to the second target address to configure the programmable register of the second target module.

[0146] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to the control instruction being a polling command, the polling command, the third target address, the second data select and the expected data constitute a third expression sequence; the current state value is read from the third target address regularly, and the current state value is compared with the select bit of the expected data; in response to the current state value being unequal to the select bit of the expected data and the maximum number of pollings not being reached, polling is returned after a waiting interval, wherein the maximum number of pollings is determined by the polling command; in response to the current state value being equal to the select bit of the expected data or the maximum number of pollings being reached, polling ends.

[0147] In one embodiment, a computer product is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0148] Receiving a trigger instruction sent by an external host, wherein the trigger instruction is used to trigger the configuration proxy module;

[0149] Acquire configuration instructions in the external memory in batches through the configuration proxy module, and store the configuration instructions in the buffer of the configuration proxy module;

[0150] Reading the configuration instructions one by one from the buffer, the configuration instructions including control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence;

[0151] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0152] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: deploying the configuration agent module; writing the startup address into the programmable register of the configuration agent module through the external host.

[0153] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to reading a control instruction from the buffer, determining the command type of the control instruction, the command type including a configuration command, a polling command and a jump command; in response to the control instruction being a configuration command or a jump command, determining the configuration number of expression instructions in the expression sequence according to the control instruction, and reading the configuration number of expression instructions from the buffer in sequence.

[0154] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to reading an expression instruction from the buffer, determining the expression type of the expression instruction, the expression type including the target address, data select, replacement select and configuration data; in response to the expression instruction being the target address, data select or replacement select, temporarily storing the expression instruction for standby use, and reading the next expression instruction from the buffer; in response to the expression instruction being configuration data, combining the configuration data with the data select or the replacement select to determine the final configuration data.

[0155] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to the first target module being configured, a first configuration command, a first target address, a first data select and first configuration data form a first expression sequence, wherein the first data select is used to indicate the bit that needs to be configured in the first configuration data; reading the current data value from the first target address, bitwise negating the first data select and performing a bitwise AND operation with the current data value to obtain a first data value; performing a bitwise AND operation with the first data select and the first configuration data to obtain a second data value; performing a bitwise OR operation with the first data value and the second data value to obtain a first final configuration data; and writing the first final configuration data to the first target address to configure the programmable register of the first target module.

[0156] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to performing a replacement configuration on the second target module, the second configuration command, the second target address, the replacement select and the second configuration data form a second expression sequence, wherein the replacement select is used to indicate the bit that needs to be replaced in the second configuration data; in response to the presence of multiple replacement selects in the second expression sequence, the values ​​to be replaced corresponding to the multiple replacement selects are filled into the target buffer in sequence from low to high; the number of the target buffer is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; the value to be replaced is bitwise ANDed with the multiple replacement selects in sequence to obtain a first replacement value; the replacement select is bitwise NOTed and then bitwise ANDed with the second configuration data to obtain a second replacement value; the first replacement value and the second replacement value are bitwise ORed to obtain a second final configuration data; the second final configuration data is written to the second target address to configure the programmable register of the second target module.

[0157] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: in response to the control instruction being a polling command, the polling command, the third target address, the second data select and the expected data constitute a third expression sequence; the current state value is read from the third target address regularly, and the current state value is compared with the select bit of the expected data; in response to the current state value being unequal to the select bit of the expected data and the maximum number of pollings not being reached, polling is returned after a waiting interval, wherein the maximum number of pollings is determined by the polling command; in response to the current state value being equal to the select bit of the expected data or the maximum number of pollings being reached, polling ends.

[0158] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0159] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0160] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A chip configuration method, characterized in that: include: Receiving a trigger instruction sent by an external host, wherein the trigger instruction is used to trigger the configuration proxy module; Acquire configuration instructions in the external memory in batches through the configuration proxy module, and store the configuration instructions in the buffer of the configuration proxy module; Reading the configuration instructions one by one from the buffer, the configuration instructions including control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence; The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

2. The chip configuration method according to claim 1, characterized in that: Before receiving the trigger instruction sent by the external host, the method further includes: Deploy the configuration agent module; The startup address is written into the programmable register of the configuration agent module by the external host.

3. The chip configuration method according to claim 1, characterized in that: After reading the configuration instructions one by one from the buffer, the method further includes: In response to reading a control instruction from the buffer, determining a command type of the control instruction, the command type including a configuration command, a polling command, and a jump command; In response to the control instruction being a configuration command or a jump command, the configuration quantity of expression instructions in the expression sequence is determined according to the control instruction, and the configuration quantity of expression instructions is read sequentially from the buffer.

4. The chip configuration method according to claim 1 or 3, characterized in that: After reading the configuration instructions one by one from the buffer, the method further includes: In response to reading an expression instruction from the buffer, determining an expression type of the expression instruction, the expression type including a target address, a data strobe, a replacement strobe and configuration data; In response to the expression instruction being a target address, a data strobe or a replacement strobe, temporarily storing the expression instruction for standby use, and reading a next expression instruction from the buffer; In response to the expression instruction being configuration data, the configuration data is combined with the data strobe or the replacement strobe to determine final configuration data.

5. The chip configuration method according to claim 4, characterized in that: The sequentially executing the configuration instructions in the expression sequence to configure the programmable registers of the target module includes: In response to performing strobe configuration on the first target module, a first configuration command, a first target address, a first data strobe and first configuration data form a first expression sequence, wherein the first data strobe is used to indicate a bit in the first configuration data that needs to be configured; Read a current data value from the first target address, perform a bitwise AND operation on the first data strobe and the current data value to obtain a first data value; Performing a bitwise AND operation on the first data strobe and the first configuration data to obtain a second data value; Performing a bitwise OR operation on the first data value and the second data value to obtain first final configuration data; The first final configuration data is written into the first target address to configure the programmable register of the first target module.

6. The chip configuration method according to claim 4, characterized in that: The sequentially executing the configuration instructions in the expression sequence to configure the programmable registers of the target module also includes: In response to performing replacement configuration on the second target module, the second configuration command, the second target address, the replacement strobe and the second configuration data form a second expression sequence, wherein the replacement strobe is used to indicate a bit position in the second configuration data that needs to be replaced; In response to the presence of a plurality of replacement strobes in the second expression sequence, filling the to-be-replaced values ​​corresponding to the plurality of replacement strobes into the target buffer in order from low to high; Obtaining the serial number of the target buffer through the second configuration command, and obtaining the value to be replaced from the target buffer according to the serial number; Performing a bitwise AND operation on the to-be-replaced value and the plurality of replacement strobes in sequence to obtain a first replacement value; Performing a bitwise AND operation on the replacement strobe and the second configuration data to obtain a second replacement value; Performing a bitwise OR operation on the first replacement value and the second replacement value to obtain second final configuration data; The second final configuration data is written into the second target address to configure the programmable register of the second target module.

7. The chip configuration method according to claim 4, characterized in that: In response to reading a control instruction from the buffer, determining a command type of the control instruction further includes: In response to the control instruction being a polling command, the polling command, the third target address, the second data strobe and the expected data form a third expression sequence; Periodically reading a current state value from the third target address, and comparing the current state value with a strobe bit of the expected data; In response to the current state value being not equal to the selection bit of the expected data and the maximum polling number not being reached, returning to polling after a waiting interval, wherein the maximum polling number is determined by the polling command; In response to the current state value being equal to the selected bit of the expected data, or reaching the maximum polling number, the polling ends.

8. A chip configuration device, characterized in that: The device comprises: A trigger module, used for receiving a trigger instruction sent by an external host, wherein the trigger instruction is used for triggering the configuration proxy module; A cache module, used to obtain configuration instructions in batches from an external memory through the configuration proxy module, and store the configuration instructions in a buffer of the configuration proxy module; An acquisition module, used for reading the configuration instructions one by one from the buffer, wherein the configuration instructions include control instructions and expression instructions, wherein one control instruction and a plurality of expression instructions form an expression sequence; The execution module is used to execute the configuration instructions in the expression sequence in sequence to configure the programmable registers of the target module.

9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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